JP2002189527A - Radiation noise reducing device and its method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a radiation noise reducing device and method capable of reducing a radiation noise by diffusing the frequency spectrum of a clock signal without newly adding components. SOLUTION: The radiation noise reducing device for reducing a radiation electromagnetic noise by diffusing the frequency spectrum of a clock signal is provided with a first digital signal CLK1 having fixed periodicity, a second digital signal CLK2 having periodicity different from that of the first digital signal, and a signal generating means DFF for obtaining a third digital signal by latching the second digital signal CLK2 by the first digital signal CLK1. In this case, the third digital signal is used as the clock signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to noise reduction in a digital circuit driven by a clock signal, a system having a clock signal, and the like. The present invention relates to a radiation noise reduction device and a radiation noise reduction method for reducing the noise level by spreading the spectral energy of the frequency band of the above.

[0002]

2. Description of the Related Art Conventionally, there is a method for reducing noise by spreading a frequency spectrum of a clock signal using signal feedback. According to this technique, the frequency spectrum can be spread as shown in FIG. 3 by changing the frequency of the clock signal having the waveform as shown in FIG. 1 at a constant period as shown in FIG. It can be seen that the spectral energy of the peak is reduced by diffusing the spectral energy in this manner.

[0003] The need for this technique arises due to the policing of electromagnetic noise. For example, in Japan, the upper limit of radiation noise is set for each frequency band according to the VCCI standard, and it is not permitted to sell machines, devices, and the like whose radiation noise exceeds it. Therefore, for each manufacturer that manufactures and sells various products,
There is a need for efforts to reduce radiated noise as much as possible.

[0004] Regulation of this radiation noise is very strict. In order to pass this regulation, manufacturers must develop products with due consideration for radiated noise. For this reason, each manufacturer takes measures such as, for example, widening the GND or covering the electric board with a metal plate.

[0005] However, even with such careful consideration, a prototype manufactured at the end of the development stage may emit radiated noise exceeding the regulation value due to a change in product specifications during development or the like. There is. In such a case, it is not desirable to further change the specification for the purpose of reducing radiation noise, considering the schedule, cost, and the like comprehensively. Therefore, in such a case, it is effective to reduce the radiation noise by the method as in the above-described related art. In this conventional spectrum spreading method, in order to spread the frequency spectrum of a clock signal, a timing generator is arranged at the output of the clock signal, and the frequency spectrum of the clock signal is spread by the timing generator. That is, the role of this timing generator is to change the frequency of the input clock signal having a waveform as shown in FIG. 1 at a constant period as shown in FIG.
Is to diffuse as shown in FIG. As described above, according to the conventional spread spectrum noise reduction method, it is possible to reduce the radiation noise by spreading the frequency spectrum of the clock signal by newly incorporating this timing generator component into a product.

[0006]

However, in the above prior art, as described above, it is necessary to newly incorporate a timing generator into the system. This causes a cost increase. As described above, the spread spectrum noise reduction method according to the prior art was able to spread the spectrum of the clock signal and reduce the level of radiation noise by newly incorporating a component for performing timing generation into a product. There was a problem that the cost of the product increased.

[0007] The present invention has been made in view of the above problems, and it is possible to reduce the radiation noise by spreading the frequency spectrum of the clock signal without adding a new component. It is an object to provide a reduction device and a radiation noise reduction method.

[0008]

According to the present invention, there is provided a radiation noise reducing apparatus for reducing electromagnetic noise emitted by spreading a frequency spectrum of a clock signal. A first digital signal having a constant periodicity, a second digital signal having a different periodicity from the first digital signal, and a second digital signal based on the first digital signal and the second digital signal. Means for obtaining a third digital signal whose frequency spectrum is spread more than the first digital signal and / or the second digital signal, and using the third digital signal as a clock signal It is characterized by the following.

A radiation noise reduction device according to the present invention for achieving the above object is a radiation noise reduction device which spreads a frequency spectrum of a clock signal to reduce electromagnetic noise radiated, and has a constant periodicity. Having a first digital signal, a second digital signal having a different periodicity from the first digital signal, and a third digital signal latching the second digital signal with the first digital signal. And a signal generation unit for obtaining the third digital signal, wherein the third digital signal is used as a clock signal.

A radiation noise reduction method according to the present invention for achieving the above object is a radiation noise reduction method for reducing electromagnetic noise emitted by spreading a frequency spectrum of a clock signal. Having a first digital signal and a step of obtaining a third digital signal by latching a second digital signal having a different periodicity from the first digital signal with the first digital signal, The third digital signal is used as a clock signal.

According to the present invention, for example, a system to which the present invention is applied includes two clock signals having different frequencies from each other.
And a signal generating means (logic) for inputting one clock signal and outputting a predetermined binary value. Various signal generation means can be considered. In this case, a basic AND circuit, OR circuit,
It is desirable to use a D flip-flop or a combination thereof.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below in detail with reference to the drawings. In addition,
The following embodiments are merely examples, and various modifications and changes can be made. For example, although a D flip-flop is used in this embodiment, the embodiment is not limited to this. For example, AND circuit or OR
Basic logic such as a circuit or an analog comparator can also be realized. The following embodiment shows the most effective one as an example.

FIG. 4 is a schematic block diagram of a system board into which the radiation noise reduction device of the present invention is to be incorporated.
The system board shown in FIG. 1 includes a central processing unit CPU (hereinafter, simply referred to as CPU) for controlling the entire system, an ASIC (hereinafter, simply referred to as ASIC) for performing a specific process of the system, and CPU and ASIC clock source CLK
G1 and CLKG2. As described above, it is effective to spread the frequency spectrum of the clock signal as one method for reducing the radiation noise radiated from the ASIC in the system board shown in FIG. When the conventional technology is applied to this system board, FIG.
It becomes as shown in. In the related art shown in FIG. 5, the frequency spectrum of the clock signal supplied from the clock generation source CLKG2 is spread by the timing generator 50, and the radiation noise radiated from the ASIC is reduced.

FIG. 6 is a block diagram showing a state in which the radiation noise reduction device according to one embodiment of the present invention is incorporated in the system board shown in FIG. In the present embodiment, as shown in FIG. 6, a first clock signal supplied from a clock generation source CLKG1 is supplied to a D flip-flop
A clock signal of DFF (hereinafter, also simply referred to as DFF),
A second clock signal supplied from a clock source CLKG2 is input as DFF data, and an output signal of the DFF is used as a clock signal of an ASIC. That is, signals are connected to the DFF as shown in FIG. By the way, it is effective in terms of cost to use the DFF provided in advance on the substrate. Normally, such a system board is provided with extra logic such as DFF for basic functions for debugging. By using the extra logic, the radiation noise reduction device of this embodiment can be easily incorporated into an existing system board without adding new components.

In general, digital devices such as personal computers, printers, and copiers have a plurality of devices on a single system board, and each device uses a clock signal having an appropriate frequency. For example, the frequency of the CPU is 100 MHz, the frequency of the ASIC is 30 MHz, and the frequency of the bus is 33 MHz. For this reason, digital equipment usually includes two or more types of clock generation sources (crystal oscillators) in order to supply a clock signal to each of these devices. Therefore, if it is an ordinary digital device, it is not necessary to newly provide a clock generation source for this embodiment, and an existing clock generation source can be used.

Next, the waveform of the signal CLK_C output from the D flip-flop DFF will be described. Now, suppose that in this system board, a CPU uses a clock signal of 100 MHz and an ASIC ASIC uses a clock signal of 30 MHz. Therefore, the clock source CLKG1
The frequency of the first clock signal CLK1 supplied from the
0 MHz and the second signal supplied from the clock source CLKG2.
The frequency of the clock signal CLK2 is 30 MHz. DFF when these two clock signals CLK1 and CLK2 are input to DFF
FIG. 8 shows a simulated waveform of the output signal CLK_C. The first clock signal CLK1 and the second
There is a possibility that the phases of the clock signals CLK2 are shifted from each other, but in this case, there is almost no phase shift (t = 0).
And when CLK1 and CLK2 operate almost simultaneously). Also, the waveforms are shown digitally for simplicity.
DFF converts the second clock signal CLK2 to the first clock signal CLK.
1 and plays a role of outputting the third clock signal CLK_C. From FIG. 8, the third output of this DFF
It can be understood that the clock signal CLK_C has a periodicity but does not have a specific frequency. Therefore, compared with the case where the second clock signal CLK2 is input as it is as the clock signal of the ASIC, the spectrum is spread and the noise level of the specific frequency band radiated from the ASIC is reduced.

Further, as can be seen from FIG. 8, the third clock signal of the present embodiment includes a frequency lower than 30 MHz and a frequency higher than 30 MHz.
The average frequency of the third clock signal is the original 30 MHz
Therefore, the operation speed of the device is not reduced by providing the device of the present embodiment.

In order to spread the frequency of the second clock signal, the frequency of the first clock signal must be higher than the frequency of the second clock signal (CLK1> CLK).
2). Further, when the value r (CLK1 / CLK2) of the ratio of the frequency of the first clock signal to the second clock signal becomes an integer, the frequency r of the second clock signal does not spread. Must not be an integer. In order to satisfy this condition, it is necessary to provide a separate clock generation source for each clock signal as in the present embodiment, instead of dividing the frequency from the clock signal of one clock generation source to obtain the other clock signal. is there. Furthermore, the value r of this frequency ratio
Is larger and smaller, the frequency is more difficult to spread. Therefore, the value r of this frequency ratio should be a value larger than approximately 1 and smaller than 10 (1 <r <1
0) is desirable.

According to the above-described embodiment, noise generated from a system board of a digital device such as a printer or a copier is converted into a clock generation source provided on the system board and a logic mounted as a spare on the system board. It can be easily reduced by using.

The present invention is not limited to the above embodiment, and various modifications can be made within the scope of the invention. For example, in the above embodiment, the first clock signal is 100 MHz, and the second clock signal is 30 MHz.
Although the case where the frequency is Hz has been described, the first and second frequencies may be any frequency as long as the value r of the ratio between the two satisfies the above requirements. The target device is not limited to the above-described ASIC, but can be used for various other devices using a clock signal.

[0021]

According to the radiation noise reduction device and the radiation noise reduction method of the present invention, it is possible to spread the frequency spectrum of the clock signal without adding a new component, thereby reducing the radiation noise.

[Brief description of the drawings]

FIG. 1 is a diagram showing a waveform of a clock signal.

FIG. 2 is a diagram showing a state of frequency change.

FIG. 3 is a frequency characteristic diagram of a clock signal.

FIG. 4 is a schematic block diagram of a system board into which the radiation noise reduction device of the present invention is to be incorporated.

FIG. 5 is a schematic block diagram showing a state where a conventional technique is incorporated into the system board of FIG. 4;

6 is a block diagram showing a state in which a radiation noise reduction device according to an embodiment of the present invention is incorporated in the system board shown in FIG. 4;

FIG. 7 is a signal connection diagram of a D flip-flop DFF.

FIG. 8 shows that the frequency of the first clock signal CLK1 is 100 MHz.
7 is a waveform diagram when the frequency of the second clock signal CLKG2 is 30 MHz and the waveform of the output signal CLK_C of the D flip-flop DFF is simulated.

[Explanation of symbols]

CPU: Central processing unit, ASIC: Asic, CLKG
.. Clock source, DFF ... D flip-flop, 5
0 ... Timing generator

Claims (5)

[Claims] 1. A radiation noise reduction device for reducing an electromagnetic noise emitted by spreading a frequency spectrum of a clock signal, wherein: a first digital signal having a constant periodicity; A second digital signal having a different periodicity, the frequency spectrum is spread more than the first digital signal and / or the second digital signal based on the first digital signal and the second digital signal. Means for obtaining a third digital signal, wherein the third digital signal is used as a clock signal. 2. A radiation noise reduction device for reducing an electromagnetic noise emitted by spreading a frequency spectrum of a clock signal, wherein: a first digital signal having a constant periodicity; A second digital signal having a different periodicity, and signal generating means for latching the second digital signal with the first digital signal to obtain a third digital signal, wherein the third digital signal A radiation noise reduction device characterized by using a signal as a clock signal. 3. The signal generation means is a D flip-flop, which inputs the second digital signal as data, inputs the first digital signal as a clock signal, and outputs an output signal as a third signal. 3. The radiation noise reduction device according to claim 2, wherein the radiation noise reduction device is a digital signal. 4. The frequency of the first digital signal is higher than the frequency of the second digital signal, and the value of the ratio of the frequency of the first digital signal to the frequency of the second digital signal is not an integer. 4. The radiation noise reduction device according to claim 2, wherein the value is larger than 1 and smaller than 10. 5. A radiation noise reduction method for reducing an electromagnetic noise emitted by spreading a frequency spectrum of a clock signal, wherein the first digital signal having a constant periodicity and the first digital signal are Latching a second digital signal having a different periodicity with the first digital signal to obtain a third digital signal, wherein the third digital signal is used as a clock signal. Noise reduction method.