JP2002189061A - Apparatus for evaluating response characteristics of phase-locked loop circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an apparatus for evaluating the response characteristics of PLL circuits, such as accelerated CPUs, MPUs, memories or the like which can evaluate the characteristics with a high reliability, by correctly measuring the characteristics. SOLUTION: A clock signal is supplied from a clock generator 21 to a jitter generator 22, and a jitter easy to observe on a frequency axis is added to the clock signal at the jitter generator. The signal outputted from the jitter generator is inputted to the PLL circuit 23 to be measured; the output signal is fetched into a waveform-measuring device 24; and response characteristics of the PLL circuit to be measured are evaluated by observing, measuring and/or analyzing frequency response characteristics of the PLL circuit to be measured.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an apparatus for measuring and evaluating response characteristics of a phase-locked loop (phase locked loop) circuit, and more particularly to a one-chip CPU (central processing unit) such as a microprocessor or a one-chip CPU. A phase-locked loop (hereinafter referred to as P
The present invention relates to a response characteristic evaluation device suitable for measuring and evaluating the response characteristic of a circuit (referred to as LL).

[0002]

2. Description of the Related Art In recent years, various small computers and electronic devices such as personal computers and microcomputers spread the spectrum of a clock signal generated from a reference clock generator in order to prevent the generation of jamming waves. . The CPU, MPU, and memory used in these computers and electronic devices have a built-in PLL circuit, and synchronize a clock signal generated inside the PLL circuit with this reference clock signal to various circuits and subsystems. Supply. Therefore, the PLL circuit must operate accurately in response to the spread spectrum clock signal. Therefore, the response characteristics of the PLL circuit are tested,
It is necessary to measure and / or analyze and evaluate whether it responds accurately to the spread spectrum clock signal.

Conventionally, as shown in FIG. 1, the response characteristics of a PLL circuit are obtained by taking in a frequency signal output from a clock generator 11 and a PLL circuit (a PLL circuit to be measured) 12 whose response characteristics are to be measured. A response characteristic evaluation device having a time interval measurement device (TMU) 13 such as a frequency counter to be analyzed, or a PLL circuit 12 to be measured
The control voltage of a voltage controlled oscillator (hereinafter, referred to as a VCO) is read and measured and evaluated by using a response characteristic evaluation device including a waveform measuring device 14 for observing, measuring, and / or analyzing the waveform. ing.

First, the frequency suddenly changes from f1 to f2 at a predetermined timing from the clock generator 11, that is, the frequency changes from f1 to f2 at a predetermined timing.
Generates a clock signal that changes step by step
It is applied to the LL circuit 12. When the clock signal whose frequency changes stepwise is input as described above, the PLL circuit under measurement 12 outputs a clock signal whose frequency gradually changes from f1 to f2. This clock signal is taken into the time interval measuring device 13 to analyze the step response characteristics of the PLL circuit 12 under test, and from the analysis result, determine whether the PLL circuit 12 under test accurately responds to the clock signal subjected to the spread spectrum. to decide.

Alternatively, a clock signal whose frequency changes stepwise from f1 to f2 is generated at a predetermined timing from the clock generator 11 and applied to the PLL circuit 12 to be measured, thereby controlling the VCO constituting the PLL circuit 12 to be measured. The voltage is taken into the waveform measuring device 14, and its waveform is observed, measured, and / or analyzed to determine whether the measured PLL circuit 12 accurately responds to the spread spectrum clock signal.

[0006]

However, the time interval measuring device is very expensive and has a problem in terms of economy. In addition, there is an upper limit on the frequency of a clock signal that can be analyzed by the time interval measuring device, and in the case of a high-frequency clock signal exceeding this limit, the response characteristics of the PLL circuit cannot be analyzed. In recent years, CPU, MPU,
Since the operation of the memory and the like has been accelerated and the clock frequency has been increasingly higher, the CPU and MP operating at a high speed operate in a response characteristic evaluation device having a conventional time interval measuring device.
The response characteristics of the PLL circuit built in U, memory, etc. cannot be measured.

On the other hand, VC inside the PLL circuit to be measured
The control voltage of O is taken out, and its waveform is observed, measured and / or
Alternatively, in the case of the above-described response characteristic evaluation device having the waveform measuring device 14 to be analyzed, since there is no upper limit to the frequency of the clock signal that can be analyzed, even a high-frequency clock signal
The response characteristics of the L circuit can be measured and evaluated. However, since the CPU, the MPU, and the memory are formed on a large scale integrated circuit (LSI) or super LSI, and formed on one chip, the control voltage of the VCO inside the PLL circuit is derived from the VCO to the chip. It is necessary to provide terminal pins for measurement in advance. However, it is difficult to provide such a terminal pin for measurement because it may adversely affect the CPU, the MPU, and the memory, and because it is an extra terminal pin required only for measurement. It is.

One object of the present invention is to provide a faster C
An object of the present invention is to provide a PLL circuit response characteristic evaluation device capable of accurately measuring the response characteristic of a PLL circuit incorporated in a PU, an MPU, a memory, or the like, and performing highly reliable evaluation. Another object of the present invention is to accurately measure the response characteristics of a PLL circuit without using a very expensive time interval measuring device and without having to derive a measuring terminal pin from the VCO of the PLL circuit. It is an object of the present invention to provide a PLL circuit response characteristic evaluation device that can evaluate with high reliability.

[0009]

According to one aspect of the present invention, there is provided a clock generating means for generating a clock signal, and adding jitter to the clock signal supplied from the clock generator. Jitter generating means, a phase-locked loop circuit to which a signal to which jitter added from the jitter generating means is input, and a signal output from the phase locked loop circuit, and the waveform thereof is observed. An apparatus for evaluating a response characteristic of a phase-locked loop circuit including a waveform measuring device for measuring and / or analyzing is provided.

[0010] In a preferred embodiment, the jitter generating means adds jitter that is easily observed on a frequency axis to the clock signal. Further, the jitter generating means sequentially modulates the phase of the high frequency clock signal with a plurality of low frequency signals having different amplitudes having different amplitudes, and on both sides of the clock signal on the frequency axis, the amplitude of the clock signal is smaller than the amplitude of the clock signal. A phase-modulated signal having a flat modulation characteristic to which a jitter of a plurality of low-frequency signals having a small constant amplitude is added is generated and input to the phase locked loop circuit to be measured.

In a preferred embodiment, the jitter generating means phase-modulates an audio frequency signal generator and an input clock signal with a constant level audio frequency signal supplied from the audio frequency signal generator. A phase modulator for adding jitter, which is easy to observe on the frequency axis, to the clock signal. Alternatively, the jitter generating means may be constituted by a real-time delay controller that controls the amount of delay given to the input clock signal in real time and adds jitter that is easily observed on the frequency axis to the clock signal.

The jitter added by the jitter generating means to the clock signal may be any of single tone jitter, multitone jitter and wideband random jitter. The waveform measuring device takes in a signal output from the phase locked loop circuit to be measured and performs fast Fourier transform,
Observe, measure and / or analyze in the frequency domain. As the waveform measuring device, a spectrum analyzer that captures a signal output from the phase locked loop circuit to be measured and observes, measures, and / or analyzes the spectrum of the waveform may be used.

Alternatively, as the waveform measuring device, a waveform digitizer which takes in a signal output from the phase locked loop circuit to be measured and observes, measures and / or analyzes the waveform, or the phase locked loop circuit to be measured A sampling digitizer that takes in a signal output from a, converts it into a low-speed signal waveform, and observes, measures, and / or analyzes the waveform may be used. According to the above configuration, it is possible to provide an inexpensive and highly accurate response characteristic evaluation device for a phase-locked loop circuit having no limit on the frequency of the clock signal. Therefore, it is possible to determine with high reliability whether or not the phase locked loop circuit accurately responds to the spread spectrum clock signal.

The above and other objects, configurations and effects of the present invention will be readily apparent from the following description of preferred embodiments with reference to the accompanying drawings.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to FIG. However, the present invention can be implemented in many different forms, and it should not be construed that the present invention is limited to the embodiments described below. The following embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. FIG. 2 is a block diagram showing an embodiment of a response characteristic evaluation device for a PLL circuit according to the present invention. The response characteristic evaluation device of this embodiment includes a clock generator 21, a jitter generator 22 that adds a jitter that is easy to observe on a frequency axis to a clock signal CLK of a predetermined frequency generated from the clock generator 21, The jitter-added clock signal output from the PLL circuit 23 to be measured is fetched,
Waveform measuring device 2 for observing, measuring and / or analyzing the waveform
4 is provided.

The clock generator 21 generates a clock signal CLK having an arbitrary frequency and supplies it to the jitter generator 22. For example, a radio frequency (RF) signal generator (synthesizer) can be used as the clock generator 21. In this embodiment, the jitter generator 22 that adds jitter that is easy to observe on the frequency axis to the clock signal CLK adds the jitter that is easy to observe on the frequency axis to the clock signal CLK by modulating the phase of the clock signal CLK. I do. For example, an audio frequency (A) connected to a phase modulator and its modulated signal input (jitter or delay control input)
F) The jitter generator 22 can be constituted by the signal generator. Alternatively, a real-time delay controller that adds a jitter that is easily observed on the frequency axis to the clock signal CLK by changing the delay amount given to the clock signal CLK in real time may be used as the jitter generator 22.

FIG. 3 uses a radio frequency signal generator 25 as the clock generator 21 and a phase modulator 26 and an audio frequency signal generator 27 connected to its modulation signal input 26c as the jitter generator 22. A specific example of the response characteristic evaluation device for a PLL circuit according to the present invention is shown. Next, the operation of the response characteristic evaluation device for the PLL circuit shown in FIG. 3 will be described. Radio frequency signal generator 25
, A predetermined frequency signal, that is, a clock signal CLK, is input to a phase modulator 26, and a constant level audio frequency signal AF from an audio frequency signal generator 27 is input to a modulation signal input 26c of the phase modulator 26 as a modulation signal. Supply. Accordingly, the phase modulator 26 modulates the phase of the clock signal CLK with the audio frequency signal AF, that is, changes the phase of the clock signal CLK according to the audio frequency signal AF. , Jitter that can be easily observed is added. In this case, the jitter added to the clock signal CLK may be any of single tone jitter (single tone signal jitter), multi-tone jitter (combination of a plurality of tone signals), and wideband random jitter.

When the clock signal CLK is phase-modulated by the audio frequency signal AF to add jitter, the phase-modulated clock signal output from the phase modulator 26 (hereinafter referred to as phase-modulated signal) PMS FIGS. 4 to 6 show the spectrums of the waveforms obtained by taking into the spectrum analyzer. FIG. 4 shows that the audio frequency signal of a fixed level of 1 kHz is supplied from the audio frequency signal generator 27 to the modulation signal input 2 of the jitter generator 22.
6c, the phase modulation signal PMS output from the phase modulator 26 when the clock signal CLK is phase-modulated.
3 shows the spectrum of the waveform of FIG. From FIG. 4, the clock signal C
It can be seen that the modulation characteristics exhibit the same level of 1 kHz jitter on both sides of the LK. FIG. 5 shows a waveform of the phase modulation signal PMS output from the phase modulator 26 when a constant level 2 kHz audio frequency signal is applied from the audio frequency signal generator 25 to the modulation signal input 26c of the phase modulator 26. Show the spectrum. It can be seen from FIG. 5 that the modulation characteristic shows the same level of 2 kHz jitter on both sides of the clock signal CLK. FIG. 6 shows an audio frequency signal of a certain level from the audio frequency signal generator 25 whose frequency is sequentially changed (for example,
1 kHz, 2 kHz, 3 kHz,...) Phase modulator 2
When the clock signal CLK is phase-modulated by sequentially applying it to the modulation signal input 26c of No. 6 and using the peak hold function of the spectrum analyzer, the spectrum of the waveform of the phase modulation signal PMS sequentially output from the phase modulator 26 is used. The spectrum in the case of holding and superimposing is shown. As can be easily understood from FIG. 6, a large number of fixed-level jitters (1 kHz, 2 kHz) are provided on both sides of the clock signal CLK.
z, 3 kHz,...). That is, it can be seen that flat modulation characteristics appear on both sides of the clock signal CLK input to the phase modulator 26.

Therefore, the phase-modulated signal PMS having a flat modulation characteristic as shown in FIG.
And the spectrum of the waveform of the phase modulation signal PMS2 output from the PLL circuit 23 is observed, measured, and / or analyzed by the waveform measuring device 24.
3 can accurately observe, measure, and / or analyze the response characteristics. For example, when the response of the measured PLL circuit 23 is fast, the flat modulation characteristic shown in FIG. 6 directly appears in the spectrum of the phase modulation signal PMS2 output from the measured PLL circuit 23 taken into the waveform measuring device 24. I do. On the other hand, when the response of the measured PLL circuit 23 is slow, the spectrum of the waveform of the phase modulation signal PMS2 output from the measured PLL circuit 23 taken into the waveform measuring device 24 is, as shown in FIG. It shows a modulation characteristic that attenuates when the frequency of the modulation signal (audio signal) increases.

In other words, if the response of the PLL circuit 23 to be measured is fast, the PLL circuit 23 follows the fluctuation (jitter) of the phase modulated signal (clock signal to which jitter is added) PMS input to the PLL circuit 23. Also fluctuates, but the input phase modulation signal PM
If the fluctuation of S is too fast to keep up with the response of the PLL circuit 23, this fluctuation is attenuated without being transmitted to the output of the PLL circuit 23. As a result, the phase modulation signal PMS2 output from the PLL circuit 23 to be measured is taken into the waveform measuring device 24, and the spectrum of the waveform is observed, measured, and / or analyzed in the frequency domain by, for example, fast Fourier transform (FFT). Thereby, it is possible to evaluate up to which frequency the measured PLL circuit 23 can accurately respond.

As can be easily understood from FIGS. 6 and 7, since the spectrum of the phase modulated signal PMS2 output from the PLL circuit 23 to be measured is symmetrical with respect to the frequency axis, as shown in FIG. The response of the PLL circuit 23 to be measured is obtained only by extracting and observing, measuring and / or analyzing the peak point (envelope) of the spectrum (which may be the left half) (that is, observing, measuring and / or analyzing the frequency response characteristic). Needless to say, the characteristics can be sufficiently evaluated. As described above, in the above embodiment,
Clock signal CLK generated from clock generator 21
At the audio frequency signal AF in the jitter generator 22.
The phase-modulated clock signal PMS is added to the measured PLL circuit 23, and the signal PMS2 output from the measured PLL circuit 23 is converted to a waveform measuring instrument. 24, and observes, measures, and / or analyzes the spectrum of the waveform of the output signal in the frequency domain to evaluate the response characteristics of the PLL circuit 23 to be measured. Without the need for expensive equipment
The response characteristics of the measured PLL circuit can be accurately measured and evaluated with high reliability. In addition, since the frequency of the clock signal supplied to the PLL circuit to be measured has no limit,
In recent years, the response characteristics of PLL circuits such as CPUs, MPUs, and memories to be used in computers and electronic devices with increasingly higher clock frequencies can be accurately measured and evaluated with high reliability.

Further, since it is not necessary to take out the control voltage of the VCO inside the PLL circuit to be measured and observe, measure and / or analyze its waveform, it is not necessary to previously derive a terminal pin for measurement from the VCO. . Thus, according to the above embodiment, it is accurately measured whether a PLL circuit such as a one-chip microprocessor, a memory or the like responds accurately to a spread-spectrum clock signal, and its response characteristics are evaluated with high reliability. can do. The waveform measuring device 24 is not limited to a spectrum analyzer for observing, measuring, and / or analyzing the spectrum of the waveform of a fetched signal, but is a waveform digitizer for observing, measuring, and / or analyzing the waveform of a fetched signal. , A sampling digitizer that uses a sampling technique like a sampling oscilloscope (samples the waveform of a high-speed repetitive signal and converts it into a waveform of a low-speed repetitive signal,
It goes without saying that a device having similar functions such as a device for performing observation, measurement, analysis, etc.) may be used.

In the above embodiment, the waveform measuring device 24
The signal captured by the FFT is observed, measured, and / or analyzed in the frequency domain by performing a fast Fourier transform (FFT), but is not limited to the fast Fourier transform. Further, C
Not only PLL circuits built in PUs, MPUs, memories, etc., but also PLL circuits to be used in various devices and devices, whether they are one-chip or not, can accurately detect spread-spectrum clock signals. It is possible to accurately measure whether or not to respond, and to evaluate the response characteristics with high reliability.

By the way, a microprocessor, a memory, and the like having the above-described PLL circuit are built in a semiconductor integrated circuit (I
It is also used in a semiconductor integrated circuit test device (IC test device) for testing C). Therefore, if the response characteristic evaluation device for a PLL circuit according to the present invention described above is incorporated in an IC test device, the response characteristic of a PLL circuit of a microprocessor or memory is measured when necessary or periodically,
Since the evaluation can be performed, there is an advantage that the measurement circuit, which is the heart of the IC test apparatus, can always be maintained in the best condition, and the IC can be tested with the best accuracy at all times.

Although the present invention has been described with reference to preferred embodiments, it will be appreciated that various modifications, changes and improvements may be made in the embodiments described above without departing from the spirit and scope of the invention. Will be obvious to the technician. Accordingly, the invention is not limited to the illustrated embodiments, but encompasses all such variations, modifications, and improvements that fall within the scope of the invention as defined by the appended claims. .

[0026]

As is apparent from the above description, according to the present invention, it is possible to provide an inexpensive and highly accurate response characteristic evaluation apparatus for a PLL circuit having no limit on the frequency of a clock signal. Therefore, there is an advantage that it is possible to determine with high reliability whether or not the PLL circuit accurately responds to the spread spectrum clock signal. Also,
There is an advantage that the response characteristics of PLL circuits such as CPUs, MPUs, and memories to be used in various types of computers and electronic devices that are increasingly faster can be accurately measured and evaluated with high reliability. .

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a conventional response characteristic evaluation device for a PLL circuit.

FIG. 2 is a block diagram showing a basic configuration of an embodiment of a response characteristic evaluation device for a PLL circuit according to the present invention.

FIG. 3 is a block diagram showing a specific example of a response characteristic evaluation device for a PLL circuit according to the present invention.

4 is a diagram showing an example of a spectrum of a phase modulation signal input to a measured PLL circuit in the response characteristic evaluation device shown in FIG. 3;

5 is a diagram showing another example of the spectrum of the phase modulation signal input to the PLL circuit to be measured in the response characteristic evaluation device shown in FIG.

6 is a diagram showing still another example of the spectrum of the phase modulation signal input to the PLL circuit to be measured in the response characteristic evaluation device shown in FIG.

7 is a diagram illustrating an example of a spectrum of a signal output from a measured PLL circuit in the response characteristic evaluation device illustrated in FIG. 3;

8 is a diagram illustrating an example of a frequency response characteristic of a measured PLL circuit measured by the response characteristic evaluation device illustrated in FIG. 3;

[Explanation of symbols]

 21: Clock Generator 22: Jitter Generator 23: PLL Circuit Under Measurement 24: Waveform Measuring Device 25: Radio Frequency Signal Generator 26: Phase Modulator 27: Audio Frequency Signal Generator

Claims (10)

[Claims] 1. A clock generating means for generating a clock signal, a jitter generating means for adding jitter to a clock signal supplied from the clock generating means, and a signal to which jitter output from the jitter generating means is added. A phase-locked loop circuit to be measured, and a waveform measuring device for capturing a signal output from the phase-locked loop circuit, and observing, measuring, and / or analyzing the waveform thereof. Response characteristic evaluation device for loop circuit. 2. The apparatus according to claim 1, wherein said jitter generating means adds jitter which is easy to observe on a frequency axis to said clock signal. 3. The jitter generating means sequentially modulates the phase of a high-frequency clock signal with a plurality of low-frequency signals having different amplitudes at different frequencies, and places the clock signal on both sides of the clock signal on the frequency axis. 2. The phase-locked loop circuit according to claim 1, wherein a phase-modulated signal having a flat modulation characteristic to which a jitter of a plurality of low-frequency signals having a constant amplitude smaller than the amplitude is added is generated and input to the phase-locked loop circuit to be measured. A response characteristic evaluation device for a phase-locked loop circuit as described in the above. 4. The jitter generating means phase-modulates an audio frequency signal generator and an input clock signal with a constant level audio frequency signal supplied from the audio frequency signal generator, and observes the frequency on a frequency axis. 4. A phase modulator for adding jitter that can be easily added to the clock signal.
The response characteristic evaluation device for a phase-locked loop circuit according to any one of the above. 5. The jitter generating means comprises a real-time delay controller for controlling a delay amount given to an input clock signal in real time and adding jitter which is easy to observe on a frequency axis to the clock signal. The response characteristic evaluation device for a phase-locked loop circuit according to claim 1 or 2, wherein: 6. The apparatus according to claim 1, wherein the jitter added to the clock signal by the jitter generating means is one of a single tone jitter, a multitone jitter and a wideband random jitter. 3. The response characteristic evaluation device for a phase-locked loop circuit according to item 1. 7. The waveform measuring device takes in a signal output from the phase locked loop circuit to be measured, performs fast Fourier transform, and performs observation, measurement, and / or measurement in a frequency domain.
7. The response characteristic evaluation device for a phase-locked loop circuit according to claim 1, wherein the response characteristic is analyzed. 8. The waveform measuring device according to claim 1, wherein the waveform measuring device comprises a spectrum analyzer which takes in a signal output from the phase locked loop circuit to be measured, and observes, measures and / or analyzes the spectrum of the waveform. The response characteristic evaluation device for a phase locked loop circuit according to claim 1. 9. The waveform measuring device according to claim 1, wherein the waveform measuring device comprises a waveform digitizer which takes in a signal output from the phase locked loop circuit to be measured, and observes, measures and / or analyzes the waveform. Item 7. The response characteristic evaluation device for a phase-locked loop circuit according to any one of Items 1 to 6. 10. The waveform measuring device includes a sampling digitizer that takes in a signal output from the phase locked loop circuit under test, converts the signal into a low-speed signal waveform, and observes, measures, and / or analyzes the waveform. 7. The response characteristic evaluation device for a phase-locked loop circuit according to claim 1, wherein: