JP2002185560A - Serial transfer method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a serial transfer method by which the speed of transmission and reception is further increased by shortening the idle time as much as possible. SOLUTION: The serial transfer method is provided with a first counter 31 which can measure the time between arbitrary transactions, a transmission register 33 in which an arbitrary value can be set, a second counter 32 which operates up to the set value in the transmission register 33 and a processing circuit for transmitting a data transmission packet when the value of the second counter becomes identical with the value of the transmission register 33.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a serial transfer system for transmitting and receiving serial data unilaterally or mutually in a system in which two or more devices are connected by a serial bus. It relates to a serial transfer method.

[0002]

2. Description of the Related Art In recent years, with the development of digital signal processing technology and the need for data sharing between devices of different media, many well-known devices equipped with a serial bus of the IEEE 1394 standard have been commercialized. This IE
A plurality of devices connected to the EE1394 standard serial bus are assigned node numbers unique to each device on the bus, and transmit a desired packet to a specific device by designating a partner node number. can do.

An operation called a write transaction, in which data is written from a transmitting node to a receiving node, will be described with reference to FIGS. Note that there are two types of transactions, one is a method called a split transaction, which is not described, and the other is a method called a unified transaction described below.

FIG. 3 is a schematic diagram showing an example of a write transaction operation when two nodes are connected on the simplest IEEE 1394 standard serial bus. In FIG. 3, reference numeral 100 denotes a transmitting node, 101
Indicates a receiving node, 102 and 105 indicate different data transmission packets, 103 and 106 indicate a data reception completion signal, and 104 indicates a busy state notification signal.

In the write transaction operation,
As shown in FIG. 3, first, the transmitting node 100 transmits a data transmission packet 102 to the receiving node 101. In the receiving node 101, the data transmission packet 10
2 can be received, a data reception completion signal 103 is transmitted to the transmission side node 100, and transmission and reception of the packet are completed.

[0006] On the other hand, if the receiving node 101 cannot receive the next data transmission packet 105, the receiving node 101 transmits a busy state notification signal 104 to the transmitting node 100 indicating that the packet could not be received. Busy status notification signal 10
4 that has received 4
The same data transmission packet 105 is transmitted again. Here, the data reception completion signal 103 from the receiving node 101
, The transmission / reception of the packet is completed. If the busy state notification signal 104 is received again, the same data transmission packet 105 is transmitted.

In this way, the transmitting node 100 can transmit a desired packet by repeating transmission of the data transmission packet 102 until receiving the data reception completion signal 106 from the receiving node 101.

FIG. 4 is a schematic diagram showing a case in which a plurality of write transactions are performed when four nodes are connected on an IEEE 1394 standard serial bus. In FIG. 4, reference numeral 110 denotes a transmitting node A, 111 denotes a receiving node A, 112 denotes a data transmission packet A, 113 denotes a data reception completion signal A, 114 denotes a busy state notification signal A, 12
0 is the transmitting node B, 121 is the receiving node B, 122
Indicates a data transmission packet B, and 123 indicates a data reception completion signal B. In FIGS. 3 and 4, the time during which data flows on the IEEE 1394 standard serial bus is not considered.

In FIG. 4, a transmitting node A 110 is
A write transaction is performed with the receiving-side node A111, and the transmitting-side node B120
It is assumed that a write transaction is performed between the write transaction and the write transaction.

In each write transaction, as described above, the transmitting node A110 completes by transmitting the data transmission packet A112 and receiving the data reception completion signal A113 from the receiving node A111. , Data transmission packet B1
22 is transmitted, and the process is completed by receiving the data reception completion signal B123 from the receiving node B121.

At this time, since only one packet can exist on the 1394 serial bus, the transmitting node A 110 and transmitting node B 120
Before sending a packet on the 94 standard serial bus,
It is necessary to secure the right to use the bus by a procedure called arbitration. Therefore, the transmitting node A
While the node 110 is transmitting a packet, the transmitting node B
120 cannot transmit a packet and waits until the IEEE 1394 serial bus is released before transmitting the packet.

According to the above-described mechanism, when a plurality of write transactions occur, the IEEE 13
By using a serial bus of the 94 standard, transmission and reception of each packet can be completed.

[0013]

For example, the above-mentioned IEEE
In the E1394 standard serial bus, file data is stored in the well-known Direct Print Prot.
When transfer is performed using a higher-level protocol such as ocol (hereinafter, referred to as DPP), data can be transmitted and received in one write / read transaction depending on the size of the data storage memory inherent in the control LSI of the IEEE1394 standard. Data amount is limited. So, for example,
When transferring 1 MB of data, a control L of the IEEE 1394 standard having a 512-byte data storage memory
In SI, at least 2048 data transmission transactions must be issued even if the size of the header to be attached in each protocol is ignored.

When the receiving node 101 does not normally receive the data transmission packet transmitted from the transmitting node 100 at the time of transmitting the data transmitting packet shown in FIG. The side node 101 issues a busy state notification signal 104 indicating that it is currently busy.

Here, the transmitting node 100 that has received the busy state notification signal 104 performs a data retransmission operation. The timing of retransmission packet transmission by this data retransmission operation is determined by whether or not the transmitting node 100 has set data necessary for retransmission, the length of data, a register for designating a partner node, and the like. In other words, when the receiving node 101 transitions to a state in which it can receive a data transmission packet, the transmitting node 100 monitors the above-mentioned transition state, and the transmitting node 1
00 does not retransmit the data.

Therefore, even if the receiving node 101 has not transitioned to a state in which data can be received, the transmitting node 100 may perform a data retransmission operation. In this case, the busy state notification signal 104 is returned again. hand,
Further, since the retransmission operation is performed for the busy state notification signal 104, a useless load is imposed on the CPU and the right to use the bus is occupied.

As described above, when the data transmission interval time of the transmitting node 100 is shorter than the receiving data processing capacity time of the receiving node 101, the receiving node 100 receives data every time data is transmitted. After the node 101 performs the processing of the received data, the next data is transmitted from the transmitting node 100 until the state where the data transmission packet 105 can be received again, and then the retransmission operation is performed once. This will occur repeatedly. In this case, 2048
If the above-described operation is repeated every data transmission, the total transfer speed is significantly reduced, the occupancy of the serial bus is increased, and the communication between other devices is hindered.

In order to prevent such a problem, in the above-described DPP, the processing capability at the time of reception is written on an internal virtual register of the receiving node 101, and the value is read by the transmitting node 100. You can also optimize the data transmission interval. However, this register is optional,
There is a problem that not all DPP-compatible devices are implemented and cannot be used with other protocols because they depend on the DPP protocol.

Regarding the problem that the busy state notification signal 104 is returned a plurality of times in the transmission operation of the same data transmission packet 105, see JP-A-11-177.
As disclosed in Japanese Patent Publication No. 75-75, during data transfer between devices connected by a serial interface bus, when certain data is transmitted from the transmitting node 100 to the receiving node 101, the receiving node 101 is in a busy state. In the retransmission when there is no data received, if the retransmission operation reaches an arbitrary number, the value of the interval register mounted on the transmitting node 100 is changed, and the data transmission packet 105 related to the retransmission is changed.
By resetting the output interval to a longer time,
The retransmission interval is lengthened, and the second and subsequent busy state notification signals 1
04 is suppressed, and a smooth retransmission operation can be performed.

However, in the above-mentioned means, there is a possibility that the second and subsequent busy state notification signals 104 may be suppressed, but the first busy state notification signal 104 returned for each data transmission packet 105 may be eliminated. Impossible.

Further, when the transmission and reception of file data ranging from several megabytes to several gigabytes is specifically considered, the number of retransmission operations of the data transmission packet 105 can be reduced by the above-mentioned means. It is not possible to achieve this. In other words, when the receiving node 101 has finished processing the received data and has transitioned to a state in which data can be received, if the transmitting node 100 does not immediately transmit the next data transmission packet 105, the state will be changed to a state in which data can be acquired. It is conceivable that the idle time is wasted and has a large effect on the total transfer speed.

The present invention has been made in view of the above-described circumstances, and provides a serial transfer system capable of further increasing the data transmission / reception speed by shortening the idle time as much as possible. The purpose is to:

[0023]

In order to solve the above-mentioned problem, a serial transfer method according to the present invention is a serial transfer method for transmitting and receiving serial data in a system in which two or more devices are connected by a serial bus. A first counter capable of measuring the time between any transactions;
A transmission register that can set an arbitrary value, a second counter that operates up to the value set in the transmission register,
And a processing circuit for transmitting a data transmission packet when the value of the second counter becomes equal to the value of the transmission register.

In this case, an arbitrary value smaller than the value of the first counter is set in the transmission register. In the subsequent data transmission, when a busy state notification signal is transmitted from the receiving node, An arbitrary value larger than the value of the transmission register set last time can be reset in the transmission register within a range equal to or less than the value obtained by the first counter.

Further, an arbitrary value smaller than the value of the first counter is set in the transmission register. In the subsequent data transmission, when a busy state notification signal is transmitted from the receiving node, the transmission is performed. It is possible to reset the value of the transmission register previously set in the register within a range equal to or less than the value obtained by the first counter, and thereafter use the value as a fixed value.

The serial transfer system of the present invention has such a configuration, and when the data transmitting node continuously transmits a data transmission packet of a certain size, the receiving node receives the data. Since data transmission packets can be sent at transmission timings that match the data processing capacity, efficient transfer can be performed,
Retransmission is not repeated, and consequent congestion of the serial bus can be suppressed.

[0027]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an embodiment of a serial transfer system according to the present invention will be described with reference to the drawings.

FIG. 1 is a schematic diagram of an apparatus constituting a transmitting node when data is transferred using the IEEE 1394 standard.

In FIG. 1, reference numeral 31 denotes a transmission interval measurement counter capable of measuring the time between arbitrary transactions;
Is a transmission counter that operates at the same frequency as the transmission interval measurement counter 31 and can be reset arbitrarily; 33 is a transmission register that can set the value of the transmission interval measurement counter 31 or any value; The values of 33 are compared, and if they are the same value, a comparing circuit for outputting a signal instructing the data transmitting unit 36 to transmit is provided. Is written in a register of an LSI of the IEEE 1394 standard, and the transmission data setting section 36 sets a data itself in this LSI. The transmission data setting section 36 receives a data packet transmission command from the comparison circuit 34 or at an arbitrary timing. A data transmission unit capable of transmitting the data transmission packet set in 35 on the serial bus, 37 A variety of I that has been transmitted from the node
A data receiving unit for receiving an IEEE 1394 standard packet;
Analyzes the header of the EE1394 standard packet and sets the CPU
This is a received data processing unit that notifies the other data or stores the data itself in another memory when the packet includes data.

FIG. 2 shows that when data transfer is performed,
FIG. 4 is a schematic diagram showing an operation at the time of data transmission between two devices via a system based on the IEEE 1394 standard. In FIG. 2, 1 is a transmitting node, 2 is a receiving node, and 3 to 6 and 21 are data transmission packets. For more information,
3 is a first data transmission packet, 4 to 6 are second data transmission packets having the same data, and 21 is a third data transmission packet.
This is the data transmission packet.

In FIG. 2, 7, 10 and 22
Is a data reception completion signal, 8 and 9 are busy state notification signals, 11 is a transmission data set time that the transmitting side node 1 spends on register writing and the like performed at the time of data transmission, 13
Is the reception data processing time until the receiving side node 2 receives data, reads it out of the register, notifies the upper layer, etc., and can accept the next data transmission packet. The time from the start of the setting of the parameters and data for new data transmission to the data reception completion signal, which is measured according to the above, is actually 14 since the receiving node 2 can receive the next data transmission packet. The waiting time until the next data transmission packet arrives, 20 is the third data transmission packet which is not actually transmitted, but is the transmittable timing, and 26 is the value of 12 measured by the transmission interval measurement counter. Transmission register 33
The set value 23 is an operation component of the transmission counter 32 starting from “0” and operating up to the value set in the transmission register set value 26.

Here, the packet transmission / reception operation when the reception data processing time 13 is longer than the transmission data set time 11 will be described. First, the first node from the transmitting node 1
The data transmission packet 3 is transmitted, and the receiving node 2 that has received the data transmission complete signal 7 is transmitted. Then, the transmission-side node 1 that has received the data reception completion signal 7 immediately starts setting the second data.
1 is started. Subsequently, after the transmission data set time 11 has elapsed, the second data transmission packet 4 is transmitted. Here, since the receiving node 2 is still processing the first data transmitting packet 3 with respect to the data transmitting packet 4 transmitted by the transmitting node 1, the busy state notification signal 8 is issued.

At this time, as a retransmission operation of the data transmission packet 4, the transmitting node 1 starts preparing for transmitting the data transmission packet 5 as the second data. Send Here, since the busy state notification signal 9 is received again, the data transmission packet 4,
Data transmission packet 6 in which the same data as 5 is set
Send

Here, the transmission interval measurement counter continues until a data reception completion signal 10 which is a signal notifying that the data transmission packet 6 has been normally received is issued from the receiving node 2 to the transmitting node 1. 31
The time 12 from when the new data transmission operation is started to when the receiving node 2 can receive the data transmission packet 6 is measured, and the value of the transmission interval measurement counter 31 is obtained.

In the first embodiment, the value of the transmission interval measurement counter 31 is set in the transmission register 33, and when transmitting the third data transmission packet 21 from the transmission side node 1, preparation of transfer data is started. At the same time, the transmission counter 32, which is a second counter operating at the same frequency as the transmission interval measurement counter 31, is operated.
The value of the transmission counter operation 23 in the transmission register set value 26 is the value set in the transmission register 33.
When the value becomes the same as the above, data transmission is performed in accordance with an instruction from the comparison circuit 34. That is, the data that would normally be transmitted at the position of the data transmission packet 20 is transmitted at the position of the data transmission packet 21.

With the above operation, the transmitting node 1 knows that the data transmission packet transmitted last time is busy because the receiving node 2 is processing the data transmission packet.
By performing the operation of setting the retransmission packet and setting various data for transmission in the register of the LSI, the inconvenience of imposing a load on the CPU for controlling the LSI does not occur. In addition, I
Since the data transmission packet transmitted in the above operation and the busy state notification signal corresponding to the data transmission packet are transmitted and received without causing the possibility of hindering the control of the LSI other than the IEEE1394 standard or the speed thereof, the bus occupation is increased. It is possible to prevent a phenomenon in which the right is monopolized and communication between other devices is hindered.

As described above, in the first embodiment, since the transmission register set value 26 is surely larger than the reception data processing time 13, the data transmission packet is transmitted without receiving the busy state notification signal. Therefore, congestion on the IEEE 1394 bus can be suppressed.

However, from the viewpoint of the transfer speed, if the difference is large, the waiting time 14 becomes long and cannot be said to be optimal, and within a range where the transmission register set value 26 does not become smaller than the reception data processing time 13, Set the transmission register set value 26 to the reception data processing time 13
It is obvious that it is better to approach. Therefore, as a second embodiment, a method of making the transmission register set value 26 as close as possible to the reception data processing time 13 will be described.

In the second embodiment, a value smaller than the transmission interval measurement counter value obtained at the time of transmitting the second data transmission packets 4, 5 and 6 by a predetermined ratio is set in the transmission register 33. Third data transmission packet 2
At the time of transmission of 1, the transmission node 32, which is a second counter that operates at the same frequency as the transmission interval measurement counter 31, is operated in the transmission-side node 1 where transfer data is ready, and the value of the transmission counter 32 becomes When the value becomes the same as the value set in the transmission register 33, the data transmission packet is transmitted.

At this time, if the data reception completion signal can be received, it is determined that the transmission register set value 26 is larger than the reception data processing time 13, and a small set value is reduced at a predetermined rate until the busy state notification signal is received. The subsequent data transmission packet is transmitted while being set in the transmission register 33.

On the other hand, when the busy state notification signal is received, it is determined that the transmission register set value 26 is smaller than the reception data processing time 13, and after the data transmission packet is retransmitted, the transmission register The subsequent data transmission packet is transmitted while setting a large value to 33 at a predetermined ratio. Then, a value when the data reception completion signal can be received without receiving the busy state notification signal is set as an optimum value of the transmission register.
Is transmitted using the transmission counter 32 without changing the value of.

Hereinafter, an example of the above operation will be described using specific values. Here, the transmitting node 1 and the receiving node 2 each have a data storage memory of 512 bytes, and assume that data to be transmitted is 1 MB. In addition, 512-byte data for data transmission in the transmitting node 1 is set in the memory, and the data length and the node designation of the partner device are written in the register.

The time until the data can be transmitted, that is, the transmission data set time 11 in FIG. 2 is 200 μs. Further, the receiving node 2 sets the time from the reception of the data transmission packet to the end of processing the data transmission packet to the reception of the next data, that is, the reception data processing time 13 in FIG. I do. Here, it is assumed that the time during which data is flowing on the bus is not considered.

In the transmitting node 1, when the upper application transfers a 1 MB file, the IEEE 1
In a CPU controlling a control LSI of the 394 standard, 512 bytes of data are set in a memory,
The data length, the node designation of the partner device, and the like are written in the register, and the first data transmission packet 3 is transmitted when the data setting and the register writing are completed. Upon receiving the first data transmission packet 3, the receiving node 2 transmits a data reception completion signal 7 for notifying the transmitting node 1 of data reception, and performs processing of the received data.

Further, when receiving the data reception completion signal 7 from the receiving node 2, the transmitting node 1 operates the transmission interval measuring counter 31 to start preparation for the second data transmission. That is, the transmitting node 1
After μs, the data transmission packet 4 is transmitted to the receiving node 2. Here, since the data processing of the receiving node 2 takes 530 μs, even if a data transmission packet 4 as the next data arrives at the receiving node 2 after 200 μs, the receiving node 2 receives it. Can not do. Therefore, the receiving node 2 transmits the busy state notification signal 8 to the transmitting node 1.

On the other hand, the transmitting node 1 receiving the busy state notification signal 8 prepares for retransmission, and retransmits the second data transmission packet 5 to the receiving node 200 after 200 μs. Do. At this point, 400 μs has elapsed since the transmission of the first packet, but the receiving node 2 transmits the busy state notification signal 9 because the reception data processing has not been completed yet.

Subsequently, the transmitting node 1 receiving the busy state notification signal 9 prepares for retransmission, and retransmits the second data transmission packet 6 to the receiving node 200 after 200 μs. I do. At this point, the first
Since the time from the transmission of the second packet has passed 600 μs, which exceeds the reception data processing time of 530 μs, the data transmission packet 6 can be received. Therefore, the data reception completion signal 10 is transmitted to the transmission side node 1. I do. Subsequently, the transmission-side node 1 that has received the data reception completion signal 10 stops the transmission interval measurement counter 31 and obtains a transmission register set value of 600 μs.

In the first embodiment, if 600 μs is set in the transmission register 33 and the third and subsequent data transmission packets are transmitted, this data transmission packet can be transmitted without receiving a busy state notification signal. It is. In this case, the time for transmitting all data of 1 MB is 51
60 to transmit and receive a 2-byte data transmission packet
Since it takes 0 μs, it is about 1229 ms.

In the second embodiment, when transmitting the third data transmission packet 21, the transmission interval measurement counter 31
After changing the value to an arbitrary value based on the value of, the value is set in the transmission register 33. Here, as an example, the transmission register set value 580 μs which is 20 μs smaller than 600 μs
Is set in the transmission register 33.

At the time of transmitting the third data transmission packet 21, the transmitting node 1 starts operating the transmission counter 32 and simultaneously prepares for data transmission by 200 μm.
s, and the transmission counter 32 has the same value as the transmission register 33, that is, the transmission register set value 580 μs
At the same time, the data transmission packet 21 for which transmission preparation has already been completed is transmitted to the reception-side node 2 in accordance with an instruction from the comparison circuit 34. The transmission time of 512 bytes at this time is 580 μs. Further, when the operation of transmitting the packet is repeated by setting the value of the transmission register 33 to 20 μs smaller than the previous value, the transmission interval when transmitting the sixth data transmission packet (not shown) becomes shorter than the reception data processing time of 530 μs. The transmission register set value becomes 520 μs, and the receiving node 2 issues a busy state notification signal to the transmitting node 1.

Here, first, after retransmitting the sixth data transmission packet, the value of the transmission register 33, which is 520 μs, is reset to 540 μs, which is the value at the time of transmitting the fifth packet. The seventh and subsequent data transmission packets are transmitted at the same interval of the transmission register set value. In this case, it takes about 540 μs to transmit and receive a data transmission packet of 512 bytes, so that the time for transmitting all data of 1 MB is about 1106 m.
s, which is 10 times that of 1229 ms of the first embodiment.
%. In this way, a data transmission packet can be transmitted without receiving a busy state notification signal, and communication can be performed with a minimum waiting time in the receiving node 2.

In the above description, the transmission register 3
The value of 3 is reduced by a predetermined ratio from the value set in the previous transmission register, and when the busy state notification signal is received, the value of the transmission register 33 is returned to the value at the time of the previous packet transmission. Although the method for obtaining the optimum value has been described, other methods may be employed. For example, the value of the transmission register 33 is set to half the value at the time of transmitting the previous packet, and when the busy state notification signal is received, the value at the time of transmitting the previous packet and the value at the time of transmitting the packet are set. It is also possible to set an average value of the values and set the value when the data reception completion signal can be received without receiving the busy state notification signal as the optimum value of the transmission register 33.

In any case, the value of the transmission register 33 is optimized, the waiting times 14 and 25 in FIG. 2 are made as short as possible, and the data processing times 13 and 24 are made closer to each other, thereby realizing higher-speed data transfer. be able to.

The location of the transaction measured using the transmission interval measurement counter 31 as the first counter is merely an example. For example, if the transmission data set time 11 is measured in advance in FIG. It is not necessary to operate the transmission interval measurement counter 31 from the start of the new transmission data set described above. The transmission interval measurement counter 31 is operated from the subsequent transmission of the data transmission packet 4 or 5 to the data reception completion signal 10. The time of may be measured. The value obtained here is set in the transmission register 33. When the operation of the transmission counter 32 as the second counter starts, an offset of the transmission data set time 11 is added to start the new data set. An operation equivalent to measurement from a location can be expected, and the value of the counter is reduced, thereby reducing the load on the CPU and the circuit itself. In addition, since all of the above-described means do not depend on the transmission data set time 11, it is applied to a system in which the transmission data set time 11 does not exist, such as an LSI that does not need to set parameters and transmission data again at the time of retransmission. It is possible.

[0055]

As described above, according to the serial transfer method of the present invention, in the write transaction of the IEEE 1394 standard protocol in which relatively large data is divided into certain units and transferred continuously, the receiving node If the busy status notification signal is sent frequently from
By measuring the time between any transactions, setting the measurement time in the transmission register at the next transaction, operating the transmission counter and transmitting a data transmission packet when the value becomes equal to the value of the transmission register , The data transmission packet can be obtained without difficulty in the receiving node.

By setting a value smaller than the value of the transmission interval measurement counter at an arbitrary ratio in the transmission register and transmitting the data transmission packet, useless waiting time between transactions is reduced. Here, when the value of the transmission register is set to half of the previous value, the frequency of occurrence of the busy state is expected to increase,
An excellent effect of obtaining an optimum transfer interval value at the beginning of transfer can be obtained.

In the case where a busy notification signal is issued from the receiving device during data transmission by the operation of arbitrarily reducing the value of the transmission register, the value of the transmission register is arbitrarily increased to some extent. Thus, it is possible to prevent the receiving side device from issuing the busy state notification signal again. Here, by setting the value of the transmission register to be several percent larger than the value of the previous transmission register, it is expected that the frequency of occurrence of the busy state will increase again, but the superior advantage of reducing the waiting time as much as possible. The effect can be achieved.

When the value of the transmission register is set by averaging the previous and previous values, it is difficult to reduce the transfer interval value as much as possible, but the optimum value can be obtained at a relatively early stage. There is an excellent effect that there is. That is, according to the serial transfer method of the present invention,
By reducing the number of retries when performing data transfer and performing data transfer at optimal transfer intervals, congestion in the transfer serial bus for the same data can be suppressed.

[Brief description of the drawings]

FIG. 1 is a schematic diagram of an apparatus constituting a transmission-side node when performing data transfer using the IEEE 1394 standard.

FIG. 2 is a schematic diagram showing an operation at the time of data transfer between two devices via an IEEE 1394 standard system when performing data transfer.

FIG. 3 is a schematic diagram showing an example of a write transaction operation when two nodes are connected on an IEEE 1394 standard serial bus.

FIG. 4 is a schematic diagram showing a case where a plurality of write transactions are performed when four nodes are connected on an IEEE 1394 standard serial bus;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Sending node 2 Receiving node 3 First data transmission packet 4-6 Second data transmission packet 7, 10, 22 Data reception completion signal 8, 9 Busy state notification signal 11 Transmission data set time 13, 24 Received data processing time 12 Time from start of parameter and data set to data reception completion signal 14, 25 Waiting time 20 Third data transmission packet (transmittable state) 21 Third data transmission packet 26 Transmission register set value 23 Transmission counter operation part 31 Transmission interval measurement counter, 32 Transmission counter 33 Transmission register 34 Comparison circuit 35 Transmission data set part 36 Data transmission part 37 Data reception part 38 Received data processing part 100 Transmission side node 101 Reception side nodes 102, 105 Different data transmission packets G 103, 106 Data reception completion signal 104 Busy status notification signal 110 Transmitting node A 111 Receiving node A 112 Data transmission packet A 113 Data reception completion signal A 114 Busy status notification signal A 120 Transmitting node B 121 Receiving node B 122 Data transmission packet B 123 Data reception completion signal B

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5B077 NN02 5K032 AA01 CD01 5K034 AA01 DD03 FF12 HH65 NN22 QQ09

Claims (3)

[Claims] 1. A serial transfer method for transmitting and receiving serial data in a system in which two or more devices are connected by a serial bus, comprising: a first counter capable of measuring a time between arbitrary transactions; A transmission register that can set the value of the transmission register, a second counter that operates up to the value set in the transmission register, and data transmission when the value of the second counter becomes equal to the value of the transmission register. A serial transfer method, comprising: a processing circuit for transmitting a packet. 2. An arbitrary value smaller than the value of the first counter is set in the transmission register. When a busy state notification signal is transmitted from a receiving node in subsequent data transmission, the transmission is performed. 2. The serial transfer method according to claim 1, wherein an arbitrary value larger than a value of the transmission register set last time is reset in a register within a range equal to or less than a value obtained by the first counter. 3. An arbitrary value smaller than the value of the first counter is set in the transmission register. In the subsequent data transmission, when a busy state notification signal is transmitted from a receiving node, the transmission is performed. 2. The serial device according to claim 1, wherein the value of the transmission register set last time is reset in the register within a range equal to or less than the value acquired by the first counter, and thereafter, the value is used as a fixed value. Transfer method.