JP2002165132A - Solid-state image pickup device and its drive method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state image pickup device that can prevent degrada tion in the quality of images, while capturing photoelectric signals at high speed, based on sampling pixels. SOLUTION: In this device, there are a plurality of photoelectric conversion elements arrayed in rows and columns, a control means which simultaneously selects some specified photoelectric signals from all the signals stored in a first storing means Cms or a second storing means Cmn corresponding to each row, to drive them to output and also simultaneously selects some error signals, corresponding to specified photoelectric signals to drive them to output, first integration circuits 71a and 71b where the specified photoelectric signals that were output simultaneously from the first storing means Cms are input to be added together, and second integration circuits 71a and 71b, where the error signals that were simultaneously output from the second storing means Cmn are input to be added together.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device and a method of driving the same, and more particularly, to a solid-state imaging device provided with a MOS type image sensor used for a video camera, an electronic camera, an image input camera, a scanner or a facsimile. The present invention relates to an apparatus and a driving method thereof.

[0002]

2. Description of the Related Art Semiconductor image sensors such as CCD type image sensors and MOS type image sensors are excellent in mass productivity, and have been applied to many image input device devices with the development of fine pattern technology. In particular, in recent years, there is an advantage that the power consumption is smaller than that of the CCD type image sensor and that the sensor element and the peripheral circuit element can be formed by the same CMOS technology.
OS-type image sensors are receiving attention.

In view of such trends in the world, the present inventors have improved a MOS image sensor and have proposed a threshold modulation type sensor element having a carrier pocket (high concentration buried layer) (Patent Registration No. 2935492). issue). By the way, in digital still cameras and video cameras,
In recent years, those equipped with an automatic exposure device and an automatic focusing device have been increasing from the viewpoint of operational convenience. In such digital still cameras and the like, in order to perform automatic exposure and automatic focusing, it is necessary to capture a monitor image in advance before actual shooting.

In such a case, since high-speed operation is required, pixels having a MOS image sensor are skipped. Pixel skipping refers to thinning out of all pixels, selecting a pixel (sampling pixel) at an appropriate location, taking in information, and drawing an image based only on that information.

[0005]

However, since the image is drawn based on the information of only the sampling pixels by thinning out all the pixels, accurate information cannot be obtained and the monitor image becomes coarse. There's a problem. In addition, when the number of read frames increases, the read speed needs to be increased accordingly, so that the time for accumulating the photo-generated charges in the photoelectric conversion element is shortened, and as a result, the amount of accumulated photo-generated charges is reduced. . For this reason, there is a problem that it causes image degradation.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and is a solid-state imaging device capable of suppressing the deterioration of an image while taking in a photoelectric signal at high speed based on sampling pixels. An apparatus and a driving circuit thereof are provided.

[0007]

In order to solve the above-mentioned problems, a solid-state imaging device according to the present invention comprises a plurality of photoelectric conversion elements (unit pixels) arranged in rows and columns as shown in FIGS. 101 and a plurality of photoelectric conversion elements 101,
A signal output circuit 105 that selects and adds a plurality of specific photoelectric signals and a plurality of error signals corresponding to the specific photoelectric signals, and outputs a difference signal between the added photoelectric signal and the error signal; Control for simultaneously selecting and outputting a plurality of specific photoelectric signals, for example, a plurality of photoelectric signals corresponding to the same color of a color filter, and simultaneously selecting and outputting a plurality of error signals corresponding to the specific photoelectric signal. Means 104
And

As shown in FIGS. 4 and 6 to 8, the signal output circuit 105 receives and stores a photoelectric signal including an error signal in a first storage unit Cms and a first storage unit Cms.
ms, and a second storage unit Cmn that stores the error signal output from the photoelectric conversion element 101 after the offset.
Are provided for each column. Further, the first storage means C
and a plurality of error signals simultaneously output from the second storage unit Cmn, and inputs and adds a plurality of specific photoelectric signals simultaneously output from the second storage unit Cms. Is provided.

A detailed configuration example of the signal output circuit 105 is as follows. First, as shown in FIGS. 4 and 5, two pairs of a first storage unit Cms and a second storage unit Cmn are provided in a line, and a pair of addition units 73a and 73b are provided.
In some cases. Note that it is also possible to connect three or more pairs of the first storage unit Cms and the second storage unit Cmn corresponding to the row including the photoelectric conversion element to be sampled.

Second, as shown in FIG. 6, there is a case where two pairs of the first storage means Cms and the second storage means Cmn are provided in one line, and two sets of addition means 71a and 71b are provided. Two pairs of first storage means Cms and second storage means C
mn are connected to all the photoelectric conversion elements 101 arranged in a row, and for each row, each pair of storage means Cms and Cmn is connected to a different set of addition means 71a and 71b.

It is also possible to provide three or more pairs of first storage means Cms and second storage means Cmn corresponding to the row containing the photoelectric conversion elements to be sampled and three or more sets of addition means corresponding to the rows. is there. Third, as shown in FIG. 7, similarly to FIG. 6, two pairs of the first storage means Cms are arranged in a line.
And second storage means Cmn, and two sets of addition means 71
a, 71b. In this case, unlike FIG. 6, a switch 73 is provided for switching the storage elements connected to the outputs of the photoelectric conversion elements arranged in a row between adjacent rows.

Fourth, as shown in FIG. 8, FIGS.
Similarly, two pairs of the first storage means Cms and the second storage means
Storage means Cmn, and two sets of addition means 71a, 71
b. Further, similarly to FIG. 7, a switch 73 is provided for switching the storage elements connected to the outputs of the photoelectric conversion elements 101 arranged in a row between adjacent rows. In this case, unlike FIG. 7, adjacent pairs are connected to different sets of adding means 71a and 71b and subtracting means 72a and 72b.

That is, the configuration of the solid-state imaging device of the present invention is as follows.
It is characterized in that a photoelectric signal or the like is added for each color of the color filter. Also, in particular,
As shown in FIG. 6 to FIG. 8, the photoelectric conversion device is characterized in that photoelectric signals corresponding to different colors are added by a separate set of adding means 71a and 71b. For example, as shown in FIG. 3, the photoelectric conversion element (unit pixel) 101 includes a light receiving diode 111, and is formed adjacent to the light receiving diode 111.
1. A high-concentration buried layer 25 for accumulating the photo-generated electric charges generated in step 1 is formed under the channel region 17b below the gate electrode 19, and the insulated-gate field-effect transistor 11 for detecting an optical signal.
2 is provided.

According to a driving method of the present invention, a plurality of specific photoelectric signals, for example, a plurality of photoelectric signals corresponding to the same color of a color filter are simultaneously selected, output, and added using the solid-state imaging device. In addition, error signals corresponding to a plurality of specific photoelectric signals are simultaneously selected, output, and added. In some cases, a plurality of opto-electric signals corresponding to different colors are added to a separate set of adding means 71a,
The addition is characterized by 71b.

The operation and effect based on the configuration of the present invention will be described below. According to the present invention, of the photoelectric signal stored in the first storage element Cms provided for each column and the error signal stored in the second storage element Cmn paired with the first storage element Cms, A specific photoelectric signal, for example, a plurality of photoelectric signals corresponding to the same color of the color filter are selected at the same time, input to the adding means 71, 71a, 71b, added, and further an error signal corresponding to the specific photoelectric signal. Are simultaneously selected, input to the adding means 71, 71a, 71b and added. Then, it is configured to output a difference signal between the added photoelectric signal and the corresponding error signal.

That is, for example, when pixel skipping is performed on a photoelectric conversion element (pixel) corresponding to the color arrangement of a Bayer-arranged color filter, a plurality of adjacent photoelectric conversion elements are selected as photoelectric conversion elements to be sampled. At the same time, photoelectric signals of the same color are selected from the corresponding photoelectric signals and added. In this case, by increasing or decreasing the number of photoelectric signals corresponding to the same color to be selected in proportion to the reading speed, the signal amount corresponding to the amount of accumulated photo-generated charges can be kept constant and the monitor image can be displayed. Roughening can be suppressed, and a more accurate image can be obtained.

Although a plurality of photoelectric signals corresponding to the same color are selected and added, the adding means 71, 71a, 7
As 1b, for example, by using a so-called switched capacitor having a configuration in which a feedback capacitance element and a switch are connected in parallel between the input and output of an operational amplifier, a plurality of photoelectric signals corresponding to the same color are simultaneously input and added. Is possible. In other words, it is only necessary to simultaneously select one memory cell Cms storing a plurality of photoelectric signals corresponding to the same color and to output those photoelectric signals simultaneously. Only the same time as in the case of performing pixel skipping is required. Therefore, it is possible to capture the monitor image at high speed.

As described above, it is possible to suppress the deterioration of the image quality while taking in the photoelectric signal at high speed based on the photoelectric conversion element to be sampled. Further, it is characterized in that the photoelectric signal and the error signal corresponding to the different colors are added by a separate set of adding means 71a and 71b. Therefore, it is possible to suppress a variation in image quality due to a photoelectric signal of the same color passing through different adding units 71a and 71b. Thus, it is possible to suppress the deterioration of the image quality while taking in the photoelectric signal at high speed based on the photoelectric conversion element to be sampled.

[0019]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) Referring to FIG.
A circuit configuration of a main part of the solid-state imaging device according to the embodiment will be described.

FIG. 1 is a circuit diagram showing a pixel arrangement corresponding to a color arrangement of a color filter, and a connection relationship between a signal output circuit and a control circuit. Fig. 1
As shown in the figure, the colors are arranged in a Bayer arrangement. That is, in the first row, the rows are arranged in the order of R, G, R, G,..., And in the second row, the rows are arranged in the order of G, B, G, B,.
In the third and subsequent rows, these arrangements are sequentially repeated. The pixels 101 are arranged in rows and columns so as to correspond to each color.

A row is selected by vertical scanning signal supply lines (VSCAN supply lines) 21a, 21b,... Connected to a vertical scanning signal driving scanning circuit (VSCAN driving scanning circuit). As shown in FIGS. 4 and 6, the output terminal of each pixel 101 has one vertical output line 20 for each column.
a, 20b...

The control circuit 104 is connected to the signal output circuit 105, and controls the timing for simultaneously selecting a plurality of storage elements in the signal output circuit 105 and outputting a plurality of photoelectric signals. In addition, a control circuit that controls the timing at which a photoelectric signal is input from the photoelectric conversion element 101 to the storage element is provided. Next, the overall configuration of the MOS image sensor according to the embodiment of the present invention will be described in more detail with reference to FIG.

FIG. 2 shows an MO according to the embodiment of the present invention.
1 shows a circuit configuration diagram of an S-type image sensor. As shown in FIG. 2, the MOS image sensor has a two-dimensional array sensor configuration, in which unit pixels (photoelectric conversion elements) 101 having the following structure are arranged in rows and columns in a matrix.

A VSCAN driving scanning circuit 102 and a drain voltage driving scanning circuit (VDD driving scanning circuit) 1
Numerals 03 are arranged on the left and right sides of the pixel region. V
The SCAN supply lines 21a and 21b are provided one by one from the VSCAN drive scanning circuit 102 for each row. Each VSCAN supply line 21a, 21b is connected to the gate of the MOS transistor 112 in all the pixels 101 arranged in the row direction.

The drain voltage supply lines (VDD supply lines) 22a and 22b are provided one by one from the VDD drive scanning circuit 103 for each row. Each VDD supply line 22a, 22b
Is the optical signal detection M in all the pixels 101 arranged in the row direction.
It is connected to the drain of the OS transistor 112.
Further, different vertical output lines 20a and 20b are provided for each column, and the respective vertical output lines 20a and 20b are connected to the sources of the MOS transistors 112 in all the pixels 101 arranged in the column direction.

Further, the source region of the MOS transistor 112 is connected to the signal output circuit 105 through the vertical output lines 20a and 20b. The source region is directly connected to a line memory (storage element) including an input capacitor in the signal output circuit 105. In practice, a switch element or the like is provided in the middle of the vertical output lines 20a and 20b to control the signal flow.

The MOS transistor 112 in each pixel 101 is sequentially driven by the vertical scanning signal (VSCAN), and a video signal (Vout) containing no error signal is output from the signal output circuit 105 by the horizontal scanning signal (HSCAN). Is output.

Next, referring to FIG. 3, a solid-state imaging device (M
The detailed structure of the unit pixel (photoelectric conversion element) of the OS image sensor will be described. FIG. 3 is a cross-sectional view showing a device structure of a solid-state imaging device (MOS image sensor) according to an embodiment of the present invention. As shown in FIG. 3, a light receiving diode 111 and an optical signal detecting MOS transistor 112 are provided in a unit pixel (photoelectric conversion element) 101.
Are provided adjacent to each other. MOS transistor 11
2, an n-channel depletion MOS transistor (hereinafter sometimes simply referred to as a MOS transistor) is used.

The light receiving diode 111 and the MOS transistor 112 are formed in different well regions, that is, a first well region 15a and a second well region 15b, and the well regions 15a and 15b are connected to each other. The first well region 15a in the portion of the light receiving diode 111 forms a part of a charge generation region by light irradiation. The second well region 15b in the portion of the MOS transistor 112 forms a gate region in which the threshold voltage of the channel can be changed by the potential applied to this region 15b.

In the portion of the light receiving diode 111, as shown in FIG. 3, an n-type layer 32a is formed on a p-type substrate 11, and the first well region 15a is provided on the n-type layer 32a. Is formed. Further, an n-type impurity region (opposite conductivity type region) 1 is formed in the surface layer of the first well region 15a.
7 are formed. In the portion of the MOS transistor 112, as shown in FIG. 3, the p-type substrate 11 includes a thick p-type layer 11a having a high concentration, and the n-type layer 11a is formed on the p-type layer 11a.
A mold layer (opposite conductivity type layer) 32b is formed. The well region 15b is formed on the n-type layer 32b. On the surface of the semiconductor substrate above the well region 15b, a gate electrode 19 is formed via a gate insulating film 18.

The gate electrode 19 has a ring shape.
A source region 16 is formed in the surface layer of the well region 15b so as to be surrounded by the inner edge of the ring-shaped gate electrode 19. A drain region 17a is formed on the surface of the ring-shaped gate electrode 19 so as to surround the outer edge and extend from the well region 15b to the n-type layer 32a. On the light receiving diode 111 side, the drain region 17a extends to form the impurity region 17 of the light receiving diode 111. In the following description, the term “drain region” may refer to a region including the impurity region 17 even if the reference numeral 17a is used to indicate the drain region.

Below the gate electrode, a region between the source region 16 and the drain region 17a becomes a channel region. At a normal operating voltage, in order to keep the channel region in a depletion state, an appropriate concentration of n-type impurity is introduced into the channel region to form an n-type channel doped layer 17b. In the well region 15b below the n-type channel dope layer 17b, a carrier pocket (high-concentration buried layer; a photo-generated charge accumulation region) 2 surrounds the source region 16.
5 are formed. Photogenerated holes among the photogenerated charges can be collected in the carrier pocket 25.

The path formed from the first well region 15a and the second well region 15b and extending from the light receiving region to the carrier pocket 25 is a charge transfer path. The above elements are covered with an insulating film 26, and regions other than the light receiving window 24 of the light receiving diode 111 are shielded from light by a metal layer (light shielding film) 23 formed on the insulating film 26.

Next, the details of the signal output circuit 105 corresponding to the pixel arrangement of FIG. 1 will be described with reference to FIG. FIG. 4 is a circuit configuration diagram of a main part of the signal output circuit 105. As shown in FIG. 4, one column has two pairs of first storage means Cms and second storage means Cmn, and has a pair of addition means 71 and subtraction means 72. As shown in FIG. 4, the signal output circuit 105 according to this embodiment includes a pixel 101 for each column.
Storing an opto-electric signal including an error signal output from the first
And a second storage element Cmn that stores an error signal output from each pixel 101 as a set.
They are provided two by two. Each set of storage elements Cm
The inputs of s and Cmn are the switching elements SWs1 and Ss, respectively.
Are connected to vertical output lines 20a, 20b,... Via Wn1. The outputs of the storage elements Cms and Cmn of each set are connected to the memory output wirings 41 and 42 via the switch elements SWs2 and SWn2, respectively.

The switch elements SWs1 and SWn1 on the input side are:
Both are closed when the photoelectric signal and the error signal read from the photoelectric conversion element are stored in the storage element by a control signal from a control circuit (not shown). The pair of switch elements SWs2 and SWn2 on the output side are both HSCAN supply line 2
7aa, 27ab,... Are connected to the control circuit 104, and another set of switch elements SWs2, SWn2 are connected to the control circuit 104 through HSCAN supply lines 27ba, 27bb,. Horizontal scanning signal (HSC
AN), one set of the two sets of the first storage element Cms and the second storage element Cmn arranged in each column is simultaneously selected in a plurality of columns, and the timing of outputting a photoelectric signal or the like is controlled. I have.

The memory output line 41 connected to the output of the first storage element Cms arranged in each column is connected to one input terminal of the adding means 71, and the second storage element Cmn arranged in each column.
Is connected to the other input terminal of the adding means 71. The adding means 71 adds the outputs of a plurality of first storage elements Cms that are simultaneously selected. Further, outputs of a plurality of second storage elements Cmn, which are simultaneously selected in correspondence with the first storage element Cms, are added. 2
The added photoelectric signal and the added error signal are output from the two output terminals.

The adding means 71 in FIG. 4 is equivalent to that shown in FIG. That is, it has a configuration in which adding means 73a and 73b are separately provided for the photoelectric signal and the error signal. In FIG. 4, the adding means 73a and 73b are
It is represented by an operational amplifier Ai having two input terminals and two corresponding output terminals, feedback capacitance elements Cif1, Cif2, and switch elements SWi1, SWi2.

In the adding means 71 of FIG. 5, a feedback capacitance element Cif1 and a switching element SWi1 are connected in parallel between an input terminal of one adding means 73a and a corresponding output terminal. A feedback capacitance element Cif2 and a switch element SWi2 are connected in parallel between the input terminals of the other adding means 73a and 73b and the corresponding output terminals. By using such a so-called switched capacitor configuration as the adding means 73a and 73b, it is possible to simultaneously input and add a plurality of photoelectric signals corresponding to the same color. The capacitance value of the feedback capacitance elements Cif1 and Cif2 may be, for example, about 0.5 pF, but is not limited thereto.

The subtracting means 72 receives the added opto-electric signal output from the adding means 71 and the added error signal, calculates the difference between them, and calculates a difference signal obtained by removing the error signal from the opto-electric signal. Is output. The output terminal of the subtracting means 72 is connected to the video signal output terminal 107 through the horizontal output line 26. 4 and 5, the switching elements SWs1, SWs2,
Although SWn1, SWn2, SWi1, and SWi2 are schematically illustrated, they are actually composed of one or a plurality of MOS transistors. Further, the first and second storage elements Cm
s, Cmn and the feedback capacitance elements Cif1 and Cif2 are composed of one capacitor.

In the above-described signal processing circuit, green (G), red (R), and blue (B) are processed by a set of adding means 71 and subtracting means 72. In addition, three or more pairs of the first storage unit Cms and the second storage unit Cmn are connected to one set of the adding unit 71 and the subtracting unit 72 so as to correspond to the row including the photoelectric conversion element 101 to be sampled. It is also possible.

Next, a light detection operation of the solid-state imaging device according to the embodiment of the present invention will be described with reference to FIGS. The light detection operation repeatedly performs a series of processes including a sweep period (initialization period), an accumulation period, and a readout period. Here, for convenience, the description starts from the initialization period. In this case, one row of storage elements in the row of storage elements corresponding to the two rows of pixels may be used, or all the rows of storage elements may be used. When two rows of storage elements are used, the output from the photoelectric conversion element 101 is stored for each two rows.

In the initialization period, all the pixels 101 are initialized. Next, the source potential Vps in the initialized state is output as an error signal Vn from the pixels 101 arranged in one or two rows, input to the signal output circuit 105, and stored in the second storage element Cmn. In the accumulation period, light is emitted to the light-receiving diode 111 to generate photo-generated charges, and further, photo-generated holes are accumulated in the carrier pocket 25. As a result, the threshold voltage of the MOS transistor 112 changes, and the change in the threshold voltage is output as Vps in the next reading period.

In the reading period, the MOS transistor 112
Is operated to output Vps as a photoelectric signal proportional to the amount of accumulated photo-generated holes, and the first row of one or two rows is output.
Is stored in the storage element Cms. This source voltage Vps
Includes an error signal component Vn due to residual charges that cannot be removed even by initialization, in addition to a signal component Vs corresponding to pure light intensity.

Next, the photoelectric signal and the error signal are output from the first and second storage elements Cms and Cmn, respectively, one row at a time, and input to the subtraction means 72 through the addition means 71. As a result, a video signal proportional to only a pure optical signal obtained by subtracting Vn from Vs is output. next,
The pixel skipping will be described. Pixel skipping is also performed in the same manner as described above, ie, the sweep period (initialization period), the accumulation period, the readout period,
Is repeated.

As the sampling pixels, sampling groups Gs1 to Gs5 composed of a plurality of pixels 101 adjacent to each other over two rows and four columns as shown in FIG. 9 are used. Sampling is performed at appropriate intervals. It is assumed that the color arrangement in each of the sampling groups Gs1 to Gs5 corresponds to RGRG / GBGB of the Bayer arrangement color arrangement. In this case, it is assumed that the number of photoelectric signals corresponding to the same color to be selected is increased or decreased in proportion to the reading speed.

An error signal Vn is provided for each column for every row of pixels arranged in two rows during the initialization period.
The data is stored in the second storage element Cmn of the set. The photoelectric signal Vs is stored in two sets of first storage elements Cms provided for each column for all the pixels arranged in two rows after the accumulation period and the readout period. Next, the first and second storage elements Cm corresponding to the sampling group Gs1
Of the photoelectric signal and the error signal stored in s and Cmn, the photoelectric signal and the error signal for four pixels corresponding to green (G) are simultaneously output to the memory output lines 41 and 42, respectively. , 42 through the addition means 71-2
Input to each of the two input terminals.

The photoelectric signal and the error signal are added by the adding means 71 and output to the corresponding output terminals. Further, these added signal outputs are input to the subtraction means 72. As a result, a difference signal corresponding to green (G) is output to the video signal output terminal 107. Then, the photoelectric signal and the error signal for two pixels corresponding to red (R) are processed, and a difference signal corresponding to red (R) is output. Then
The photoelectric signal and the error signal for two pixels corresponding to blue (B) are processed, and a difference signal corresponding to blue (B) is output. As a result, a part of the color monitor image representing the area corresponding to the sampling group Gs1 is formed. Regarding the color configuration of the monitor image, the ratio of the number of added pixels for green (G), red (R), and blue (B) is 2: 1:
1, which is the same as the case of targeting all pixels. Therefore, the color of the monitor image is almost the same as the color of the actual subject.

Next, a storage element corresponding to the sampling group Gs2 in the same row as the sampling group Gs1 and located at an appropriate distance from the sampling group Gs1 is selected to output a photoelectric signal and an error signal for each color. The same process is performed to output the three color video signals to the video signal output terminal 107, respectively, to form a color video portion representative of the region.

When the pixel skipping of the first and second rows is completed, the storage elements Cms and Cms are operated by switches (not shown).
mn of both electrodes are grounded and initialized, and then, as shown in FIG. 9, signals from all pixels 101 arranged in the next sampling row, the fifth row and the sixth row, are provided for each column. The stored data is stored in the storage element of the signal output circuit 105. Then, in the same manner as above, the three color signals in the sampling group Gs3 are extracted. In this way, the color signals of the three colors of the sampling groups Gs1 to Gs5 extending over all the rows and columns are sequentially read out, and a monitor image is drawn to perform automatic exposure and automatic focusing.

As described above, in the solid-state imaging device according to the first embodiment, two pairs of first memories provided for each column with respect to the arrangement of the photoelectric conversion elements 101 arranged in rows and columns. The element Cms and the second storage element Cmn, and a pair of adding means 73a and 73 connected to their outputs, respectively.
b and the subtraction means 7 connected to the addition means 73a, 73b
2 and control means 104 for selecting the outputs of the storage elements Cms and Cmn.

In the driving method, two rows of photoelectric signals and error signals are stored with respect to the arrangement of the photoelectric conversion elements (pixels) 101 corresponding to the color arrangement of the color filters arranged in the Bayer arrangement. 2 adjacent as
A pixel in row 4 is selected, a plurality of photoelectric signals and error signals of the same color are simultaneously selected and added from the corresponding photoelectric signal and error signal, respectively, and the added photoelectric signal and error corresponding to the error are further selected. The difference signal from the signal is output.

In this case, by increasing or decreasing the number of photoelectric signals corresponding to the same color to be selected in proportion to the reading speed, the signal amount corresponding to the amount of accumulated photo-generated charges can be kept constant, It is possible to suppress the monitor image from becoming coarse and obtain a more accurate image.
Further, by using so-called switched capacitors as the adding means 73a and 73b, it is possible to simultaneously input and add a plurality of photoelectric signals corresponding to the same color. That is, since it is only necessary to simultaneously select a plurality of storage elements Cms and Cmn storing a plurality of photoelectric signals corresponding to the same color and output the photoelectric signals, one pixel is selected. Only the same time as in the case of performing pixel skipping is required. Therefore, it is possible to capture the monitor image at high speed.

As described above, the deterioration of the image quality can be suppressed while capturing the photoelectric signal at high speed based on the sampling pixels. (Comparative Example) FIG. 11 is a comparative example with respect to the first embodiment. In this case, a specific photoelectric signal, for example, the first
This is an example in which photoelectric signals corresponding to red (R) in the column (R1) and third column (R3) are added, or photoelectric signals corresponding to green (G) are added. .

As shown in FIG. 11, the switching element SW1
The circuit connection is performed by the wiring 141 so that the storage elements Cms corresponding to a specific column are connected in series via the. The added photoelectric signal is input to the operational amplifier 172 and amplified. Although the error signal is not shown, it is added in the same manner as the photoelectric signal. Further, the added signal is input to the subtraction means, and a difference signal between them is output.

In this comparative example, the circuit connection for addition is complicated, and an error is likely to be included in the photoelectric signal due to the influence of the stray capacitance of the switch elements SW2 to SW5 connected to the storage element Cms. (Second Embodiment) FIG. 6 is a circuit configuration diagram showing a signal output circuit 105 of a solid-state imaging device according to a second embodiment.

As shown in FIG. 6, two pairs of first storage means Cms and second storage means Cmn are provided in one line, and two sets of addition means 71a and 71b and two corresponding sets of subtraction means 7 are provided.
2a and 72b. The two pairs of the first storage means Cms and the second storage means Cmn provided for each column are all the photoelectric conversion elements 1 arranged in the same column.
01 is connected. For each column, a pair of storage means Cm
s and Cmn are connected to a pair of adding means 71a and subtracting means 72a through memory output lines 41a and 42a, and the other pair of storage means Cms and Cmn are connected to memory output lines 41b and
The other pair of adding means 71b and subtracting means 72b are connected through 42b. When the outputs of the adding means 71a, 71b are connected to the subtracting means 72a, 72b, the two subtracting means 72a, 72b are respectively connected to the adding means 71a, 71b.
Connect two outputs of b.

It is also possible to provide three or more pairs of the first storage means Cms and the second storage means Cmn, and three or more corresponding addition means and subtraction means. Note that the other configuration is the same as that of the first embodiment, and the description is omitted. Next, an operation of detecting an optical signal and skipping pixels using the signal output circuit 105 will be described.

When an optical signal is detected, any one of two sets of storage elements, addition means and subtraction means is used. The operation of detecting the optical signal is the same as that of the first embodiment, and the description is omitted. In the pixel skipping operation, as in the first embodiment, a sampling group Gs1 including a plurality of pixels 101 adjacent to each other over two rows and four columns as shown in FIG.
To Gs5. Sampling is performed at appropriate intervals. Also in this case, it is assumed that the number of photoelectric signals corresponding to the same color to be selected is increased or decreased in proportion to the reading speed.

The photoelectric signal Vs is stored in two sets of first storage elements Cms provided for each column for all the pixels arranged in two rows after the initialization period, the accumulation period, and the readout period. At the same time, the error signal Vn is
The data is stored in the second storage element Cmn of the set. When storing the signals R11, G12,... Of the photoelectric conversion elements 101 arranged in the first row, the switches on the input side of the first and second storage elements Cms, Cmn are controlled, and R11 is stored in the lower storage element. , G12 store the upper and lower storage elements alternately in the upper row of the storage elements in two rows. The signal G21 of the photoelectric conversion element 101 arranged in the second row,
Similarly, when B22 is stored, G21 is stored in the upper storage element, and B22 is stored in the lower storage element in an alternately upper and lower order. Thereby, the green (G) storage elements Cms, Cms
All the outputs of mn are connected to the upper adding means 71a, and the outputs of the red (R) and blue (B) storage elements Cms and Cmn are all connected to the lower adding means 71b.

Next, among the photoelectric signals and error signals stored in the storage elements Cms and Cmn corresponding to the sampling group Gs1, photoelectric signals and error signals for four pixels corresponding to green (G) are output. In this case, the photoelectric signal and the error signal corresponding to green (G) are all input to the upper adding means 71a. The photoelectric signal and the error signal are added by four pixels in the upper adding means 71a, and are output from two output terminals of the upper adding means 71a. Further, the added photoelectric signal and error signal are input to subtraction means 72a and 72b and subtracted, and a difference signal corresponding to green (G) is output.

Next, the photoelectric signal and the error signal for two pixels corresponding to red (R) are processed by the lower adding means 71 and the corresponding subtracting means 72b, and a difference signal corresponding to red (R) is output. Let it. Next, 2 corresponding to blue (B)
The photoelectric signal and the error signal for the pixel are processed by the lower adding means 71 and the corresponding subtracting means 72b to output a difference signal corresponding to blue (B). As a result, a part of the color monitor image representing the area corresponding to the sampling group Gs1 is formed. Regarding the color configuration of the monitor image, the ratio of the number of added pixels for green (G), red (R), and blue (B) is 2: 1: 1, which is the same as that for all pixels. Therefore, the color of the monitor image is almost the same as the color of the actual subject.

Next, for the sampling groups Gs2 to Gs5, an addition process and a subtraction process are sequentially performed on the photoelectric signal and the error signal for each color in the same manner as described above.
The color video signals are output to the video signal output terminal 107, respectively, to form a color video portion representing the area. In this manner, the video signals of the sampling groups covering all the rows and columns are sequentially read out, a monitor image is drawn, and automatic exposure and automatic focusing are performed.

As described above, in the solid-state imaging device according to the second embodiment, two pairs of the first storage means C are arranged in a line.
ms and a second storage means Cmn, and two sets of addition means 71a and 71b and corresponding subtraction means 72a and 72b. The driving method is the same as in the first embodiment, except that the arrangement of the photoelectric conversion elements (pixels) 101 corresponding to the color arrangement of the color filters corresponds to a sampling group including a plurality of adjacent pixels 101 in 2 rows and 4 columns. Gs1 to Gs5 are selected, and a plurality of photoelectric signals and error signals of the same color among corresponding photoelectric signals and error signals are simultaneously selected and added.

In this case, by increasing or decreasing the number of photoelectric signals corresponding to the same color to be selected in proportion to the reading speed, the signal amount corresponding to the amount of accumulated photo-generated charges can be kept constant. In addition, it is possible to suppress the monitor image from becoming coarse and obtain a more accurate image. In addition, since it is only necessary to simultaneously select a plurality of photoelectric signals corresponding to the same color once and to output those photoelectric signals, it is equivalent to selecting one pixel and skipping pixels. Only needs time. Therefore,
The monitor image can be captured at high speed.

As described above, it is possible to suppress the deterioration of the image while taking in the photoelectric signal at high speed based on the sampling pixels. Further, in the second embodiment, when adding and extracting a difference signal, in particular, separate addition means 71a or 71b and subtraction means 72a or 72 are separately provided for each color.
b. Thereby, it is possible to suppress the variation in the color tone due to the variation in the amplification degree caused by passing the same color signal through different adding means.

(Third Embodiment) A third embodiment of the present invention will be described with reference to FIG. FIG. 7 is a circuit configuration diagram illustrating a signal output circuit of the solid-state imaging device according to the third embodiment. As shown in FIG. 7, at least two pairs of the first storage means Cms and the second storage means Cmn are provided in one row, and two sets of addition circuits 71a and 71b are provided. In FIG. 7, the upper and lower addition circuits 71
Both a and 71b show only one pair of storage elements.

When two pairs of the first storage means Cms and the second storage means Cmn are used, the memory output lines 41a, 42
a and a pair of storage elements Cm
s and Cmn are connected to store, for example, green (G) signals for four rows. Another pair of storage elements Cms and Cmn are connected in parallel to the lower addition circuit 71b through the memory output lines 41b and 42b, and two rows of red (R) and two rows of blue (B) signals are respectively stored differently. Store in the means.

Further, it is characterized in that it has a connection changeover switch 73 for exchanging two pairs of storage elements Cms and Cmn connected to the outputs of the photoelectric conversion elements 101 arranged in one row between adjacent rows. The connection switch 73 is provided between the vertical output line 20a in the first column and the vertical output line 20b in the second column, and between the vertical output line 20c in the third column and the vertical output line 20d in the fourth column. Thus, it is provided over all rows. Also in the solid-state imaging device according to the third embodiment, the color filters are green (G), red (R), and blue (B).
Are arranged in a Bayer array, and the photoelectric conversion elements 101 arranged in rows and columns correspond to each color of a color filter having a plurality of colors. As in the first and second embodiments, the inputs of the two pairs of storage means Cms and Cmn for each column are connected to the outputs of all the photoelectric conversion elements 101 in the same column.

A pair of storage means Cms and Cmn for storing a signal corresponding to green (G) is provided by an upper addition means 71.
a, and another pair of storage means Cms and Cmn for storing signals corresponding to red (R) and blue (B), respectively.
It is connected to the lower addition means 71b. Subtraction means 72
a and 72b are respectively connected to the upper and lower adding means 71a and 71b.

The switching element SWs2 on the output side of the storage elements Cms and Cmn connected to the upper addition means 71a is
The opening / closing timing is controlled by the control circuit 104 via the horizontal output lines 27aa, 27ba,. The switch element SWs2 on the output side of the storage elements Cms and Cmn connected to the lower addition means 71b is connected to the horizontal output line 27ab,
The timing of opening and closing is controlled by the control circuit 104 via 27bb,.

The other configuration is the same as that of the second embodiment, and the description is omitted. Although two pairs of storage units are provided in the above description, it is also possible to provide two or more, three to four pairs of first storage units Cms and second storage units Cmn. However, when three or four pairs of storage means are used, it is necessary to provide the connection changeover switch 73 described in the fourth embodiment.

When three pairs of first storage means Cms and second storage means Cmn are used, a pair of storage elements Cms and Cmn are connected to the upper addition circuit 71a, and the lower addition circuit 71
b, two pairs of storage elements Cms and Cmn are connected in parallel.
In this case, four rows of green (G) signals are stored in one pair of storage means, and two rows of red (R) and two rows of blue (B) are stored in the other two pairs of storage means. The signals are stored in different storage means.

When four pairs of the first storage means Cms and the second storage means Cmn are used, the addition circuit 71a
Are connected in parallel with two pairs of storage elements Cms and Cmn, and the lower addition circuit 71b is also connected in parallel with two pairs of storage elements Cms and Cmn. In this case, two rows of storage means store four rows of green (G) signals, and the other two pairs of storage means store two rows of red (R) and two rows of blue (B). Are stored in different storage means.

Next, the operation of detecting an optical signal and skipping pixels using the signal output circuit will be described. in this case,
Assume that two pairs of storage means are used. When detecting an optical signal, any one of the two sets of storage elements, addition means and subtraction means is used. The operation of detecting the optical signal is the same as that of the first embodiment, and the description is omitted.

As for the pixel skipping, the first and second pixels are used.
A series of processes consisting of an accumulation period, a reading period, and a sweeping period (initialization period) are repeatedly performed in the same manner as in the first embodiment. In this case, the sampling groups Gs1 to Gs5 including the pixels 101 adjacent to each other over four rows and four columns as shown in FIG. 10 are used. It is assumed that each of the sampling groups Gs1 to Gs5 corresponds to RGRG / GBGB / RGRG / GBGB in the color arrangement of the Bayer array. Sampling is performed at appropriate intervals.

After the initialization period, the accumulation period, and the readout period, the first row (R11, G12, R13, G14,...) And the third row (R31, G32, R33, G34,...), The second row (G21, B22, G23, B24,...) And the fourth row (G41, B42, G43, B44,. The signal output circuit 105 provided with the photoelectric signal Vs for each column with respect to the arrangement of all the pixels
Are stored in two sets of first storage elements Cms, and
The error signal Vn is also stored in two sets of second storage elements Cmn.

The signals (R11, G12, R1) in the first row
(3, G14,...), R11 is a pair of storage elements in the lower first column, G12 is a pair of storage elements in the upper second column, and so on. Are alternately stored in the storage means. The third line (R31, G32,
When reading R33, G34,...), R31 is a pair of storage elements in the lower first column, and G32 is a second storage element in the upper column.
The data is sequentially and alternately stored in the upper and lower storage means, such as in a pair of storage elements in a column. In this case, signals for two rows are input to one storage means, but the storage means can sequentially accumulate electric charges, so that an arbitrary number of signals are input to one storage means and stored as an addition signal. be able to. As long as the signals have the same color, there is no problem even if an arbitrary number of signals are input to one storage means.

Next, the signals (G21, B22,
G23, B24,...), G21 is a pair of storage elements in the first column on the upper side, and B22 is a second storage element on the lower side.
The data is sequentially and alternately stored in the upper and lower storage means, such as in a pair of storage elements in a column. 4th line (G41, B4
, G43, B44,...)
Are stored alternately in the upper and lower storage means, such as in the pair of storage elements in the upper second column and B42 in the pair of storage elements in the lower first column. In this way, all the signals corresponding to green (G) are stored in the storage element connected to the upper addition means 71a. All signals corresponding to red (R) and blue (B) are stored in storage elements connected to the lower addition means 71b and in storage means different for each color.

Next, among the photoelectric signals and error signals stored in the storage elements Cms and Cmn corresponding to the sampling group Gs1, photoelectric signals and error signals for eight pixels corresponding to green (G) are output. In this case, the photoelectric signal and the error signal for eight pixels corresponding to green (G) are all input to the upper addition means 71a and added. Further, among these added signal outputs, the photoelectric signals are input to the positive input terminal of the subtraction means 72a, and the error signals are input to the negative input terminal of the subtraction means 72a. Thereby, the horizontal output line 2
A difference signal corresponding to green (G) is output to the video signal output terminal 107 through 6a.

Next, a photoelectric signal and an error signal for four pixels corresponding to red (R) are output. In this case, red (R)
Are all input to the lower addition means 71b and added. Next, red (R)
Are input to the subtraction means 72b for processing, and a difference signal corresponding to red (R) is output.

Next, a photoelectric signal and an error signal corresponding to blue (B) are output. In this case, the photoelectric signal and the error signal corresponding to blue (B) are all added to the lower adder 71.
b and added. Next, the photoelectric signal and the error signal for four pixels corresponding to blue (B) are subtracted by the subtraction means 72b.
, And outputs a difference signal corresponding to blue (B).

Thus, the sampling group Gs1
Are formed in a color monitor image representative of the area corresponding to. Next, the sampling groups Gs2 to Gs2
Similarly for s5, similarly to the above, an addition process and a subtraction process are performed on the photoelectric signal and the error signal for each color, and video signals of three colors are output to the video signal output terminal 107, respectively, to represent the area. Form part of a color image.

As described above, the video signals of the sampling groups covering all the rows and columns are sequentially read out, and a monitor image is drawn to perform automatic exposure and automatic focusing. As described above, also in the solid-state imaging device according to the third embodiment, as in the first and second embodiments, the photoelectric conversion element (pixel) 101 corresponding to the color arrangement of the color filter.
In the case of skipping pixels, a plurality of adjacent pixels 101 are selected as sampling pixels, and a plurality of photoelectric signals of the same color among corresponding photoelectric signals are simultaneously selected and added.

In this case, by increasing or decreasing the number of photoelectric signals corresponding to the same color to be selected in proportion to the reading speed, the signal amount corresponding to the amount of accumulated photo-generated charges can be kept constant, It is possible to suppress the monitor image from becoming coarse and obtain a more accurate image.
In addition, since it is only necessary to simultaneously select a plurality of photoelectric signals corresponding to the same color once and to output those photoelectric signals, it is equivalent to selecting one pixel and skipping pixels. Only needs time. Therefore, it is possible to capture the monitor image at high speed.

As described above, it is possible to suppress the deterioration of the image while taking in the photoelectric signal at high speed based on the sampling pixels. Further, similar to the above-described first and second embodiments, the configuration is such that a photoelectric signal or the like is added for each color of the color filter. In the third embodiment, in particular, Photoelectric signals corresponding to different colors are configured to be added by separate sets of adding means 71a and 71b. Thereby, it is possible to suppress the variation in the color tone due to the variation in the amplification degree caused by passing the same color signal through different adding means.

(Fourth Embodiment) A fourth embodiment of the present invention will be described with reference to FIG. FIG. 8 is a circuit configuration diagram illustrating a signal output circuit of the solid-state imaging device according to the fourth embodiment. In the third embodiment, two or more, three, or four pairs of storage elements are used. However, in the fourth embodiment, at least two pairs, that is, two or more, three, or four pairs are similarly used. A pair of storage elements is used.

In the fourth embodiment, the difference from the third embodiment is that the storage elements in the first column have the upper side through the memory output lines 41a and 42a and the lower side through the memory output lines 41c and 42c. Both upper addition means 7
1a is connected in parallel. The storage elements in the second column are connected in parallel to the lower addition means 71b through the memory output lines 41b and 42b on the upper side and through the memory output lines 41d and 42d on the lower side, and the storage elements in the third and lower columns are connected in parallel. In the same manner as the connection relationship of the first column and the second column,
The point is that the upper and lower adding means 71a and 71b are alternately connected to each other.

Further, it has a connection switch 73. Hereinafter, the control operation of the connection switch 73 will be described. The connection changeover switch 73 is a switch SW
It is composed of t1, SWt2, SWt3 and SWt4. The switch SWt1 switches between conduction and non-conduction between the vertical output line 20a in the first column and the storage elements Cms and Cmn in the first column. The switch SWt3 is connected to the second column vertical output line 20b.
And the second column of storage elements Cms and Cmn are switched between conduction and non-conduction. The switch SWt2 is connected to the first column and the second column.
The first column vertical output line 20a and the second column storage element Cm are connected between after the switch SWt1 and before the switch SWt3 across the vertical output lines 20a and 20b in the columns.
Switches between conduction and non-conduction with s and Cmn. Switch S
Wt4 is the vertical output lines 20a and 20a of the first and second columns.
It is connected between before the switch SWt1 and after the switch SWt3 over 0b, and switches between conduction and non-conduction between the vertical output line 20b in the second column and the storage elements Cms and Cmn in the first column.

By opening the switches SWt1 and SWt3 and closing the switches SWt2 and SWt4, the vertical output line 20a in the first column is connected to the storage elements Cms and Cm in the second column.
n, and the vertical output line 20b in the second column is connected to the storage elements Cms and Cmn in the first column. Further, the switches SWt1 and SWt3 are closed, and the switches SWt2 and SWt are closed.
By opening Wt4, the first column vertical output line 20a is connected to the first column storage element, and the second column vertical output line 20b is connected to the second column storage element. Hereinafter, the third
The vertical output line 20c in the column, the vertical output line 20d in the fourth column
... is the same.

The other configuration is the same as that of the third embodiment, and the description is omitted. In FIG. 8, components denoted by the same reference numerals as those in the third embodiment indicate the same components as those in the third embodiment. Next, an operation of detecting an optical signal and skipping pixels using the signal output circuit will be described. When an optical signal is detected, the connection changeover switch 73 is set, for example, the first column vertical output line 20a is stored in the first column storage element, and the second column vertical output line 20b is stored in the second column storage. The storage elements are set so as to be connected to the respective elements, and a pair of storage elements of the two pairs of storage elements and two sets of addition means and subtraction means are used.

In the operation of detecting an optical signal, different from the other embodiments, the difference signal, which is a video signal, is sequentially output to the upper and lower adding means in a row. Otherwise, the configuration is the same as that of the first embodiment, and the description is omitted. As for the pixel skipping, a series of processes including an accumulation period, a readout period, and a sweeping period (initialization period) are repeatedly performed as in the first and second embodiments.

In this case, two pairs of storage means are used. Further, as the sampling groups, sampling groups Gs1 to Gs5 including the pixels 101 adjacent to each other over four rows and four columns as shown in FIG. 10 are used. It is assumed that each of the sampling groups Gs1 to Gs5 corresponds to RGRG / GBGB / RGRG / GBGB in the color arrangement of the Bayer array. Sampling is performed at appropriate intervals.

After the initialization period, accumulation period, and readout period, the first row (R11, G12, R13, G14,...) And the third row (R31, G32, R33, G34,...), The second row (G21, B22, G23, B24,...) And the fourth row (G41, B42, G43, B44,. The signal output circuit 105 provided with the photoelectric signal Vs for each column with respect to the arrangement of all the pixels
Are stored in two sets of first storage elements Cms, and
The error signal Vn is also stored in two sets of second storage elements Cmn.

In this case, the first row of signals (R11, G1
2, R13, G14,...), SWt1 and SWt3 of the connection switch 73 are opened and SWt1 is read.
2, SWt4 is closed, R11 is stored in the upper pair of storage elements in the second column, G12 is stored in the upper pair of storage elements in the first column, and so on. . The signals in the third row (R31, G32, R33, G3
When reading (4,...), The connection switch 73 is set in the same manner as in the first row, R31 is in the upper pair of storage elements in the second column, and G32 is in the upper pair of storage elements in the first column. The columns are sequentially exchanged and stored in the storage element.

Next, the signals (G21, B22,
G23, B24,...), SWt1 and SWt3 of the connection changeover switch 73 are closed, and SWt2 and St
With Wt4 opened, G21 is stored in the lower pair of storage elements in the first column, B22 is stored in the lower pair of storage elements in the second column, and so on, sequentially in an array. When reading the fourth row (G41, B42, G43, B44,...), The connection changeover switch 73 is set in the same manner as in the second row, and G41 is a pair of lower storage elements in the first column. Then, B42 is sequentially stored in the lower pair of storage elements in the second column in an array. In this way, all the signals corresponding to green (G) are stored in the storage element connected to the upper addition means 71a. All the signals corresponding to red (R) and blue (B) are stored in the storage element connected to the lower addition means 71b.

Next, among the photoelectric signals and error signals stored in the storage elements Cms and Cmn corresponding to the sampling group Gs1, a photoelectric signal and an error signal for eight pixels corresponding to green (G) are output. In this case, the photoelectric signal and the error signal for eight pixels corresponding to green (G) are all input to the upper addition means 71a and added. Further, among these added signal outputs, the photoelectric signals are input to the positive input terminal of the subtraction means 72a, and the error signals are input to the negative input terminal of the subtraction means 72a. Thereby, the horizontal output line 2
A difference signal corresponding to green (G) is output to the video signal output terminal 107 through 6a.

Next, a photoelectric signal and an error signal for four pixels corresponding to red (R) are output. In this case, red (R)
Are all input to the lower addition means 71b and added. Next, red (R)
Are input to the subtraction means 72b for processing, and a difference signal corresponding to red (R) is output.

Next, a photoelectric signal and an error signal corresponding to blue (B) are output. In this case, the photoelectric signal and the error signal corresponding to blue (B) are all added to the lower adder 71.
b and added. Next, the photoelectric signal and the error signal for four pixels corresponding to blue (B) are subtracted by the subtraction means 72b.
, And outputs a difference signal corresponding to blue (B).

Thus, the sampling group Gs1
Are formed in a color monitor image representative of the area corresponding to. Next, the sampling groups Gs2 to Gs2
Similarly for s5, similarly to the above, an addition process and a subtraction process are performed on the photoelectric signal and the error signal for each color, and video signals of three colors are output to the video signal output terminal 107, respectively, to represent the area. Form part of a color image.

In this manner, the video signals of the sampling groups covering all the rows and columns are sequentially read out, and a monitor image is drawn to perform automatic exposure and automatic focusing. As described above, also in the solid-state imaging device according to the fourth embodiment, as in the first and second embodiments, the photoelectric conversion element (pixel) 101 corresponding to the color array of the color filter.
In the case of skipping pixels, a plurality of adjacent pixels 101 are selected as sampling pixels, and a plurality of photoelectric signals of the same color among corresponding photoelectric signals are simultaneously selected and added.

In this case, by increasing or decreasing the number of photoelectric signals corresponding to the same color to be selected in proportion to the reading speed, the signal amount corresponding to the amount of accumulated photo-generated charges can be kept constant, It is possible to suppress the monitor image from becoming coarse and obtain a more accurate image.
In addition, since it is only necessary to simultaneously select a plurality of photoelectric signals corresponding to the same color once and to output those photoelectric signals, it is equivalent to selecting one pixel and skipping pixels. Only needs time. Therefore, it is possible to capture the monitor image at high speed.

As described above, it is possible to suppress the deterioration of the image while taking in the photoelectric signal at high speed based on the sampling pixels. Further, similarly to the first and second embodiments, the configuration is such that a photoelectric signal or the like is added for each color of the color filter. In particular, in the case of the fourth embodiment, the configuration is such that photoelectric signals corresponding to different colors are added by a separate set of adding means 71a and 71b. Thereby, it is possible to suppress the variation in the color tone caused by the variation in the amplification degree caused by passing the same color signal through different adding means.

Although the present invention has been described in detail with reference to the embodiments, the scope of the present invention is not limited to the examples specifically shown in the above embodiments, and the scope of the present invention does not depart from the gist of the present invention. Modifications of the above embodiment are included in the scope of the present invention. For example, in the above-described embodiment, eight pixels over two adjacent rows are sampled as one group, or 16 pixels over four rows are sampled as one group, and pixel skipping is performed. Absent. Any number of pixels adjacent over any row can be sampled as a group.

The photoelectric conversion element (unit pixel) 101 is of a threshold modulation type having a carrier pocket 25, but is not limited to this.

[0105]

As described above, according to the present invention,
When pixel skipping is performed on a photoelectric conversion element (pixel) corresponding to a color array of a color filter, a plurality of adjacent pixels are selected as sampling pixels, and a photoelectric signal of the same color among corresponding photoelectric signals is output. It is configured to select and add.

In this case, by increasing or decreasing the number of photoelectric signals corresponding to the same color to be selected in proportion to the reading speed, the signal amount corresponding to the amount of accumulated photo-generated charges can be kept constant. It is possible to suppress the monitor image from becoming coarse and obtain a more accurate image.
In addition, a plurality of photoelectric signals corresponding to the same color are selected and added. By using a so-called switched capacitor as an adding circuit, a plurality of photoelectric signals corresponding to the same color are stored. Since it is only necessary to simultaneously select the storage element once and output those photoelectric signals, the monitor image can be captured at high speed.

As described above, the deterioration of the image can be suppressed while the photoelectric signal is taken in at a high speed based on the sampling pixels. Further, photoelectric signals and error signals corresponding to different colors are added by a separate set of addition circuits. Therefore, it is possible to suppress the variation in the image quality due to the different addition circuits. This makes it possible to suppress the deterioration of the image while taking in the photoelectric signal at high speed based on the sampling pixels.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a circuit configuration of a main part of a solid-state imaging device according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating an overall circuit configuration of the solid-state imaging device according to the first embodiment of the present invention;

FIG. 3 is a cross-sectional view illustrating a structure of a photoelectric conversion element of the solid-state imaging device according to the first embodiment of the present invention.

FIG. 4 is a circuit configuration diagram showing a main part of a signal processing circuit of the solid-state imaging device according to the first embodiment of the present invention;

FIG. 5 is a configuration diagram illustrating an example of an adding unit in the signal processing circuit according to the first embodiment of the present invention;

FIG. 6 is a circuit diagram illustrating a main part of a signal processing circuit of a solid-state imaging device according to a second embodiment of the present invention;

FIG. 7 is a circuit configuration diagram showing a main part of a signal processing circuit of a solid-state imaging device according to a third embodiment of the present invention.

FIG. 8 is a circuit diagram illustrating a main part of a signal processing circuit of a solid-state imaging device according to a fourth embodiment of the present invention.

FIG. 9 is a schematic diagram showing a sampling example of a photoelectric signal of the solid-state imaging device according to the first and second embodiments of the present invention;

FIG. 10 is a schematic diagram showing a sampling example of a photoelectric signal of the solid-state imaging device according to the third and fourth embodiments of the present invention.

FIG. 11 is a diagram illustrating a circuit configuration of a main part of a solid-state imaging device according to a conventional example.

[Explanation of symbols]

15a first well region 15b second well region 15c channel dope layer 16 source region 17 impurity region 17a drain region 17b channel dope layer (channel region) 18 gate insulating film 19 gate electrode 20a to 20h, 20aa, 20ab, 20ba, 2
0bb Vertical output lines 21a to 21d VSCAN supply line 22a, 22b VDD supply line 25 Carrier pocket (high concentration buried layer) 26, 26a, 26b Horizontal output lines 27a to 27h, 27aa, 27ab, 27ba, 2
7bb HSCAN supply line 30a, 30b Step-up voltage supply line 41, 41a to 41d, 42, 42a to 42d Memory output line 71 Addition means 71a First addition means 71b Second addition means 72 Subtraction means 72a First subtraction Means 72b Second subtraction means 101 Unit pixel (photoelectric conversion element) 102 VSCAN drive scan circuit 103 VDD drive scan circuit 104 HSCAN input scan circuit 105 Signal output circuit 107 Video signal output terminal 111 Light receiving diode 112 Insulated gate for optical signal detection Type field-effect transistor (MOS transistor for detecting an optical signal) Ai Operational amplifier Cms First storage element Cmn Second storage element Cif1 First feedback capacitance element Cif2 Second feedback capacitance element SWi1, SWi2, SWn1, SWn2, SWs1 , SWs2 switch element

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H04N 9/07 H04N 9/07 C 5C065 1/028 C // H04N 1/028 H01L 27/14 A (72 Inventor Shuji Yamamoto 3-17-6 Shin-Yokohama, Kohoku-ku, Yokohama City, Kanagawa Prefecture F-term in Inotech Co., Ltd. CB05 DA06 DC11 5C024 BX01 CY15 DX01 GX03 GY31 GZ25 GZ26 HX13 HX28 HX29 5C051 AA01 BA02 DA06 DB01 DB06 DB13 DB14 DB18 DC02 DC03 DC07 DE02 EA01 5C065 AA03 BB48 CC01 CC08 DD15 DD17 EE05 GG24 GG11

Claims (14)

[Claims] A plurality of photoelectric conversion elements arranged in rows and columns; and a first storage means provided for each of the columns and storing a photoelectric signal including an error signal output from the photoelectric conversion element. , Provided for each of the columns, and paired with the first storage means;
A second storage unit for storing an error signal output after the offset from the photoelectric conversion element, and a specific one of signals stored in all the first storage unit and the second storage unit corresponding to each column. Control means for simultaneously selecting and outputting a plurality of said photoelectric signals, and simultaneously selecting and outputting a plurality of said error signals corresponding to said specific plurality of photoelectric signals; and First adding means for inputting and adding a specific plurality of output photoelectric signals, and second adding means for inputting and adding a plurality of error signals simultaneously output from the second storage means; And a subtraction means for inputting an output signal from the first addition means and an output signal from the second addition means and outputting a difference signal between the two output signals. Imaging device. 2. The photoelectric conversion element includes the light receiving diode and an insulated gate field effect transistor for detecting an optical signal adjacent to the light receiving diode, and the insulated gate field effect transistor for detecting an optical signal includes a gate electrode. 2. The solid-state imaging device according to claim 1, further comprising a high-concentration buried layer for storing photo-generated charges generated by the light-receiving diode below a lower channel region. 3. The first operational amplifier, comprising: a first operational amplifier having a positive input terminal, a negative input terminal connected to an output terminal of the first storage means, and an output terminal; A first feedback capacitance element and a first switch element connected in parallel between a negative input terminal and an output terminal of the second input means, the second adding means includes a positive input terminal, and the second storage means. A second operational amplifier having a negative input terminal and an output terminal connected to the output terminal of the second operational amplifier; a second feedback capacitance element connected in parallel between the negative input terminal and the output terminal of the second operational amplifier; The solid-state imaging device according to claim 1, further comprising two switch elements. 4. The photoelectric conversion elements arranged in the columns and rows correspond to respective colors of a color filter having a plurality of colors, and the specific photoelectric signal is a photoelectric signal corresponding to the same color. The solid-state imaging device according to claim 1. 5. A plurality of sets of said first storage means and said second storage means corresponding to the number of rows including said photoelectric conversion elements to be sampled for each column are provided. Item 5. The solid-state imaging device according to any one of Items 1 to 4. 6. The solid-state imaging device according to claim 5, wherein all of the plurality of sets of storage means in one row are connected to outputs of all photoelectric conversion elements arranged in the same row. . 7. A set of the first addition means, the second addition means, and the subtraction means, wherein the first storage means and the second storage means of all the sets in the column are provided. The solid-state imaging device according to claim 5, wherein the first unit is connected to the set of the first adding unit, the second adding unit, and the subtracting unit. 8. The color filter has three colors of green, red, and blue, and has two sets of the first addition means, the second addition means, and the subtraction means. 7. The solid-state imaging device according to claim 5, wherein: 9. The storage device according to claim 1, wherein two or four sets of storage means are provided in the one row, and one or two sets of the first and second sets of the two or four storage means in the one row are respectively different. Connected to the addition means, the second addition means, and the subtraction means,
9. The solid-state imaging device according to claim 8, wherein adjacent columns are connected to the same set of the first addition unit, the second addition unit, and the subtraction unit. 10. The apparatus according to claim 1, wherein two or four sets of storage means are provided in the one row, and two or four sets of storage means in the one row are the same set of the first addition means and the second addition means. And a different set of the first addition means, the second addition means, and the subtraction means in adjacent columns. 9. The solid-state imaging device according to 8. 11. A switch according to claim 9, further comprising a switch for switching the storage elements connected to the outputs of the photoelectric conversion elements arranged in the column between adjacent columns.
0. The solid-state imaging device according to 0. 12. The method for driving a solid-state imaging device according to claim 1, wherein all of the photoelectric conversion elements arranged in the row including the photoelectric conversion element to be sampled output the photoelectric signal, and And storing the error signal after offsetting from all the photoelectric conversion elements arranged in the row, and outputting the error signal to the plurality of first storage means. The corresponding plurality of second storage means are stored in the plurality of second storage means, and the specific plurality of photoelectric signals are simultaneously selected from among the signals stored in all the first storage means, output, and added, The error signals corresponding to the specific plurality of photoelectric signals are simultaneously selected from the signals stored in the second storage means, output, and added, and the added photoelectric signal and the addition Method for driving the solid-state imaging device and outputs a difference signal between the error signal. 13. The method according to claim 1, wherein the photoelectric signal and the corresponding error signal are different for each color of the color filter.
13. The driving method for a solid-state imaging device according to claim 12, wherein the processing is performed by the addition unit and the second addition unit, and the corresponding subtraction unit. 14. The color filter has a Bayer arrangement of green, red and blue, and combines the photoelectric signal and the error signal corresponding to the green with a set of the first addition means and the second signal. Adding means, and the corresponding subtracting means, and processing the photoelectric signal and the error signal corresponding to the red and blue by another set of the first adding means and the second adding means; 14. The driving method of a solid-state imaging device according to claim 13, wherein the processing is performed by the corresponding subtraction unit.