JP2002164742A - Fm demodulation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent fluctuation in the DC voltage level of a demodulation signal output terminal by automatically correcting the fluctuation of the delay quantity of a demodulation delay unit even when the fluctuation of the delay quantity is generated. SOLUTION: This FM demodulation circuit is provided with a delay unit 1 for demodulation and a multiplier 2 for demodulation and a delay unit 3 for correction and a multiplier 4 for correction whose characteristics are respectively the same as those of the unit 1 and the multiplier 2. Then, a reference signal whose frequency is the same as that of a non-modulated carrier wave is delayed by the delay unit 3 for correction, and a phase difference between the reference signal and the output signal of the delay unit 3 for correction is detected, and the DC component of the phase difference is extracted by a low pass filter 5, and a difference voltage between voltage which is the same as the output DC bias voltage of the multiplier 2 for demodulation and the output voltage of the low pass filter 5 is converted into current, and the correction quantity of the delay unit 1 for demodulation and the delay unit 3 for correction are controlled so that the DC voltage level of the demodulation output terminal can be held so as to be constant.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an FM demodulation circuit comprising a semiconductor integrated circuit, and more particularly to an FM modulation circuit having an automatic delay amount correcting circuit for a delay unit.

[0002]

2. Description of the Related Art A delay unit for giving a constant delay amount to an output signal regardless of a frequency with respect to an input signal is used as a phase shifter of an FM demodulation circuit built in a semiconductor integrated circuit.

A conventional FM demodulation circuit using a delay unit will be described below with reference to the drawings. FIG. 2 is a block diagram showing a conventional FM demodulation circuit using a delay unit. As shown in FIG. 2, the FM demodulator has a carrier signal input terminal S1 to which an FM-modulated carrier signal is input.
And a demodulator 1A connected to the carrier signal input terminal S1, a demodulator multiplier 2 connected to the carrier signal input terminal S1 and the output terminal of the demodulator 1A, and a demodulator 2 A demodulated signal output terminal S2 connected to the output terminal and connected to the DC bias power supply E1 via the resistor R1 to generate a demodulated output signal.

Next, the operation of the FM demodulation circuit using the delay device configured as described above will be described below with reference to FIGS.

[0005] To the carrier signal input terminal S1, an FM-modulated carrier signal is input. FIG. 4 is a time chart showing the operation of the demodulation delay device 1A at this time, in which the horizontal axis represents time and the vertical axis represents signal amplitude. In the figure, (1) shows an input signal (carrier signal),
(2) indicates an output signal. The demodulator 1A
An input signal input from the carrier signal input terminal S1 (FIG. 4)
(1)), an output signal having a constant delay Δt regardless of the frequency is generated ((2) in FIG. 4).

FIG. 5 is a characteristic diagram showing the operation of the above-described demodulator 1A with the frequency of the input signal on the horizontal axis and the phase of the output signal on the vertical axis. Demodulator 1A
Changes the phase of the output signal according to the frequency of the input signal ((1) in FIG. 5). (2) and (3) in FIG.
Shows an example of variation in phase-frequency characteristics.

FIG. 6 shows the operation of the demodulation multiplier 2 having the input signal from the carrier signal input terminal S1 and the output signal of the demodulation delay unit 1A as inputs. FIG. 4 is a characteristic diagram showing a magnitude of a current on a vertical axis. The demodulator 2 changes the output current in accordance with the phase difference between the input signal from the carrier signal input terminal S1 and the output signal of the demodulator 1A. As a result, a demodulated signal can be obtained from the demodulated signal output terminal S2 by inputting the FM-modulated carrier signal to the carrier signal input terminal S1.

[0008]

However, in the configuration of the above-mentioned conventional example, the capacitance component,
When the delay amount of the demodulation delay unit 1A varies due to a factor such as a resistance component and other absolute variations of circuit constants, the phase output is different from the characteristic of (1) in FIG. 5 (2) or FIG. 5 (3)
Will have a variation as shown in the characteristics of FIG.

The above-described variation of the demodulation delay unit 1A causes variation in the DC voltage level of the demodulation signal output terminal S2 when the carrier signal is not modulated, that is, the output DC voltage level of the demodulation delay unit 1A. Would.

FIG. 7 shows the DC voltage level of the demodulated signal output terminal S2 when the carrier signal is not modulated. The DC bias voltage E1 in the standard state is equivalent to (2) or (3) in FIG. When the characteristic of
Therefore, the output dynamic range is narrowed.

Here, the relationship between V1 and V2 in FIG. 7 and (2) and (3) in FIG. 5 will be described. When the delay time of the demodulator 1 is reduced due to the variation,
The variation when the horizontal axis is frequency and the vertical axis is phase is as shown in FIG. 5 (2) with respect to the state where there is no variation (FIG. 5 (1)), and is input to the demodulation multiplier 2. .
As shown in FIG. 6, the demodulator 1 outputs current as a phase difference between the carrier signal input from the carrier signal input terminal S1 and the output signal of the demodulator 1 as shown in FIG. In the state (2), a larger current is output than the output in the state (1) in FIG. 5, and the DC voltage level of the demodulation signal output terminal S2 is set to the state V2 in FIG.

If the delay time of the demodulation delay unit 1 becomes longer due to the variation, the state shown in FIG. 5 (3) is reversed. As a result, the demodulated signal output terminal S2
Is set to the state of V1 in FIG.

The present invention solves the conventional problem.
Even when the delay amount of the demodulation delay device has a variation, the DC voltage level of the demodulation signal output terminal, that is, the output DC voltage level of the demodulation delay device has a variation by automatically correcting the variation of the delay amount. It is an object of the present invention to provide an FM demodulation circuit capable of eliminating the need.

[0014]

In order to achieve this object, an FM demodulation circuit according to the present invention is provided with a demodulation delay device which receives an FM-modulated carrier signal as input and can control a delay amount of an output signal by current. A demodulation multiplier for receiving a FM-modulated carrier signal and an output signal of a demodulation delay unit and outputting a demodulation signal in a state where a predetermined output DC bias voltage is applied; It has a characteristic, a reference signal of the same frequency as the unmodulated carrier, and a delay for correction that can control the amount of delay of the output signal by current, and has almost the same characteristics as the multiplier for demodulation. A correction multiplier for receiving a reference signal having the same frequency as a carrier wave and an output signal of a correction delay device and detecting a phase difference between two input signals, and a correction multiplier connected in series with the correction multiplier. Product output signal A low-pass filter that is connected in series with the low-pass filter, and the same voltage as the output DC bias voltage of the multiplier for demodulation is provided as a DC bias voltage, and the output signal of the low-pass filter is converted from voltage to current, and a delay for demodulation is performed. And a voltage-to-current converter for controlling the amount of delay of the correction delay device by the current output so as to keep the output DC voltage level of the demodulation delay device and correction delay device constant.

The above-mentioned voltage-current converter makes the output DC voltage level of the correction multiplier coincide with the DC bias voltage, for example, and makes the output DC voltage level of the demodulator multiplier coincide with the predetermined output DC bias voltage.

According to this configuration, when there is variation in the delay amount of the correction delay device, the output signal of the correction multiplier for detecting the phase difference between the reference signal and the output signal of the correction delay device is supplied to the low-pass signal. The delay amount of the correction delay device is corrected by feeding back the current to control the delay amount of the correction delay device to the correction delay device through the filter and the voltage-current converter.

Thus, the output signal of the low-pass filter which is the input of the voltage-to-current converter, that is, the DC voltage level of the unmodulated carrier signal is changed to the DC bias voltage which is the same voltage as the output DC bias voltage of the demodulation multiplier. To match. At this time, the output of the voltage-current converter is also applied to a demodulation delay device having the same characteristics and variations as the correction delay device. As a result, the delay amount of the demodulation delay device is controlled by the same current as that of the correction delay device, and when the carrier signal is not modulated, the DC voltage level of the output signal of the demodulation multiplier is set to a predetermined value. It can be kept constant in the state that it matches the output DC bias voltage,
Even if the delay amount of the demodulation delay unit varies, the DC voltage level of the unmodulated carrier signal does not vary.

As described above, even when the delay amount of the demodulation delay unit varies, the current corresponding to the variation of the delay amount of the correction delay unit having the same characteristic is fed back to the correction delay unit. At the same time, the current is also supplied to the demodulation delay device, so that the DC voltage level of the demodulation multiplier output signal does not vary when the carrier signal is not modulated.

In the above description, it is described that the correction delay device has substantially the same characteristics as the demodulation delay device, and the correction multiplier has substantially the same characteristics as the demodulation multiplier. The reason will be described. That is, the present invention is not only effective when the correction delay device and the demodulation delay device have exactly the same characteristics, but also when the two devices have a proportional relationship, for example. Because it is effective. The same applies to the correction multiplier and the demodulation multiplier.

[0020]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 shows a block diagram of an FM demodulation circuit according to the first embodiment. As shown in FIG. 1, the FM demodulation circuit of the present embodiment includes a carrier signal input terminal S1 and a demodulated signal output terminal S2.
, A reference signal input terminal S3, a demodulation delay unit 1, a demodulation multiplier 2, a correction delay unit 3, and a correction multiplier 4.
, A low-pass filter (LPF) 5, a voltage-current converter 6, a DC bias power supply E1, a resistor R1, and a resistor R1.
And 2.

An FM-modulated carrier signal is input to the carrier signal input terminal S1.

The demodulator 1 has a carrier signal input terminal S
1 and has a function of delaying the FM-modulated carrier signal input from the carrier signal input terminal S1 by a predetermined time and outputting the delayed signal. This demodulator 1 can control the amount of delay of the output signal by the current.

The demodulator 2 is connected to the carrier signal input terminal S1 and the output terminal of the demodulator 1 and receives the FM-modulated carrier signal and the output signal of the demodulator 1 as inputs. When a DC bias power supply E1 is connected to the terminal via a resistor R1, a demodulated signal is output with a predetermined output DC bias voltage applied. The demodulation multiplier 1 has a function of detecting a phase difference between an FM-modulated carrier signal and an output signal of the demodulation delay unit 1, and the demodulation signal includes an FM-modulated carrier signal and a demodulation delay unit. 1 is a signal corresponding to the phase difference from the output signal of the first output signal.

The demodulated signal output terminal S2 is connected to the output terminal of the demodulator 2 and a demodulated signal appears.

A reference signal having the same frequency as the unmodulated carrier is input to the reference signal input terminal S3.

The correction delay unit 3 has a reference signal input terminal S3
, And has a function of delaying a reference signal input from the reference signal input terminal S3 by a predetermined time and outputting the same. The correction delay unit 3 can control the delay amount of the output signal by the current.

The correction multiplier 4 has a reference signal input terminal S
3 and the output terminal of the correction delay unit 3, which have the same characteristics as the demodulation multiplier 2 and have two input signals, ie, a reference signal having the same frequency as the unmodulated carrier and an output signal of the correction delay unit. The output signal is a signal corresponding to the phase difference between the reference signal and the output signal of the correction delay unit 3.

The low-pass filter 5 includes a correction multiplier 4
, And integrates the output signal of the correction multiplier 4.

The voltage-current converter 6 includes a low-pass filter 5
Is connected to the DC bias power supply E1 via the resistor R2, so that a DC bias voltage input having the same voltage as the output DC bias voltage given to the demodulation signal is applied. The output signal of the low-pass filter 5 integrated by the low-pass filter 5 is converted from a voltage to a current, and the delay amount of the demodulation delay device 1 and the correction delay device 3 is controlled by the current output.

As the multiplier, for example, a Gilbert multiplier is used. Specifically, the collector of the differential amplifier circuit is connected to the emitter junction of another differential amplifier circuit, and the collector current output of the differential amplifier circuit is passed through another differential amplifier circuit to two differential amplifiers. This is a circuit that multiplies the input signal and outputs it as a collector current.

As the delay device, for example, a circuit that determines the delay time based on the discharge time of the capacitor is used. Specifically, the delay time is controlled by changing the collector current of the differential amplifier circuit as a discharge current, the discharge time of the charge of the capacitor as a delay time, and changing the collector current of the differential amplifier circuit by a control current input. Circuit.

As the voltage-current converter, for example, a differential amplifier is used. Specifically, it is a circuit that receives the base of the differential amplifier circuit as a voltage input and outputs a collector current.

FIG. 3 is a characteristic diagram showing the control operation of the delay amount by the current of the demodulation delay unit 1 and the correction delay unit 3, wherein the horizontal axis represents the current and the vertical axis represents the delay amount. FIG. 4 is a time chart showing the delay operation of the demodulation delay unit 1 and the correction delay unit 3, in which the horizontal axis indicates time and the vertical axis indicates signal amplitude.

FIG. 5 shows the operation of the demodulator 1 and the compensator 3 with the frequency of the input signal on the horizontal axis and the phase of the output signal on the vertical axis. The demodulation delay device 1 and the correction delay device 3 change the phase of the output signal according to the frequency of the input signal ((1) in FIG. 5).

FIG. 6 is a characteristic diagram showing the operation of the demodulation multiplier 2 and the correction multiplier 4, wherein the horizontal axis represents the phase difference and the vertical axis represents the output current. These multipliers 2
2 and 4 change the output current according to the phase difference between the two input signals. FIG. 7 shows the DC voltage level of the demodulation signal output terminal S2, that is, the output DC voltage level of the demodulator multiplier 2 when the carrier signal is not modulated. FIG.
Indicates the operation of the voltage-current converter 6, and indicates that the output current is changed by the input voltage (DC bias voltage).

The operation of the FM demodulation circuit configured as described above will be described below.

First, the demodulation operation will be described. An FM-modulated carrier signal is input to a carrier signal input terminal S1. The demodulation delay unit 1 outputs an output signal ((2) in FIG. 4) that gives a constant delay Δt to the input signal ((1) in FIG. 4) input from the carrier signal input terminal S1 regardless of the frequency. ), And changes the phase of the output signal according to the frequency of the input signal ((1) in FIG. 5).

The demodulator 2 changes the output current in accordance with the phase difference between the input signal from the carrier signal input terminal S1 and the output signal of the demodulator 1 (FIG. 6). As a result, a demodulated signal can be obtained from the demodulated signal output terminal S2 by inputting the FM-modulated carrier signal to the carrier signal input terminal S1.

Next, automatic delay amount correction of the delay unit will be described below. When the delay amount of the correction delay device 3 has a variation and the delay time is large, the variation when the horizontal axis indicates the frequency and the vertical axis indicates the phase has no variation ((1 in FIG. 5). 5), the state shown in FIG. 5C is obtained, and the state is input to the correction multiplier 4.
At this time, the same amount of variation also occurs in the demodulator 1.

The correction multiplier 4 has a reference signal input terminal S
Since the phase difference between the reference signal input from 3 and the output signal of the correction delay unit 3 is output as a current as shown in FIG.
When the input is in the state of (3) in FIG. 5, a smaller current is output than the output in the state of (1) in FIG.

The low-pass filter 5 removes harmonic components, integrates an input signal, and outputs a DC voltage. Therefore, when the input current is small, the output voltage is low.
The voltage-current converter 6 compares the voltage supplied from the DC bias power supply E1 connected to the DC bias voltage input terminal via the resistor R2 with the output voltage of the low-pass filter 5, 3 outputs a current for controlling the delay amount. When the output voltage of the low-pass filter 5 is low,
As shown in FIG. 8, the control current increases, and the amount of delay of the correction delay unit 3 is controlled to decrease as shown in FIG.

Conversely, when the delay time of the correcting delay unit 3 is reduced, the variation when the frequency is plotted on the horizontal axis and the phase is plotted on the vertical axis is a state without variation ((1) in FIG. 5).
5), the state becomes (2) in FIG. At this time, the same amount of variation also occurs in the demodulator 1.

The correction multiplier 4 has a reference signal input terminal S
Since the phase difference between the reference signal input from 3 and the output signal of the correction delay unit 3 is output as a current as shown in FIG.
When the input is in the state of (2) in FIG. 5, a larger current is output than the output in the state of (1) in FIG.

The low-pass filter 5 removes harmonic components, integrates an input signal, and outputs a DC voltage. Therefore, when the input current is large, the output voltage increases.
The voltage-current converter 6 compares the voltage supplied from the DC bias power supply E1 connected to the DC bias voltage input terminal via the resistor R2 with the output voltage of the low-pass filter 5, and Output a current for controlling the amount of delay of. When the output voltage of the low-pass filter 5 is high, the control current decreases as shown in FIG. 8, and the amount of delay of the correction delay unit 3 is controlled to increase as shown in FIG.

From the above control operation, the output signal of the low-pass filter 5 obtained by integrating the output signal of the correction multiplier 4 becomes
The output voltage is the same as the output voltage of the DC bias power supply E1. At this time, since the same control current as that of the correction delay unit 3 having the same characteristics and variations as the correction delay unit 3 is supplied to the demodulation delay unit 1, when the carrier signal is not modulated, the demodulation multiplier unit is used. 2 becomes the same as that of the correction multiplier 4, and the DC voltage level of the demodulation signal output terminal S2 becomes the same as the output DC bias voltage supplied from the DC bias power supply E1.

As described above, conventionally, when the carrier signal is not modulated, the DC voltage level of the demodulation signal output terminal S2, that is, the output DC level of the demodulation multiplier 2 is changed to the voltage V1 of FIG. Although it has a variation like the voltage V2, according to the embodiment of the present invention, since the delay amount is automatically corrected, the DC voltage level of the demodulation signal output terminal S2, that is, the output DC voltage of the demodulation multiplier 2, The level can be made not to vary from the output DC bias voltage. That is, the DC voltage level of the demodulation signal output terminal S2 can be made to match the output DC bias voltage.

[0047]

As described above, according to the FM demodulation circuit of the present invention, even if the delay amount of the demodulation delay unit varies, the delay amount variation of the correction delay unit having the same characteristic can be dealt with. The current is fed back to the delay for correction to correct the amount of delay, and at the same time, the current is also supplied to the delay for demodulation, so that the output DC voltage level of the multiplier for demodulation when the carrier signal is unmodulated is reduced. It can be made to have no variation.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an FM demodulation circuit according to an embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of an FM demodulation circuit in a conventional example.

FIG. 3 is a characteristic diagram illustrating a control operation of a delay amount by a current of a demodulation delay device and a correction delay device.

FIG. 4 is a time chart showing a delay operation of a demodulation delay device and a correction delay device.

FIG. 5 is a characteristic diagram showing operations of a demodulation delay device and a correction delay device.

FIG. 6 is a characteristic diagram showing an example of the operation of the demodulation multiplier and the correction multiplier.

FIG. 7 is a characteristic diagram showing a DC voltage level of a demodulated signal output terminal when a carrier is not modulated.

FIG. 8 is a characteristic diagram showing an operation of the voltage-current converter.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Demodulation delay device 2 Demodulation multiplier 3 Correction delay device 4 Correction multiplier 5 Low-pass filter 6 Voltage-current converter S1 Carrier signal input terminal S2 Demodulation signal output terminal S3 Reference signal input terminal R1, R2 Resistance E1 DC bias Power supply

Claims (3)

[Claims] 1. An FM-modulated carrier signal is input.
A demodulation delay device capable of controlling a delay amount of an output signal by a current; a demodulation device in which a FM output carrier signal and an output signal of the demodulation delay device are input and a predetermined output DC bias voltage is applied. A demodulator for outputting a signal, a reference signal having the same frequency as the unmodulated carrier as input, and a correcting delay device capable of controlling the amount of delay of the output signal by current; and a reference having the same frequency as the unmodulated carrier. A correction multiplier for receiving a signal and an output signal of the correction delay device and detecting a phase difference between two input signals; an output signal of the correction multiplier connected in series with the correction multiplier. A low-pass filter that is connected in series with the low-pass filter, and the same voltage as the output DC bias voltage of the demodulation multiplier is provided as a DC bias voltage, The output DC voltage of the demodulation delay device and the correction delay device is converted by converting the output signal of the filter into a current from a voltage and controlling the delay amount of the demodulation delay device and the correction delay device by a current output. An FM demodulation circuit comprising a voltage-current converter for making a level constant. 2. The voltage / current converter according to claim 1, wherein the output DC voltage level of the correction multiplier is matched with the DC bias voltage, and the output DC voltage level of the demodulation multiplier is matched with a predetermined output DC bias voltage. 2. The FM demodulation circuit according to claim 1, wherein: 3. The FM demodulation circuit according to claim 1, wherein the correction delay device has the same characteristics as the demodulation delay device, and the correction multiplier has the same characteristics as the demodulation multiplier.