JP2002141418A - Semiconductor circuit, driving method of it and semiconductor element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent generation of the overvoltage and reduction of the electromagnetic noise during the switching operation in a semiconductor circuit. SOLUTION: When a circuit is in a blocking state, the current and voltage characteristics of this device exhibits that the current flows slowly if the voltage is over a first voltage value V1 as well as under a second voltage value V2 and the current flows rapidly when the voltage is over the second voltage value V2. Accordingly, the energy stored in inductance in the circuit is consumed by a derivative resistance that the circuit comprises when the circuit transfers from the ON-state to the OFF-state, so that a bouncing voltage is restrained. As a result, generation of an electromagnetic noise and an overvoltage can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor circuit used in a power converter, a driving method thereof, and a semiconductor device.

[0002]

2. Description of the Related Art Power conversion devices include switching elements such as MOSFETs and IGBTs, rectifying elements such as diodes, and intentionally incorporated elements such as capacitors, inductances, and resistors, as well as wiring. It is composed of the parasitic inductance of the device. In a power converter, power is converted by repeating a state in which a current flows through a switching element or a rectifier element (on state) and a state in which no current flows (off state).
When the element shifts from the on state to the off state, the element is affected by the parasitic inductance, and a jump voltage greatly exceeding the power supply voltage is applied to the element.

[0003] In order to prevent the destruction of the element at the time of switching due to the jumping voltage, conventionally, the magnitude of the jumping voltage is predicted and an element having a breakdown voltage higher than this value is used, or the jumping voltage is suppressed by using a snubber circuit. I was doing. However, using an element having a large withstand voltage is not desirable because it not only increases the cost but also increases the power loss of the element. Also, preventing a jump voltage by using a snubber circuit or the like leads to an increase in the number of components, resulting in an increase in size and cost of the device.

[0004] By the way, the jump voltage generated at the time of switching is generated when the current flowing through the element and the inductance at the same time suddenly decreases due to the switching operation. Therefore, if a rapid decrease in the current is suppressed, the jump voltage can be suppressed. As a method focusing on this point, for example, there is a method of connecting a Zener diode or an avalanche diode in parallel to the element. That is, when the voltage applied to the avalanche diode becomes equal to or higher than its breakdown voltage, a current flows through the avalanche diode to prevent a sharp decrease in the current.

[0005] However, this has the following problems.
When a current flows through the avalanche diode, the resistance component after breakdown of the avalanche diode is almost zero, so that the current flowing through the parasitic inductance does not decrease, and the voltage applied to the diode decreases. When this voltage falls below the voltage at which avalanche breakdown occurs, the avalanche diode is turned off, and the current flowing through the inductance tends to decrease sharply. Electric current flows. That is, the voltage and current of the avalanche diode continue to oscillate, causing electromagnetic noise.

In addition to the method using an avalanche diode, for example, the document EPEJournal Vol.4 No.2 June (19)
94) There is a method described on p8-p9. This is an example of a technique called a dynamic ramp method, in which an avalanche diode is connected between the collector terminal and the gate terminal of the IGBT,
The configuration is such that a resistor is connected between the gate terminal and the emitter terminal. When the collector voltage exceeds the voltage specified by the avalanche diode, a current flows through the avalanche diode and the resistor, and the collector voltage of the IGBT flows by increasing the gate voltage, preventing a large voltage from being applied to the element. It is. However, in this case as well, a problem similar to the case where an avalanche diode is used occurs as described above.

When the collector voltage exceeds the breakdown voltage of the avalanche diode, a difference between the collector voltage and the avalanche breakdown voltage is applied to the gate electrode. That is, when the voltage exceeds the avalanche breakdown voltage, all voltages higher than the avalanche breakdown voltage are applied to the gate voltage.

In general, the collector current of an IGBT greatly changes with a slight change in gate voltage. Therefore, when the collector voltage exceeds the avalanche breakdown voltage, the current of the IGBT sharply increases. For example, in the case of an IGBT having a withstand voltage of several hundred V and a rated current density of about 200 A / cm ² , the saturation current density at a gate voltage of 15 V is several thousand A / cm.
also it becomes cm ^2. This means that the collector current can be as high as several thousand A even if the collector voltage is increased by only 15 V from the voltage specified by the avalanche diode connected between the collector and the gate. That is, the IGBT using the dynamic clamp method exhibits output characteristics very similar to an avalanche diode (the voltage suddenly increases at a certain voltage). For this reason, this dynamic clamp method has the same problem as the above-mentioned avalanche diode.

[0009]

As described above, the method of suppressing the jump voltage used in the conventional power converter has problems such as power loss, increase in cost, and generation of electromagnetic noise. Was. An object of the present invention is to provide a semiconductor circuit which can solve such a problem, a driving method thereof, and a semiconductor element.

[0010]

A semiconductor circuit according to the present invention has at least a circuit including a semiconductor element and an inductance connected to the circuit, and controls a current flowing on and off. Further, when the magnitude of the blocking direction voltage applied to both ends of the circuit including the semiconductor element is equal to or more than the first voltage value and equal to or less than the second voltage value, the magnitude of the current increases with an increase in the blocking direction voltage. Above the voltage value of
The current increases at a rate of increase larger than the rate of increase of the current between the first voltage value and the second voltage value. Here, only the leak current flows up to the first voltage value, and the circuit is substantially in a current cutoff state.

Note that a circuit including a semiconductor element includes not only a circuit including a semiconductor element and other passive elements, but also a circuit including only a semiconductor element, a semiconductor element incorporated in one case, or a semiconductor element and a peripheral element. It may be a semiconductor module incorporating a circuit. The semiconductor element is a semiconductor switching element, a diode, or the like that can control a main current by a control signal. Further, the inductance may be not only the load of the electric motor but also the inductance of the circuit wiring. These points are the same in the following configurations.

The circuit including the above-described semiconductor element can be used not only in a semiconductor circuit in which an inductance is connected and a flowing current is controlled on / off, but also in connection with various other circuits or semiconductor elements. .

Next, in the method for driving a semiconductor circuit according to the present invention, when the blocking direction voltage applied between the main electrodes of the semiconductor switching element is equal to or more than the first voltage value and equal to or less than the second blocking direction voltage value, the main current is reduced. In order for the magnitude to increase with an increase in the blocking direction voltage, the main current increases at a rate greater than the second voltage at a rate greater than the rate of increase of the main current between the first voltage and the second voltage. Thus, the control signals corresponding to the respective blocking direction voltages are supplied to the semiconductor switching elements. Here, only the leak current flows up to the first voltage value, and the semiconductor switching element is substantially in a current cutoff state.

Further, in the semiconductor device of the present invention, when the magnitude of the blocking direction voltage applied between the main electrodes is equal to or more than the first voltage value and equal to or less than the second voltage value, the magnitude of the main current is equal to the blocking direction voltage. It increases with the increase, and the first
The main current increases at a rate of increase larger than the rate of increase of the main current between the first voltage value and the second voltage value. Here, only the leak current flows up to the first voltage value, and the semiconductor element is substantially in a current cutoff state. The specific structure of the semiconductor device having such characteristics will be apparent from the description of the embodiments.

When a blocking direction voltage applied to a circuit including a semiconductor element as described above, or a semiconductor circuit or a semiconductor element exceeds a first voltage value, a current according to the magnitude of the voltage flows. This current prevents a sharp decrease in the current flowing through the inductance in the circuit or the inductance connected to the semiconductor element, and gently limits the increase in the voltage applied to the circuit or semiconductor element. Further, when the voltage exceeds the second voltage value, a larger current flows, and the increase in the applied voltage is sharply limited.

That is, the differential resistance between the first voltage value and the second voltage value (the change amount of the current with respect to the minute change amount of the voltage) is larger than the differential resistance at the second voltage value or more.
Therefore, when a voltage is induced in the inductance, such as during a switching operation of the element, the differential resistance between the first voltage value and the second voltage value plays a role of absorbing the energy stored in the inductance. Since the differential resistance equal to or more than the second voltage value serves to limit a further increase in the voltage, generation of electromagnetic noise due to vibration of the voltage and current and generation of an overvoltage which may lead to destruction of the element are prevented.

[0017]

FIG. 1, FIG. 2, FIG. 3, and FIG. 4 are for explaining an embodiment of the present invention. FIG. 1 is a diagram showing current-voltage characteristics of a semiconductor circuit or a semiconductor element to which the present invention is applied in a blocking state, FIG. 2A is a circuit embodying the present invention, and FIG. FIG. 3 (a) shows the current and voltage waveforms at various parts of the circuit, and FIG.
FIG. 3B is a circuit diagram for explaining the effects of the present invention, and FIG. 4B is a circuit diagram for explaining the effects of the present invention.

In FIG. 1, V ₁ indicates the voltage at which the current flows in the blocking state, and V ₂ indicates the voltage at which the current rapidly flows. In FIG. 2A, _DF is a diode showing the current-voltage characteristic of the present invention, IGBT is an example of a switching element showing the current-voltage characteristic of the present invention, E1 is a DC power supply, L
_L parasitic inductance wiring or the like has, the L _M shows the inductance component of the load. In FIG. 2B, the symbols of the voltage and the current correspond to the symbols in FIG. 2A.

First, how the current-voltage characteristics of FIG. 1 suppress the oscillation of current and voltage and prevent overvoltage will be described with reference to the embodiment of FIG.

When the IGBT, which is a switching element, is turned off by a gate signal, the current flowing through the IGBT rapidly attenuates. Then the current that has been flowing in the IGBT is also flows through L _M is the inductance of the load and a parasitic inductance L _L, it can not be reduced rapidly. Since the L _M are connected flywheel diodes DF, the current flowing through L _M continues to flow to the cathode of the flywheel diode as a current I _D. The time flywheel diode, in order to flow current I _D as a forward current, the voltage between the main electrodes of L _M is the number V and a low value.

On the other hand, since the current flowing through the parasitic inductance L _L is rapidly cut off by the IGBT, the collector voltage V _{C of the} IGBT is increased. However, IGBT because it has a current-voltage characteristic of the blocking state shown in FIG. 1, in order to flow slowly current when the voltage of the IGBT becomes V ₁ or more, the collector voltage V _C is moderately its increase rate Increase while decreasing. The current of Fig. 1
As it is apparent from the voltage characteristic, IGBT from exhibit slightly larger differential resistance at voltages V ₁ or more, consuming energy this resistance is accumulated in the parasitic inductance.

[0022] When the collector voltage V _C without being completely consumed the energy of the parasitic inductance of the L _L is increased, because the current increases more rapidly than in the voltage V ₂ to it, due to the parasitic inductance L _L of the collector voltage V _C The increase stops, and after continuing for a while, begins to decrease. Again voltage when the collector voltage is V ₂ less than V ₁
And the energy of the inductance is consumed by the differential resistance between V _2, the collector voltage decreases gradually.

[0023] As described above, when the switching element having a current-voltage characteristic shown in FIG. 1, because it absorbs the energy of the inductance differential resistance between the voltages V ₁ and V _2, as in the prior art current and voltage Does not vibrate and generate electromagnetic noise. Further, since the collector voltage V _C is suppressed near V ₂ , it is possible to prevent the IGBT itself and the circuit components connected in parallel to the IGBT from being destroyed due to the overvoltage.

Next, when the IGBT by the gate signal V _G is turned on, the current that has been flowing through the flywheel diode decreased initially, eventually towards the current (the cathode electrode K to the anode A in the negative direction Flowing current) flows. Since this negative current flows due to the carriers stored inside the diode, the absolute value of the current starts to decrease toward zero as the carriers decrease.
Since this current also flows through the parasitic inductance L _L , the reverse voltage (blocking voltage) V _{D of} the diode increases as the absolute value of the current decreases. Moderately current flows when the voltage V _D reaches the voltage value V _1, gradually reducing the rate of increase in the reverse voltage V _D.

The relationship between the reverse current and the voltage after that is IG
Although the description is omitted because it is the same as the case of the BT, the flywheel diode also generates electromagnetic noise due to current and voltage oscillations, and destroys the diode itself and circuit components connected in parallel due to overvoltage due to overvoltage. Can be prevented.

Next, another embodiment will be described with reference to FIG.
Here, the operation of the snubber circuit to which the present invention is applied will be described. FIG gate voltage V _G of the switching device IGBT 3
From t ₁ as shown in subjected to t ₂ when shifting to 0V, and the current I _I which has been flowing in the IGBT is reduced. However, this reason current I _I can also flows inductance L _M is a parasitic inductance L _L and the external load wiring or the like has, can not be reduced drastically, bypassing a current I _DS in the inductance L _S and the diode D _S And flow,
The capacitor C _S will be charged. At time t ₂ when I _I becomes 0, all the current values I _M initially flowing through the IGBT shift to I _DS , so that at time t ₂ , the current value of I _DS becomes I _M. Because while the current I _DS will charge the capacitor C _S, the terminal voltage V _IG switching element IGBT increases gradually.

[0027] When the terminal voltage V _IG becomes time t ₃ when rises to the power supply voltage E1, the inductive load L _M and the diode D _F connected in parallel are turned on, a current I which has been flowing in the snubber diode D _{S DS} begins to decrease, but the parasitic inductance L _L and can not be wiring of the snubber circuit is reduced drastically because of the inductance L _S with, continue to flow for a while while reducing. Therefore, the terminal voltage of the capacitor C _S becomes larger than the power supply voltage E1, the terminal voltage V _IG of IGBT becomes larger than the power supply voltage E1.

[0028] At time t ₄ the current I _DS goes to zero, due to the high than the power supply voltage is more of the voltage of the capacitor C _S,
Current flows toward the capacitor C _S to the power supply, the diode D _S reverse voltage is applied. Carriers are accumulated inside the diode when in the ON state, and the carriers are swept out as a reverse current, and the reverse current flows while increasing. At time t _5, since the carriers in the diode decreases, the internal diodes are depletion layer forming, reverse current of the diode begins to decrease sharply in reversal.

[0029] At this time, as the decrease of the current is if abrupt, diode D for the inductance L _S and L _L
The potential of the anode electrode A of _S is greatly reduced. That is, the reverse voltage (reverse direction voltage) of the diode D _S V _S is increased. When the voltage V _S reaches the voltage value V ₁ , the current slowly flows, and the rate of increase of the reverse voltage V _S gradually decreases. The subsequent relationship between the reverse current and the voltage is the same as in the case of the IGBT, so the description is omitted. However, even in the snubber diode, the occurrence of electromagnetic noise due to the oscillation of the current and the voltage, the diode itself due to overvoltage, and the connection in parallel to the diode itself It is possible to prevent the destruction of the circuit components caused by the overvoltage.

In the above embodiment, the differential resistance between the first voltage value and the second voltage value serves to absorb the energy stored in the parasitic inductance. Plays a role in preventing the voltage from further increasing. However, in the present invention, it is not always necessary to provide the second voltage value and further reduce the differential resistance. For example, in the case of a power converter in which a circuit is composed of elements with a sufficient withstand voltage, it is not necessary to limit the voltage rise, and it is not always necessary to reduce the differential resistance at the second voltage value.

It is best that the differential resistance at the first voltage value or higher absorbs the energy stored in the parasitic inductance and sufficiently suppresses the oscillation of the current and the voltage. Next, the most preferable value of the differential resistance at or above the first voltage value will be described with reference to FIG.

The reason why current and voltage oscillations occur is that, for example, when the IGBT, which is a switching element, is turned off, it becomes an equivalent capacitor and causes a resonance phenomenon with a parasitic inductance of wiring and the like.
For example, an IGBT is made of a semiconductor and interrupts a circuit current by expanding a depletion layer inside the element. When the depletion layer spreads, the IGBT functions as a capacitor composed of space charge, which causes a resonance phenomenon with an inductance existing in the circuit. Therefore, in order to prevent the resonance phenomenon, while the inductance generating the resonance phenomenon stores energy, the IGBT does not function as a complete capacitor, but may have a resistance component. The current-voltage characteristic of the present invention shown in FIG. 1 focuses on this point, and the IGBT has a _first voltage value V ₁ or more.
Has a resistance component.

There are three circuit loops that cause a resonance phenomenon in the semiconductor circuit shown in FIG. The first is a circuit loop that generates a resonance phenomenon when the IGBT shifts from the on state to the off state.
_L, and the loop consisting of the flywheel diode D _F which does not generate a voltage drop and load inductance L _M and IGBT. When this is expressed by an equivalent circuit, the power supply E1 does not affect a high frequency vibration phenomenon such as a resonance phenomenon, and can be ignored, resulting in an equivalent circuit as shown in FIG. Here, R is the resistance of the wiring, and R _I is a resistance component generated at a first voltage value or more added by the current-voltage characteristic of the present invention. As described above, the resistor R _I is connected in parallel with the capacitor C _I which the IGBT essentially has, and this acts to absorb the energy stored in the parasitic inductance L _L and suppress the current and voltage oscillations. I do.

The second is a resonance phenomenon that occurs when the IGBT shifts from off to on. At this time,
The flywheel diode exhibits a recovery characteristic and eventually becomes a capacitor, and a resonance phenomenon with a parasitic inductance occurs. The loop that causes the resonance phenomenon at this time is
Parasitic inductance L _L, consisting of flywheel diode D _F and IGBT. If this is represented by an equivalent circuit, it becomes as shown in FIG. 4C, where L _L is the parasitic inductance, C _L
DF is a capacitor inherent in the diode, R _DF is a differential resistance generated at a first voltage value or more, R is wiring and IGB
T is the ON resistance. In this case as well, an equivalent circuit having exactly the same configuration as that of FIG. 4B is obtained, and the differential resistor _RDF generated at the first voltage value or more suppresses current and voltage oscillations.

The third is a resonance phenomenon that occurs when the IGBT shifts from the on state to the off state and a little time has passed since then. IGBT is turned off, after a lapse of some time, due to the influence of the parasitic inductance L _L and the parasitic inductance L _S of the snubber circuit, towards the voltage of the snubber capacitor C _DS is higher than the power supply voltage. Therefore, current flow is generated toward the power from the snubber capacitor C _DS through the snubber diode D _S, finally snubber diode D _S becomes capacitor, for generating a resonance phenomenon of the parasitic inductance L _S and L _L . The snubber circuit has a snubber resistor R _S and a snubber capacitor C _S ,
Since the inductance L _R of infestation by wiring the snubber resistor is present in series, the impedance of the inductance is large, not included in the snubber resistor R _S in the equivalent circuit with respect to a resonance phenomenon. Also, the snubber capacitor C _S is usually in far larger than the capacitance of the snubber diode (usually 10,000 times from 1000), not included in the same equivalent circuit.

From the above, the equivalent circuit is shown in FIG.
become that way. Here, R is a parasitic resistance of the wiring and the snubber capacitor, C _DS is a capacitor essentially of the snubber diode, and a differential resistance generated when R _DS is equal to or higher than the first voltage value. Also in this case, an equivalent circuit having exactly the same configuration as that of FIG. 4D is obtained, and the differential resistor _RDS generated at the first voltage value or more suppresses oscillation of current and voltage.

Next, the presence of the differential resistance generated at the first voltage or more such as R _I , R _DF , R _DS suppresses the resonance phenomenon with the parasitic inductance, and furthermore, the value of these differential resistances Describes that there is the most effective range for suppressing resonance. The description will be made using the equivalent circuit of FIG.

[0038] The differential resistance R _I of the first voltage value or exerts the effect of suppressing the resonance phenomenon, the resistance R _I is IGB
This is the time when T basically becomes equal to or less than the impedance of the capacitor C _I possessed. That is, assuming that the resonance frequency of the equivalent circuit in FIG. 4B is ω, R ₁ ≦ 1 / ωC _I (Equation 1) may be satisfied. The value of R _I is the electric resistance R of the wiring.
The smaller range, it becomes smaller than the effect of suppressing the resonance phenomenon which R has no meaning of R _I is in this range. That is, the R _I is required greater than R. Therefore,
For R _I to effectively suppress the resonance _{phenomenon, R ≦ R I ≦ 1 /} ωC I ... good to be (number 2).

The resonance frequency ω is specifically obtained from FIG. Since the resonance frequency ω determines the upper limit of R _I , when obtaining ω, the resistance R of the wiring can be ignored. In other words, the differential equation _{L L (di r / dt)} + L L (di c / dt) + (1 / C I) ∫i c dt = 0 ... ( number _{3) (1 / C I)} ∫i c dt = i _r · R _I (Equation 4) When the above differential equation is solved, the resonance frequency ω becomes: ω = [1 / ( _LL · C _I ) − (1/4) {1 / ( _RI · C _I )} 2] 1/2 (5) ). By substituting this into equation (2), R _I
Good It is _{R ≦ R I ≦ {(5/4} ) · (L L / C I)} 1/2 ... ( 6).

As described above, it has been shown that the current-voltage characteristics shown in FIG. 1 are effective in suppressing the occurrence of overvoltage and the resonance phenomenon. Next, a specific example for realizing the current / voltage characteristics of FIG. 1 will be described.

FIG. 5 shows a semiconductor circuit having an IGBT and an overvoltage protection circuit connected to the IGBT for realizing the characteristics of the IGBT in the circuit of FIG. In this figure, the switching element is an IGBT.
However, the present invention is not limited to this, and switching elements exhibiting other saturation characteristics, such as MOSFETs, may be used. This embodiment is composed of an overvoltage protection circuit comprising a resistor and avalanche diode, when V ₁ and V _2, respectively the breakdown voltage of the avalanche diode ZD1 and ZD2, the breakdown voltage so that the relation of V ₁ ≦ V ₂ is satisfied Is set. The ZD3 is incorporated to prevent a high voltage from being applied to the gate electrode of the IGBT, and the avalanche voltage is set to be lower than the withstand voltage between the gate electrode and the emitter electrode. In the case of an IGBT having a withstand voltage of several hundred V to several thousand V, it is desirable to set the voltage to, for example, about 30V.

When the gate signal from the gate drive circuit is I
When the value becomes equal to or less than the threshold value of the GBT, the IGBT shifts to the off state, and the collector voltage of the IGBT increases. When the collector voltage reaches the breakdown voltage V ₁ of the avalanche diode ZD1, a current flows through the ZD1, the voltage V _A at the point A in the figure is increased. This voltage, after the voltage of the threshold voltage of the IGBT is added, to be applied to the IGBT through configured buffer amplifier and a diode in transistor, the collector current from flowing when collector voltage V _C is V ₁ become. The addition circuit may have any configuration, for example, a well-known addition circuit using an operational amplifier. Also, the transistor
Lower the output impedance of the overvoltage protection device, and
In this case, the gate control ability for controlling the power supply is increased, and another element may be used if sufficient control ability is provided.

[0043] In the present embodiment invention, the voltage V _A at point A is determined by the division ratio of the resistors R1 and R3, when the collector voltage is _{V C, V A = {R3} / (R1 + R3)} · V C = α · V _C (Equation 7) Therefore, the gate voltage V _{G is, V G = V A + V} th = {R3 / (R1 + R3)} · V C + V th = α · V C + V th ... ( 8) That is, in the present invention, the collector voltage V _C There it is possible to reduce the rate of increase of the gate voltage by be controlled by changing the resistance division ratio increase rate of the gate voltage V _G of the IGBT alpha after exceeding the V _1, and to reduce the alpha,
The gate voltage does not suddenly increase unlike the conventional dynamic clamp system. Saturation value I _CSAT of IGBT collector current is represented by _{I csat = g (V G -V} th) 2 ... ( number 9). Here, g is a constant determined by the structure of the element. By substituting (Equation 8) for (Equation 9), I _csat = g · α ² · V _c ² ( _Equation 10) is obtained. In the present invention, α can be freely determined by the resistance division ratio, and by making this value sufficiently small, a collector current that gradually increases with respect to the collector voltage V _C can be obtained.

The increased collector voltage further, the avalanche diode ZD2 is the voltage V ₂ to avalanche breakdown, ZD2 becomes conductive, increasing the proportion of the voltage at point A increases. The voltage V _A of the V ₂ after the point _{A, V A = [R3 / {} (R1 · R2) / (R1 + R2) + R3]] · V C = β · V C ... ( Equation 11), and the collector current I _csat = g · β ² · V _c ² ( _Equation 12) Since the relationship α ≦ β always holds between α and β determined by the resistance division ratio, the rate of increase of the collector current after the collector voltage V ₂ becomes larger than the rate of increase between V ₁ and V ₂ . 1 is achieved. Although the circuit shown in FIG. 5 does not include a snubber circuit, there is no problem with a circuit configuration including a snubber circuit.

FIG. 6 shows a specific example of a circuit that can be used as a diode and a specific example of a circuit that can be used as a switching element in the embodiment of FIG. Each of the circuits shown in FIGS. 6A, 6C and 6D can be used as a diode in FIG. 1 and can be connected in parallel to a normal IGBT as shown in FIG.
Can be used as a switching element.

FIG. 6A shows an embodiment comprising an avalanche diode and a resistor, and FIG. 6B shows the current / voltage characteristics between the A and B terminals. 6 (a), the avalanche breakdown voltage of the avalanche diode ZD61 to V _1, also those of the avalanche diode ZD62 is set to V _2. The voltage V between the A and B terminals is V ₁
, The current flows through the ZD 61, but the rate of increase of the current I between A and B is slow because the current is limited by the resistor R 61. Increasing the voltage V between the A-B terminal further current flows in ZD62 becomes a V _2, the current I rapidly increases. As described above, the current / voltage characteristics shown in FIG. 1 can be obtained in the circuit shown in FIG. Although the description is omitted, the characteristic shown in FIG. 6B is obtained in FIG.

In the present embodiment, if the differential resistance is smaller than the differential resistance between V ₁ and V ₂ , the differential resistance may be greater than 0 after V _2. For example, the configuration shown in FIG. However, it is necessary that R61 ≧ R62. And
6D, the anode terminal of ZD62 may be connected to the connection point between R61 and ZD61. further,
As shown in FIG. 6E, a circuit composed of these resistors and an avalanche diode is used to
For example, a circuit having a configuration connected in parallel with a switching element such as an IGBT or a diode may be used.

The current / voltage characteristics shown in FIG. 1 can be realized by the structure of the semiconductor element itself such as a switching element and a diode. This embodiment is shown in FIG. FIG.
(A) is an IG which is a switching element to which the present invention is applied.
FIG. 7B is a diagram for explaining the operation. In the present IGBT, the collector side has a so-called short-circuited emitter structure.

When the gate voltage is lower than the threshold voltage, I
When a positive voltage is applied to the collector electrode 76 of the GBT, p
⁺ Conductive type semiconductor region 75 and N ^- conductive type semiconductor layer 79
The depletion layer 791 spreads toward the collector electrode 76 side from the junction J1 of the junction. Depletion 791, since p ⁺ conductivity type semiconductor layer 75 is protruded than the N ⁺ conductivity type semiconductor layer 76, the depletion layer 791 first p ⁺ conductivity type semiconductor layer 75
To reach. The depletion layer 791 is formed by p ⁺ on the collector electrode 76 side.
When the semiconductor layer 75 of the conductivity type is reached, holes 792 flow out of the semiconductor layer 75 toward the emitter electrode 73.
That is, assuming that the voltage at which the depletion layer 791 reaches the p ⁺ conductivity type semiconductor layer 75 is V ₁ , a current starts to flow at this voltage.

As the collector voltage further increases, the amount of holes injected from the p ⁺ conductivity type semiconductor region increases, and the collector current gradually increases. Since the holes 792 generate electrons and holes near the J1 junction where the electric field is the largest in the depletion layer, when the amount of the holes 792 reaches a certain value, the generated electrons and holes further increase the electrons in the depletion layer. And generate holes,
The so-called avalanche breakdown, in which electrons and holes rapidly increase, occurs. Collector voltage generated by the avalanche breakdown is V _2.

As described above, the current-voltage characteristics shown in FIG. 1 can be obtained in this embodiment, and by using the element of the present invention, the current-voltage resonance phenomenon can be suppressed and the occurrence of overvoltage can be prevented. 74 and 76 are N ⁺ conductive type semiconductor layers, and 72 is an insulating film such as silicon oxide.

FIG. 8 shows another embodiment of the switching element to which the present invention is applied. This embodiment also has the same short-circuit emitter structure as the embodiment of FIG. When a voltage equal to or higher than the threshold voltage is applied to the gate electrode 83,
⁺ Conductive type semiconductor layer 841, N ⁺ conductive type semiconductor layer 84
2, the N ⁺ conductivity type semiconductor layer 843 and the N ⁻ conductivity type semiconductor layer 89 are connected by an n-type inversion layer, and electrons from the N ⁺ conductivity type semiconductor layer 843 and holes from the P ⁺ conductivity type semiconductor layer 87. Are injected into the N ⁻ conductivity type semiconductor layer 89 to perform a turn-on operation. Gate electrode 83
Is lower than the threshold voltage, the n-type inversion layer closes, injection of electrons stops, and injection of holes stops at the same time, and the element 8 is turned off.

By the way, the switching element 8 of this embodiment is
When a positive voltage is applied to the anode electrode 88 in the OFF state, the junction J82 between the P ⁺ conductive type semiconductor layer 85 and the N ⁻ conductive type semiconductor layer 89 and the P ⁺ conductive type semiconductor layer 82 and the N ⁻ conductive The depletion layer spreads from the junction J81 of the semiconductor layer 89 toward the anode electrode 88 side. When the depletion layer reaches the P ⁺ conductivity type semiconductor layer 87, holes are formed on the cathode electrode side 8.
It is injected toward 32, and the injection amount increases as the anode voltage increases. That is, the anode current increases.
When the anode voltage reaches V ₂ , avalanche breakdown occurs near the junction J81 due to the injected holes as in the embodiment of FIG. 7, and the anode current sharply increases. As described above, the current-voltage characteristics of FIG.
By using the element of this embodiment, the resonance phenomenon of current and voltage can be suppressed and the occurrence of overvoltage can be prevented.

FIG. 9A shows an embodiment of a diode to which the present invention is applied. When a reverse voltage is applied to the diode 9 of the present invention, that is, a positive voltage is applied to the cathode electrode 96 side, a depletion layer is formed from the junction J91 between the P ⁺ conductive type semiconductor layer 92 and the N ⁻ conductive type semiconductor layer 97 from the cathode electrode. The depletion layer extends toward the 96 side, and the depletion layer is a semiconductor layer 95 of P ⁺ conductivity type.
Becomes the reverse voltages V ₁ to reach, the holes are injected from the semiconductor layer 95 of P ⁺ conductivity type towards the anode electrode 91 side. The injection amount of holes increases with an increase in the cathode voltage, and when the cathode voltage reaches V ₂ , avalanche breakdown occurs near the junction J91 due to the injected holes,
Cathode current increases sharply. As described above, the current-voltage characteristics of FIG. 1 can be obtained in the present embodiment, and by using the element of the present embodiment, the current-voltage resonance phenomenon can be suppressed and the occurrence of overvoltage can be prevented. Above the voltage V ₂ , avalanche breakdown occurs, but this avalanche breakdown does not occur in the peripheral region where the breakdown voltage is weakest as in the conventional device, but occurs inside the device. it may drive the device by applying a V ₂ or more voltage.

FIG. 9B shows an example of the calculation result of the characteristics of the diode shown in FIG. 9A. The range in which no reverse current flows (V _B = 0 to 2300 V) and the reverse current gradually increases. region (V _B = 2300V~3300V) and region reverse current increases rapidly (V _B = 3300V) is obtained. The distance between J91 junction and J92 junction is 400 μm,
The impurity density of the N ⁻ conductivity type first semiconductor layer 97 is 1.9.
× 10 ¹³ cm ⁻³ , and the area ratio between the P ⁺ conductivity type semiconductor region 95 and the N ⁺ conductivity type semiconductor layer 94 is 1: 2.

In the embodiments of FIGS. 7, 8 and 9, the semiconductor layer of the P ⁺ conductivity type is shown on the collector electrode 78 side in FIG. 7, on the anode electrode 88 side in FIG. 8, and on the cathode electrode 96 side in FIG. And the N ⁺ conductivity type semiconductor layer is not limited as shown in the figure. For example, the N ⁺ conductivity type semiconductor layer is P ⁺
7, the emitter electrode 73 in FIG.
8, a structure close to the cathode electrode 832 side in FIG. 8 and the anode electrode 91 side in FIG. In this case, than the element of the structure of FIG., The rate of increase of the current flowing to the voltages V ₁ after increases. That is, the value of the differential resistance can be reduced. Also, the differential resistance can be reduced by increasing the area occupied by the P ⁺ conductivity type semiconductor layer and decreasing the area of the N ⁺ conductivity type semiconductor layer. Thus, in these elements, a desired differential resistance can be obtained by adjusting the P ⁺ conductivity type semiconductor layer and the N ⁺ conductivity type semiconductor layer.

In the embodiments of FIGS. 7, 8 and 9, the phenomenon in which the depletion layer reaches the P ⁺ conductivity type semiconductor layer and current flows is called punch-through. In the present invention,
It should have reverse direction voltage V _P of the punch-through phenomenon occurs is less than the avalanche breakdown voltage V _BO of the device having the structure does not flow punch-through current. Because V _P ≧
This is because avalanche breakdown occurs before a punch-through current flows in V _BO . Next, a description of conditions that punch-through voltage V _P is less than the avalanche breakdown voltage V _BO. Here, the voltage shown V _P corresponds to V _1, which has been used in the description so far. The junction J1 corresponds to J1 in FIG. 7, J81 in FIG. 8, and J91 in FIG.

Since the maximum electric field in the depletion layer is at the junction of the J1 junction, the avalanche breakdown voltage V _BO is determined by the electric field ε at this point. The electric field ε at the junction of the J1 junction is obtained by ε = q · Q / ε _s (Equation 13). Here, q is an electron charge amount, Q is an impurity amount per unit area present in one of the depletion layers extending in two directions around the J1 junction, and ε _s is a dielectric constant of the semiconductor material. is there. For example, when the diode has a structure as shown in FIG. 2, the depletion layer is a semiconductor region 2 of p ⁺ conductivity type.
To reach 5, in other words n ^- if the impurity amount of the semiconductor regions of the conductivity type of the (per unit area) and Q _P, the depletion layer reaches the semiconductor region of P ⁺ conductivity type (punch-through point) point Then, the electric field ε _P at the J1 junction is as follows: ε _P = q · (Q _P ) / ε _s (Equation 14) The diode structure punch-through current does not flow, the avalanche breakdown occurs when the electric field in the vicinity J1 junction reaches the field epsilon _m causing avalanche breakdown. Therefore, the blocking current / voltage characteristics (punch-through current flows below the avalanche breakdown voltage) shown in FIG.
Field epsilon _P at the junction can be obtained when less than the electric field _{ε m, ε P = q ·} (Q P) / ε s ≦ ε m ... ( number 15) Thus, the punch-through voltage V _P is the avalanche breakdown voltage V _BO In order to make it smaller, the impurity amount Q _P of the n ⁻ conductivity type semiconductor region between the J1 junction and the J2 junction may be such that Q _P ≦ (ε _m ) · (ε _s ) / q (Equation 16) . When the value of Q _P is determined using silicon as an example, ε _m = 3 × 10 ⁵ (V / m), ε _s = 1.054 × 10
⁻¹² (F / cm) and q = 1.602 × 10 ⁻¹⁹ (C), so that it is only necessary to satisfy Q _P ≦ 1.974 × 10 ¹² (cm ⁻² ) (Equation 17).

When Q _P is obtained by the diode shown in FIG. 9 in which an example of the blocking current / voltage characteristics of the present invention is obtained, J9 is obtained.
The distance between the 1 junction and the J92 junction is 400 μm, and the impurity density of the N ⁻ conductivity type first semiconductor layer 97 is 1.9 × 10 ¹³ cm ^−3.
Therefore, Q _P = 1.9 × 10 ¹³ cm ⁻³ × 400 μ
m = 7.6 × 10 ¹¹ (cm ⁻² ), thereby satisfying the expression (17).

FIG. 10 is a sectional view of a device according to another embodiment of the present invention. In the elements shown in FIGS. 7 to 9, the current flows vertically in the state shown in the drawings. However, the present invention
The present invention is effective not only for an element having such a structure but also for an element in which a current flows in the horizontal direction as shown in FIG. FIG.
(A) is an IGBT and (b) is a diode.

The IGBT shown in FIG. 10A operates as follows. To turn the IGBT 10 on, a positive voltage equal to or higher than the threshold voltage is applied to the gate electrode G with respect to the emitter electrode E. At this time, the surface of the p-type semiconductor region 104 is inverted to the n-type, and the n-type semiconductor region 102 and the n ⁻ conductivity type semiconductor region 106 are connected.
Electrons flow toward 6. These electrons draw holes from the P ⁺ conductivity type semiconductor region 105, and the holes
04 flows to the emitter electrode, and the IGBT 10 is turned on. In order to turn off the gate electrode, a negative voltage is applied to the gate electrode G. By making it negative, electron injection from the n ⁺ type semiconductor region 102 is stopped, and the IGBT 10 is turned off.

In such an element, the present invention has the N ⁺ type semiconductor region 103 and the junction J1 when in the off state.
At a voltage lower than the avalanche breakdown voltage near 01,
The depletion layer extending from the junction J101 is a P ⁺ type semiconductor region 10
It is characterized by reaching 5. That is, the total amount of impurities in the N ⁻ conductivity type semiconductor region 106 between the P ⁺ conductivity type semiconductor region 104 and the P ⁺ conductivity type semiconductor region 105 satisfies (Equation 17). Although the IGBT having this structure can easily understand the current-voltage characteristics in the device direction shown in FIG. 1, the details are omitted here.
Voltage that reaches the 02 there in V _1, the voltage avalanche breakdown occurs near the junction J101 by holes injected from the region 105 is V _2.

FIG. 10A shows a structure in which the P ⁺ conductivity type semiconductor region 105 is provided between the P ⁺ conductivity type semiconductor region 104 and the N ⁺ conductivity type semiconductor region 103.
The present invention is not limited to such an arrangement, and may have a structure in which the region 103 is disposed between the regions 104 and 105. Further, in the drawing, a structure in which the P ⁺ conductivity type semiconductor region 105 has a deeper junction than the N ⁺ conductivity type semiconductor region 103 (the region 105 is closer to the N ⁺ conductivity type semiconductor region 108 than the region 103). Structure). In this case, the N ⁻ conductivity type semiconductor region 106 in which the depletion layer spreads is grounded to the collector electrode C with lower resistance.
Increasing the proportion of current at voltages V ₁ or more to reach 102 (differential resistance) is smaller than the structure shown in FIG. This is, by adjusting the junction depth relationship P ⁺ conductivity type semiconductor region 105 and the N ⁺ conductivity type semiconductor region 103 means that can arbitrarily adjust the differential resistance at voltages V ₁ or more, applications This means that an element with a differential resistance most suitable for the circuit configuration can be provided.

[0064] Further, in FIG. 10, but region 107 is electrically insulating region, N ^- conductivity type semiconductor layer 106,
It is not necessary to provide this region if it is sufficiently larger than the distance between the N ^- semiconductor regions between J101 and J102. In this case, the N ⁻ conductivity type semiconductor layer 1 of the N ⁻ conductivity type semiconductor layer 106 is used.
The region on the 08 side functions as an electrically insulating region.

In the diode having the structure shown in FIG. 10B, the forward current flows through the anode electrode A, the semiconductor region 1012 of the P ⁺ conductivity type and the semiconductor region 1013 of the N ⁻ conductivity type.
A current flows through the N ⁺ conductivity type semiconductor region 1010 and the cathode electrode K. In the present diode, the present invention has the P ⁺ type semiconductor region 1011 and has a voltage lower than the avalanche breakdown voltage near the junction J103 in a blocking state in which a positive voltage is applied to the cathode electrode with respect to the anode electrode A. The depletion layer extending from the junction J103 reaches the P ⁺ type semiconductor region 1011. Also in the diode of this structure, the voltage when the depletion layer reaches the semiconductor layer 1011 of the P ⁺ conductivity type is V ₁ in FIG. ₁ , and a hole injected from the region 1011 at the voltage V ₁ or higher causes a voltage near the junction J103. voltage avalanche breakdown occurs is V _2.

In the diode having the structure shown in FIG. 10B, the junction depth between the P ⁺ conductivity type semiconductor region 1011 and the N ⁺ conductivity type semiconductor region 1010 is specified by the relationship shown in FIG. And a semiconductor region 1011 of P ⁺ conductivity type
May be deeper than the N ⁺ conductivity type semiconductor region 1010. The effect on the blocking direction current / voltage characteristics in this case is the same as that in the case of FIG. 10A, and the description is omitted here. The region 1014 is an electrically insulating layer, which is also the same as (a).

FIG. 11 shows an embodiment in which the circuit of FIG. 3A is arranged as an inverter circuit of a three-phase induction motor. 2
The switching elements (for example, IGBT11 and IGBT12) are connected in series. A flywheel diode _DF is connected to each switching element in parallel. Furthermore, a so-called snubber circuit S is connected to each switching element in parallel in order to protect the switching element from a sudden increase in voltage during switching. The snubber circuit is a diode D _S and the resistance R _S
Are connected in series with a capacitor C _S in the parallel connection circuit. The connection points of the two switching elements in each phase are connected to AC terminals T ₃ , T ₄ , and T ₅ , respectively.
A three-phase induction motor is connected to each AC terminal. The anode terminal of the upper arm side switching element with three are common, are connected to the high potential side of the DC voltage source in a DC terminal T _1. The cathode electrode of the lower arm side switching element is connected to the low potential side of the DC voltage source at least three a common DC terminal T _2. In the device having such a configuration, DC is converted into AC by switching of each switching element, and the three-phase induction motor is driven.

The operation of the inverter circuit of FIG.
The description of the circuit operation is omitted because it can be easily understood from the operation description of the circuit of FIG. It should be noted that, as a matter of course, the switching element I
GBT, snubber diode D _S and flywheel diode D _F indicates the reverse direction current-voltage characteristic of the Figure 1 device, specific structures are those that have been shown in FIG. 7 to FIG. 10, of the elements voltage applied to a nonconductive state circuit constants so that the voltage value V ₁ or more as needed is set. Therefore, even in the inverter circuit of this embodiment, the differential resistance of the voltage V _1, with the voltage and malfunction or electromagnetic noises resonance phenomenon is suppressed circuit current can be greatly reduced, the occurrence of over-voltage can be suppressed.

[0069] The power conversion circuit of this embodiment is has a configuration including a snubber circuit, the parasitic inductance L switching devices all stored energy in the _L or flywheel diode having a main circuit wiring The snubber circuit is not necessarily required as long as the power converter has a heat radiating device that does not thermally break down due to heat generation even if it is consumed. The most advantageous point of the embodiment of FIG. 11 is that electromagnetic noise and overvoltage can be largely suppressed by changing only the semiconductor element to the semiconductor element of the present invention without changing the circuit configuration of the conventional power converter. .

It should be noted that the power converter of the present invention is not only effective for the circuit configuration of the above-described embodiment, but a current flows at an applied voltage V ₁ or more in the blocking state, and when the voltage further reaches V ₂ , it suddenly increases. The effect can be obtained in all circuits using a semiconductor element having a structure from which a current flows. As for the diodes used in the power converter according to the present invention, not limited to the to have the structure described in the present embodiment, gentle current when the voltage applied at the time of blocking state is V ₁ Flows out and reaches V ₂ , the current may increase more than the increase rate of the current between the voltages V ₁ and V ₂ . Also, in the above-mentioned semiconductor device, the P-type and N-type semiconductor regions may be reversed. In this case, the depletion layer mainly spreads in the P ⁻ conductivity type semiconductor.

FIG. 12 shows an embodiment in which the circuit of FIG. 5 is arranged as an inverter circuit of a three-phase induction motor. Two switching elements are connected in series. A flywheel diode _DF is connected to each switching element in parallel. Furthermore, a so-called snubber circuit S is connected to each switching element in parallel in order to protect the switching element from a sudden increase in voltage during switching. A gate drive circuit and an overvoltage protection circuit are connected to a gate electrode of each switching element.

The connection points of the two switching elements in each phase are connected to AC terminals T ₃ , T ₄ and T ₅ , respectively. A three-phase induction motor is connected to each AC terminal. The anode terminal of the upper arm side switching element with three are common, are connected to the high potential side of the DC voltage source in a DC terminal T _1. The cathode electrode of the lower arm side switching element is connected to the low potential side of the DC voltage source at least three a common DC terminal T _2. In the device having such a configuration, DC is converted into AC by the switching operation of each switching element, and the three-phase induction motor is driven.

The operation of the inverter circuit shown in FIG. 12 can be easily understood from the description of the operation of the circuit shown in FIG. 5, and the description of the circuit operation is omitted. Needless to say, the specific circuit configurations of the overvoltage protection circuit and the gate drive circuit used in this circuit are as shown in FIG. 5, and the overvoltage protection circuit is a main circuit of the switching element. The gate voltage is controlled according to the voltage value between the terminals. This over-voltage protection circuit and V ₁ was a current in the reverse direction voltage between the main terminals V ₁ or more switching elements is increased gradually, also V ₂ or V
Since current at a current rate of increase or between ₂ to control the switching element to increase, even in the inverter circuit of this embodiment, the differential resistance of the voltage V _1, malfunction of the circuit is suppressed resonance phenomenon of the voltage and current And electromagnetic noise can be greatly reduced, and the occurrence of overvoltage can be suppressed.

Although the inverter circuit of the present embodiment includes a snubber circuit, the switching element or the flywheel diode uses all the energy stored in the parasitic inductance L _L of the main circuit wiring. The snubber circuit is not necessarily required as long as it is a power converter having a heat radiating device that does not thermally break down due to heat generation even when consumed. The most advantageous point of the embodiment of FIG. 12 is that electromagnetic noise and overvoltage can be greatly suppressed only by adding the overvoltage protection circuit of the present invention to the conventional power converter. Further, the voltage V ₁ at which the current gradually increases and the current rapidly increase only by changing the breakdown voltage of the avalanche diodes (ZD1, ZD2, ZD3) and the values of the resistors (R1, R2, R3) in the overvoltage protection circuit. Increasing voltage V ₂ , or the differential resistance between V ₁ and V ₂ , and even V ₂
Another significant feature is that the blocking direction characteristics such as the resistance can be freely changed.

FIG. 13 shows an embodiment in which the circuit of FIG. 6 is applied to an inverter circuit. The basic configuration of the power converter is
Since it is the same as FIG. 11 and FIG. 12, the description is omitted here. The power converter of this embodiment has a configuration in which a circuit including the avalanche diodes ZD61 and ZD62 and the resistor R61 shown in FIG. 6 is connected in parallel with the switching element.

The operation of the inverter circuit shown in FIG. 13 can be easily understood from the description of the operation of the circuit shown in FIG. Circuit consisting of avalanche diodes ZD61, ZD62 and a resistor R61 are rapidly to the voltage applied at the time of the switching element is blocking state, as described in FIG. 6 is gently current flows becomes the V _1, more it comes to V ₂ or more to characterize the current flow, the differential resistance occurring at V ₁ or more voltages, greatly reduce the occurrence of voltage and malfunctions and electromagnetic noise of the circuit to suppress the resonance phenomenon of the current. Moreover, to increase the current rapidly at V ₂ or more, to prevent the increase exceeds voltage V ₂ to the element is applied.

Although the power converter of this embodiment has a configuration including a snubber circuit, all of the energy stored in the parasitic inductance L _L of the main circuit wiring is switched by a switching element or a flywheel diode. If a power converter having a heat radiating device that does not thermally break down due to heat generation even if it is consumed, a snubber circuit is not necessarily required in the power converter of the present invention. The most advantageous point of the embodiment of FIG. 13 is that electromagnetic noise and overvoltage can be effectively suppressed only by adding a very simple circuit including an avalanche diode and a resistor to the conventional power converter. Also, an avalanche diode (ZD6
It is a great feature of this embodiment that the effect of suppressing electromagnetic noise and overvoltage can be freely changed only by changing the breakdown voltage of (1, ZD62) and the resistance value of the resistor R61. The circuit composed of the avalanche diode and the resistor is shown in FIG.
The configurations shown in (b) and (c) may be used.

In the embodiment of the present invention described above, the differential resistance at the _first voltage value V1 or higher does not need to be constant, but may change with the voltage. In this case, it is more preferable that the differential resistance gradually decreases as the voltage increases. It is desirable that the differential resistance at the _first voltage value V ₁ or more satisfies the above (Equation 2) in the entire voltage range of the first voltage V ₁ or more, but it is not limited to this and at least is arbitrary. It suffices to satisfy the voltage value of

Further, in the present invention, the blocking direction voltage V ₁ at which the current slowly flows is set to a voltage which is higher by about 5% to 20% than a voltage (generally a power supply voltage) which is constantly applied to the device. And the voltage V _{2 at} which the current rapidly flows is 50 to 1 higher than the voltage applied constantly.
It is preferable to set the voltage to about 00% higher. The former reason is that if V ₁ becomes smaller than the voltage applied constantly, a blocking current flows constantly even at times other than the switching operation of the device, and a large loss occurs. The latter reason, when the V ₂ is excessively large, due to the adverse effect occurs that it is necessary to increase more than necessary the breakdown voltage of other devices connected in parallel to the device itself or the device.

In the description of the present invention, the term avalanche diode has been used, but this may be an element such as a Zener diode or a varistor in which a current suddenly flows at a specified voltage. Of course. What is important is that the element only has a structure in which only a leak current flows up to a certain voltage and the current rapidly increases at a certain voltage.

Further, the present invention is not limited to an inverter circuit, and can be applied to various power conversion devices and power control devices such as a converter circuit and a chopper circuit, and various switching power supplies.

[0082]

As described in detail above, according to the present invention,
Since the energy stored in the inductance or the like in the circuit can be consumed by the differential resistance of the circuit or the semiconductor element, it is possible to prevent the generation of electromagnetic noise and overvoltage generated when the circuit or the semiconductor element shifts to the cutoff state. Therefore, it is possible to prevent malfunction of the circuit due to electromagnetic noise and destruction of circuit components due to overvoltage.

[Brief description of the drawings]

FIG. 1 is a diagram showing current-voltage characteristics of a semiconductor circuit or a semiconductor element to which the present invention is applied in a blocking state.

FIGS. 2A and 2B are diagrams for explaining the present invention, in which FIG. 2A shows a circuit embodying the present invention, and FIG. 2B shows current and voltage waveforms in respective parts of the circuit.

3A and 3B are diagrams for explaining the present invention, in which FIG. 3A shows another circuit embodying the present invention, and FIG. 3B shows current and voltage waveforms in respective parts of the circuit.

FIG. 4 is a circuit diagram for explaining the effect of the present invention.

5 is a diagram showing a semiconductor circuit having an IGBT and an overvoltage protection circuit connected to the IGBT, which realizes the characteristics of the IGBT in the circuit of FIG. 1;

FIG. 6A shows an embodiment including an avalanche diode and a resistor, and FIG. 6B shows current / voltage characteristics between its A and B terminals.

7A is a diagram illustrating an IGBT as a switching element to which the present invention is applied, and FIG. 7B is a diagram for explaining the operation thereof.

FIG. 8 shows another embodiment of the switching element to which the present invention is applied.

FIG. 9A shows a diode to which the present invention is applied;
(B) is an example of the calculation result of the characteristic.

10A and 10B are cross-sectional views of an element according to another embodiment to which the present invention is applied, wherein FIG. 10A shows an IGBT and FIG. 10B shows a diode.

FIG. 11 shows an embodiment in which the circuit of FIG. 3A is arranged as an inverter circuit.

FIG. 12 shows an embodiment in which the circuit of FIG. 5 is arranged as an inverter circuit.

FIG. 13 shows an embodiment in which the circuit of FIG. 6 is applied to an inverter circuit.

[Explanation of symbols]

V _{1, a} first voltage value at which the current starts to increase slowly, V ₂
... A second voltage value at which the current starts to increase rapidly, V _C.
BT collector voltage, I _I … IGBT collector current,
V _D : Cathode voltage of flywheel diode, I
_D : Cathode current of flywheel diode, V _DS
... Snubber diode terminal voltage, I _DS ... Snubber diode terminal current, 7 ... IGBT, 8 ... Semiconductor element, 9
... Diode, R _s ... snubber resistor, C _s ... snubber capacitor, D _s ... snubber diode, 101 ... three-phase induction motor.

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Hideki Miyazaki 7-1-1, Omikacho, Hitachi City, Ibaraki Prefecture Within Hitachi Research Laboratory, Hitachi, Ltd. (72) Inventor Shin Kimura 7-1, Omikamachi, Hitachi City, Ibaraki Prefecture No. 1 Inside Hitachi, Ltd., Hitachi Research Laboratory (72) Inventor Junichi Sakano 7-1-1, Omika-cho, Hitachi City, Ibaraki Prefecture Inside Hitachi, Ltd., Hitachi Research Laboratory (72) Inventor Mutsumi Mori Hitachi, Ibaraki Prefecture 7-1-1, Omikacho F-term in Hitachi Research Laboratory, Hitachi, Ltd. F-term (reference) 5F038 BH04 BH19 EZ20

Claims (17)

[Claims] 1. A semiconductor circuit having at least a circuit including a semiconductor element and an inductance connected thereto and having a flowing current controlled on and off, wherein a blocking direction voltage applied to both ends of the circuit including the semiconductor element. Is greater than or equal to the first voltage value and less than or equal to the second voltage value, the magnitude of the current increases with an increase in the blocking direction voltage, and if it is greater than or equal to the second voltage value, the first voltage value and the second voltage value A semiconductor circuit characterized in that the current increases at a rate of increase greater than the rate of increase of the current between values. 2. The semiconductor circuit according to claim 1, wherein said semiconductor element is a semiconductor switching element. 3. The semiconductor circuit according to claim 1, wherein said semiconductor element is a diode. 4. The semiconductor circuit according to claim 1, wherein the circuit including the semiconductor element is a snubber circuit. 5. A semiconductor circuit including at least a semiconductor element, wherein a magnitude of a current is blocked when a magnitude of a blocking direction voltage applied to both ends of the semiconductor circuit is equal to or more than a first voltage value and equal to or less than a second voltage value. A semiconductor circuit, wherein the current increases with an increase in the direction voltage, and at a second voltage value or more, the current increases at a larger increase rate than the current between the first voltage value and the second voltage value. 6. The semiconductor circuit according to claim 5, wherein said semiconductor element is a semiconductor switching element. 7. The semiconductor circuit according to claim 5, wherein said semiconductor element is a diode. 8. The semiconductor circuit according to claim 5, wherein said semiconductor element is a plurality of diodes having different breakdown voltages. 9. A circuit including at least a semiconductor element, a semiconductor switching element connected in parallel to both ends of the circuit,
When the magnitude of the blocking direction voltage applied to both ends of the circuit is greater than or equal to the first voltage value and less than or equal to the second voltage value, the magnitude of the current increases with an increase in the blocking direction voltage; A semiconductor circuit characterized in that the current increases at a rate greater than the voltage value at a rate greater than the rate of increase of the current between the first voltage value and the second voltage value. 10. When the blocking direction voltage applied between the main electrodes of the semiconductor switching element is equal to or higher than the first voltage value and equal to or lower than the second blocking direction voltage value, the magnitude of the main current increases as the blocking direction voltage increases. As described above, when the main current increases at a rate larger than the rate of increase of the main current between the first voltage value and the second voltage value at the second voltage value or more, the control according to the blocking direction voltage is performed. A method for driving a semiconductor circuit, comprising supplying a signal to a semiconductor switching element. 11. When the magnitude of the blocking direction voltage applied between the main electrodes is greater than or equal to the first voltage value and less than or equal to the second voltage value, the magnitude of the main current is equal to the magnitude of the blocking direction voltage. A semiconductor element characterized by increasing with an increase, and increasing the main current at a rate of increase greater than a second voltage value at a rate greater than the rate of increase of the main current between the first voltage value and the second voltage value. 12. A first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type provided on the first semiconductor layer, and a first semiconductor layer of a first conductivity type adjacent to the second semiconductor layer. A third semiconductor layer, a fourth semiconductor layer of the second conductivity type adjacent to the first semiconductor layer, and a fifth semiconductor of the first conductivity type adjacent to the first semiconductor layer and the fourth semiconductor layer A first main electrode in ohmic contact with the second semiconductor layer and the third semiconductor layer; a second main electrode in ohmic contact with the fourth semiconductor layer and the fifth semiconductor layer; An insulated gate electrode provided over the semiconductor layer, the second semiconductor layer, and the third semiconductor layer, wherein a junction between the first semiconductor layer and the fourth semiconductor layer is connected to the first semiconductor layer. It is located closer to the junction between the first semiconductor layer and the second semiconductor layer than the junction between the fifth semiconductor layer. Semiconductor device characterized by. 13. A first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type provided on the first semiconductor layer, and a first semiconductor layer of a first conductivity type adjacent to the second semiconductor layer. A third semiconductor layer, a fourth semiconductor layer of the second conductivity type adjacent to the first semiconductor layer, and a fifth semiconductor of the first conductivity type adjacent to the first semiconductor layer and the fourth semiconductor layer A first main electrode in ohmic contact with the second semiconductor layer and the third semiconductor layer; a second main electrode in ohmic contact with the fourth semiconductor layer and the fifth semiconductor layer; An insulated gate electrode provided over the semiconductor layer, the second semiconductor layer, and the third semiconductor layer; and a junction between the first semiconductor layer and the second semiconductor layer; Between the fourth semiconductor layer junction and the first semiconductor layer;
If the amount of impurities of the first conductivity type contained per unit area of the semiconductor layer is εm, the dielectric constant of the material of the first semiconductor layer is εm, the dielectric constant is εs, and the charge amount of electrons is q, (εm) · (Εs) / q or less. 14. A first semiconductor layer of a first conductivity type, a second semiconductor layer and a third semiconductor layer of a second conductivity type provided on the first semiconductor layer, and adjacent to the second semiconductor layer. A fourth semiconductor layer and a fifth semiconductor layer of the first conductivity type, a sixth semiconductor layer of the first conductivity type adjacent to the third semiconductor layer, and a second conductivity layer adjacent to the first semiconductor layer. A seventh semiconductor layer of the type, an eighth semiconductor layer of the first conductivity type adjacent to the first semiconductor layer and the seventh semiconductor layer, and ohmic contact with the second semiconductor layer and the fourth semiconductor layer. A first main electrode; a second main electrode in ohmic contact with the seventh semiconductor layer and the eighth semiconductor layer; and a second main electrode provided over the second semiconductor layer, the fourth semiconductor layer, and the fifth semiconductor layer. A first insulated gate electrode, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. A second insulated gate electrode provided over the second semiconductor layer, the fifth semiconductor layer and the sixth semiconductor layer are electrically connected, and a junction between the first semiconductor layer and the seventh semiconductor layer is formed. A semiconductor element located at a position closer to a junction between the first semiconductor layer and the second semiconductor layer than to a junction between the first semiconductor layer and the eighth semiconductor layer. 15. A first semiconductor layer of a first conductivity type, a second semiconductor layer and a third semiconductor layer of a second conductivity type provided on the first semiconductor layer, and adjacent to the second semiconductor layer. A fourth semiconductor layer and a fifth semiconductor layer of the first conductivity type, a sixth semiconductor layer of the first conductivity type adjacent to the third semiconductor layer, and a second conductivity layer adjacent to the first semiconductor layer. A seventh semiconductor layer of the type, an eighth semiconductor layer of the first conductivity type adjacent to the first semiconductor layer and the seventh semiconductor layer, and ohmic contact with the second semiconductor layer and the fourth semiconductor layer. A first main electrode; a second main electrode in ohmic contact with the seventh semiconductor layer and the eighth semiconductor layer; and a second main electrode provided over the second semiconductor layer, the fourth semiconductor layer, and the fifth semiconductor layer. A first insulated gate electrode, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer. A second insulated gate electrode provided across the first semiconductor layer and the second semiconductor layer, and between the first semiconductor layer and the seventh semiconductor layer. In the first
When the amount of impurities of the first conductivity type contained per unit area of the semiconductor layer is εm, the dielectric constant is εs, and the charge amount of electrons is q, the material of the first semiconductor layer is (εm) · (Εs) / q or less. 16. A first conductive type first semiconductor layer, a second conductive type second semiconductor layer adjacent to the first semiconductor layer, and a second conductive type adjacent to the first semiconductor layer. A third semiconductor layer; a fourth semiconductor layer of a first conductivity type adjacent to the first semiconductor layer and the third semiconductor layer; a first main electrode in ohmic contact with the second semiconductor layer; And a second main electrode that makes ohmic contact with the third semiconductor layer and the fourth semiconductor layer. The junction between the first semiconductor layer and the third semiconductor layer is formed between the first semiconductor layer and the fourth semiconductor layer. A diode located at a position closer to a junction between the first semiconductor layer and the second semiconductor layer than to a junction between the semiconductor layers. 17. A first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type adjacent to the first semiconductor layer, and a second semiconductor layer of a second conductivity type adjacent to the first semiconductor layer. A third semiconductor layer; a fourth semiconductor layer of a first conductivity type adjacent to the first and third semiconductor layers; a first main electrode in ohmic contact with the second semiconductor layer; A third main electrode in ohmic contact with the third semiconductor layer and the fourth semiconductor layer; a junction between the first semiconductor layer and the second semiconductor layer; Between the semiconductor layer junction and the first
If the amount of impurities of the first conductivity type contained per unit area of the semiconductor layer is εm, the dielectric constant of the material of the first semiconductor layer is εm, the dielectric constant is εs, and the charge amount of electrons is q, (εm) · (Εs) / q or less.