JP2002124647A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To eliminate deterioration of a ferroelectric film. SOLUTION: A ferroelectric thin film 30, constituting a ferroelectric capacitor 33 of a ferroelectric memory element, is formed out of an SBT thin film, having added Zr elements as the elements for feeding holes. Therefore, the Zr elements of IV-B group elements generate the holes by their substitutions for Bi elements in the SBT thin film. As a result, even if hydrogen which could not be prevented with a diffusion barrier 32, when the ferroelectric memory element is subjected to hydrogen sintering processing bonds with oxygen contained in the SBT thin film to form oxygen vacancies, electrons generated from the oxygen vacancies are so neutralized by the holes as to very much reduce the leakage current of the ferroelectric memory element. Also, the diffusion of the oxygen ions and their removals from the SBT thin film are markedly suppressed by the electrical coupling of holes with the oxygen ions. Thus, even if hydrogen diffuse to the ferroelectric thin film 30 when the hydrogen sintering processing is being carried out the ferroelectric thin film 30 will not deteriorate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device, and more particularly, to a nonvolatile memory element using a ferroelectric thin film or a memory element using a high dielectric thin film.

[0002]

2. Description of the Related Art Ferroelectric thin films have many functions such as spontaneous polarization, high dielectric constant, electro-optic effect, piezoelectric effect, and pyroelectric effect, so that they are widely applied to devices. For example, utilizing its pyroelectricity to an infrared linear array sensor, its piezoelectricity to an ultrasonic sensor, its electro-optic effect to a waveguide type optical modulator, and its high dielectric properties DRAM (Dynamic Random Access
Memory) and MMIC (monolithic / microwave integrated circuit)
And various other applications. In particular, with the development of thin film formation technology in recent years, development of a ferroelectric nonvolatile memory (hereinafter abbreviated as FRAM) that operates at high density and at high speed has been actively developed in combination with semiconductor memory technology.

The above-mentioned FRAM can replace not only a conventional non-volatile memory but also an SRAM (static RAM) and a DRAM because of its high-speed writing / reading, low-voltage operation, and high repetition durability of writing / reading. As a memory, research and development for practical use are actively performed.

The development of such an FRAM requires a material having a large remanent polarization, a small coercive electric field, a low leakage current, and a high resistance to repetition of polarization reversal. Further, in order to reduce the operating voltage and adapt to the semiconductor microfabrication process, it is desirable to realize the above-mentioned characteristics with a thin film having a thickness of 200 nm or less. Then, as the ferroelectric material used for the ferroelectric and ferroelectric integrated circuit as described above, lead zirconate titanate _{((Pb x La 1-x} (Zr y Ti 1-y) O 3 (0 ≦ x,
y ≦ 1): PZT) _{and, SrBi 2 (Ta x Nb 1} -x) 2 O 9 (0 ≦ x
≦ 1) A bismuth layered compound thin film such as (SBT) is suitable.

On the other hand, in the high integration of the DRAM,
In order to increase the capacity of the capacitor, a tantalum oxide film (Ta ₂ O ₅ ) having a higher dielectric constant than a conventionally used silicon oxide film or STO (strontium titanate S) is used.
Highly dielectric materials such as rTiO ₃ ) and BST (barium strontium titanate (Ba, Sr) TiO ₃ ) have been actively researched and developed for application to highly integrated DRAM of 256 megabits to gigabit or more. Is being done.

FIG. 3 is a sectional view of a conventional ferroelectric memory device. In FIG. 3, reference numeral 1 denotes a conductive silicon substrate;
Is an element isolation region, 3 is a gate oxide film, 4 is a source / drain region, and 5 is a gate electrode serving as a polysilicon word line. The selection transistor 6 is composed of the gate oxide film 3, the source / drain region 4, and the gate electrode 5. 7 is a first interlayer insulating film, 8 is an adhesion layer, 9 is Pt.
Lower electrode, 10 is a ferroelectric thin film, 11 is a Pt upper electrode,
Reference numeral 12 denotes a diffusion barrier film. The Pt lower electrode 9, the ferroelectric thin film 10, and the Pt upper electrode 11 constitute a capacitor 13. 14 is a second interlayer insulating film, 15 is a first metal wiring, 16 is a third interlayer insulating film, 17 is a second metal wiring, and 18 is a surface protection film.

A ferroelectric memory using the ferroelectric thin film 10 as described above for the capacitor 13 is formed as follows. That is, first, the conductive silicon substrate 1
After a read / write select transistor 6 is formed thereon, a first interlayer insulating film 7 is deposited, and Ti or Ti oxide as an adhesion layer 8 is further deposited. Next, the Pt lower electrode 9, the ferroelectric thin film 10, and the Pt upper electrode 11 are laminated, and the layers 8, 9, 10, 11 are processed by dry etching to form the capacitor 13. Next, in order to suppress the reaction with the first interlayer insulating film 7 and the diffusion of hydrogen, an oxide such as Ti, Al, or Zr as the diffusion barrier 12 is deposited so as to cover the entire ferroelectric capacitor 13. .

Next, a second interlayer insulating film 14 is formed using a silicon oxide film or the like. And, P of the ferroelectric capacitor 13
a first metal wiring 15 connecting the upper electrode 11 and the drain 4b of the selection transistor 6 via a contact hole;
And a first metal interconnection 15 for connecting the source 4a of the selection transistor 6 and the bit line via a contact hole.
Is formed of Al or the like. After that, the third interlayer insulating film 1
6 is deposited. Next, a contact hole (not shown) to the first metal wiring 15 is opened in the third interlayer insulating film 16 and electrically connected to the first metal wiring 15 connected to the source 4a to form a bit line. A second metal wiring 17 is formed. Finally, a surface protection film 18 is formed by a silicon nitride film, and sintering is performed at about 400 ° C. in an atmosphere containing hydrogen.

[0009]

However, the above-mentioned conventional ferroelectric memory element and high-dielectric memory element have the following problems. That is, the interlayer insulating film on the ferroelectric capacitor or the high dielectric capacitor is
Usually, SiH ₄ or tetraethoxysilane (Si (OC ₂ H ₅ )
₄ It is formed by a thermal CVD (chemical vapor deposition) method or a plasma CVD method using (TEOS) as a main material.
When these raw materials are used, the raw materials are decomposed at the time of formation to generate hydrogen. When this hydrogen diffuses into the ferroelectric capacitor or the high-dielectric capacitor, the ferroelectric film or the high-dielectric film is significantly deteriorated, and the leakage current increases or the remanent polarization value decreases. This is because metals such as Pt and Ir are used for the electrodes in contact with the dielectric film, and these metals have a catalytic effect of promoting a strong reduction reaction. This is caused by reducing the dielectric film by diffusing into the dielectric film.

Further, the interlayer insulating film on the dielectric capacitor such as the ferroelectric capacitor and the high dielectric capacitor and the metal wiring is formed at a temperature of about 400 ° C., so that hydrogen or a large amount of hydrogen is contained in the film. Contains moisture. Then, in the annealing process after the formation of the interlayer insulating film or in the heating process during the formation of the surface protection film, hydrogen and moisture in the film are eliminated. In particular, when the desorbed moisture diffuses to the Al metal wiring, the Al metal wiring is easily oxidized, and a large amount of hydrogen is generated in the oxidation process. When the hydrogen diffuses to the dielectric capacitor, the dielectric characteristics deteriorate.

Therefore, as shown in FIG. 3, the ferroelectric capacitor 13 is covered to form a diffusion barrier 12 made of an oxide such as Ti, Al, or Zr, whereby Pt is formed.
Adsorption of hydrogen to the lower electrode 9, the ferroelectric thin film 10, and the Pt upper electrode 11 is prevented, and the deterioration of the ferroelectric characteristics is somewhat suppressed.

However, MOS (metal oxide semiconductor)
In the present ferroelectric memory element having the selection transistor 6 composed of a transistor, an interface level is generated when the gate oxide film 3 is formed, and the threshold voltage of the selection transistor 6 fluctuates. There is.
And, in an atmosphere containing hydrogen, 400 ° C. to 450 ° C.
When the heat treatment is performed at a temperature of ° C., hydrogen diffuses, and when reaching the gate oxide film 3, defects are terminated and the interface state can be reduced.
For this purpose, a heat treatment in a hydrogen atmosphere is usually performed after the ferroelectric memory element is manufactured. However, the amount of diffusion of hydrogen in the hydrogen atmosphere heat treatment step is large, and diffusion of hydrogen to the ferroelectric capacitor 13 cannot be prevented only by the diffusion barrier 12, and the ferroelectric characteristics of the ferroelectric capacitor 13 are significantly deteriorated. It is.

Similarly, in the case of the above-mentioned high-dielectric memory element, the high-dielectric characteristics of the high-dielectric capacitor are significantly deteriorated by a heat treatment in a hydrogen atmosphere for reducing the interface state generated when the gate oxide film is formed. It is.

An object of the present invention is to provide a highly reliable semiconductor device in which a ferroelectric film or a high dielectric film is not deteriorated.

[0015]

In order to achieve the above object, the present invention provides a dielectric capacitor having an upper electrode, a dielectric film and a lower electrode formed on a semiconductor substrate on which a select transistor is mounted. A semiconductor device electrically connected to a selection transistor, wherein the dielectric film contains an element for supplying holes.

According to the above configuration, holes are supplied by the elements contained in the dielectric film constituting the dielectric capacitor. Then, when hydrogen that could not be prevented by a diffusion barrier or the like during the hydrogen sintering process is combined with oxygen in the dielectric film to form an oxygen vacancy, electrons due to the oxygen vacancy are formed by the holes. Neutralization suppresses leakage current. Further, the holes are electrically coupled to oxygen ions, so that diffusion of oxygen ions and separation from the SBT are remarkably suppressed. Therefore, even if hydrogen diffuses to the electric film during the hydrogen sintering, the dielectric film does not deteriorate.

Further, the semiconductor device according to the present invention is characterized in that
Bi body membrane_FourTi_ThreeO₁₂, SrBi_Two(Ta_x, Nb_1-x)_TwoO₉(0 ≦ x
<1), BaBi_TwoNb_TwoO₉, BaBi_TwoTa_TwoO₉, PbBi_TwoTa_Two
O₉, PbBi_TwoNb_TwoO₉, PbBi_FourTi_FourO_Fifteen, SrBi_FourTi_FourO
_Fifteen, BaBi_FourTi_FourO_Fifteen, Sr_TwoBi_FourTi_FiveO₁₈, Ba_TwoBi_FourTa
_FiveO₁₈, Pb_TwoBi_FourTi_FiveO₁₈, Na_0.5Bi_4.5Ti_FourO_Fifteen, K
_0.5Bi_4.5Ti_FourO_Fifteen, (SrBi_Two(Ta_x, Nb_1-x)_TwoO₉)_y・ (B
i_ThreeTiTaO₉)_1-yB including (0 ≦ x <1,0.6 ≦ y <1)
i-type layered perovskite ferroelectric material, (Pb _1-x, La_x
(Zr_1-y, Ti_y) O_Three(0 ≦ x <0.2, 0.48 ≦ y <1)
Containing Pb-based perovskite ferroelectric material, SrTiO_Three,
(Ba, Sr) TiO_ThreePerovskite-type high dielectric material containing
The dielectric material is formed using any one of the above dielectric materials.
The elements contained in the film are group IA, IB, IV-A or
Is at least one element selected from group IV-B
It is desirable.

According to the above structure, the dielectric film is made of any one of a Bi-based layered perovskite ferroelectric material, a Pb-based perovskite ferroelectric material, and a perovskite-type high dielectric material. A dielectric film having a large remanent polarization, a small coercive electric field, a low leakage current, and a large resistance to repetition of polarization reversal, or
A dielectric film having a higher dielectric constant than the silicon oxide film can be obtained.

Further, when the dielectric film contains an element of the IA group or IB group, the element replaces strontium (Sr) in the dielectric film and becomes positive. Holes are formed. Further, when an element of the IV-A group or the IV-B group is contained, holes are generated by replacing the element with bismuth (Bi) in the dielectric film.

Further, in the semiconductor device of the present invention, it is desirable that the content of the element contained in the dielectric film is not less than 10 ¹⁶ / cm ^{3 and not} more than 10 ²⁰ / cm ³ .

According to the above configuration, the dielectric film has 10
Since it contains elements that supply holes of ¹⁶ / cm ³ or more,
Holes are supplied so that electrons are sufficiently neutralized by oxygen vacancies formed in the dielectric film during hydrogen sintering. Further, since the content of the above element is 10 ²⁰ / cm ³ or less, the ion of the above element does not become a mobile ion and does not cause a leak current.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments. FIG. 1 is a cross-sectional view of a ferroelectric memory element as a semiconductor device according to the present embodiment. Conductive silicon substrate 21, device isolation region 22, select transistor 26, first interlayer insulating film 27, adhesion layer 28, Pt lower electrode 29, Pt upper electrode 31, diffusion barrier film 32, second interlayer insulating film 34, first Metal wiring 35, third interlayer insulating film 36,
The second metal wiring 37 and the surface protection film 38 are formed of the conductive silicon substrate 1, the element isolation region 2, the selection transistor 6, the first interlayer insulating film 7, the adhesion layer 8, and the conductive type silicon substrate 1 in the conventional ferroelectric memory device shown in FIG. It has exactly the same configuration as the Pt lower electrode 9, the Pt upper electrode 11, the diffusion barrier film 12, the second interlayer insulating film 14, the first metal wiring 15, the third interlayer insulating film 16, the second metal wiring 17, and the surface protection film 18. Have.

The ferroelectric memory device according to the present embodiment differs from the conventional ferroelectric memory device shown in FIG. 3 in that zirconium (Zr) is added to the ferroelectric thin film 30 of the ferroelectric capacitor 33. And different.

The ferroelectric memory device having the above configuration is
It is formed as follows. That is, first, a gate oxide film 23, a source / drain region 24, and a gate electrode 25 serving as a polysilicon word line are formed on a conductive type silicon substrate 21 by a BPSG (boron phosphorus doped silicate glass). With the first interlayer insulating film material 27.

Next, a Ti oxide as the adhesion layer 28 is formed to a thickness of 30 nm by a sputtering method.
Is formed with a thickness of 100 nm to 200 nm. Then, SrB as a ferroelectric thin film 30 is formed on the Pt lower electrode 29.
An i ₂ Ta ₂ O ₉ (SBT) thin film is formed. Here, the SB
Zr is added to the T thin film. The addition amount of Zr is preferably 10 ¹⁷ / cm ³ or more and 10 ²⁰ / cm ³ or less. Here, if the addition amount of Zr is less than 10 ¹⁷ / cm ³ , a sufficient addition effect cannot be obtained. If it exceeds 10 ²⁰ / cm ³ , on the contrary, Zr ions become mobile ions and cause a leak current, which is not preferable. In this embodiment, 5 × 10 ¹⁸ / cm ³ of Zr was added.

Hereinafter, a method of forming the SBT thin film will be described. Starting materials for solution synthesis include tantalum ethoxide (Ta (OC ₂ H ₅ ) ₅ ), bismuth 2-ethylhexanate
(Bi (C ₇ H ₁₅ COO) ₂ ) and strontium 2-ethylhexanate (Sr (C ₇ H ₁₅ COO) ₂ ) are used. In addition, zirconium 2-ethyl hexanate is used for adding Zr.

First, the above tantalum ethoxide is weighed,
It is dissolved in 2-ethylhexanate, stirred while heating from 100 ° C. to 120 ° C. to accelerate the reaction, and reacted for 30 minutes. Thereafter, the reaction is carried out at 120 ° C. to remove the produced ethanol and water. And
To the obtained solution, an appropriate amount of strontium 2 hexanate dissolved in 20 to 30 ml of xylene is added so that Sr / Ta = 1/2, and the mixture is heated and stirred at a temperature of 125 ° C to a maximum of 140 ° C for 30 minutes. . Thereafter, 10
An appropriate amount of bismuth 2-ethylhexanate dissolved in ml of xylene was added so that Sr / Bi / Ta = 1 / 2.4 / 2.
Further, zirconium 2-ethyl hexanate was added so that the addition amount became 5 × 10 ¹⁸ / cm ^3, and the temperature was increased from 130 ° C. to a maximum of 15 ° C.
Heat and stir at 0 ° C. for 10 hours.

Next, the obtained solution is distilled at a temperature of 130 ° C. to 150 ° C. for 5 hours in order to remove the used xylene using a low molecular weight alcohol and water as a solvent.
Thereafter, the concentration of SrBi ₂ Ta ₂ O _{9 in} the solution was adjusted to be 0.1 mol / l, and this was used as a precursor solution. In addition, these raw materials are not limited to the above, and the solvent is not particularly limited as long as the starting materials are sufficiently dissolved.

Next, using the above precursor solution, a ferroelectric SBT thin film is formed by the steps described below. First, the precursor solution is dropped on the substrate on which the Pt lower electrode 29 is formed as described above, and is applied by a spin coating method. Thereafter, drying is performed on a hot plate heated to 250 ° C. in order to completely remove the solvent, and then firing is performed at 600 ° C. to 700 ° C. in an electric furnace. The SBT thin film (ferroelectric thin film) 30 with a thickness of 200 nm to which Zr is added is formed by repeating the above film forming process three times.

Next, on the SBT thin film 30, a film thickness of 100
After forming the Pt upper electrode 31 of nm, ultraviolet reduction exposure technology using a photoresist (photolithography method)
And Pt upper electrode 31 by using dry etching method.
It is processed to 5 μm square to make a capacitor electrode. In the above dry etching, Cl ₂ gas is mainly used as an etching gas, and a high frequency bias voltage is applied to the substrate under a pressure of 1.5 mTorr for processing. After that, heat treatment is performed in an oxygen atmosphere in a temperature range of 700 ° C. to 800 ° C. by an electric furnace. Next, the SBT thin film 30, the Pt lower electrode 29, and the adhesion layer 28 are processed by a photolithography method using a photoresist and a dry etching method. In the above dry etching, C ₂ F ₆ gas was mainly used as an etching gas, and 1.5 mTorr
Under high pressure, a high-frequency bias voltage is applied to the substrate for processing. Thus, the ferroelectric capacitor 33 is formed.

Next, in order to more completely prevent the reduction of the SBT thin film 30 by the diffusion of hydrogen, the diffusion barrier 3
An oxide of Al or a nitride of Al as No. 2 is formed so as to cover the capacitor electrode 31 and the SBT thin film 30. The formation of the diffusion barrier 32 in that case is performed by Al
It is formed by a DC (direct current) magnetron sputtering method, an RF (high frequency) magnetron sputtering method, or a sputtering method using an ECR (electron cyclotron resonance) plasma source using a target, an Al oxide target or an Al nitride target. Here, the substrate temperature is 2
The temperature is maintained at 5 ° C. to 400 ° C., the gas ratio of O ₂ / (O ₂ + Ar) is in the range of 0.1 to 0.5, and the gas pressure is 1 mTorr to 20 m.
Torr range. The thickness of the diffusion barrier 32 formed of Al oxide at a substrate temperature of 100 ° C. to 400 ° C. was 10 nm to 100 nm, and was substantially amorphous.

Further, the diffusion barrier 32 is further heated in an electric furnace in an oxygen atmosphere, a nitrogen atmosphere or a mixed gas atmosphere of oxygen and nitrogen at a temperature of 300 ° C. to 600 ° C. for 30 minutes to 30 minutes.
By performing the heat treatment for 60 minutes, the diffusion barrier property is significantly improved. By this heat treatment, the grain size grows to 10 nm.

The diffusion barrier 32 is not limited to the Al oxide or the Al nitride, but may be a Ta oxide, a Ta nitride oxide, a Ti oxide or a Zr oxide. The effect is obtained. Also in these films, after formation, 300 ° C. to 600 ° C. in an electric furnace under the above atmosphere.
By performing the heat treatment at 30 ° C. for 30 to 60 minutes, a remarkable improvement in the diffusion barrier property is observed. The improvement of the diffusion barrier property can be obtained up to a grain size of 50 nm. However, as the grain size increases further,
The ferroelectric characteristics of the SBT thin film 30 deteriorate. Further, as the adhesion layer 28, instead of the Ti oxide, Al,
An oxide of Ta or Zr, a nitride of Al, or a nitrided oxide of Ta may be used.

Next, an oxide film as a second interlayer insulating film 34 is formed on the ferroelectric capacitor 33 covered with the diffusion barrier 32 by an atmospheric pressure CVD method using an organic silicon compound (TEOS) and O ₃ . React or TESO
And O ₂ are reacted by a plasma CVD method to obtain 50
It is formed with a thickness of 0 nm to 600 nm. After the second interlayer insulating film 34 is thus formed, the diffusion barrier 32 and the second interlayer insulating film 34 on the Pt upper electrode 31 and the source region 24a and the drain region of the selection transistor 26 are formed by photolithography and dry etching. 2
A contact hole having a diameter of 0.8 μm is formed in the first interlayer insulating film 27, the diffusion barrier 32, and the second interlayer insulating film 34 on 4b. Then, an Al layer having a thickness of 700 nm is formed and processed by DC magnetron sputtering to form a first metal wiring 35.

Thereafter, the third interlayer insulating film 3 is formed on the entire substrate.
6 is formed, and the first region connected to the source region 24a is formed by photolithography and dry etching.
0.8 μm diameter via hole on metal wiring 35 (not shown)
Open. Then, after an Al layer having a thickness of 700 nm is formed by DC magnetron sputtering, it is processed by photolithography and dry etching to form a second metal wiring 37 serving as a bit line. Finally, a 500 nm thick SiN film as a surface protection film 38 is formed by a plasma CVD method, and is subjected to hydrogen sintering to form a ferroelectric capacitor 33 and a selection transistor 26 having a selection transistor 26 as shown in FIG. A dielectric memory device is formed.

The ferroelectric characteristics of the ferroelectric memory element formed as described above were measured using a Sawyer tower circuit. FIG. 2 shows the hysteresis characteristics obtained at that time. Table 1 shows the remanent polarization value Pr and the leakage current when 10 V is applied, as compared with the conventional ferroelectric memory element in which Zr is not added to the ferroelectric thin film shown in FIG. Table 1

From FIG. 2 and Table 1, the remanent polarization value Pr = 1
Good results were obtained with 2.1 μC / cm ² and coercive electric field Ec = 40 kV / cm. In addition, in the ferroelectric capacitor 33, 10
The leakage current when V was applied was stable at -10 ^-8 A / cm ² . On the other hand, in the case of a conventional ferroelectric memory element in which Zr is not added to the ferroelectric thin film, the residual polarization value Pr = 11.9 μm.
C / cm ² , which was almost the same as that of the ferroelectric memory element of the present embodiment having the ferroelectric thin film 30 to which Zr was added. However, as shown in Table 1, the leakage current when 10 V was applied was lower by one or two digits or more.

That is, no deterioration occurred in the ferroelectric capacitor 33 of the ferroelectric memory element according to the present embodiment, and it was confirmed that the ferroelectric characteristics were large enough for a ferroelectric memory capacitor. Was.

As described above, in the present embodiment,
As the ferroelectric thin film 30 constituting the ferroelectric capacitor 33 of the ferroelectric memory element, an SBT thin film to which Zr is added is used. Therefore, since Zr, which is a group IV-B element added to the SBT thin film, replaces Bi in the SBT, electrons become insufficient and holes are generated. For this reason, even if hydrogen that could not be prevented by the diffusion barrier 32 enters the SBT thin film and bonds with oxygen in the SBT to form an oxygen vacancy during the hydrogen sintering process, even if hydrogen is generated by the holes, The electrons due to the oxygen vacancies are neutralized, and the leakage current of the present ferroelectric memory element becomes extremely small.

Further, the holes are electrically coupled to oxygen ions, so that diffusion of oxygen ions and separation from the SBT are remarkably suppressed. Therefore, the reliability of the present ferroelectric memory element is improved.

That is, according to the present embodiment, in order to reduce the interface state generated during the formation of the gate oxide film,
When heat treatment is performed at a temperature of 400 ° C. to 450 ° C. in an atmosphere containing hydrogen, even if hydrogen diffuses into the ferroelectric thin film 30 through the diffusion barrier 32, the ferroelectric thin film (SBT thin film) 30 is deteriorated. Can be prevented.

In the above embodiment, SBT is used as the ferroelectric thin film 30, but Bi ₄ Ti ₃ O ₁₂ ,
_{SrBi 2 (Ta x, Nb 1} -x) 2 O 9 (0 ≦ x <1), BaBi 2 Nb 2 O
₉ , BaBi ₂ Ta ₂ O ₉ , PbBi ₂ Ta ₂ O ₉ , PbBi ₂ Nb
₂ O ₉ , PbBi ₄ Ti ₄ O ₁₅ , SrBi ₄ Ti ₄ O ₁₅ , BaBi ₄ Ti
₄ O ₁₅ , Sr ₂ Bi ₄ Ti ₅ O ₁₈ , Ba ₂ Bi ₄ Ta ₅ O ₁₈ , Pb ₂ Bi
₄ Ti ₅ O ₁₈ , Na _0.5 Bi _4.5 Ti ₄ O ₁₅ , K _0.5 Bi _4.5 Ti
_{4 O 15, (SrBi 2 (} Ta x, Nb 1-x) 2 O 9) y · (Bi 3 TiTaO 9)
Bi-based layered perovskite ferroelectric material such as _1-y (0 ≦ x <1,0.6 ≦ y <1), (Pb _1-x , La _x (Zr _1-y , Ti _y ) O)
₃ (0 ≦ x <0.2, 0.48 ≦ y <1), etc., Pb-based ぺ perovskite-type ferroelectric material, SrTiO ₃ , (Ba, Sr) TiO _3, etc., ぺ perovskite-type high dielectric material The same effect as in the present embodiment can be obtained by using.

Although Zr is added to the ferroelectric thin film 30, any other element that supplies holes may be used. That is, as the ferroelectric thin film 30, Bi
If a layered perovskite ferroelectric material, a Pb-based perovskite ferroelectric material or a perovskite-type high dielectric material is used, the elements supplying the holes include the group IA and IB. It may be at least one element selected from group IV, group IV-A or group IV-B. In this case, if the above element is a group IA or IB group element, it replaces Sr in the ferroelectric thin film 30 to generate holes. If the element is a group IV-A or group IV-B element, it replaces Bi in the ferroelectric thin film 30 to generate holes.

However, when the above element is a Group IA element, it is desirable that it be rubidium (Rb) or cesium (Cs). In the case of an IB group element, copper (C
u), silver (Ag) or gold (Au). When the element is a group IV-A element, carbon
(C), silicon (Si), germanium (Ge), tin (Sn) or lead (Pb). Also, IV-B
When the element is a group element, it is desirable to be any of titanium (Ti), Zr or hafnium (Hr).

[0045]

As is clear from the above, the semiconductor device of the present invention has a dielectric capacitor composed of an upper electrode, a dielectric film and a lower electrode, and the dielectric film has an element for supplying holes. Therefore, when hydrogen that could not be prevented by a diffusion barrier or the like during the hydrogen sintering process combines with oxygen in the dielectric film to form an oxygen vacancy, the positive element supplied by the element The holes can neutralize the electrons due to the oxygen vacancies and suppress the leak current. Also,
The holes are electrically coupled to oxygen ions, so that diffusion of oxygen ions and desorption from the SBT can be suppressed.

That is, according to the present invention, it is possible to prevent the dielectric film from being deteriorated even if hydrogen diffuses to the electric film of the dielectric capacitor during the hydrogen sintering process. Therefore, a highly reliable semiconductor device in which the ferroelectric film or the high dielectric film is not deteriorated can be provided.

Further, in the semiconductor device of the present invention, the dielectric film of the dielectric capacitor may be any of a Bi-based layered perovskite ferroelectric material, a Pb-based perovskite ferroelectric material or a perovskite-type high dielectric material. By using this, it is possible to obtain a dielectric film having a large remanent polarization, a small coercive electric field, a low leakage current, and a high resistance to repeated polarization inversion, or a dielectric film having a higher dielectric constant than a silicon oxide film.

Further, when an element selected from the group IA, IB, IV-A or IV-B is used as the element contained in the dielectric film, the group IA or I- B
In the case of a group element, it is substituted for Sr in the above dielectric film,
In the case of an element of the above-mentioned IV-A group or IV-B group, it can be substituted with Bi to generate the above-mentioned hole.

Further, in the semiconductor device of the present invention, when the content of the element contained in the dielectric film is not less than 10 ¹⁶ / cm ^{3 and not} more than 10 ²⁰ / cm ³ , In addition, holes enough to sufficiently neutralize electrons due to oxygen vacancies formed in the dielectric film can be supplied. Further, it is possible to prevent the ions of the above elements from becoming mobile ions and causing a leak current.

[Brief description of the drawings]

FIG. 1 is a sectional view of a ferroelectric memory element as a semiconductor device according to the present invention.

FIG. 2 is a diagram showing an applied electric field and remanent polarization characteristics in the ferroelectric memory element shown in FIG.

FIG. 3 is a cross-sectional view of a conventional ferroelectric memory device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 21 ... Conductive silicon substrate, 22 ... Element isolation region, 23 ... Gate oxide film, 24 ... Source / drain region, 25 ... Gate electrode, 26 ... Select transistor, 27 ... First interlayer insulating film, 28 ... Adhesion layer, 29 ... Pt lower electrode, 30 ... ferroelectric thin film, 31 ... Pt upper electrode, 32 ... diffusion barrier film, 33 ... ferroelectric capacitor, 34 ... second interlayer insulating film, 35 ... first metal wiring, 36 ... third An interlayer insulating film; 37, a second metal wiring; 38, a surface protective film.

Claims (7)

[Claims] 1. A semiconductor device wherein a dielectric capacitor having an upper electrode, a dielectric film and a lower electrode is formed on a semiconductor substrate on which a select transistor is mounted, and is electrically connected to the select transistor. The dielectric film includes an element for supplying holes. 2. A semiconductor device according to claim 1, the dielectric _{film, Bi 4 Ti 3 O 12,} SrBi 2 (Ta x, Nb 1-x)
₂ O ₉ (0 ≦ x <1), BaBi ₂ Nb ₂ O ₉ , BaBi ₂ Ta ₂ O ₉ ,
PbBi ₂ Ta ₂ O ₉ , PbBi ₂ Nb ₂ O ₉ , PbBi ₄ Ti ₄ O ₁₅ ,
SrBi ₄ Ti ₄ O ₁₅ , BaBi ₄ Ti ₄ O ₁₅ , Sr ₂ Bi ₄ Ti ₅ O ₁₈ ,
Ba ₂ Bi ₄ Ta ₅ O ₁₈ , Pb ₂ Bi ₄ Ti ₅ O ₁₈ , Na _0.5 Bi _4.5 Ti _{4
O 15, K 0.5 Bi 4.5 Ti} 4 O 15, (SrBi 2 (Ta x, Nb 1-x)
₂ O ₉ ) _y · (Bi ₃ TiTaO ₉ ) _1-y (0 ≦ x <1,0.6 ≦ y <
1) a Bi-based layered perovskite ferroelectric material containing:
(Pb _1-x , La _x (Zr _1-y , Ti _y ) O ₃ (0 ≦ x <0.2, 0.48
.Ltoreq.y <1), formed using any one of a Pb-based perovskite-type ferroelectric material and a perovskite-type high-permittivity material including SrTiO ₃ and (Ba, Sr) TiO _3. The elements contained in the dielectric film are IA group, IB group, IV
-A semiconductor device characterized by being at least one element selected from the group A or the group IV-B. 3. The semiconductor device according to claim 2, wherein the element selected from the group IA is rubidium or cesium. 4. The semiconductor device according to claim 2, wherein the element selected from the group IB is any one of copper, silver, and gold. 5. The semiconductor device according to claim 2, wherein the element selected from the group IV-A is any one of carbon, silicon, germanium, tin, and lead. 6. The semiconductor device according to claim 2, wherein the element selected from the group IV-B is any one of titanium, zirconium and hafnium. 7. The semiconductor device according to claim 1, wherein the content of the element contained in the dielectric film is 10 ¹⁶ / cm ³ or more and 10 ²⁰ / cm ³ or more. A semiconductor device having a size of not more than cm ³ .