JP2002123340A - Electronic equipment and control method of electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To judge fast whether or not a driven device is to be driven without carrying out any complicated operation even when the driven device has a large power consumption. SOLUTION: The voltage of a secondary battery 220 obtained when a resistance 232 as a dummy load is connected to the secondary battery 220 is compared with the lower-limit voltage, read out of a flash memory 247, which can be allowed for the secondary battery 220 when it is assumed that at least part of a motor 238, an EL display 239, or a bezel input device 240 is driven and it is decided whether or not the motor 238, EL display 239, or bezel input device 240 can be driven according to the comparison result.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic device and a method for controlling the electronic device, and more particularly, to a device having a large power consumption that may not be driven depending on the state of a primary battery or a secondary battery incorporated as a power supply. The present invention relates to an electronic device including a driving device and a control method of the electronic device.

[0002]

2. Description of the Related Art In recent years, small portable electronic devices such as portable terminals and electronic watches have been housed in charging devices called stations, and data transfer and the like have been performed along with charging of the portable electronic devices. Here, if charging and data transfer are performed via electrical contacts, these contacts are exposed, which causes a problem in terms of waterproofness. For this reason, it is desirable that charging, signal transfer, and the like be performed in a non-contact manner by electromagnetic coupling of coils provided in both the station and the portable electronic device. In such a configuration, when a high-frequency signal is applied to the coil on the station side, an external magnetic field is generated, and an induced voltage is generated on the coil on the portable electronic device side. By rectifying the induced voltage with a diode or the like, it becomes possible to contactlessly charge a secondary battery built in the portable electronic device. Also, the electromagnetic coupling between the two coils makes it possible to transfer signals bidirectionally from the station to the portable electronic device or from the portable electronic device to the station in a non-contact manner.

In the above-mentioned conventional small portable electronic device, each unit is driven by using a secondary battery (or a primary battery) as a power source. In some cases, the power supply voltage drops significantly to drive the driven device. For example, driven devices with large power consumption (heavy load driven devices) include a motor for a vibrator used for a vibration notification function and an EL (ElectroLum) for performing various displays.
inescence) display, flash memory (at the time of data writing, at the time of erasing), and the like. These heavy load driven devices have a large voltage drop during driving,
If the internal resistance of the secondary battery is low and the battery is not in a predetermined state of charge, the operation may not be performed properly.

[0004] In particular, when the voltage of the secondary battery drops below the voltage required for driving the system due to the voltage drop when driving a heavy-load driven device, the system may run down, such as runaway of the system. In such a case, it is necessary to perform a system reset, and there is a problem that usability is poor. In order to solve such a problem, Japanese Patent Application Laid-Open No. H11-259190 (Japanese Patent Application No.
In the heavy-load drive control of a portable terminal disclosed in Japanese Patent Application Laid-Open No. 59260), the voltage of a secondary battery under no load and the voltage when a specific load is applied are measured, and the internal resistance is calculated. From the calculated internal resistance of the battery and the heavy load drive device that is the actual load, calculate the predicted value of the battery voltage when the heavy load drive device is driven, and calculate the battery voltage when driving the heavy load drive device. After determining whether the voltage does not fall below the minimum drivable voltage, the heavy load driving device is driven.

Here, a conventional calculation method will be described. Assuming that the battery voltage at no load is V0 and the battery voltage when a specific load resistance (value) R is connected as a pseudo load is V1, the internal resistance r of the secondary battery is r = R · (V0−V1) / V1. In this case, the battery voltage estimated value V3 when driving the actual heavy load driving device, when the required power amount of a heavy load driving devices (power consumption) and P, V3 = [V0 + √ (V0 2 -4 · r · P)] / 2. Therefore, if the expected battery voltage value V3 satisfies the relationship of V3 ≧ V4 with respect to the minimum operating voltage V4 of the portable terminal, it is determined that the heavy load drive device can be driven.

[0006]

However, in the above-described conventional heavy load drive control, complicated calculations are required prior to driving the heavy load drive device. However, since it takes time to determine whether or not to drive a heavy load driving device, it is difficult to apply the method to an EL display or the like that needs to determine whether or not to drive in a short time. In addition, in order to perform a high-speed operation, it is necessary to operate the arithmetic circuit at a high speed. Therefore, it is necessary to generate a high-speed switching signal for a high-speed operation. There was a problem that it would. Further, in the above-described conventional configuration, there is a problem that the driven device cannot be directly connected to the stage before the constant voltage circuit, that is, the battery.

Further, even when the driven device is operable even when the output voltage falls below the rated output voltage of the constant voltage circuit, if the output voltage of the constant voltage circuit falls below the rated output voltage, There is a problem that the driven device cannot be driven. Therefore, an object of the present invention is to determine whether or not to drive at a high speed without performing a complicated operation even when having a driven device having a large power consumption, and to determine whether the secondary battery or the secondary battery is driven by driving the driven device. It is an object of the present invention to provide an electronic device and a control method of the electronic device that can drive a driven device for as long as possible without causing a system down or the like due to a voltage drop of a primary battery.

[0008]

According to a first aspect of the present invention, there is provided a power supply unit for supplying a drive power supply, and a driven unit driven by the supply of the drive power supply. A pseudo load for discharging the power supply unit, a connection unit for connecting / disconnecting the pseudo load to / from the power supply unit, and driving the driven unit with the voltage of the driving power supply when there is no load. The upper limit of the internal resistance of the power supply unit allowable to the internal resistance upper limit, the voltage of the drive power supply when the pseudo load is connected to the power supply unit, the internal resistance is the internal resistance upper limit, When a pseudo load is connected to the power supply unit by the storage unit that stores in advance the voltage of the drive power supply at the time of no load in association with the voltage, the voltage detection unit that detects the voltage of the power supply unit, and the voltage detection unit. The drive obtained The voltage of the power source and the voltage of the drive power supply at the time of no load detected by the voltage detection unit from the storage unit are read out in correspondence with the power supply unit whose internal resistance value is the internal resistance upper limit value. A comparing unit that compares the voltage of the driving power supply when a load is connected, and whether or not the driven unit can be driven is determined based on a comparison result of the comparing unit, and the driven unit can be driven. In this case, the apparatus further comprises a drive propriety judging section for driving the driven section.

According to a second aspect of the present invention, in the configuration of the first aspect, the drive enable / disable determining unit is configured to supply the voltage of the drive power supply obtained when the pseudo load is connected to the power supply unit to the power supply unit. When the internal resistance is equal to or higher than the voltage of the drive power supply at the time of connecting the pseudo load when the internal resistance of the power supply unit is an allowable internal resistance upper limit value of the power supply voltage at no load, the driving of the driven unit is performed. It is characterized by being performed.

According to a third aspect of the present invention, in the configuration of the first aspect, the pseudo load is set to be smaller than the load of the driven portion and larger than a preset load. I have.

According to a fourth aspect of the present invention, in the configuration of the third aspect, the preset load is set to 1/10 or more of a load of the driven portion.

According to a fifth aspect of the present invention, in the configuration of the first aspect, the voltage detecting section detects the voltage of the driving power supply obtained when a pseudo load is connected to the power supply section. After the load is connected, the voltage is detected after the voltage change per unit time of the voltage of the drive power supply falls within a predetermined range.

According to a sixth aspect of the present invention, in the configuration of the fifth aspect, the predetermined range corresponding to the amount of voltage change per unit time is within 5 [mV / msec].

According to a seventh aspect of the present invention, in the configuration of the fifth aspect, the predetermined range corresponding to the voltage change per unit time is within 0.5 [mV / msec]. I have.

According to a eighth aspect of the present invention, in the configuration of the first aspect, when the voltage detecting section measures a voltage when the pseudo load is not connected, the driven section is in a non-driven state. The voltage measurement is performed when the amount of voltage change per unit time from within the predetermined range.

According to a ninth aspect of the present invention, in the configuration of the eighth aspect, if the voltage change amount does not fall within the predetermined range within a predetermined time, the voltage detection section switches the last driven section. It is characterized in that a measured value used for driving is used as a voltage measured value.

According to a tenth aspect of the present invention, in the configuration of the eighth aspect, the voltage detecting section detects the voltage change amount if the voltage change amount per unit time is within 5 [mV / msec]. It is characterized in that it falls within the certain range.

According to a eleventh aspect of the present invention, in the configuration of the eighth aspect, the voltage detection unit is configured to detect the voltage change if the voltage change per unit time is within 0.5 [mV / msec]. It is characterized in that the amount falls within the certain range.

According to a twelfth aspect of the present invention, in the configuration of the first aspect, the storage unit sets a lower limit voltage allowable in the power supply unit to V4 when the driven unit operates, and sets a resistance value of the pseudo load to V4. RT, the converted resistance value of the driven part is RX, and the internal resistance upper limit value of the drive power supply that can be allowed when the voltage V0 of the drive power supply at no load is RL.
When the internal resistance value is the internal resistance upper limit value RL and the voltage of the driving power supply at the time of connecting the pseudo load is VTL, the voltage VTL is calculated by the following formula (1), 2) The voltage V
The voltage VTL calculated by associating 0 with a file number
Is stored. RL = RX × (V0−V4) / V4 (1) VTL = RT × (V0 / (RL + RT)) (2)

According to a thirteenth aspect of the present invention, in the configuration of the first aspect, there is provided a voltage adjusting unit for setting a supply voltage to a predetermined voltage, and the supply of the driving power to the driven unit is performed via the voltage adjusting unit. The storage unit performs the operation of the driven unit, sets a lower limit voltage allowable in the power supply unit to V4, sets a resistance value of the pseudo load to RT, and sets a resistance value of the power supply unit when the pseudo load is connected. The voltage is V1, the converted resistance value of the driven part is RX, the upper limit of the internal resistance of the driving power supply that is allowable when the voltage V0 of the driving power supply at no load is RL, and the voltage of the voltage adjusting unit is When the resistance conversion value of the drop amount is REGd, and when the internal resistance value is the internal resistance upper limit value RL, and the voltage of the drive power supply at the time of connecting the pseudo load is VTL, the voltage VTL is changed for each of the voltages V0. Next (1), is characterized by storing said voltage VTL calculated in association with the file number together with the voltage V0 is calculated by equation (2). RL = RX × (V0−V4) / V4-REGd (1) VTL = RT × (V0 / (RL + RT)) (2)

According to a fourteenth aspect of the present invention, in the configuration of the first aspect, there is provided a voltage adjusting unit for setting a supply voltage to a predetermined specified voltage, and the supply of the driving power to the driven unit is performed by the voltage adjusting unit. When the driven unit can be driven at a voltage less than the specified voltage, and the storage unit sets a lower limit voltage allowable in the power supply unit during operation of the driven unit. V4, the resistance value of the pseudo load is RT, the voltage of the power supply unit when the pseudo load is connected is V1, the resistance conversion value of the driven unit is RX, and the voltage V0 of the driving power supply at no load The allowable internal resistance upper limit of the drive power supply in the case of
The rated output voltage of the voltage adjustment unit is REGout, the resistance conversion value of the voltage drop of the voltage adjustment unit is REGd, and the voltage of the power supply unit is less than the rated output voltage REGout of the voltage adjustment unit. When the resistance conversion coefficient of the voltage drop amount of the voltage adjustment unit is REGdd, and when the internal resistance value is the internal resistance upper limit value RL, and the voltage of the driving power supply at the time of connecting the pseudo load is VTL, the voltage VTL Is calculated by the following equations (1) and (2) for each voltage V0, and the voltage VTL calculated by associating the voltage V0 with a file number is stored. RL = RX × (V0−V4) / V4-REGd−REGdd × (REGout−V4) (1) VTL = RT × (V0 / (RL + RT)) (2)

According to a fifteenth aspect of the present invention, in the configuration according to any one of the twelfth to fourteenth aspects, the resistance conversion value RX when the plurality of driven parts are driven simultaneously.
Is characterized in that it is a combined resistance conversion value when each of the plurality of driven parts is regarded as a resistance.

According to a sixteenth aspect of the present invention, in the configuration of the first aspect, the electronic device includes a voltage adjusting unit for setting a supply voltage to a predetermined specified voltage, and the driven unit is configured such that the driving power supply is A first driven unit supplied directly from the power supply unit; and a second driven unit supplied with the driving power via the voltage adjustment unit, wherein the first driven unit is provided in the electronic device. And the second driven part is driven simultaneously, wherein the voltage of the driving power supply at the time of no load is V0, the voltage of the power supply part at the time of connecting a pseudo load is V1, and the operation of the driven part is Sometimes, the lower limit voltage allowable in the power supply unit is V4, the resistance value of the pseudo load is RT,
The resistance conversion value of the first driven portion to be driven is Rm
o, the resistance conversion value of the second driven unit to be driven is Reb, the resistance conversion value of the voltage drop amount of the voltage adjustment unit is REGd, and the internal resistance of the power supply unit that can be tolerated when the voltage is V0. When the upper limit value is RL, and when the internal resistance of the power supply unit is the internal resistance upper limit value RL, and the voltage of the drive power supply at the time of connecting the pseudo load is VTL,
An internal resistance value RL1 of the power supply unit allowed when the first driven unit is driven is calculated by equation (1), and RL1 = (V0−V4) / ((V4 / Rmo) + (V4 / ( Reb + REGd))) (1) Calculate the internal resistance RL2 of the power supply unit allowed when the second driven unit is driven by the equation (2), and RL2 = (V0− (V4 + (V4 / (Reb × REGd))) / ((V4 / Reb) + (((V4 / Reb × REGd) + V4) / Rmo)) (2) The smaller of the internal resistance RL1 and the internal resistance RL2 The value is set to the internal resistance upper limit value RL, the voltage VTL is calculated for each of the voltages V0 by the equation (3), and the voltage VTL calculated by associating the voltage V0 with a file number is stored in the storage unit. That It is a symptom. VTL = RT × (V0 / (RL + RT)) (3)

According to a seventeenth aspect of the present invention, in the configuration of the first aspect, the electronic device has a voltage adjusting unit for setting a supply voltage to a predetermined specified voltage REGout, and the driven unit includes the driving power supply. Comprises a first driven unit supplied directly from the power supply unit, and a second driven unit supplied with the driving power via the voltage adjusting unit, wherein the first driving unit and the second driving unit A case where the driving units are driven simultaneously, and the second driven unit is drivable at a voltage lower than the specified voltage, and the voltage of the driving power supply at no load is V0, The voltage of the power supply unit at the time is V1, the lower limit voltage allowable in the power supply unit during the operation of the driven unit is V4, the resistance value of the pseudo load is RT,
The resistance conversion value of the first driven portion to be driven is Rm
o, the resistance conversion value of the second driven unit to be driven is Reb, the resistance conversion value of the voltage drop amount of the voltage adjustment unit is REGd, and the internal resistance of the power supply unit that can be tolerated when the voltage is V0. An upper limit value is RL, a resistance conversion coefficient of a voltage drop amount of the voltage regulator when the voltage of the drive power supply falls below the specified voltage REGout is REGdd, and an internal resistance of the power supply unit is the internal resistance upper limit value RL. When the voltage of the drive power supply at the time of connection of the pseudo load is VTL, the internal resistance RL1 of the power supply unit allowed when driving the first driven unit is set to (1).
RL1 = (V0−V4) / ((V4 / Rmo) + V4 / (Reb + REGd + (REGdd × (REGout−V4)))) (1) When driving the second driven part RL2 = (V0− (V4 + (V4 / Reb × (REGd + REGdd × (REGOUT-V4))))) / ((V4) / Reb) + (((V4 / Reb × (REGd + REGdd × (REGout−V4))) + V4) / Rmo)) (2) The smaller of the internal resistance value RL1 and the internal resistance value RL2 With the internal resistance upper limit value RL, the voltage VTL is calculated for each of the voltages V0 by equation (3), and the voltage V0 is calculated in association with a file number. The VTL is characterized in that stored in the storage unit. VTL = RT × (V0 / (RL + RT)) (3)

According to a eighteenth aspect of the present invention, in the configuration according to any one of the twelfth to seventeenth aspects, the storage section sets the voltage V0 of the driving source under no load as a lower address, The voltage VTL is stored as data in a storage area in which the drive request state is set as an upper address.

In a preferred embodiment of the present invention, a power supply unit for supplying a drive power supply, a driven unit driven by the supply of the drive power supply, and a pseudo load for discharging the power supply unit A connection unit for connecting / disconnecting the pseudo load to / from the power supply unit; and an upper limit value of an internal resistance of the power supply unit that can be allowed to drive the driven unit at a voltage of the drive power supply at no load. An internal resistance upper limit value, and a voltage of the drive power supply when the pseudo load is connected to the power supply unit whose internal resistance value is the internal resistance upper limit value is stored in advance in correspondence with a voltage of the drive power supply at no load. And a voltage detection unit for detecting a voltage of the power supply unit, the control method of an electronic device, wherein the drive power supply obtained when a pseudo load is connected to the power supply unit by the voltage detection unit. Voltage, and the pseudo load is read from the storage unit to the power supply unit whose internal resistance value is the internal resistance upper limit value, which is read in correspondence with the voltage of the drive power supply at the time of no load detected by the voltage detection unit. Comparing the voltage of the drive power supply when connected, and determining whether or not the driven unit can be driven based on the comparison result. Driving is performed.

According to a twentieth aspect of the present invention, in the configuration of the nineteenth aspect, when detecting the voltage of the driving power supply obtained when a pseudo load is connected to the power supply section, the connection is made after the pseudo load is connected. The voltage is detected after the amount of change in the voltage of the drive power supply per unit time falls within a predetermined range.

[0028] The structure of claim 21 is characterized in that, in the structure of claim 20, the predetermined range corresponding to the voltage change per unit time is within 5 [mV / msec].

According to a twenty-second aspect of the present invention, in the configuration of the twentieth aspect, the predetermined range corresponding to the voltage change per unit time is within 0.5 [mV / msec]. I have.

According to a twenty-third aspect of the present invention, in the configuration according to the nineteenth aspect, when measuring the voltage when the pseudo load is not connected, the voltage per unit time after the driven portion enters the non-drive state. It is characterized in that voltage measurement is performed when the change amount falls within a certain range.

According to a twenty-fourth aspect of the present invention, in the configuration of the twenty-third aspect, when the amount of voltage change does not fall within the predetermined range within a predetermined time, it is used for previously driving the driven portion. It is characterized in that the measured value is used as a voltage measured value.

According to a twenty-fifth aspect of the present invention, in the configuration of the twenty-third aspect, the voltage change per unit time is 5
If it is within [mV / msec], the voltage change amount falls within the certain range.

According to a twenty-sixth aspect of the present invention, in the configuration according to the twenty-third aspect, if the voltage change per unit time is within 0.5 [mV / msec], the voltage change is within the predetermined range. It is characterized in that it fits in.

According to a twenty-seventh aspect of the present invention, in the configuration of the nineteenth aspect, the lower limit voltage allowable in the power supply unit during the operation of the driven unit is V4, the resistance value of the pseudo load is RT, and In the case where the resistance conversion value of the drive unit is RX, the internal resistance upper limit of the drive power supply that is allowable in the case of the voltage V0 of the drive power supply at no load is RL, and the internal resistance value is the internal resistance upper limit RL When the voltage of the drive power supply at the time of connection of the pseudo load is VTL,
The voltage VTL is calculated by the following equations (1) and (2) for each voltage V0.
The voltage VTL calculated in accordance with the equation and the voltage VTL calculated in association with the file number is stored in the storage unit. RL = RX × (V0−V4) / V4 (1) VTL = RT × (V0 / (RL + RT)) (2)

According to a twenty-eighth aspect of the present invention, in the configuration according to the nineteenth aspect, the electronic device includes a voltage adjusting unit that supplies the driving power to the driven unit with a supply voltage being a predetermined voltage. The lower limit voltage allowable in the power supply unit during the operation of the driven unit is V4, the resistance value of the pseudo load is RT, the voltage of the power supply unit when the pseudo load is connected is V1, and the resistance conversion of the driven unit is The value is RX, the upper limit of the internal resistance of the driving power supply that can be allowed when the voltage V0 of the driving power supply at no load is RL, the resistance conversion value of the voltage drop amount of the voltage adjustment unit is REGd, and the internal resistance is When the value is the internal resistance upper limit value RL, and when the voltage of the drive power supply at the time of connecting the pseudo load is VTL, the voltage VTL is calculated by the following equation (1) for each of the voltages V0.
The voltage VTL calculated in accordance with the equation (2) and the voltage VTL calculated in association with the file number is stored in the storage unit. RL = RX × (V0−V4) / V4-REGd (1) VTL = RT × (V0 / (RL + RT)) (2)

According to a twenty-ninth aspect of the present invention, in the configuration of the nineteenth aspect, the electronic device has a voltage adjusting unit that supplies the drive power to the driven unit with a supply voltage being a predetermined specified voltage. A case where the driven unit is drivable at a voltage lower than the specified voltage, and a lower limit voltage allowable in the power supply unit during the operation of the driven unit is V4, and a resistance value of the pseudo load is RT. The voltage of the power supply unit when the pseudo load is connected is V1, the resistance conversion value of the driven unit is RX, and the internal resistance of the drive power supply that can be tolerated in the case of the voltage V0 of the drive power supply at no load The upper limit is RL, and the rated output voltage of the voltage regulator is R
EGout, the resistance conversion value of the voltage drop amount of the voltage adjustment unit is REGd, and the resistance of the voltage drop amount of the voltage adjustment unit when the voltage of the power supply unit is lower than the rated output voltage REGout of the voltage adjustment unit. When the conversion coefficient is REGdd, and the internal resistance value is the internal resistance upper limit value RL, and the voltage of the driving power supply at the time of connecting the pseudo load is VTL, the voltage VTL is calculated for each of the voltages V0 by the following equation ( 1) and (2), the voltage V
The voltage VTL calculated by associating 0 with a file number
Is stored in the storage unit. RL = RX × (V0−V4) / V4-REGd−REGdd × (REGout−V4) (1) VTL = RT × (V0 / (RL + RT)) (2)

According to a thirtieth aspect of the present invention, in the configuration according to any one of the twenty-seventh to twenty-ninth aspects, the resistance conversion value RX when the plurality of driven parts are driven simultaneously.
Is characterized in that it is a combined resistance conversion value when each of the plurality of driven parts is regarded as a resistance.

According to a thirty-first aspect, in the configuration according to the nineteenth aspect, the electronic device includes a voltage adjusting unit for setting a supply voltage to a predetermined specified voltage, and the driven unit is configured such that the driving power supply is A first driven unit supplied directly from the power supply unit; and a second driven unit supplied with the driving power via the voltage adjustment unit, wherein the first driven unit is provided in the electronic device. And the second driven part is driven simultaneously, wherein the voltage of the driving power supply at the time of no load is V0, the voltage of the power supply part at the time of connecting a pseudo load is V1, and the operation of the driven part is Sometimes, the lower limit voltage allowable in the power supply unit is V4, the resistance value of the pseudo load is RT,
The resistance conversion value of the first driven portion to be driven is Rm
o, the resistance conversion value of the second driven unit to be driven is Reb, the resistance conversion value of the voltage drop amount of the voltage adjustment unit is REGd, and the internal resistance of the power supply unit that can be tolerated when the voltage is V0. When the upper limit value is RL, and when the internal resistance of the power supply unit is the internal resistance upper limit value RL, and the voltage of the drive power supply at the time of connecting the pseudo load is VTL,
An internal resistance value RL1 of the power supply unit allowed when the first driven unit is driven is calculated by equation (1), and RL1 = (V0−V4) / ((V4 / Rmo) + (V4 / ( Reb + REGd))) (1) Calculate the internal resistance RL2 of the power supply unit allowed when the second driven unit is driven by the equation (2), and RL2 = (V0− (V4 + (V4 / (Reb × REGd))) / ((V4 / Reb) + (((V4 / Reb × REGd) + V4) / Rmo)) (2) The smaller of the internal resistance RL1 and the internal resistance RL2 The value is set to the internal resistance upper limit value RL, the voltage VTL is calculated for each of the voltages V0 by the equation (3), and the voltage VTL calculated by associating the voltage V0 with a file number is stored in the storage unit. That It is a symptom. VTL = RT × (V0 / (RL + RT)) (3)

According to a thirty-second aspect of the present invention, in the configuration according to the nineteenth aspect, the electronic device includes a voltage adjusting unit for setting a supply voltage to a predetermined specified voltage REGout, and the driven unit includes the driving power supply. Comprises a first driven unit supplied directly from the power supply unit, and a second driven unit supplied with the driving power via the voltage adjusting unit, wherein the first driving unit and the second driving unit When the driving units are driven simultaneously, and
The second driven part can be driven at a voltage lower than the specified voltage, and the voltage of the driving power supply at no load is V0
And the voltage of the power supply unit when the pseudo load is connected is V1,
The lower limit voltage allowable in the power supply unit during the operation of the driven unit is V4, the resistance value of the pseudo load is RT, the converted resistance value of the first driven unit to be driven is Rmo, and the driving is performed. The resistance conversion value of the second driven unit to be performed is represented by Reb, the resistance conversion value of the voltage drop amount of the voltage adjustment unit is represented by REGd, and the internal resistance upper limit value of the power supply unit that is allowable in the case of the voltage V0 is represented by RL. When the voltage of the drive power supply falls below the specified voltage REGout, a resistance conversion coefficient of a voltage drop amount of the voltage adjustment unit is REGdd.
And the internal resistance of the power supply section is equal to the internal resistance upper limit value RL.
When the voltage of the drive power supply at the time of connection of the pseudo load is set to VTL, the internal resistance RL1 of the power supply unit allowed when the first driven unit is driven is calculated by the equation (1). RL1 = (V0−V4) / ((V4 / Rmo) + V4 / (Reb + REGd + (REGdd × (REGout−V4)))) (1) Permissible when driving the second driven part RL2 = (V0− (V4 + (V4 / Reb × (REGd + REGdd × (REGout−V4)))))) / ((V4 / Reb) ) + (((V4 / Reb × (REGd + REGdd × (REGout−V4))) + V4) / Rmo)) (2) Either the internal resistance RL1 or the internal resistance RL2 is smaller. The resistance value is set to the internal resistance upper limit value RL, the voltage VTL is calculated for each of the voltages V0 by the equation (3), and the voltage VTL calculated by associating the voltage V0 with a file number is stored in the storage unit. It is characterized by doing. VTL = RT × (V0 / (RL + RT)) (3)

According to a thirty-fourth aspect of the present invention, in the configuration according to any one of the twenty-seventh to thirty-second aspects, the voltage V0 of the drive source at the time of no load is set as a lower address, and the drive request state of the driven part is changed. It is characterized in that the voltage VTL is stored as data in a storage area of the storage unit which is a higher address.

[0041]

Preferred embodiments of the present invention will now be described with reference to the drawings. In the following description,
A station will be described as an example of a charging device, and an electronic device will be described as an example of a device to be charged. However, the present invention is not limited thereto. [1] First Embodiment First, a first embodiment of the present invention will be described. [1.1] Mechanical Configuration FIG. 1 is a plan view showing the configurations of the station and the electronic timepiece according to the embodiment. As shown in FIG. 1, the electronic timepiece 200 is housed in the recess 101 of the station 100 when performing charging, data transfer, or the like. This recess 101
The watch body 201 is formed in a slightly larger shape than the body 201 and the band 202 of the electronic watch 200, so that the watch body 201 is housed in a state positioned with respect to the station 100.

Further, in the station 100, and the charging start button 103 ₁ for instructing the start of charging, with various input unit such as a transfer start button 103 ₂ for instructing the start of data transfer, the various displays A display unit 104 for performing the operation is provided. Note that the electronic timepiece 200 according to the present embodiment is worn on the user's arm in a normal use state and displays the date and time and the like on the display unit 204.
It is configured to detect and store biological information such as a pulse rate and a heart rate at regular intervals.

FIG. 2 is a sectional view taken along line AA in FIG. As shown in FIG. 2, a watch-side coil 210 for data transfer and charging is provided on a lower back cover 212 of the main body 201 of the electronic timepiece via a cover glass 211. Further, the watch main body 201 is provided with a circuit board 221 connected to the secondary battery 220, the watch side coil 210, and the like. On the other hand, in the recess 101 of the station 100, a station-side coil 110 is provided via a cover glass 111 at a position facing the clock-side coil 210. The station 100 has a coil 110, a charge start button 103 ₁ , a transfer start button 10 ₁
3 _2, the display unit 104, a circuit board 121 that is connected to such primary source (not shown) is provided. in this way,
In a state where the electronic timepiece 200 is housed in the station 100, the station-side coil 110 and the watch-side coil 210 are not physically in contact with each other due to the cover glasses 111 and 211. In effect, they are in a connected state.

The station-side coil 110 and the clock-side coil 210 are respectively formed with a magnetic core for reasons such as avoiding the magnetization of the clock mechanism, the weight of the clock side, and the exposure of the magnetic metal. It has no air core. Therefore, when applied to an electronic device in which such a problem does not occur, a coil having a magnetic core may be employed. However, if the signal frequency given to the coil is sufficiently high, the air-core type is sufficient.

[1.2] Electrical Configuration Next, the electrical configuration of the main part of the electronic timepiece 200 will be described with reference to FIG. The electronic timepiece 200 is an electronic timepiece 2
A secondary battery 220 that supplies power to the entire battery 200 and a constant voltage (in this embodiment,
2.5 [V]) and supplies it as a reference power supply for an analog / digital converter described later.
31, a resistor 232 functioning as a dummy load, and a resistor 2
32 is a secondary battery 2 under the control of a timing control circuit described later.
20 and the secondary battery 220
A voltage dividing circuit 236 including a resistor 234 and a resistor 235 that cooperate to generate a detection target voltage VDET for detecting the voltage of the secondary battery 220 by dividing the voltage of the secondary battery 220, and controlling a timing control circuit described later. The analog / digital conversion of the detection target voltage VDET is performed below, and the detection target voltage data D
An analog / digital converter (ADC) 237 that generates and outputs VDET (16 bits), and a motor 238 that constitutes a vibrator as a first heavy load driving device
And an EL display 239 for displaying various information, which is a second heavy-load driving device, and a third heavy-load driving device, for allowing the user to input various information to the electronic timepiece 200.
And a bezel input device 240 for inputting various data by operating the bezel portion of the electronic device.

The electronic timepiece 200 further includes a motor drive request switch (SW) 241 for a user or a microprocessor for controlling the entire electronic timepiece (not shown) to request driving of the motor 238, and a user or the entirety of the electronic timepiece (not shown). Drive request switch (SW) 242 for the microprocessor controlling the operation of the EL display 239, and the microprocessor controlling the user or the entire electronic timepiece (not shown) for driving the bezel input device 240. When the bezel drive request switch (SW) 243, the motor drive request switch 241, the EL drive request switch 242, or the bezel drive request switch 243 is operated and drive is requested, the processing timing control for voltage detection and the like is performed. When to do A control circuit 244, a data latch 245 for receiving detection target voltage data DVDET output from the analog / digital converter 237 when the resistor 232 as a pseudo load is connected under the control of the timing control circuit 244, and a control of the timing control circuit 244. An address latch 246 for capturing detection target voltage data DVDET output from the analog / digital converter 237 when the resistor 232 serving as a pseudo load is not connected as lower address data of address data representing a memory area of a flash memory described later; Under the control of the timing control circuit 244, based on the lower address data output from the address latch 246 and the upper address data (3 bits) of the address data output from the heavy load selection circuit described later, the voltage data for determination stored in advance is determined. TL (16
And a comparator 248 that compares the detection target voltage data DVDET output from the data latch 245 with the determination data VTL output from the flash memory 247 and outputs comparison result data DRST. , Motor drive request switch 241, EL drive request switch 242, and bezel drive request switch 243, and comparison result data D
And a heavy load selection circuit 249 that outputs load selection data DLSEL (3 bits) for selecting a heavy load drive device that is actually driven based on the RST.

In this case, the timing control circuit 2
Reference numeral 44 denotes a timing at which the resistor 232, which is a pseudo load, is connected to the secondary battery 220, a timing at which data is latched by the data latch 245 and the address latch 246, a timing at which data is output from the flash memory 247, and a timing at which the transistor 233 is turned on. The conversion timing of the analog / digital converter 237 is controlled. It is preferable that the resistance value of the resistor 232, which is a pseudo load, be set to 1/10 or more with respect to the load (in terms of resistance value) of the heavy load driving device. Where 1
The reason for setting to / 10 or more is that if it is less than / 10, the voltage of the secondary battery cannot be accurately grasped. The upper limit is lower than the load of the corresponding heavy load drive device, and the load is reduced as much as possible.

[1.3] Configuration of Data Table in Flash Memory Here, prior to the description of the embodiment, the flash memory 2
The determination data VTL stored in 47 will be described in detail. The minimum operation voltage of the secondary battery 220 at the time of driving the load for operating the electronic timepiece 200 is V4, the resistance value of the resistor 232 as the pseudo load is RT, and the resistance conversion value of the heavy load as the driven part is RX. The internal resistance R of the secondary battery 220 that can be tolerated when the voltage V0 of the secondary battery 220 is not loaded (the load can be driven when the voltage is V0)
L is obtained by the following equation. It is apparent that more accurate control can be performed by determining not only the heavy load but also various loads required to drive the electronic timepiece system when determining the resistance conversion value RX. RL = RX × (V0−V4) / V4 Next, the voltage VTL of the secondary battery 220 when the resistor 232 as the pseudo load is connected is calculated from the internal resistance RL by the following equation. VTL = RT × (V0 / (RL + RT)) Therefore, when the internal resistance is RL, the voltage V at the time of driving the load is
If 1 is equal to or higher than the voltage VTL, the voltage of the secondary battery 220 does not fall below the minimum operation voltage V4, and no problem occurs even when the heavy load drive device is driven.

From these results, it can be seen that the secondary battery 2 under no load was
The voltage V0 of 20 is set as the lower address (16 bits) of the flash memory 247, the combination of the heavy load drive devices to be driven is set as the upper address (3 bits) of the flash memory 247, and the voltage VTL is written to the flash memory 247 as data. Becomes In this case, the voltage range of the secondary battery 220 is, for example, 4.1 to 4.1.
Assuming that the voltage is 3.0 [V], 5
Assuming that the battery voltage of the secondary battery 220 changes in the range of 2.5 to 2.5 [V], the voltage V0 of the secondary battery 220 at no load
From 5 [V] to 2.5 [V] in steps according to the resolution of the analog / digital converter 237,
The voltage VTL corresponding to each voltage V0 is calculated and stored in the table.

[1.4] Operation of First Embodiment In the initial state, it is assumed that the transistor 233 is off and the motor 238, the EL display 239, and the bezel input device 240 are not driven. First, the timing control circuit 244 determines whether there is a load drive request based on whether the motor drive request switch 241, the EL drive request switch 242, or the bezel drive request switch 243 has been operated (step S).
1). If it is determined in step S1 that none of the motor drive request switch 241, the EL drive request switch 242, and the bezel drive request switch 243 are operated (step S1; No), the timing control circuit 244 sets the standby state. Become.

In the determination in step S1, at least one of the motor drive request switch 241, the EL drive request switch 242, and the bezel drive request switch 243 is operated, and the corresponding motor 238, EL display 239, or bezel input device 240 is driven. When a request is made (step S1; Yes), the timing control circuit 244 sets the analog / digital converter 237 and the address latch 246 in an operating state, and generates the voltage by the voltage dividing circuit 236 including the resistors 234 and 235. The detection target voltage VDET corresponding to the voltage of the rechargeable battery 220 is taken into the address latch 246. In this case, if the amount of voltage change per unit time is out of a certain range after the heavy load drive device enters the non-drive state, the detection target voltage VDET corresponding to the voltage of the secondary battery 220 is not accurate. Since there is no data, the input is performed after waiting until the amount of voltage change per unit time falls within a certain range. For example, the voltage change per unit time is about 5 [mV / msec] or less, more preferably, the voltage change per unit time is about 0.5 [mV / msec].
V / msec].

As a result, the address latch 246 has
The detection target voltage VDET corresponding to the voltage of the secondary battery 220 at the time of no load is fetched and held as lower address data of the flash memory 247. Next, the timing control circuit 244 turns on the transistor 233 (step S3), and sets the resistor 232 as a pseudo load.
Is connected to the secondary battery 220. And the secondary battery 220
In order to stabilize the voltage, a predetermined time (100 in FIG.
[Msec]) Wait (step S4). In this case, the state in which the voltage of the secondary battery 220 is stable means that the amount of voltage change per unit time is within a predetermined fixed amount. For example, the amount of voltage change per unit time is about 5 [ mV / msec], more preferably, the voltage change per unit time is about 0.5 [mV / ms].
ec].

Then, the analog / digital converter 237 and the data latch 245 are set in the operating state,
The detection target voltage VDET corresponding to the voltage of the secondary battery 220 in the state where the resistor 232 as the pseudo load is connected is taken into the data latch 245 (step S5). As a result, the data latch 245 captures and holds the detection target voltage VDET corresponding to the voltage of the secondary battery 220 when the pseudo load is connected. Next, the timing control circuit 244 turns off the transistor 233 (step S6), and connects the resistor 232, which is a pseudo load, to the secondary battery 22.
Disconnect from 0. Thus, unnecessary power consumption of the secondary battery 220 due to the connection of the resistor 232 can be suppressed.

In parallel with the latch operation, the heavy load selection circuit 249 includes a motor drive request switch 241, an EL drive request switch 242, and a bezel drive request switch 2
The upper address data (three bits) of the address data is output to the flash memory 247 based on the operation state of 43. In the state where the lower address data from the address latch 246 and the upper address data from the heavy load selection circuit 249 are output to the flash memory 247 in this manner, the timing control circuit sets the output permission signal OE to the “H” level. And the voltage VT in the flash memory 247.
L is digital data (1) as discrimination data VTL.
(6 bits) is output to the comparator 248 (step S7).

The discrimination data VTL at this time includes a motor drive request switch 241 and an EL drive request switch 242.
In addition, it corresponds to the allowable minimum voltage of the secondary battery 220 according to the operation state of the bezel drive request switch 243. Subsequently, the comparator 248 sets the data latch 24
5 is compared with the determination data VTL output from the flash memory 247 (step S8), and the comparison result data DRST is output. Thus, the heavy load selection circuit 249 determines that the comparison result data DRST output from the comparator 248 is equal to or smaller than the detection target voltage data DVDET output from the data latch 245 and the discrimination data VTL output from the flash memory 247. (Step S8; N
o), the voltage of the secondary battery 220 becomes lower than the minimum drive voltage of the electronic timepiece 200 by driving the heavy load drive device corresponding to the operation state of the motor drive request switch 241, the EL drive request switch 242, and the bezel drive request switch 243. Therefore, the process ends without driving any of the motor 238, the EL display 239, and the bezel input device 240, which are heavy load driving devices.

The comparator 248 outputs the detection target voltage data DVDET output from the data latch 245.
Is higher than the discrimination data VTL output from the flash memory 247 (Step S8; Yes), the comparison result data DRST to be output goes to the “H” level (Step S9). A heavy load drive device corresponding to the operation state of the motor drive request switch 241, the EL drive request switch 242, and the bezel drive request switch 243 is selected (step S10).
The heavy load selection circuit 249 is for selecting a heavy load drive device to be actually driven based on the operation states of the motor drive request switch 241, the EL drive request switch 242, and the bezel drive request switch 243, and the comparison result data DRST. The load selection data DLSEL (3 bits) is output to the motor 238, the EL display 239, or the bezel input device 240. As a result, the heavy load drive device selected by the heavy load selection circuit 249 is driven (Step S11-A, Step S1).
1-B or step S11-C).

Then, the heavy load selecting circuit 249 determines whether the step S11-A, the step S11-B or the step S11-A
The drive period determined for each heavy load drive device driven in 11-C has elapsed, or the operation states of the motor drive request switch 241, the EL drive request switch 242, and the bezel drive request switch 243 are set to the non-drive state. It is determined whether or not it has been performed (step S12). Then, the drive period determined for each heavy load drive device has not elapsed, and the motor drive request switches 241 and E
When the operation state of the L drive request switch 242 or the bezel drive request switch 243 does not change and remains in the drive state (Step S12; No), the standby state is set. On the other hand, the drive period determined for each heavy load drive device has elapsed, or the motor drive request switch 241
When either the operation state of the EL drive request switch 242 or the operation state of the bezel drive request switch 243 shifts to the non-drive state (Step S12; Yes), the load selection is performed to shift the corresponding heavy load drive device to the stop state. The data DLSEL (3 bits) is output, the heavy load drive device is shifted to the stop state, and the process is terminated.

[1.5] Effects of the First Embodiment As described above, according to the present embodiment, even when a heavy load driving device (driven device) having a large power consumption is provided, it is complicated. It is possible to judge whether or not the electronic timepiece 200 can be driven at a high speed without performing a complicated operation, and it is possible to prevent a system down of the electronic timepiece 200 due to a voltage drop of the secondary battery due to the driving of the heavy load driving device.

[2] Second Embodiment Next, a second embodiment of the present invention will be described. [2.1] Electrical Configuration Since the schematic configurations of the station and the electronic timepiece of the second embodiment are the same as those of the first embodiment, the electrical configuration of the main part of the electronic timepiece will be described with reference to FIG. . 5, the same parts as those in FIG. 3 are denoted by the same reference numerals. The electronic timepiece 200 generates a constant voltage (2.5 [V] in the present embodiment) by receiving power from the secondary battery 220 that supplies power to the entire electronic timepiece 200, and will be described later. A regulator 231 for supplying a reference power to an analog / digital converter, a resistor 232 functioning as a dummy load, a transistor 233 for connecting the resistor 232 to the secondary battery 220 under the control of a timing control circuit described below, and a secondary battery. The detection target voltage V for detecting the voltage of the secondary battery 220 by dividing the voltage of the secondary battery 220
A voltage dividing circuit 236 composed of a resistor 234 and a resistor 235 that cooperate to generate DET, and performs analog / digital conversion of the detection target voltage VDET under the control of a timing control circuit described later to perform detection target voltage data DVDET (16 , An analog / digital converter (ADC) 237 that generates and outputs a bit, a motor 238 that forms a vibrator that is a first heavy load driving device, and a second heavy load driving device that is driven by an EL driver 239A. Display 23 for displaying various kinds of information
9, a bezel input device 240 that is a third heavy load drive device and that allows a user to input various data by operating a bezel unit of the electronic timepiece 200 with various information;
It is provided with.

In this case, it is assumed that drive power is supplied to the motor 238 directly from the secondary battery 220, and drive power is supplied to the EL display 239 and the bezel input device 240 via the regulator 231. The electronic timepiece 200 further includes a motor drive request switch (SW) for requesting the drive of the motor 238 by the user.
241, an EL drive request switch (SW) 242 for the user to request driving of the EL display 239;
A bezel drive request switch (SW) 243 for allowing the user to drive the bezel input device 240, and a microprocessor (MPU) 300 for controlling the entire electronic timepiece
An LCD panel 301 driven by an LCD driver 301A to display various information;
A discharge switch 302 functioning as a limiter switch for preventing overcharging of 0 is provided, and a diode 303 for regulating the current direction of the charging current is provided.

In this case, the microprocessor 3
00 is a first buffer 300A for holding data and a second buffer 300A
And a buffer 300B. The microprocessor 300 further includes a motor drive request switch 241, E
When the L drive request switch 242 or the bezel drive request switch 243 is operated and driving is requested, the function of the timing control circuit 244 for performing processing timing control for voltage detection and the like and the connection of the resistor 232 as a pseudo load The function of the data latch 245 for taking in the voltage data DVDET to be detected, which is sometimes output from the analog / digital converter 237, and the output from the analog / digital converter 237 when the resistor 232 which is a pseudo load is disconnected under the control of the timing control circuit 244. The detected detection target voltage data DVDET is stored in a flash memory 247 described later.
The function of the address latch 246 that takes in the lower address data of the address data representing the memory area of the memory area, the output target voltage data DVDET and the determination data VTL output from the flash memory 247 are compared, and the comparison result data DRST is output. Function of comparator 248, motor drive request switch 241, EL drive request switch 2
42 and load selection data DLS for selecting a heavy load drive device to be actually driven based on the operation state of the bezel drive request switch 243 and the comparison result data DRST.
The function of the heavy load selection circuit 249 that outputs EL (3 bits) is realized.

[2.2] Operation of Second Embodiment Next, the operation of the second embodiment will be described with reference to the operation processing flowchart of FIG. In the initial state, it is assumed that the transistor 233 is in the off state and the motor 23
8, EL display 239 and bezel input device 24
0 is in a non-driving state. First, the microprocessor 300 includes the motor drive request switch 241,
It is determined whether there is a load drive request based on whether the drive request switch 242 or the bezel drive request switch 243 has been operated (step S21). In the determination of step S1, the motor drive request switch 241, the EL drive request switch 242, and the bezel drive request switch 24
3 is not operated (step S2).
1; No), the timing control circuit 244 enters a standby state.

In step S21, it is determined whether the operation of the EL drive request switch 242 while the bezel input device 240 is driving or the operation of the bezel drive request switch 243 while the EL display 239 is driven is performed (step S22). ). In the determination in step S21,
EL drive request switch 2 while driving bezel input device 240
If the operation of the button 42 or the operation of the bezel drive request switch 243 during the driving of the EL display 239 has been performed (step S21; Yes), the process proceeds to step S25.

If it is determined in step S21 that neither the operation of the EL drive request switch 242 while the bezel input device 240 is driving nor the operation of the bezel drive request switch 243 while the EL display 239 is driven is performed (step S21). S21; No), it is determined whether or not a heavy load is being driven (for example, the motor 238 is being driven) (step S23). If it is determined in step S23 that heavy load driving is being performed (step S23; Yes),
The heavy load driving is stopped (Step S24), and the process proceeds to Step S25.

If it is determined in step S23 that the heavy load is not being driven (step S23; No), the voltage dividing circuit 236 composed of the resistors 234 and 235 is used.
The detection target voltage VDET corresponding to the voltage of the secondary battery 220 generated by the above is taken into the first buffer 300A (step S25). In this case, if the amount of voltage change per unit time after the heavy load drive device is in the non-drive state is outside a certain range, the secondary battery 220
Since the detection target voltage VDET corresponding to the above voltage is not accurate, it waits until the amount of voltage change per unit time falls within a certain range before taking in the voltage. For example, the voltage change per unit time is within about 5 [mV / msec], and more preferably, the voltage change per unit time is within about 0.5 [mV / msec].

As a result, the detection target voltage VDET corresponding to the voltage of the secondary battery 220 at the time of no load is taken into the first buffer 300A, and is held as the lower address data of the flash memory 247. Next, the microprocessor 300 turns on the transistor 233 (step S26), and sets the resistor 23 which is a pseudo load.
2 is connected to the secondary battery 220. And the secondary battery 22
In order to stabilize the voltage of 0, a predetermined time (100 in FIG.
[Msec]) Wait (step S27). In this case, the state in which the voltage of the secondary battery 220 is stable means that the amount of voltage change per unit time is within a predetermined fixed amount. For example, the amount of voltage change per unit time is about 5 [ mV / msec], more preferably
Voltage change per unit time is about 0.5 [mV / m
sec]. Then, the analog / digital converter 237 is set to the operating state, and the detection target voltage VDET corresponding to the voltage of the secondary battery 220 in the state where the resistor 232 as the pseudo load is connected is taken into the second buffer 300B (step S28).

As a result, the detection target voltage VDET corresponding to the voltage of the secondary battery 220 when the pseudo load is connected is captured and held in the second buffer 300B. Next, the microprocessor 300 turns off the transistor 233 (step S29), and disconnects the resistor 232, which is a pseudo load, from the secondary battery 220. Thus, unnecessary power consumption of the secondary battery 220 due to the connection of the resistor 232 can be suppressed. In parallel with the operation of the buffer, the microprocessor 300 stores upper address data (3 bits) of the address data in the flash memory based on the operation states of the motor drive request switch 241, the EL drive request switch 242, and the bezel drive request switch 243. 247.

In the state where the lower address data and the upper address data are output from the microprocessor 300 to the flash memory 247, the microprocessor 300 sets the output permission signal OE to the flash memory to the “H” level, and 247
The digital data (16
Bit) is output (step S30). The discrimination data VTL at this time is transmitted to the motor drive request switch 24.
1. This corresponds to the minimum allowable voltage of the secondary battery 220 according to the operation state of the EL drive request switch 242 and the bezel drive request switch 243. Subsequently, the microprocessor 300 compares the detection target voltage data DVDET of the second buffer 300B with the determination data VTL output from the flash memory 247 (step S31).
It is determined whether the voltage value corresponding to the determination data VTL is less than the voltage value corresponding to the detection target voltage data DVDET, that is, whether the determination data VTL <the detection target voltage data DVDET.

If the voltage data to be detected DVDET is equal to or smaller than the discrimination data VTL output from the flash memory 247 (step S31; No), the microprocessor 300 turns on the motor drive request switch 24.
1. The voltage of the secondary battery 220 is increased by driving the heavy load drive device corresponding to the operation state of the EL drive request switch 242 and the bezel drive request switch 243.
Therefore, the processing is terminated without driving any of the heavy load driving devices, the motor 238, the EL display 239, and the bezel input device 240. Then, the LCD display 301
A display prompting charging such as "Please charge" is displayed above. When such a display prompting for charging is made, the remaining capacity of the secondary battery 220 is low. Therefore, by placing the secondary battery 220 on the station 100, charging is performed via the main body and the coils 210 and 110 of the station. Done.

As a result of charging, when the voltage of the secondary battery 220 rises and exceeds a predetermined allowable charging voltage (for example, 4 [V] in the case of a lithium ion battery), the discharging switch 302 is turned on. Charging stops. The microprocessor 300 also detects the detection target voltage data DVDET.
Is larger than the determination data VTL output from the flash memory 247 (Step S8; Yes),
Since the voltage of the secondary battery 200 is sufficient for driving the selected heavy load, the selected heavy load is driven (step S32). Then, the microprocessor 300
Indicates that the drive period determined for each heavy load drive device driven in step S32 has elapsed, or that the motor drive request switch 241 and the EL drive request switch 2
It is determined whether the operation state of the switch 42 and the bezel drive request switch 243 has been set to the non-drive state (step S3).
3).

The microprocessor 300 determines that the drive period determined for each heavy load drive device has not elapsed, and that the motor drive request switch 241, the EL drive request switch 242, or the bezel drive request switch 2
If the operation state of 43 is not changed and is kept in the driving state (Step S33; No), the operation enters the standby state. On the other hand, the microprocessor 300 determines that the drive period determined for each heavy load drive device has elapsed, or that any of the operation states of the motor drive request switch 241, the EL drive request switch 242, or the bezel drive request switch 243 is not driven. If the state has been shifted (step S3
3; Yes), the heavy load driving device is shifted to the stop state in order to shift the corresponding heavy load driving device to the stop state, and the process ends (step S34).

[2.3] Effects of Second Embodiment As described above, according to the second embodiment, even when a heavy load driving device (driven device) having large power consumption is provided. In addition, it is possible to determine whether or not the electronic timepiece 200 can be driven at a high speed without performing a complicated operation, and to prevent a system down of the electronic timepiece 200 due to a voltage drop of the secondary battery due to the driving of the heavy load driving device. Furthermore, even when a load directly connected to the secondary battery and a load connected to the secondary battery via a regulator (voltage adjustment unit) are mixed,
The electronic timepiece 200 determines whether or not it can be driven simply and at high speed, and determines the voltage of the secondary battery due to the driving of the heavy load driving device.
The system will not go down.

[2.4] Modification of Second Embodiment The processing of steps S24 to S28 is automatically performed at predetermined intervals only when the heavy load (motor, bezel input device, EL display) is not driven. The latest A
If the output value of DC 237 is held, step S23
It is not necessary to stop the heavy load driving in the processing of (1).

[3] Third Embodiment Next, a third embodiment of the present invention will be described. [3.1] Electrical Configuration The schematic configurations of the station and the electronic timepiece of the third embodiment are the same as those of the first embodiment, and the electrical configuration of the main part of the electronic timepiece is described in the second embodiment (see FIG. 5). ), And a detailed description thereof will be omitted.

First, a specific method of creating data in the flash memory according to the situation will be described. As described above, in a situation where a load directly connected to the secondary battery 220 and a load connected to the regulator 231 coexist, or in a situation where loads having different operation lower limit voltages V4 coexist, a combined resistance value and a regulator The allowable battery internal resistance RL for each load is determined from the drop resistance value of
Is stored in the flash memory 247. Then, the no-load battery voltage V
The file number in the flash memory 247 is made to correspond to 0, and the voltage VTL at the time of each file number is set.
This is repeated for the file size to create a table.

Hereinafter, description will be made with reference to specific examples. now,
Set the following conditions. Battery voltage V0 = 3.5 [V] Regulator output = 2.5 [V] Regulator drop resistance REGd = 10 [Ω] Motor voltage V4 = 2 [V] EL display and bezel input device V4 = 2. 5
[V] Motor load resistance Rm0 = 100 [Ω] EL load resistance 200 [Ω] Bezel load resistance 1 [kΩ]

It is assumed that the motor, the bezel input device, and the EL display are simultaneously driven under the above conditions. In the following description, for the sake of simplicity, the secondary battery 2
20, only a motor 238 is connected as a load, and a regulator 231 has a bezel input device 240 and E
It is assumed that only the L display 239 is connected as a load. Actually, when there are a plurality of loads directly connected to the secondary battery 220 and driven at the same time, the combined resistance of the load resistances can be treated as one load connected to the battery. Similarly, the regulator 231
When there are a plurality of loads connected to the regulator and driven at the same time, the combined resistance of the load resistances can be treated as one load connected to the regulator.

Under the above conditions, the motor connected to the battery has a load of 100 [Ω], and the combined resistance Reb of the EL display 239 and the bezel input device 240 connected to the regulator 231 is 166 [Ω]. . Therefore, the secondary battery 2 required to drive the load from these
The internal resistance RL of 00 is obtained. The internal resistance RLMT required for driving the motor 238 is RLMT = (V0−V4) / ((V4 / Rm0) + (V4
/ (Reb + REGd))), and applying an actual value to this equation, RLMT = (3.5-2) / ((2/100) + (2 / (166 + 10))) = 50. 8 [Ω].

On the other hand, the E connected to the regulator 231
Internal resistance RLEL required to drive L display 239
RLEL = (V0− (V4 + REGd × V4 / Reb))
/ ((V4 / Reb) + ((V4 / Reb × REGd)
+ V4) / Rmo), and applying an actual value to this equation, RLEL = (3.5− (2.5 + 10 × 2.5 / 166)) / ((2.5 / 166) + ((2.5 / 166 × 10) +2.5) / 100) = 20.43 [Ω] Similarly, the internal resistance RBZ required for driving the bezel input device 240 is RLBZ = 20.43 [Ω]. Ω]. Therefore, the internal resistance RLEL (= RLBZ) having the smallest value among the internal resistances RLMT, RLEL, and RLBZ is stored as data in the flash memory. in this way,
Data corresponding to the drive state of the load is stored in the flash memory, and a table is selected according to the drive state of the load.

FIG. 7 shows the relationship between the drive table under heavy load and the address of the flash memory 247. The address of the flash memory 247 is represented by all 19 bits, the value of the upper three bits (the 18th bit, the 17th bit, and the 16th bit) represents the type of load to be driven, and the lower 16 bits (the The minimum voltage value of the secondary battery 220 capable of driving the load is stored in an area represented by the (15th bit to the 0th bit). That is, when the upper 3 bits = “000”, it indicates the address where the driving table data for driving the bezel input device 240 alone is stored. Also, upper 3 bits = “0”
"01" indicates an address at which driving table data is stored when the EL display 239 is driven independently.

Further, when the upper 3 bits = “010”, it indicates the address where the driving table data for driving the motor 238 alone is stored. When the upper 3 bits = “011”, it indicates the address where the drive table for simultaneously driving the bezel input device 240 and the EL display 239 is stored. Furthermore, when the upper 3 bits = “100”, it indicates the address where the drive table for driving the bezel input device 240 and the motor 238 at the same time is stored. If the upper 3 bits = “101”, the EL display 239 and the motor 23
8 represents an address at which a driving table is stored when driving the same at the same time.

Further, when the upper 3 bits = “110”, the bezel input device 240 and the EL display 23
9 shows an address where a drive table is stored when all of the motor 9 and the motor 238 are driven at the same time. Furthermore, the lower 16 bits correspond to the secondary battery 220 at no load.
(Corresponding to the voltage V0), for example, in the case of the present embodiment, the lower 16 bits “11111111”
In the case of “11111111” (= 65535), it corresponds to the voltage of the secondary battery 220 at no load = 5 [V], and the lower 16 bits “000000000000000000”
If (= 0), it corresponds to the voltage of the secondary battery 220 at no load = 0 [V].

More specifically, the bezel driving table data will be described. FIG. 8 shows an example of bezel driving table data. As shown in FIG. 8, the lower 16 bits “1111111111111111” (= 6553)
In the case of 5), the voltage of the secondary battery 220 at no load =
5V, and the flash memory data = 757. In order to drive the bezel input device 240, the secondary battery 2
The voltage (corresponding to the voltage VTL) of the secondary battery 220 when the pseudo load is connected when the internal resistance of the internal resistance 20 is the internal resistance upper limit is
3.3634 [V]. Similarly, the lower 16 bits “1111111111111110” (= 6553)
In the case of 4), the voltage of the secondary battery 220 at no load =
4.998 [V], and the flash memory data =
757, and the voltage (corresponding to the voltage VTL) of the secondary battery 220 when the pseudo load is connected when the internal resistance of the secondary battery 220 is the internal resistance upper limit value for driving the bezel input device 240 is 3.3634 [ V].

When the load directly connected to the secondary battery 220 and the load connected to the regulator 231 are simultaneously driven, and the voltage of the secondary battery is driven below the rated output voltage of the regulator 231. The method of creating data to be stored in the flash memory 247 is as follows. Here, the battery voltage at no load is V0, the battery voltage at pseudo load connection is V1, and the lower limit voltage at load operation is V4.
, The pseudo load resistance is RT, the resistance of the driven part using the battery as the power supply is Rmo, the resistance of the driven part using the regulator as the power supply is Reb, the rated output voltage of the regulator is REGout, and the power supply means is Let REGd be the resistance conversion value of the voltage drop amount, and let REGdd be the resistance conversion coefficient of the voltage drop amount of the power supply means when the power supply voltage falls below REGout.

In this case, the resistance value RL allowed as the upper limit value of the internal resistance of the battery is set to the driven parts Rmo, Reb
Is determined from the following equations. (1) Resistance RL1 RL1 = (V0−V4) / ((V4 / Rmo) + V4 Allowed When Driving the Driven Part Rmo
/ (Reb + REGd + (REGdd × (REGout
−V4)))) (2) Resistance RL2 RL2 = (V0− (V4 + V4 / Reb × (REGd +) allowed when driving the driven portion Reb)
REGdd × (REGout-V4)))) / ((V4
/ Reb) + (((V4 / Reb × (REGd + REG
dd × (REGout−V4))) + V4) / Rm
o))

Here, the resistances RL1 and RL2 are compared, and a smaller value is set as the internal resistance RL. Next, a voltage VTL when the pseudo load resistance RT is connected when the internal resistance is the internal resistance RL of the secondary battery is calculated by the following equation. VTL = RT × (V0 / (RL + RT)) In the above equation, the file number of the flash memory 247 is made to correspond to the no-load battery voltage V0, and the voltage VTL at each file number is used. This is repeated for the file size to create a table.

[3.2] Operation of Third Embodiment Next, the operation of the third embodiment will be described with reference to the operation processing flowchart of FIG. In the initial state, it is assumed that the transistor 233 is in the off state and the motor 23
8, EL display 239 and bezel input device 24
0 is in a non-driving state. First, the microprocessor 300 includes the motor drive request switch 241,
It is determined whether there is a load drive request based on whether the drive request switch 242 or the bezel drive request switch 243 has been operated (step S41). In the determination of step S41, the motor drive request switch 241, the EL drive request switch 242, and the bezel drive request switch 2
43 is not operated (step S
41; No), the timing control circuit 244 enters a standby state as it is.

In the determination in step S41, the motor,
If a load drive request is made for at least one of the EL panel and the bezel, a drive request flag for the corresponding load is set (turned on) (step S42). Subsequently, the microprocessor 300
The driving of the heavy load during driving is stopped (step S43).

The secondary battery 2 generated by the voltage dividing circuit 236 composed of the resistors 234 and 235
The detection target voltage VDET corresponding to the voltage No. 20 is taken into the first buffer 300A (step S44). In this case, if the amount of voltage change per unit time is out of a certain range after the heavy load drive device enters the non-drive state, the detection target voltage VDET corresponding to the voltage of the secondary battery 220 is not accurate. Since there is no data, the input is performed after waiting until the amount of voltage change per unit time falls within a certain range. For example, the amount of voltage change per unit time is about 5
[MV / msec], and more preferably, the voltage change per unit time is within about 0.5 [mV / msec].

As a result, the detection target voltage VDET corresponding to the voltage of the secondary battery 220 at the time of no load is taken into the first buffer 300A, and is held as the lower address data of the flash memory 247. Next, the microprocessor 300 turns on the transistor 233 and connects the resistor 232, which is a pseudo load, to the secondary battery 220 (Step S45). And the secondary battery 220
In order to stabilize the voltage, a predetermined time (100 in FIG.
[Msec]) Wait (step S46). In this case, the state in which the voltage of the secondary battery 220 is stable means that the amount of voltage change per unit time is within a predetermined fixed amount. For example, the amount of voltage change per unit time is about 5 [ mV / msec], more preferably
Voltage change per unit time is about 0.5 [mV / m
sec]. Then, the analog / digital converter 237 is set to the operating state, and the detection target voltage VDET corresponding to the voltage of the secondary battery 220 in the state where the resistor 232 as the pseudo load is connected is taken into the second buffer 300B (step S47).

As a result, the detection target voltage VDET corresponding to the voltage of the secondary battery 220 when the pseudo load is connected is captured and held in the second buffer 300B. Next, the microprocessor 300 turns off the transistor 233 (step S48), and disconnects the resistor 232, which is a pseudo load, from the secondary battery 220. This allows
Useless power consumption of the secondary battery 220 due to the connection of the resistor 232 can be suppressed. In parallel with the operation of the buffer, the microprocessor 300 stores upper address data (3 bits) of the address data in the flash memory based on the operation states of the motor drive request switch 241, the EL drive request switch 242, and the bezel drive request switch 243. 247.

With the low-order address data and the high-order address data being output from the microprocessor 300 to the flash memory 247 in this manner, the microprocessor 300 sets the output enable signal OE to the flash memory to the “H” level, 247
The digital data (16
) Is output (step S49). The discrimination data VTL at this time is transmitted to the motor drive request switch 24.
1. This corresponds to the minimum allowable voltage of the secondary battery 220 according to the operation state of the EL drive request switch 242 and the bezel drive request switch 243. Subsequently, the microprocessor 300 compares the detection target voltage data DVDET of the second buffer 300B with the determination data VTL output from the flash memory 247 (Step S50),
It is determined whether the voltage value corresponding to the determination data VTL is lower than the voltage value corresponding to the detection target voltage data DVDET, that is, whether the determination data VTL <the detection target voltage data DVDET.

Then, in the determination of step S50, the microprocessor 300 determines that the detection target voltage data DVDE
If T is equal to or less than the determination data VTL output from the flash memory 247 (step S50; N
o) Since the voltage of the secondary battery 220 becomes lower than the minimum drive voltage of the electronic timepiece 200 due to the driving of the heavy load drive device with the drive request flag set, any of the heavy loads with the drive request flag set. The process ends without driving. Then, a display prompting charging such as "Please charge" is displayed on the LCD display 301. If such a message prompting charging is displayed,
Since the remaining capacity of the secondary battery 220 is low, the battery is placed on the station 100 and charged via the main body and the coils 210 and 110 of the station.

As a result of charging, when the voltage of the secondary battery 220 rises and exceeds a predetermined allowable charging voltage (for example, 4 [V] for a lithium ion battery), the discharging switch 302 is turned on. Charging stops. The microprocessor 300 also detects the detection target voltage data DVDET.
Is larger than the determination data VTL output from the flash memory 247 (step S50; Ye).
s) Since the voltage of the secondary battery 200 is sufficient for driving the heavy load with the drive request flag set, the heavy load with the drive request flag set is driven (step S).
51). Subsequently, the microprocessor 300 determines whether the drive period determined for each heavy-load drive device driven in step S51 has elapsed or the operation state of the motor drive request switch 241, the EL drive request switch 242, and the bezel drive request switch 243. It is determined whether or not is set to the non-drive state (step S52).

The microprocessor 300 determines that the drive period determined for each heavy-load drive device has not elapsed, and that the motor drive request switch 241, the EL drive request switch 242, or the bezel drive request switch 2
If the operation state of the operation state 43 remains unchanged and remains in the driving state (step S52; No), the operation enters the standby state. On the other hand, the microprocessor 300 determines that the drive period determined for each heavy-load drive device has elapsed, or that any of the operation states of the motor drive request switch 241, the EL drive request switch 242, or the bezel drive request switch 243 is not driven. If the state has been shifted (step S5
2; Yes), in order to shift the corresponding heavy load drive device to the stop state, shift the heavy load drive device to the stop state (step S53), deactivate the corresponding drive request flag (turn off), and end the process. (Step S
54).

[3.3] Effects of Third Embodiment As described above, according to the third embodiment, even when a heavy load driving device (driven device) with large power consumption is provided. It is possible to determine whether or not the electronic timepiece 200 can be driven at a high speed without performing a complicated operation, and to prevent a system down of the electronic timepiece 200 due to a voltage drop of the secondary battery due to the driving of the heavy load driving device. Furthermore, even when a load directly connected to the secondary battery and a load connected to the secondary battery via a regulator (voltage adjustment unit) are mixed,
The electronic timepiece 200 determines whether or not it can be driven simply and at high speed, and determines the voltage of the secondary battery due to the driving of the heavy load driving device.
The system will not go down.

[4] Modifications of Embodiment [4.1] First Modification In the above description, a case where a secondary battery is used as a power source has been described. However, the present invention is also applicable to a case where a primary battery is used. Is possible. [4.2] Second Modification In the above description, the case where a heavy load is driven alone has been mainly described. However, when a plurality of driven parts (heavy load) are driven simultaneously, each Is regarded as a resistance, the combined resistance value of the resistance conversion values may be treated as the resistance conversion value of all the driven parts.

[4.3] Third Modification In the above description, the station 10 is used as a charging device.
0 has been described as an example of the electronic timepiece 200 as the device to be charged, but the present application is applicable to all electronic devices having a heavy load driving device with relatively large power consumption such as a flash memory. For example, it is equipped with a secondary battery such as a cordless phone, a mobile phone, a personal handy phone, a mobile personal computer, a PDA (Personal Digital Assistants), a flash memory, an EL (ElectroLuminescence) display, a vibration motor, a buzzer, and an LED. The present invention is applicable to a device to be charged having a driven device that consumes a large amount of power and a device to be charged.

[0099]

According to the present invention, even when a heavy load driving device (driven device) consuming a large amount of power is used, it is possible to judge whether or not the driving can be performed at a high speed without performing a complicated operation, and to perform the heavy load driving. The usability can be improved without causing a system down of the electronic device due to a voltage drop of the secondary battery due to the driving of the driving device.

[Brief description of the drawings]

FIG. 1 is a plan view showing a configuration of a station and an electronic timepiece according to an embodiment of the present invention.

FIG. 2 is a sectional view showing a configuration of a station and an electronic timepiece.

FIG. 3 is a block diagram illustrating an electrical configuration of the electronic timepiece according to the first embodiment.

FIG. 4 is an operation processing flowchart of the first embodiment.

FIG. 5 is a block diagram illustrating an electrical configuration of an electronic timepiece according to a second embodiment.

FIG. 6 is an operation processing flowchart of the second embodiment.

FIG. 7 is an explanatory diagram of a data storage state of the flash memory.

FIG. 8 is a specific explanatory diagram of data in a flash memory.

FIG. 9 is an operation processing flowchart of the third embodiment.

[Explanation of symbols]

100: Station (charging device) 110: Station side coil (first coil) 200: Electronic clock (device to be charged) 210: Clock side coil 220: Secondary battery 231 Regulator 232 Resistor 233 Transistor 234 235 Resistor 236 Voltage divider 237 Analog-to-digital converter (AD
C), 238 motor, 239 EL display, 240 bezel input device, 241 motor drive request switch (SW), 242 EL drive request switch (SW), 243 bezel drive request switch (SW), 244 timing control circuit, 245 data latch, 246 address latch, 247 flash memory, 248 comparator, 249 heavy load selection circuit, 300 microprocessor 300A: first buffer; 300B: second buffer; 301: LCD display; 301A: LCD driver.

Continuation of the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) G04G 1/00 315 H02J 7/00 302D H02J 7/00 302 G06F 1/00 333D (72) Inventor Motomu Hayakawa Suwa Nagano 3-5-5 Yamato-shi, Seiko Epson Corporation (72) Inventor Tsukasa Kosuda 3-5-5 Yamato, Suwa-shi, Nagano Inside Seiko-Epson Corporation (72) Katsuyuki Honda 3-chome, Yamato, Suwa-shi, Nagano No. 3-5 Seiko Epson Corporation F term (reference) 2F002 AA09 AB04 AB06 AC01 AC02 AD06 AD07 AE00 AE01 AE02 BA07 EA04 ED02 ED05 GA04 2F084 AA02 AA08 CC03 GG03 GG04 JJ07 JJ10 LL03 2G016 CC02 CC02 CC02 CC02 5B011 DA06 DB04 EA10 GG04 JA06 5G003 AA01 BA01 DA04 DA13 DA16 EA06 GA01 GB08 GC05

Claims (33)

[Claims] A power supply unit for supplying a drive power supply; a driven unit driven by the supply of the drive power supply; a pseudo load for discharging the power supply unit; and a pseudo load. A connection portion connected / disconnected to / from the power supply portion, and an upper limit value of an internal resistance of the power supply portion which can be allowed to drive the driven portion at a voltage of the drive power source when no load is applied is defined as an internal resistance upper limit value. A memory in which a voltage of the drive power supply when the pseudo load is connected to the power supply unit whose internal resistance value is the upper limit of the internal resistance and a voltage of the drive power supply at no load are stored in advance in association with each other. Unit, a voltage detection unit that detects a voltage of the power supply unit, a voltage of the drive power supply obtained when a pseudo load is connected to the power supply unit by the voltage detection unit, and the voltage detection unit from the storage unit. was detected A comparison that compares a voltage of the drive power supply when the pseudo load is connected to the power supply unit whose internal resistance value is the internal resistance upper limit value, which is read out corresponding to the voltage of the drive power supply at no load. A drive enable / disable determining unit that determines whether the driven unit can be driven based on a comparison result of the comparison unit and that drives the driven unit when the driven unit can be driven; An electronic device, comprising: 2. The electronic device according to claim 1, wherein the drive enable / disable determining unit determines whether a voltage of the drive power supply obtained when the pseudo load is connected to the power supply unit has an internal resistance value equal to the internal resistance upper limit. The electronic device, wherein the driven unit is driven when the voltage is equal to or higher than the voltage of the driving power supply when the pseudo load is connected to the power supply unit. 3. The electronic device according to claim 1, wherein the pseudo load is set to be smaller than a load of the driven unit and larger than a preset load. 4. The electronic device according to claim 3, wherein the preset load is set to 1/10 or more of a load of the driven part. 5. The electronic device according to claim 1, wherein the voltage detection unit connects the pseudo load when detecting a voltage of the driving power supply obtained when the pseudo load is connected to the power supply unit. The electronic apparatus according to claim 1, wherein the detection of the voltage is performed after a voltage change per unit time of the voltage of the drive power supply falls within a predetermined range. 6. The electronic device according to claim 5, wherein the predetermined range corresponding to the amount of voltage change per unit time is within 5 [mV / msec]. 7. The electronic device according to claim 5, wherein the predetermined range corresponding to the amount of voltage change per unit time is within 0.5 [mV / msec]. 8. The electronic device according to claim 1, wherein the voltage detection unit measures a voltage per unit time after the driven unit enters a non-driving state when measuring a voltage when the pseudo load is not connected. An electronic device, wherein a voltage is measured when a voltage change amount falls within a certain range. 9. The electronic device according to claim 8, wherein the voltage detection unit is used when the driven unit is driven last time when the voltage change amount does not fall within the predetermined range within a predetermined time. An electronic device, wherein the measured value is used as a voltage measured value. 10. The electronic device according to claim 8, wherein the voltage detection unit sets the voltage change amount within the predetermined range when the voltage change amount per unit time is within 5 [mV / msec]. An electronic device characterized by being settled. 11. The electronic device according to claim 8, wherein the voltage detection unit sets the voltage change amount to the predetermined range when the voltage change amount per unit time is within 0.5 [mV / msec]. An electronic device characterized by being housed within. 12. The electronic device according to claim 1, wherein the storage unit sets the lower limit voltage allowable in the power supply unit to V4 when the driven unit operates, sets the resistance value of the pseudo load to RT, and In the case where the resistance conversion value of the drive unit is RX, the internal resistance upper limit of the drive power supply that is allowable in the case of the voltage V0 of the drive power supply at no load is RL, and the internal resistance value is the internal resistance upper limit RL When the voltage of the drive power supply at the time of connection of the pseudo load is VTL,
The voltage VTL is calculated by the following equations (1) and (2) for each voltage V0.
An electronic device, wherein the voltage VTL is calculated by an equation and the voltage VTL calculated in association with the file number is stored. RL = RX × (V0−V4) / V4 (1) VTL = RT × (V0 / (RL + RT)) (2) 13. The electronic device according to claim 1, further comprising: a voltage adjusting unit that sets a supply voltage to a predetermined voltage, wherein the supply of the driving power to the driven unit is performed via the voltage adjusting unit; The storage unit is configured such that a lower limit voltage allowable in the power supply unit during operation of the driven unit is V4, a resistance value of the pseudo load is RT, and a voltage of the power supply unit when the pseudo load is connected is V1, The converted value of resistance of the driven part is RX, the upper limit of the internal resistance of the driving power supply that is allowable when the voltage V0 of the driving power supply at no load is RL, and the resistance conversion of the voltage drop amount of the voltage adjusting part is RL. When the internal resistance value is REGd and the internal resistance value is the internal resistance upper limit value RL, and the voltage of the driving power supply at the time of connecting the pseudo load is VTL, the voltage VTL is calculated for each of the voltages V0 by the following equation (1). ), (2) An electronic apparatus characterized to calculate, to store the voltage VTL calculated in association with the voltage V0 to the file number by. RL = RX × (V0−V4) / V4-REGd (1) VTL = RT × (V0 / (RL + RT)) (2) 14. The electronic device according to claim 1, further comprising: a voltage adjusting unit that adjusts a supply voltage to a predetermined specified voltage, wherein the drive power is supplied to the driven unit via the voltage adjusting unit. In this case, the driven unit can be driven at a voltage lower than the specified voltage, and the storage unit sets the lower limit voltage allowable in the power supply unit at the time of operation of the driven unit to V4, The resistance value of the load is RT, the voltage of the power supply unit when the pseudo load is connected is V1, the resistance conversion value of the driven unit is RX, and the voltage V0 of the drive power supply at no load is acceptable. The internal resistance upper limit of the drive power supply is RL, the rated output voltage of the voltage adjustment unit is REGout, the resistance conversion value of the voltage drop of the voltage adjustment unit is REGd, and the voltage of the power supply unit is the voltage adjustment unit. A resistance conversion coefficient of a voltage drop amount of the voltage adjustment unit when the output voltage is lower than the rated output voltage REGout is REGdd, and when the internal resistance value is the internal resistance upper limit value RL, the drive power supply when the pseudo load is connected. When the voltage is VTL, the voltage VTL is calculated by the following equations (1) and (2) for each of the voltages V0.
An electronic device, wherein the voltage VTL is calculated by an equation and the voltage VTL calculated in association with the file number is stored. RL = RX × (V0−V4) / V4-REGd−REGdd × (REGout−V4) (1) VTL = RT × (V0 / (RL + RT)) (2) 15. The electronic device according to claim 12, wherein the resistance conversion value RX in a case where a plurality of the driven parts are simultaneously driven, includes a plurality of the driven parts each having a resistance. An electronic device characterized by a combined resistance conversion value when regarded as. 16. The electronic device according to claim 1, wherein the electronic device includes a voltage adjustment unit that sets a supply voltage to a predetermined specified voltage, and the driven unit is configured such that the driving power supply is directly from the power supply unit. A first driven unit to be supplied, a second driven unit to which the driving power is supplied via the voltage adjusting unit,
In the electronic device, when the first driven unit and the second driven unit are simultaneously driven, the voltage of the driving power supply at no load is set to V0, and the voltage at the time of connecting a pseudo load is set. The voltage of the power supply unit is set to V1, the lower limit voltage allowable in the power supply unit when the driven unit operates is set to V4,
The resistance value of the pseudo load is RT, the converted resistance value of the first driven unit to be driven is Rmo, the converted resistance value of the second driven unit to be driven is Reb, and the voltage adjustment unit is The resistance conversion value of the voltage drop amount is REGd, the upper limit of the internal resistance of the power supply unit that is allowable in the case of the voltage V0 is RL. When the voltage of the drive power supply at the time of load connection is VTL, an internal resistance value RL1 of the power supply section allowed when the first driven section is driven is calculated by equation (1), and RL1 = ( V0−V4) / ((V4 / Rmo) + (V4 / (Reb + REGd))) (1) The internal resistance RL2 of the power supply unit allowed when the second driven unit is driven is set to (2 R) 2 = (V0− (V4 + (V4 / Reb × REGd))) / ((V4 / Reb) + (((V4 / Reb × REGd) + V4) / Rmo)) (2) The internal resistance value RL1 or The smaller one of the internal resistance values RL2 is defined as the internal resistance upper limit value RL. The voltage VTL is calculated for each of the voltages V0 by the equation (3), and the voltage V0 is calculated in association with the file number. An electronic device, wherein the voltage VTL is stored in the storage unit. VTL = RT × (V0 / (RL + RT)) (3) 17. The electronic device according to claim 1, wherein the electronic device changes a supply voltage to a predetermined specified voltage REGout.
A first driven unit to which the driving power is supplied directly from the power supply unit, and a second to which the driving power is supplied via the voltage adjusting unit. A driven unit, wherein the first driving unit and the second driving unit are driven simultaneously, and the second driven unit is drivable at a voltage lower than the specified voltage. The voltage of the drive power supply at the time of no load is set to V0, the voltage of the power supply unit at the time of connection of a pseudo load is set to V1, the lower limit voltage allowable at the power supply unit at the time of operation of the driven unit is set to V4, The resistance value of the load is RT, the converted resistance value of the first driven unit to be driven is Rmo, the converted resistance value of the second driven unit to be driven is Reb, and the voltage of the voltage adjustment unit is REG is the resistance conversion value of the amount of descent
d, the allowable upper limit of the internal resistance of the power supply unit which is allowable in the case of the voltage V0 is RL, and the resistance conversion coefficient of the voltage drop amount of the voltage adjustment unit when the voltage of the drive power supply falls below the specified voltage REGout is REGdd, when the internal resistance of the power supply unit is the internal resistance upper limit value RL, when the voltage of the driving power supply at the time of connecting the pseudo load is VTL, and when driving the first driven unit, RL1 = (V0−V4) / ((V4 / Rmo) + V4 / (Reb + REGd + (REGdd × (REGout−V4))))) (1) The internal resistance RL2 of the power supply unit allowed when the second driven unit is driven is calculated by the equation (2), and RL2 = (V0− (V4 + (V4 / Reb × ( EGd + REGdd × (REGout-V4))))) / ((V4 / Reb) + ((((V4 / Reb × (REGd + REGdd × (REGout-V4))) + V4) / Rmo))... (2) Internal The smaller one of the resistance value RL1 and the internal resistance value RL2 is defined as the internal resistance upper limit value RL. The voltage VTL is calculated for each of the voltages V0 by the equation (3), and the voltage V0 corresponds to the file number. An electronic device, wherein the calculated voltage VTL is stored in the storage unit. VTL = RT × (V0 / (RL + RT)) (3) 18. The electronic device according to claim 12, wherein the storage unit sets the voltage V0 of the driving source under no load as a lower address and sets a driving request state of the driven unit. An electronic device, wherein the voltage VTL is stored as data in a storage area having an upper address. 19. A power supply unit for supplying drive power,
A driven section driven by the supply of the driving power, a pseudo load for discharging the power supply section, a connection section for connecting / disconnecting the pseudo load to / from the power supply section, and a no-load Sometimes the upper limit value of the internal resistance of the power supply unit allowable to drive the driven unit at the voltage of the drive power supply is defined as the internal resistance upper limit value, and the internal resistance value is the internal resistance upper limit value. A storage unit that stores in advance the voltage of the drive power supply when a pseudo load is connected, and the drive power supply voltage when there is no load, and a voltage detection unit that detects the voltage of the power supply unit. In the method for controlling an electronic device, the voltage of the driving power supply obtained when a pseudo load is connected to the power supply unit by the voltage detection unit, and the voltage at the time of no load detected by the voltage detection unit from the storage unit. Previous The voltage of the drive power supply when the pseudo load is connected to the power supply unit whose internal resistance value is the internal resistance upper limit read out in correspondence with the voltage of the drive power supply is compared with the comparison result. Determining whether or not the driven unit can be driven based on the driving unit, and if the driven unit can be driven, driving the driven unit. 20. The method for controlling an electronic device according to claim 19, wherein when detecting a voltage of the drive power supply obtained when a pseudo load is connected to the power supply unit, the pseudo load is connected, A method for controlling an electronic device, comprising: detecting a voltage after a voltage change amount per unit time of a voltage of a driving power supply falls within a predetermined range. 21. The electronic device control method according to claim 20, wherein the predetermined range corresponding to the amount of voltage change per unit time is within 5 [mV / msec]. Control method. 22. The electronic device control method according to claim 20, wherein the predetermined range corresponding to the amount of voltage change per unit time is within 0.5 [mV / msec]. How to control equipment. 23. The method of controlling an electronic device according to claim 19, wherein when measuring the voltage when the pseudo load is not connected, the amount of voltage change per unit time after the driven portion enters the non-drive state. A method for controlling an electronic device, comprising: measuring a voltage when a value falls within a certain range. 24. The control method for an electronic device according to claim 23, wherein, if the voltage change amount does not fall within the predetermined range within a predetermined time, a measured value used last time when the driven unit was driven. A method for controlling an electronic device, wherein the method is used as a voltage measurement value. 25. The control method for an electronic device according to claim 23, wherein the amount of voltage change per unit time is 5 mV / msec.
c], it is determined that the voltage change amount falls within the certain range if it is within the range of [c]. 26. The electronic device control method according to claim 23, wherein the voltage change per unit time is 0.5 [mV / ms].
ec], the voltage change amount falls within the certain range. 27. The control method of an electronic device according to claim 19, wherein a lower limit voltage allowable in the power supply unit during operation of the driven unit is V4, a resistance value of the pseudo load is RT, and the driven unit is Is the resistance conversion value of RX, the internal resistance upper limit of the drive power supply that is allowable in the case of the voltage V0 of the drive power supply under no load is RL, and the internal resistance value is the internal resistance upper limit value RL. When the voltage of the drive power supply when a pseudo load is connected is VTL, the voltage VTL is calculated by the following equations (1) and (2) for each of the voltages V0.
A method of controlling an electronic device, wherein the voltage VTL is calculated by an equation and the voltage VTL calculated in association with a file number is stored in the storage unit. RL = RX × (V0−V4) / V4 (1) VTL = RT × (V0 / (RL + RT)) (2) 28. The method for controlling an electronic device according to claim 19, wherein the electronic device includes a voltage adjusting unit configured to supply the driving power to the driven unit with a supply voltage being a predetermined voltage. The lower limit voltage allowable in the power supply unit during operation of the unit is V4, the resistance value of the pseudo load is RT, the voltage of the power supply unit when the pseudo load is connected is V1, and the resistance conversion value of the driven unit is RX, the upper limit of the internal resistance of the drive power supply that is allowable when the voltage V0 of the drive power supply at no load is RL, the resistance conversion value of the voltage drop amount of the voltage adjustment unit is REGd, and the internal resistance value is When the internal resistance upper limit value is RL and the voltage of the drive power supply at the time of connecting the pseudo load is VTL, the voltage VTL is calculated for each of the voltages V0 by the following equations (1) and (2). Do Both control method of an electronic device, characterized in that to store the voltage VTL calculated in association with the voltage V0 to the file number in the storage unit. RL = RX × (V0−V4) / V4-REGd (1) VTL = RT × (V0 / (RL + RT)) (2) 29. The control method for an electronic device according to claim 19, wherein the electronic device includes a voltage adjusting unit configured to supply the drive power to the driven unit by setting a supply voltage to a predetermined specified voltage. The driven unit can be driven at a voltage less than the specified voltage, and the lower limit voltage allowable in the power supply unit during the operation of the driven unit is V4, the resistance value of the pseudo load is RT, The voltage of the power supply section when the pseudo load is connected is V1, the resistance conversion value of the driven section is RX, and the upper limit of the internal resistance of the drive power supply that is allowable in the case of the voltage V0 of the drive power supply at no load RL, the rated output voltage of the voltage adjustment unit is REGout, the resistance conversion value of the voltage drop of the voltage adjustment unit is REGd, and the voltage of the power supply unit is the rated output voltage REG of the voltage adjustment unit.
If the internal resistance value is the internal resistance upper limit value RL, the voltage of the drive power supply when the pseudo load is connected is VTL. In this case, the voltage VTL is calculated by the following equations (1) and (2) for each of the voltages V0.
A method of controlling an electronic device, wherein the voltage VTL is calculated by an equation and the voltage VTL calculated in association with a file number is stored in the storage unit. RL = RX × (V0−V4) / V4-REGd−REGdd × (REGout−V4) (1) VTL = RT × (V0 / (RL + RT)) (2) 30. The electronic device control method according to claim 27, wherein the resistance conversion value RX when simultaneously driving a plurality of the driven units is a plurality of the driven units. Wherein each is a combined resistance conversion value when each is regarded as a resistance. 31. The control method of an electronic device according to claim 19, wherein the electronic device includes a voltage adjusting unit that adjusts a supply voltage to a predetermined specified voltage, and the driven unit is configured such that the driving power source is the power source. A first driven unit supplied directly from the unit, a second driven unit supplied with the driving power via the voltage adjustment unit,
In the electronic device, when the first driven unit and the second driven unit are simultaneously driven, the voltage of the driving power supply at no load is set to V0, and the voltage at the time of connecting a pseudo load is set. The voltage of the power supply unit is set to V1, the lower limit voltage allowable in the power supply unit when the driven unit operates is set to V4,
The resistance value of the pseudo load is RT, the converted resistance value of the first driven unit to be driven is Rmo, the converted resistance value of the second driven unit to be driven is Reb, and the voltage adjustment unit is REGd, the internal resistance upper limit of the power supply unit that is allowable in the case of the voltage V0 is RL, and when the internal resistance of the power supply unit is the internal resistance upper limit RL, the pseudo value When the voltage of the drive power supply when a load is connected is VTL, an internal resistance value RL1 of the power supply unit allowed when the first driven unit is driven is calculated by equation (1). = (V0−V4) / ((V4 / Rmo) + (V4 / (Reb + REGd))) (1) The internal resistance RL2 of the power supply unit allowed when the second driven unit is driven is defined as Calculated by formula (2) RL2 = (V0− (V4 + (V4 / Reb × REGd))) / ((V4 / Reb) + (((V4 / Reb × REGd) + V4) / Rmo)) (2) Internal resistance value The smaller one of RL1 and the internal resistance value RL2 is defined as the internal resistance upper limit value RL. The voltage VTL is calculated for each of the voltages V0 by the equation (3), and the voltage V0 is associated with a file number. A method for controlling an electronic device, wherein the calculated voltage VTL is stored in the storage unit. VTL = RT × (V0 / (RL + RT)) (3) 32. The control method of an electronic device according to claim 19, wherein the electronic device has a voltage adjusting unit that sets a supply voltage to a predetermined specified voltage REGout, and the driven unit is configured such that the driving power supply is The first supplied directly from the power supply
A driven part, and a second driven part to which the driving power is supplied via the voltage adjusting part, wherein the first driving part and the second driving part are simultaneously driven; and A case where the second driven unit is drivable at a voltage less than the specified voltage, the voltage of the drive power supply at no load is V0, the voltage of the power supply unit at the time of connecting a pseudo load is V1, The lower limit voltage allowable in the power supply unit during the operation of the driven unit is V4, the resistance value of the pseudo load is RT,
The resistance conversion value of the first driven portion to be driven is Rm
o, the resistance conversion value of the second driven unit to be driven is Reb, the resistance conversion value of the voltage drop amount of the voltage adjustment unit is REGd, and the internal resistance of the power supply unit that can be tolerated when the voltage is V0. An upper limit value is RL, a resistance conversion coefficient of a voltage drop amount of the voltage regulator when the voltage of the drive power supply falls below the specified voltage REGout is REGdd, and an internal resistance of the power supply unit is the internal resistance upper limit value RL. When the voltage of the drive power supply at the time of connection of the pseudo load is VTL, the internal resistance RL1 of the power supply unit allowed when driving the first driven unit is set to (1).
RL1 = (V0−V4) / ((V4 / Rmo) + V4 / (Reb + REGd + (REGdd × (REGout−V4)))) (1) When driving the second driven portion RL2 = (V0− (V4 + (V4 / Reb × (REGd + REGdd × (REGout-V4))))) / ((V4) / Reb) + (((V4 / Reb × (REGd + REGdd × (REGout−V4))) + V4) / Rmo)) (2) The smaller of the internal resistance RL1 and the internal resistance RL2 The internal resistance upper limit value RL, the voltage VTL is calculated for each of the voltages V0 by equation (3), and the voltage V0 is calculated in association with a file number. The method of an electronic device and to store the VTL in the storage unit. VTL = RT × (V0 / (RL + RT)) (3) 33. The control method for an electronic device according to claim 27, wherein the voltage V0 of the drive source at the time of no load is set as a lower address,
A method for controlling an electronic device, comprising: storing the voltage VTL as data in a storage area of the storage unit in which a drive request state of a driven unit is an upper address.