JP2002111220A - Multilayered wiring board and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the thickness fluctuation of the capacitor section of a high dielectric glass ceramic layer in a multilayered wiring board composed of the high dielectric glass ceramic layer and low dielectric glass ceramic layer and incorporating a capacitor. SOLUTION: The multilayered wiring board is provided with a ceramic insulating substrate 1 constituted by laminating insulating layers 1a-1c upon another, and wiring circuit layers 2 formed on and/or in the substrate 1. The insulating layers 1a and 1c constituting the substrate 1 have low dielectric constants, and the insulating layer 1b also constituting the substrate 1 has a high dielectric constant. In addition, electrodes 3 are respectively provided in the interfaces between the high dielectric layer 1b and low dielectric layers 1a and 1c. The thicknesses 5a of the electrodes 3 on the sides of the low dielectric layers 1a and 1c are made larger than those 5b of the electrodes 3 on the side of the high dielectric layer 1b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer wiring board having a built-in capacitor, in which variation in capacitance of the capacitor is reduced, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, a multilayer wiring board has a structure in which a wiring circuit layer is disposed on the surface or inside of an insulating substrate in which insulating layers are stacked in multiple layers. Package. As such a package, a package in which an insulating layer is made of a ceramic such as alumina is frequently used, and more recently, a package in which a glass ceramic sintered body capable of co-firing with copper metallization is used as an insulating substrate has been put into practical use. I have.

[0003] Glass ceramics include a glass component or a mixture of a glass component and an inorganic filler component.
It is produced by molding and baking, and by selecting an inorganic filler component, it is possible to finely control physical properties such as a dielectric constant and a thermal expansion coefficient.

On the other hand, with the rapid spread of portable information terminals such as portable electronic devices and notebook personal computers, there is a strong demand for miniaturization of built-in electronic components. As an example, a switching circuit and a power amplifier circuit of a mobile phone are composed of a plurality of resistors and capacitors. Conventionally, these elements are individually mounted on an electric circuit board, thereby reducing the size and manufacturing cost. Was hindered. Therefore,
There has been proposed a ceramic wiring board in which a high dielectric constant layer is provided between low dielectric constant layers and a capacitor formed by the high dielectric constant layer is incorporated. By using a multilayer wiring board with a built-in capacitor, the number of capacitors mounted on an external circuit board can be reduced, and the entire circuit board can be downsized.

[0005]

However, conventional capacitors individually mounted on an external circuit board have a small characteristic variation because the capacitance of each element can be adjusted. Even if a capacitor with similar precision is built in the substrate, it is difficult to form a highly accurate capacitor with large variations in capacitance.

The causes of the variation in capacitance of the capacitor built in the wiring board include variations in the dielectric constant of the high dielectric layer, variations in the thickness of the high dielectric layer, and variations in the electrode area forming the capacitor.

[0007] Among them, the variation in the dielectric constant depends on the precision of the preparation of the raw material for the high dielectric constant layer, and the variation in the electrode area depends on the printing accuracy of the electrode on the green sheet and the firing conditions which affect the shrinkage during firing. Depends on the accuracy of Further, the thickness variation of the high dielectric constant layer depends on the accuracy of the green sheet thickness at the time of molding at the green sheet stage, and one of them depends on the accuracy of the molding equipment. It is considered that the variation in capacitance can be eliminated by increasing the accuracy.

However, it has been found that even if all of these factors are eliminated, variations in capacitance still occur. As a result of examining the factors, it was found that when the green sheets of the high dielectric constant layer and the low dielectric constant layer were laminated and integrated, the thickness of the high dielectric constant layer varied depending on the position of the electrode. .

According to the present invention, there is provided a multilayer wiring board having a built-in capacitor in which the variation in capacitance is reduced by reducing the variation in the thickness of the high dielectric constant layer caused by the variation in the positions of the electrodes as described above, and manufacturing the same. It is intended to provide a method.

[0010]

Means for Solving the Problems The present inventors have made various studies on the above problems, and as a result, have found that a ceramic insulating substrate having a plurality of insulating layers laminated thereon, and a surface and / or a surface of the insulating substrate. In a multilayer wiring board having a wiring circuit layer formed therein, the insulating substrate is formed of a laminate of a low dielectric constant layer and a high dielectric constant layer, and both of the high dielectric constant layer and the low dielectric constant layer. An electrode is provided at each interface, and the thickness of a portion of the electrode located on the low dielectric layer side is made larger than the thickness of a portion located on the high dielectric layer side, thereby achieving the above object. Was found to be achieved.

The maximum required value of the capacity of the built-in capacitor is about 40 pF, and the electrode area of the capacitor is:
Since it is desirably 4 mm ² or less, the relative dielectric constant of the high dielectric layer forming the capacitor at 3.2 GHz is 14 mm ^2.
~ 24 is desirable. Incidentally, by setting the thickness of the high dielectric constant layer to 20 to 70 μm, an arbitrary capacitance of 40 pF or less can be set.

Further, the wiring circuit layer and the electrode may be:
By containing at least one metal selected from the group consisting of Cu, Al, and Ag, the impedance of the capacitor unit can be reduced.

The electrode has a thickness t1 of 8 to 30 μm.
And the thickness t1 of the high dielectric layer of the thickness t1 of the electrode
The ratio (t1 / t2) to 2 is preferably 0.02 to 0.2 in order to suppress the influence of variations in electrode thickness.

As a method of manufacturing such a multilayer wiring board,
Forming a low dielectric constant green sheet and a high dielectric constant green sheet; and applying a conductive paste to the low dielectric constant green sheet and / or the high dielectric constant green sheet to form a wiring circuit layer and an electrode. Depositing, laminating the low-permittivity green sheet and the high-permittivity green sheet such that the high-permittivity green sheet is sandwiched between the electrodes, and firing the laminate. And wherein the initial elastic modulus of the high dielectric constant green sheet is greater than the initial elastic modulus of the low dielectric constant green sheet.

By setting the initial elastic modulus of the high-permittivity green sheet larger than the initial elastic modulus of the low-permittivity green sheet, the high-permittivity green sheet, the low-permittivity green sheet, and the electrode are sandwiched. In the case of pressure bonding, the electrodes existing at the interface between the high dielectric constant layer and the low dielectric constant layer can be formed so as to be unevenly distributed on the low dielectric constant layer side. The thickness variation of the internal electrode and the pressure variation at the time of lamination are absorbed by the low dielectric constant green sheet, and the thickness variation of the high dielectric constant layer of the capacitor portion can be reduced, so that the capacitance variation can be reduced. .

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS As shown in FIG. 1 which is a schematic sectional view showing an example of a multilayer wiring board with a built-in capacitor according to the present invention,
According to this multilayer wiring board, the insulating substrate 1 is formed of a structure in which ceramic insulating layers 1a, 1b, and 1c are stacked in multiple layers, and a wiring circuit layer 2 is provided on the surface and / or inside of the insulating substrate 1. ing. In the insulating substrate 1, the ceramic insulating layer 1b is formed by a high dielectric constant layer, the ceramic insulating layers 1a and 1c are formed by low dielectric constant layers, and the low dielectric constant layers 1a and 1c of the high dielectric constant layer 1b are formed. The electrodes 3 and 3 are formed at the interface of to form a capacitor portion. Further, the electrode 3 is connected to the wiring circuit layer 2 on the surface of the wiring board via a through-hole conductor 4 formed in the insulating substrate 1 and the like, thereby providing a predetermined capacitance between the wiring layers 2-2. Can be taken out.

According to the present invention, as shown in an enlarged sectional view of a main part of the capacitor part in FIG.
The feature is that the thickness 5a of the portion located on the 1c side is larger than the thickness 5b of the portion located on the high dielectric layer 1b side. As described above, by setting 5a> 5b, the variation in the thickness of the electrode is absorbed by the low dielectric constant layer, thereby reducing the variation in the capacitance generated from the high dielectric layer 1b sandwiched between the electrodes 3,3. be able to. In particular, it is desirable that the ratio of 5b / (5a + 5b) be less than 0.5, especially 0.4 or less, 0.3 or less, and further 0.2 or less.

The maximum required value of the capacity of the built-in capacitor is about 40 pF, and the electrode area of the capacitor is:
Since it is desirably 4 mm ² or less, the relative dielectric constant of the high dielectric layer forming the capacitor at 3.2 GHz is 14 mm ^2.
-24, especially 16-20. This means that when the relative dielectric constant is lower than 14, it is necessary to make the high dielectric constant layer 20 μm or less in order to increase the capacitance,
This is because it is difficult to form a green sheet. on the other hand,
When the relative permittivity is higher than 24, in order to lower the capacity,
This is because the thickness variation of the green sheet increases as the thickness of the high dielectric constant layer increases, and the influence of the printing variation of the electrodes tends to increase as the electrode size decreases.

The thickness of the high dielectric constant layer is 20 to 70 μm.
By doing so, it is possible to set an arbitrary capacitance of 40 pF or less, and desirably, by setting the capacitance to 50 μm or less, capacitance variation is reduced.

The electrode 3 has a thickness t1 of 8 to 30 μm.
It is desirable that If the thickness is less than 8 μm, it is difficult to form a uniform electrode, and as a result, poor conduction tends to occur, and if the thickness is more than 30 μm, the problem that the thickness variation becomes large tends to occur.

Further, the high dielectric layer 1 having a thickness t1 of the electrode 3
The ratio (t1 / t2) of b to the thickness t2 is 0.02 to
0.2 is desirable. This means that this ratio is 0.2
If it is larger than this, the thickness variation of the high dielectric constant layer due to electrode variation tends to increase. Also, 0.
This is because it is difficult to form an electrode with an electrode number less than 02, and poor conduction is likely to occur.

Each of the ceramic insulating layers 1a, 1b, 1c constituting the insulating substrate 1 is formed of a ceramic which can be fired at a low temperature of 1050 ° C. or less, so that the wiring circuit layer 2 and the electrodes 3 are made of Cu, Al , Ag, it is desirable to contain at least one low-resistance metal having an electrical resistivity of 8 μΩ · cm or less. By forming an electrode with such a low-resistance metal, the impedance of the capacitor unit can be reduced.

(Glass Ceramics) As the low-temperature fired ceramics for forming such a ceramic insulating layer, a so-called glass ceramic sintered body made of glass or a mixture of glass and filler is particularly suitable.

This glass ceramic sintered body is composed of a glass component and an inorganic filler component. First, as the glass component, known high thermal expansion glass can be used,
For example, lithium silicate glass, PbO glass, BaO
System glass, ZnO system glass, or the like can be used.

As the lithium silicate glass, Li ₂ O
Is contained in a proportion of 5 to 30% by weight, particularly 5 to 20% by weight, and a substance which precipitates lithium silicic acid having a high thermal expansion coefficient after firing is suitably used. The lithium silicate glass contains SiO ₂ as an essential component in addition to Li ₂ O. However, SiO ₂ accounts for 60% of the total amount of the glass.
Present in a proportion of 85% by weight, in the total amount of SiO ₂ and Li ₂ O is a glass total amount, it is desirable for precipitating lithium silicate crystals is 65 to 95 wt%.

In addition to these components, Al ₂ O ₃ , M
_{gO, TiO 2, B 2 O} 3, Na 2 O, K 2 O, P 2 O 5, Z
nO, F, etc. may be blended. In the lithium silicate glass, B ₂ O ₃ is desirably 1% by weight or less.

The PbO-based glass contains PbO as a main component and further contains at least one of B ₂ O ₃ and SiO ₂ , and after firing, PbSiO ₃ , PbZ
Those that precipitate a crystal phase having a high thermal expansion such as nSiO ₄ are preferably used. Especially PbO (65-85% by weight)
-B ₂ O ₃ (5~15 wt%) - ZnO (6~20 wt%) - SiO ₂ (0.5~5 wt%) - BaO (0~5
Wt%) or PbO (50-60%).
Wt%) - SiO ₂ (35~50 wt%) - Al ₂ O
₃ (1 to 9% by weight) is preferred.

Further, ZnO-based glass includes ZnO-based glass.
At least 10% by weight of ZnO after firing.
A material in which a crystal phase having a high thermal expansion is precipitated, such as Al ₂ O ₃ or ZnO · nB ₂ O _3, is preferably used. In addition to the ZnO component, SiO ₂ (60% by weight or less), Al ₂ O ₃ (60% by weight or less), B ₂ O ₃ (30% by weight or less), P ₂ O ₅ (50% by weight or less), alkaline earth Oxides (20% by weight or less),
Bi ₂ O ₃ (30% by weight or less) or the like may be blended. Especially ZnO: 10 to 50 wt% -Al ₂ O _3: 1
0-30 wt% -SiO _2: 30 to 60 crystalline glass or ZnO consisting wt%: 10-50 wt% -SiO _2:
5 to 40 wt% -Al ₂ O _3: 0~15 wt% -BaO:
A crystalline glass composed of 0 to 60% by weight-MgO: 0 to 35% by weight is desirable.

The BaO-based glass contains at least 5% by weight of BaO, is an amorphous glass, or has a BaO.
Crystallized glass that precipitates a crystal phase such as 2SiO ₂ , BaAl ₂ Si ₂ O ₈ , BaB ₂ Si ₂ O ₈ is employed. BaO
SiO _2, Al ₂ O ₃ with the components other than, B ₂ O _3, P
₂ O ₅ , alkaline earth metal oxide, alkali metal oxide,
ZrO ₂ or the like may be included. In particular, the SiO _{2 2}
5-60% by weight, 5-60% by weight of BaO, and Zr
The compound is one containing a proportion of 0.1 to 30 wt% in terms of ZrO ₂ is preferably used.

Further, the yield point of the above glass is 400 to 400.
The temperature is desirably 800 ° C, particularly 400 to 700 ° C. This is because when molding a mixture consisting of glass and filler, a molding binder such as an organic resin is added, but this binder is efficiently removed, and the matching of the metallization and the firing conditions that are fired simultaneously with the insulating substrate is performed. If the yield point is lower than 400 ° C., the glass starts sintering at a low temperature. For example, simultaneous sintering with metallization at a sintering temperature of 600 to 800 ° C. for Ag, Cu, etc. This is because the binder cannot be decomposed and volatilized because densification of the molded body starts at a low temperature, and the binder component remains to affect the properties. On the other hand, if the yield point is higher than 800 ° C,
If the amount of glass is not increased, sintering becomes difficult, and the amount of relatively expensive glass used increases, which hinders cost reduction.

On the other hand, the high dielectric constant layer and the low dielectric constant layer constituting the multilayer wiring board with a built-in capacitor according to the present invention can be adjusted to a predetermined dielectric constant by selecting an inorganic filler component. The filler used is not limited to this, but for example, BaTiO ₃ (ε = 13000) CaTiO ₃ (ε = 180) La ₂ Ti ₂ O ₇ (ε = 45) SrTiO ₃ (ε = 300) TiO ₂ (Ε = 80) ZrO ₂ (ε = 30) SiO ₂ (ε = 4) 2MgO · SiO ₂ (ε = 8) and the like, and these are used alone or in combination.

The above glass component and filler component are:
Glass component: 50 to 65% by volume and filler component: 35
Mix at a rate of ５０50% by volume. This is because if the glass component is less than 50% by volume and the filler component is more than 50% by volume, a good dense body cannot be obtained in a temperature range where co-firing with copper is possible, and the glass component is less than 65% by volume. In many cases, when the filler component is less than 35% by volume, it becomes difficult to increase the dielectric constant of the sintered body.

(Manufacturing Method) As a method of manufacturing the multilayer wiring board with a built-in capacitor according to the present invention, both the high dielectric layer and the low dielectric layer are prepared by first mixing the glass component and the filler prepared at a predetermined ratio as described above. After adding an appropriate organic resin binder to the mixture of components, a high-dielectric green sheet and a low-dielectric green sheet having a predetermined thickness are formed by a casting method such as a conventionally known doctor blade method or lip coater method.

As a wiring circuit layer, a metal paste obtained by adding and mixing an appropriate metal powder with an organic binder, a solvent, and a plasticizer is applied to the green sheet by a well-known screen printing method in a predetermined circuit pattern and electrode pattern. Print and apply. In some cases, the green sheet is appropriately punched to form a through hole, and the hole is filled with a metallizing paste.

Thereafter, the green sheets subjected to the above processing are laminated by using an appropriate contact liquid, and the obtained laminate is fired under predetermined conditions. Removal of binder is 100 ~
It is performed in a nitrogen atmosphere containing water vapor at 750 ° C., and the shrinkage start temperature of the molded body is preferably about 700 to 850 ° C. If the shrinkage start temperature is lower than this, it becomes difficult to remove the binder. It is necessary to control the properties of the crystallized glass in the compact, especially the yield point.

The sintering of the glass ceramic body is carried out at 850 to 1
This is performed in an oxidizing atmosphere or a non-oxidizing atmosphere at 050 ° C., whereby the density is increased to a relative density of 90% or more.
If the firing temperature at this time is lower than 850 ° C., densification cannot be achieved, and if it exceeds 1050 ° C., the metallized layer is melted by simultaneous firing with the wiring circuit layer. The multilayer wiring board of the present invention is fired in a non-oxidizing atmosphere because copper is used as the wiring conductor.

The major feature of the production method of the present invention is that
By making the initial elastic modulus of the high dielectric constant glass ceramic green sheet larger than the initial elastic modulus of the low dielectric constant glass ceramic green sheet, electrode thickness variation,
Variations in pressure during pressure contact can be absorbed by the low dielectric constant layer, and a change in the thickness of the high dielectric constant layer can be suppressed. Thereby, a pair of electrodes formed on both sides of the high dielectric layer can be localized on the low dielectric layer side.

The deformation behavior of the ceramic green sheet is such that elastic deformation is dominant in the early stage of deformation and plastic deformation is dominant in the late stage of deformation. It is desirable to use the initial elastic modulus as a guide instead of the strength used.

To increase the initial elastic modulus of the green sheet, increase the amount of binder, decrease the amount of plasticizer, increase the degree of polymerization of the binder, increase the number of polar groups in the binder,
And the like. These adjustments change not only the initial elastic modulus of the green sheet, but also the moldability, workability, shrinkage characteristics, and the like of the green sheet. Therefore, it is necessary to combine the adjustments as necessary.

In the adjustment of the amount of the binder, it is necessary to pay attention that when the amount of the binder is large, it is difficult to apply the adhesion liquid to the green sheet, and when the amount is small, cracks are easily generated at the time of molding the green sheet. In adjusting the amount of the plasticizer, it is necessary to pay attention to the fact that when the amount of the plasticizer increases, the green sheet becomes tacky, and when the amount decreases, the green sheet becomes brittle and the releasability deteriorates. In addition, when changing the degree of polymerization and the functional group of the binder, special attention must be paid to the thermal decomposition property during firing.

[0041]

EXAMPLE As a glass ceramic composition for forming a high dielectric constant layer and a low dielectric constant layer, SiO ₂ : 41% by weight-B
aO-: 37 wt% -B ₂ O _3: 10 wt% -Al ₂ O _3: 7
Weight-CaO: 5% by weight of glass (with a yield point of 70)
(0 ° C., Pb amount 50 × 10 ⁻⁶ or less) and fillers are weighed and blended at the ratios shown in Table 1, and a solvent is added, and the mixture is pulverized and mixed using a ball mill. A slurry was prepared by mixing and mixing, and a high-permittivity green sheet and a low-permittivity green sheet were prepared by a doctor blade method.

The thickness of the low dielectric constant green sheet is 50
0 μm, and the thickness of the high dielectric constant green sheet is 24 μm.
m, 48 μm, and 70 μm. In addition, a known dibutyl phthalate (DBP) is used as a plasticizer,
As shown in Tables 2 to 4, the addition amount was in the range of 2 to 5% by weight.

For all the obtained green sheets,
Conduct a tensile test at 100 mm / min and elongate 1 mm
Was measured as the initial elastic modulus G, and the results are shown in Tables 2 to 4.

In this embodiment, a high dielectric constant green sheet,
The initial elastic modulus of the low dielectric constant green sheet is defined as G1 and G2, and the value of (G1 / G2) is shown in Tables 2 to 4. Incidentally, the initial elastic modulus G2 of the low dielectric constant green sheet is 0.024 kgf / mm ² , and is shown in Tables 2, 3, and 4.
Means that each of the high-permittivity green sheets has a thickness of 24 μm.
m, 48 μm, and 70 μm.

The obtained two sheets of low dielectric constant green sheets were 1.4 mm × 4 mm and 2.0 mm × 4.0, respectively.
After printing a copper electrode pattern and a lead line pattern of 1 mm and applying an adhesion liquid containing an organic solvent as a main component, a high dielectric constant green sheet is formed at a position where a pair of electrodes overlap at 1.4 mm × 1.4 mm. It was sandwiched and laminated under pressure. The obtained laminate was fired after applying a copper paste to an electrode lead portion on an end face. The firing was performed by removing the binder in a nitrogen atmosphere containing water vapor at 700 ° C., and then firing at 910 ° C. in a nitrogen atmosphere.

The obtained sintered body has an area of 1.42 mm ² ~
A capacitor having a capacity of 1.44 mm ² and an electrode thickness of 10 μm was built in, and the capacitance of the capacitor at 3.2 GHz was measured using a through-hole conductor as shown in FIG.
The measurement was performed on 20 samples, and the difference between the maximum value and the minimum value was defined as the capacity range, and (capacity range / average capacity × 10).
0) is the capacitance variation.

Further, the sintered body after the measurement was embedded in an epoxy resin, cut and polished, and the cross-section of the sintered body was measured with a microscope for the amount of uneven distribution of the electrodes. In addition, the uneven distribution amount 5a of the electrode mentioned here,
5b is based on the interface between the high-permittivity layer and the low-permittivity layer on which no electrode is formed, and the per-sample high-permittivity,
Ten points were measured on each of the low dielectric constant sides, and the average value of each was taken as the uneven distribution amount. Tables 2 to 4 show values of (localization amount on high dielectric layer side / electrode thickness × 100) as localization ratio on high dielectric layer side.

[0048]

[Table 1]

[0049]

[Table 2]

[0050]

[Table 3]

[0051]

[Table 4]

From the results shown in Tables 2 to 4, as the amount of the plasticizer in the green sheet decreases, the initial elastic modulus increases, the thickness of the electrode forming the capacitor on the high dielectric constant layer side decreases, and the capacitance variation decreases. It was confirmed that. In addition, although there is a tendency that the smaller the thickness of the high dielectric layer is, the smaller the capacitance variation is, but even at the thickest 70 μm, the variation is 10% when G1 / G2 is 1 or more.
It was confirmed that:

As described above, in order to reduce the variation in capacitance of the relative dielectric constant of the high dielectric constant layer, the initial elastic modulus of the high dielectric constant layer is made larger than the initial elastic modulus of the low dielectric constant layer, and the high dielectric constant of the electrode is reduced. It is better to reduce the uneven distribution rate to the rate side, 40% or less,
In particular, good characteristics were exhibited at 30% or less, more preferably 20% or less. Further, when the thickness of the high dielectric constant layer was 50 μm or less, the variation was particularly improved.

[0054]

As described above in detail, according to the present invention, the unevenness of the capacitance of the capacitor can be reduced by distributing the electrodes of the built-in capacitor to the low dielectric layer side. As a result, it is possible to provide a multilayer wiring board having a built-in high-precision capacitor, which eliminates the need for a capacitor conventionally mounted on an external circuit board, thereby reducing the size of the external circuit board and reducing mounting costs. It is effective and can contribute to miniaturization of portable electronic devices that are rapidly spreading.

[0055]

[Brief description of the drawings]

FIG. 1 is a schematic sectional view for explaining one embodiment of a multilayer wiring board of the present invention.

FIG. 2 is an enlarged sectional view of a main part of a capacitor section according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Insulating substrate 1a Low-k layer 1b High-k layer 1c Low-k layer 2 Wiring circuit layer 3 Electrode 5a Amount of uneven distribution of electrode toward low-k layer 5b Amount of uneven distribution of electrode toward high-k layer

Continuing from the front page (72) Inventor Kenichi Nagae 1-4-4 Yamashita-cho, Kokubu-shi, Kagoshima Inside the Kyocera Research Institute (72) Inventor Yoshihiro Nakao 1-4-4 Yamashita-cho, Kokubu-shi, Kagoshima Kyocera Corporation General F-term in the laboratory (reference) 5E346 AA33 CC16 CC21 CC32 CC34 CC39 EE22 GG04 HH22

Claims (7)

[Claims] 1. A multi-layer wiring board comprising a ceramic insulating substrate formed by laminating a plurality of insulating layers and a wiring circuit layer formed on the surface and / or inside of the insulating substrate, wherein the insulating substrate has a low dielectric constant. Composed of a layer and a high dielectric constant layer,
Electrodes are provided at both interfaces of the high dielectric layer with the low dielectric layer, and the thickness of a portion of the electrode located on the low dielectric layer side is closer to the high dielectric layer side. A multilayer wiring board having a thickness greater than a thickness of a portion where the multilayer wiring board is located. 2. The high dielectric constant layer has a relative dielectric constant of 14 to 24 at 3.2 GHz.
Multilayer wiring board. 3. The wiring circuit layer and the electrode are made of Cu,
2. The multilayer wiring board according to claim 1, comprising at least one metal selected from the group consisting of Al and Ag. 4. The multilayer wiring board according to claim 1, wherein said electrode has a thickness t1 of 8 to 30 μm. 5. A ratio (t1 / t2) of the thickness t1 of the electrode to the thickness t2 of the high dielectric layer is 0.02 to 0.2.
The multilayer wiring board according to any one of claims 1 to 4, wherein 6. A step of producing a low dielectric constant green sheet and a high dielectric constant green sheet, and forming a wiring circuit layer and an electrode on the low dielectric constant green sheet and / or the high dielectric constant green sheet. A step of applying and forming a conductive paste, and a step of laminating the low dielectric constant green sheet and the high dielectric constant green sheet such that the high dielectric constant green sheet is sandwiched between the electrodes, And baking the laminate. A method of manufacturing a multilayer wiring board, the method comprising: wherein the initial elastic modulus of the high dielectric constant green sheet is larger than the initial elastic modulus of the low dielectric constant green sheet. Manufacturing method of wiring board. 7. The wiring circuit layer and the electrode are made of Cu,
7. The method for manufacturing a multilayer wiring board according to claim 6, comprising at least one metal selected from the group consisting of Al and Ag.