JP2002110543A - Method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To precisely control the implanting amount of an element in a method for obtaining a crystalline silicon by heat treatment of about 4 hours at about 550 deg.C by using an element for promoting a crystallization. SOLUTION: A method for manufacturing a semiconductor device comprises the steps of forming an amorphous silicon film on a board, contacting a solution containing the element for promoting the crystallization of the amorphous silicon film with a part of the silicon-film to hold the solution, and heating the silicon film to crystallize the silicon film. In this method, the concentration of the element in the solution is 200 ppm or less. The concentration of the element in the silicon film after the crystallization is 1×1016 to 1×1019 atoms/cm3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device using a semiconductor having crystallinity and a method for manufacturing the same.

[0002]

2. Description of the Related Art Thin film transistors (hereinafter referred to as TFTs) using thin film semiconductors are known. This TFT is formed by forming a thin-film semiconductor on a substrate and using the thin-film semiconductor. This TFT is used in various integrated circuits, and is particularly attracting attention as a switching element provided in each pixel of an electro-optical device, particularly an active matrix type liquid crystal display device, and a driver element formed in a peripheral circuit portion. .

[0003] As a thin film semiconductor used for a TFT,
Although it is convenient to use an amorphous silicon film, there is a problem that its electrical characteristics are low. In order to obtain improved TFT characteristics, a silicon thin film having crystallinity may be used. The silicon film having crystallinity is called polycrystalline silicon, polysilicon, microcrystalline silicon, or the like. In order to obtain a silicon film having this crystallinity, an amorphous silicon film may be formed first, and then crystallized by heating.

[0004] However, crystallization by heating requires a heating temperature of 600 ° C. or more for a period of 10 hours or more, and there is a problem that it is difficult to use a glass substrate as a substrate. For example, Corning 7059 glass used for an active type liquid crystal display device has a glass strain point of 593 ° C., and there is a problem in heating at 600 ° C. or more in consideration of an increase in substrate area.

BACKGROUND OF THE INVENTION According to the study of the present inventors, trace amounts of elements such as nickel, palladium, and lead are deposited on the surface of an amorphous silicon film and then heated to 550 mm. It has been found that crystallization can be performed at a temperature of about 4 hours.

[0006] In order to introduce the above trace elements (catalytic elements that promote crystallization), plasma treatment, vapor deposition, and ion implantation may be used. Plasma treatment refers to the use of a material containing a catalyst element as an electrode in a parallel plate type or positive column type plasma CVD apparatus, and generation of plasma in an atmosphere such as nitrogen or hydrogen to form a catalyst element on an amorphous silicon film. This is a method of adding.

However, the presence of a large amount of such elements in semiconductors impairs the reliability and electrical stability of devices using these semiconductors, and is not preferable.

That is, the above-mentioned elements (catalytic elements) which promote crystallization, such as nickel, are necessary when crystallizing amorphous silicon, but are not contained in crystallized silicon as much as possible. Is desirable. To achieve this goal,
It is necessary to select a catalyst element which has a strong tendency to be inactive in crystalline silicon as a catalyst element, and at the same time, minimize the amount of the catalyst element required for crystallization and perform crystallization with a minimum amount. For that purpose, it is necessary to precisely control the amount of the catalyst element to be introduced.

When nickel is used as a catalytic element, an amorphous silicon film is formed, nickel is added by a plasma treatment method to produce a crystalline silicon film, and the crystallization process and the like are examined in detail. The following matters were found. (1) When nickel is introduced onto an amorphous silicon film by plasma treatment, nickel has already penetrated to a considerable depth in the amorphous silicon film before heat treatment. (2) The initial nucleation of the crystal occurs from the surface into which nickel is introduced. (3) Even when nickel is formed on an amorphous silicon film by a vapor deposition method, crystallization occurs as in the case where plasma processing is performed.

[0010] From the above, it is concluded that all the nickel introduced by the plasma treatment is not functioning effectively. That is, it is considered that some nickel does not function sufficiently even if a large amount of nickel is introduced. From this, it is considered that the point (plane) where nickel and silicon are in contact functions at the time of low-temperature crystallization.
It is concluded that it is necessary for nickel to be dispersed as finely as possible. In other words, it is concluded that "what is necessary is to introduce as low a concentration of nickel as possible in the form of atoms in the vicinity of the surface of the amorphous silicon film in a range where low-temperature crystallization is possible".

A method for introducing a very small amount of nickel only near the surface of the amorphous silicon film, in other words, a method for introducing a very small amount of a catalytic element for promoting crystallization only near the surface of the amorphous silicon film is as follows. , Evaporation method can be mentioned,
The vapor deposition method has a problem that the controllability is poor and it is difficult to strictly control the introduction amount of the catalyst element.

[0012]

SUMMARY OF THE INVENTION The present invention relates to a method of producing a crystalline silicon semiconductor having a crystallinity by a heat treatment at 600 ° C. or lower using a catalytic element. Minimize volume. (2) Use a method with high productivity. It is intended to satisfy such requirements.

[0013]

According to the present invention, a silicon film having crystallinity is obtained by using the following means in order to satisfy the above objects. In contact with the amorphous silicon film, a catalyst element alone or a compound containing the catalyst element that promotes crystallization of the amorphous silicon film is held, and the amorphous silicon film contains the catalyst element alone or the catalyst element When the compounds are in contact,
A heat treatment is performed to crystallize the amorphous silicon film.

Specifically, the above configuration is realized by applying a solution containing a catalytic element to the surface of the amorphous silicon film and introducing the catalytic element. Particularly in the present invention,
It is characterized in that a catalytic element is introduced in contact with the surface of the amorphous silicon film. This is extremely important in controlling the amount of the catalytic element.

Further, an active region having at least one PN, PI, NI, or other electrical junction of a semiconductor device is formed using the crystalline silicon film. As the semiconductor device, a thin film transistor (TFT), a diode, or an optical sensor can be used.

By adopting the structure of the present invention, the following basic significance can be obtained. (A) The concentration of the catalyst element in the solution can be strictly controlled in advance to increase the crystallinity and reduce the amount of the element. (B) If the solution is in contact with the surface of the amorphous silicon film,
The amount of the catalyst element introduced into the amorphous silicon is determined by the concentration of the catalyst element in the solution. (C) Since the catalytic element adsorbed on the surface of the amorphous silicon film mainly contributes to the crystallization, the catalytic element can be introduced at a minimum necessary concentration.

As a method of applying a solution containing an element promoting crystallization on the amorphous silicon film, an aqueous solution, an organic solvent solution, or the like can be used as the solution. Here, “containing” includes both the meaning of being included as a compound and the meaning of being included simply by being dispersed.

As the solvent containing the catalytic element, a solvent selected from polar solvents such as water, alcohol, acid and ammonia can be used.

When nickel is used as a catalyst and this nickel is contained in a polar solvent, nickel is introduced as a nickel compound. Typical examples of the nickel compound include nickel bromide, nickel acetate, nickel oxalate, nickel carbonate, nickel chloride, nickel iodide, nickel nitrate, nickel sulfate, nickel formate, nickel acetylacetonate, and 4-cyclohexylbutyric acid. A material selected from nickel, nickel oxide, and nickel hydroxide is used.

Examples of the solvent containing a catalyst element include non-polar solvents such as benzene, toluene, xylene, carbon tetrachloride,
Chloroform and ether can be used.

In this case, nickel is introduced as a nickel compound. As the nickel compound, typically, a compound selected from nickel acetylacetonate and nickel 2-ethylhexanoate can be used.

It is also useful to add a surfactant to the solution containing the catalyst element. This is to increase the adhesion to the surface to be coated and control the adsorption. This surfactant may be applied in advance on the surface to be coated.

When nickel alone is used as the catalyst element, it must be dissolved in an acid to form a solution.

The above is an example in which a solution in which nickel as a catalytic element is completely dissolved is used. However, even if nickel is not completely dissolved, a powder composed of nickel alone or a nickel compound is dispersed in a dispersion medium. A material such as an emulsion which is uniformly dispersed in the emulsion may be used. The same applies to the case where a material other than nickel is used as the catalyst element.

When nickel is used as a catalyst element for promoting crystallization and a polar solvent such as water is used as a solution solvent for containing the nickel, when these solutions are directly applied to the amorphous silicon film, the solution becomes elastic. It may be lost. In this case, a thin oxide film having a thickness of 100 ° or less is first formed, and a solution containing a catalyst element is applied thereon, whereby the solution can be applied uniformly. It is also effective to improve the wetting by adding a material such as a surfactant to the solution. After forming a thin oxide film, a rubbing treatment may be performed to form irregularities at regular intervals, widths, and directions in the oxide film. Such unevenness is effective in further promoting the penetration of the solvent, averaging the size of the crystal grains, and aligning the directions of the crystal grains. In addition, when a semiconductor element is formed such that a current flows in an appropriate direction through a crystalline silicon film having such a directionality, it has been effective in suppressing variation in element characteristics.

Further, by using a non-polar solvent such as a toluene solution of nickel 2-ethylhexanoate as a solution, it can be directly applied to the surface of the amorphous silicon film. In this case, it is effective to apply a material such as an adhesive used in applying the resist in advance. However, care must be taken when the amount of coating is too large, since this would hinder the addition of the catalytic element to the amorphous silicon.

The amount of the catalyst element contained in the solution depends on the type of the solution, but as a general tendency, the amount of nickel is 200 ppm to 1 ppm, preferably 50 ppm to 1 ppm (in terms of weight) based on the solution. It is desirable. This is a value determined in view of the nickel concentration in the film after crystallization and the resistance to hydrofluoric acid.

Crystal growth can be selectively performed by selectively applying a solution containing a catalyst element. In particular, in this case, crystal growth can be performed in a direction substantially parallel to the surface of the silicon film from the region where the solution has been applied, toward the region where the solution has not been applied. In this specification, a region where crystal growth is performed in a direction substantially parallel to the surface of the silicon film is referred to as a region where crystal growth is performed in a lateral direction.

It has been confirmed that the region where the crystal growth has been performed in the lateral direction has a low concentration of the catalytic element.
Although it is useful to use a crystalline silicon film as the active layer region of the semiconductor device, it is generally preferable that the impurity concentration in the active layer region is low. Therefore, it is useful in device fabrication to form an active layer region of a semiconductor device using the region where the crystal growth has been performed in the lateral direction.

In the present invention, the most remarkable effect can be obtained when nickel is used as the catalyst element. However, the types of other usable catalyst elements are preferably Ni, Pd, Pt, Cu, Ag, and the like. Au, In, S
n, Pd, Sn, Pd, P, As, and Sb can be used. In addition, one or more elements selected from Group VIII elements, IIIb, IVb, and Vb elements can also be used.

The method of introducing the catalytic element is not limited to the use of an aqueous solution or a solution such as alcohol, but a wide range of substances containing the catalytic element can be used.
For example, a metal compound or oxide containing a catalyst element can be used.

[0032]

[Example] [Example 1]

This embodiment is an example in which a catalyst element for promoting crystallization is contained in an aqueous solution, applied on an amorphous silicon film, and then crystallized by heating.

First, the steps up to the point of introducing a catalytic element (here, nickel is used) will be described with reference to FIG. In this embodiment, Corning 7059 glass is used as the substrate. The size is 100mm x 100mm
And

First, an amorphous silicon film is formed into an amorphous silicon film by plasma CVD or LPCVD.
It is formed at a temperature of 00 to 1500 °. Here, plasma CVD
An amorphous silicon film 12 is formed to a thickness of 1000.degree. (Fig. 1 (A))

Then, a hydrofluoric acid treatment is performed to remove dirt and a natural oxide film.
Å is formed. If the contamination can be neglected, it is needless to say that this step may be omitted, and a natural oxide film may be used as it is instead of the oxide film 13. The exact thickness of the oxide film 13 is unknown because it is extremely thin.
It is considered to be about 0 °. Here, the oxide film 13 is formed by irradiation with UV light in an oxygen atmosphere. The film was formed by irradiating UV for 5 minutes in an oxygen atmosphere. As a method of forming the oxide film 13,
A thermal oxidation method may be used. Further, a treatment by hydrogen peroxide may be used.

The oxide film 13 is used to spread the acetate solution over the entire surface of the amorphous silicon film in the subsequent step of applying an acetate solution containing nickel, ie, to improve the wettability. It is. For example, when an acetate solution is directly applied to the surface of an amorphous silicon film, nickel cannot be introduced into the entire surface of the amorphous silicon film because the amorphous silicon repels the acetate solution. That is, uniform crystallization cannot be performed.

Next, an acetate solution is prepared by adding nickel to the acetate solution. The concentration of nickel is 100 ppm. Then, 2 ml of this acetate solution is dropped on the surface of the oxide film 13 on the amorphous silicon film 12, and this state is maintained for 5 minutes. And spin dry using a spinner (2000
rpm, 60 seconds). (Fig. 1 (C), (D))

The concentration of nickel in the acetic acid solution is 1
If it is at least 10 ppm, preferably at least 10 ppm, it will be practical. When a nonpolar solvent such as a toluene solution of nickel 2-ethylhexanoate is used as the solution, the oxide film 1
3 is unnecessary, and a catalytic element can be directly introduced on the amorphous silicon film.

By performing this nickel solution coating step once or more times, a layer containing nickel having an average thickness of several to several hundreds of mm is formed on the surface of the amorphous silicon film 12 after spin drying. Can be formed. In this case, nickel in this layer diffuses into the amorphous silicon film in the subsequent heating step and acts as a catalyst for promoting crystallization. Note that this layer is not necessarily a complete film.

After the application of the solution, the state is maintained for 5 minutes. Although the concentration of nickel contained in the silicon film 12 can be finally controlled by the holding time, the largest controlling factor is the concentration of the solution.

Then, in a heating furnace, heat treatment is performed at 550 ° C. for 4 hours in a nitrogen atmosphere. As a result,
A crystalline silicon thin film 12 formed on the substrate 11 can be obtained.

The above heat treatment can be performed at a temperature of 450 ° C. or higher. However, if the temperature is low, the heating time must be extended, and the production efficiency decreases. Further, if the temperature is 550 degrees or more, the problem of heat resistance of a glass substrate used as a substrate will surface.

In this embodiment, the method of introducing a catalytic element on the amorphous silicon film has been described, but a method of introducing a catalytic element below the amorphous silicon film may be employed. in this case,
Before forming the amorphous silicon film, the catalyst element may be introduced onto the base film using a solution containing the catalyst element.

[Embodiment 2] In this embodiment, a silicon oxide film of 1200 ° is selectively provided in the manufacturing method shown in Embodiment 1, and nickel is selectively introduced using this silicon oxide film as a mask. .

FIG. 2 shows an outline of the manufacturing process in this embodiment. First, a glass substrate (Corning 7059, 10c
On the (m square), a silicon oxide film 21 serving as a mask is formed to a thickness of 1000 ° or more, here 1200 °. According to experiments by the inventors, the thickness of the silicon oxide film 21 is 5
It has been confirmed that there is no problem even at 00 °, and it is considered that the film may be thinner if the film quality is dense.

Then, the silicon oxide film 21 is subjected to a necessary pattern by a usual photolithography patterning process. Then, a thin silicon oxide film 20 is formed by ultraviolet irradiation in an oxygen atmosphere. This silicon oxide film 2
The production of No. 0 is performed by irradiating UV light for 5 minutes in an oxygen atmosphere. The thickness of the silicon oxide film 20 is considered to be about 20 to 50 ° (FIG. 2A). still,
When a silicon oxide film for improving the wettability matches the size of the solution and the pattern, the silicon oxide film may be added just by the hydrophilicity of the silicon oxide film of the mask. However, such an example is special, and it is generally safer to use the silicon oxide film 20.

In this state, 10 times as in the first embodiment.
5 ml of an acetate solution containing 0 ppm of nickel is dropped (in the case of a 10 cm square substrate). At this time, spin coating is performed at 50 rpm for 10 seconds using a spinner to form a uniform water film on the entire surface of the substrate. In this state, 5
After holding for 2 minutes, using a spinner at 2000 rpm, 60 rpm
Perform spin dry for 2 seconds. This holding may be performed while rotating the spinner at 0 to 150 rpm. (FIG. 2 (B))

Then, the amorphous silicon film 12 is crystallized by performing a heat treatment at 550 ° C. (nitrogen atmosphere) for 4 hours. At this time, crystal growth is performed in the lateral direction from the region of the portion 22 where nickel has been introduced to the region where nickel has not been introduced as indicated by 23. In FIG. 2C, reference numeral 24 denotes a region where nickel is directly introduced and crystallization is performed, and reference numeral 25 denotes a region where crystallization is performed in a lateral direction. In addition, it has been confirmed that the crystal growth is performed in the <111> axis direction in the region of 25.

In this embodiment, the concentration of nickel in the region where nickel is directly introduced is changed from 1 × 10 ¹⁶ atoms cm ⁻³ to 1 by changing the solution concentration and the holding time.
It can be controlled within the range of × 10 ¹⁹ atoms cm ⁻³ , and similarly, the concentration of the lateral growth region can be controlled to be lower than that.

The crystalline silicon film formed by the method shown in the present embodiment is characterized by having good hydrofluoric acid resistance. According to the findings of the present inventors, a crystalline silicon film obtained by introducing nickel by plasma treatment and crystallizing
Low hydrofluoric acid resistance.

For example, it is necessary to form a silicon oxide film functioning as a gate insulating film or an interlayer insulating film on a crystalline silicon film, and then form an electrode through a hole forming process for forming an electrode. And may be. In such a case, a step of removing the silicon oxide film with buffered hydrofluoric acid is usually adopted. However, when the hydrofluoric acid resistance of the crystalline silicon film is low, it is difficult to remove only the silicon oxide film, and there is a problem that the crystalline silicon film is also etched.

However, when the crystalline silicon film has hydrofluoric acid resistance, the difference (selectivity) between the etching rates of the silicon oxide film and the crystalline silicon film can be made large, so that the silicon oxide film Can be selectively removed, which is extremely significant in the production process.

As described above, the region where the crystal has grown in the lateral direction has a low concentration of the catalytic element and has good crystallinity. Therefore, it is useful to use this region as the active region of the semiconductor device. For example, it is extremely useful to use it as a channel formation region of a thin film transistor.

[Embodiment 3] This embodiment is an example in which nickel as a catalyst element is contained in alcohol, which is a non-aqueous solution, and is applied on an amorphous silicon film. In this embodiment, nickel acetylacetonate is used as a nickel compound, and the compound is contained in alcohol. The concentration of nickel may be set to a required concentration.

The subsequent steps are the same as those shown in the first or second embodiment. The nickel-containing alcohol solution may be applied under the amorphous silicon film. In this case, this solution may be applied using a spinner before the formation of the amorphous silicon film. When alcohol is used, it can be applied directly on the amorphous silicon film.

Hereinafter, specific conditions will be described. First, nickel acetylacetonate is prepared as a nickel compound. Since this substance is soluble in alcohol and has a low decomposition temperature, it can be easily decomposed during heating in the crystallization step.

Ethanol is used as the alcohol. First, the above nickel acetylacetonate is adjusted to 100 ppm in terms of the amount of nickel in ethanol to prepare a nickel-containing solution.

Then, this solution is applied on the amorphous silicon film. The amorphous silicon film is a silicon oxide base film (200
(0 mm thick) formed on a 100 mm square glass substrate
It is formed by a plasma CVD method with a thickness of 000 mm.

The application of the solution on the amorphous silicon film is less than when the aqueous solution of Example 1 or 2 is used. This is because the contact angle of alcohol is smaller than that of water. Here, it is assumed that 2 ml of a 100 mm square area is dropped.

Then, this state is maintained for 5 minutes. Thereafter, drying is performed using a spinner. At this time, the spinner is 1
Spin at 500 rpm for 1 minute. After this, 550
C. for 4 hours for crystallization. Thus, a crystalline silicon film is obtained.

[Embodiment 4] In this embodiment, nickel as a catalyst element is dissolved in an acid, and the acid in which the nickel is dissolved is applied on an amorphous silicon film.

In this example, the acid was 0.1 mol
1 / l nitric acid is used. Dissolve the nickel powder in this nitric acid so that the concentration of nickel is 50 ppm,
This is used as a solution. Subsequent steps are the same as in the first embodiment.

Embodiment 5 In this embodiment, an example is described in which a TFT provided in each pixel portion of an active matrix type liquid crystal display device is manufactured using a crystalline silicon film manufactured by using the method of the present invention. Is shown. It is needless to say that TFTs can be applied not only to liquid crystal display devices but also to thin film integrated circuits generally referred to.

FIG. 3 shows an outline of the manufacturing process of this embodiment.
First, an underlying silicon oxide film (not shown) is formed on a glass substrate by two steps.
A film is formed to a thickness of 000 mm. This silicon oxide film is provided to prevent diffusion of impurities from the glass substrate.

Then, an amorphous silicon film is formed in a thickness of 1000 ° in the same manner as in the first embodiment. After the hydrofluoric acid treatment for removing the natural oxide film, a thin oxide film 20 is formed to a thickness of about 20 ° by irradiation with UV light in an oxygen atmosphere.

Then, an acetate solution containing 10 ppm of nickel is applied, held for 5 minutes, and spin-dried using a spinner. Thereafter, silicon oxide films 20 and 21 are removed with buffered hydrofluoric acid, and silicon film 100 is crystallized by heating at 550 ° C. for 4 hours. (Up to this point, the same as the manufacturing method shown in Example 1)

The step of introducing nickel is described in Example 3.
Alternatively, the method described in the fourth embodiment may be used. Of course, the nickel concentration and the holding time may be selected as appropriate.

Next, island regions 104 are formed by patterning the crystallized silicon film. This island-shaped area 10
4 constitutes an active layer of the TFT. And the thickness 200 ~
The silicon oxide 105 is formed at 1500 °, here 1000 °. This silicon oxide film also functions as a gate insulating film. (FIG. 3 (A))

Attention should be paid to the production of the silicon oxide film 105. Here, TEOS is used as a raw material, and a substrate temperature is 150 to 600 ° C., preferably 300 to 45 ° C. together with oxygen.
Decomposition and deposition were performed at 0 ° C. by an RF plasma CVD method. TE
The pressure ratio between OS and oxygen is 1: 1 to 1: 3, the pressure is 0.05 to 0.5 torr, and the RF power is 100 to 25.
0 W. Alternatively, TEOS is used as a raw material together with ozone gas by a low pressure CVD method or a normal pressure CVD method.
The substrate temperature is set to 350 to 600 ° C, preferably 400 to 55.
Formed at 0 ° C. After the film formation, annealing was performed at 400 to 600 ° C. for 30 to 60 minutes in an atmosphere of oxygen or ozone.

By irradiating a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) or strong light equivalent thereto in this state, the crystallization of the silicon region 104 may be promoted. In particular, RTA using infrared light
(Rapid thermal annealing) can selectively heat only silicon without heating the glass substrate, and can reduce the interface state at the interface between silicon and the silicon oxide film. It is useful in manufacturing a field-effect semiconductor device.

Thereafter, an aluminum film having a thickness of 2000 to 1 μm is formed by an electron beam evaporation method, and is patterned to form a gate electrode 106. Aluminum may be doped with scandium (Sc) by 0.15 to 0.2% by weight. Next, the substrate is adjusted to pH ≒.
7, immersed in an ethylene glycol solution of 1 to 3% tartaric acid, and anodized using platinum as a cathode and the aluminum gate electrode as an anode. The anodic oxidation is performed by first increasing the voltage to 220 V with a constant current and maintaining the state for one hour to complete the process. In this embodiment, in the constant current state, the voltage rising speed is suitably 2 to 5 V / min. Thus, anodic oxide 109 having a thickness of 1500 to 3500 °, for example, 2000 ° is formed. (FIG. 3 (B))

Thereafter, impurities (phosphorus) were implanted in a self-aligned manner into the island-like silicon film of each TFT by ion doping (also called plasma doping) using the gate electrode as a mask. Phosphine (PH ₃ ) was used as a doping gas. Dose amount is 1-4 × 10
¹⁵ cm ^-2 .

Further, as shown in FIG. 3C, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 ns)
ec) is applied to improve the crystallinity of the portion where the crystallinity is deteriorated by the introduction of the impurity region. The energy density of the laser is 150 to 400 mJ / cm ² , preferably 200 to 250 mJ / cm ² . Thus, N-type impurity (phosphorus) regions 108 and 109 are formed. The sheet resistance in these regions was 200 to 800 Ω / □.

In this step, instead of using a laser, a flash lamp is used for 1000 to 1000
Raise to 1200 ° C (temperature of silicon monitor)
A so-called RTA (rapid thermal annealing) (RTP, also called a rapid thermal process) for heating a sample may be used.

Then, an interlayer insulator 110 is formed on the entire surface.
Plasma CVD of TEOS as raw material and oxygen
Method, reduced pressure CVD method with ozone, or normal pressure CV
A silicon oxide film having a thickness of 3000 is formed by method D. The substrate temperature is 250 to 450 ° C., for example, 350 ° C.
After the film formation, the silicon oxide film is mechanically polished to obtain a flat surface. Further, an ITO film is deposited by a sputtering method, and is patterned to form a pixel electrode 111. (FIG. 3 (D))

Then, the interlayer insulator 110 is etched to form contact holes in the source / drain of the TFT as shown in FIG. 1E, and wirings 112 and 113 of chromium or titanium nitride are formed. Are connected to the pixel electrode 111.

The crystalline silicon film into which nickel has been introduced by the plasma treatment has a lower selectivity to buffered hydrofluoric acid than the silicon oxide film, and therefore is often etched in the contact hole forming step. Was.

However, when nickel is introduced by using an aqueous solution at a low concentration of 10 ppm as in this embodiment, since the hydrofluoric acid resistance is high, it is necessary to stably form the contact hole with good reproducibility. it can.

Finally, at 300 to 400 ° C. in hydrogen at 0.
Anneal for 1-2 hours to complete silicon hydrogenation. Thus, the TFT is completed. Then, a large number of TFTs manufactured at the same time are arranged in a matrix to complete an active matrix liquid crystal display device.
This TFT has source / drain regions 108/109 and a channel formation region 114. 115 is N
It becomes an electrical junction of I.

When the structure of this embodiment is adopted, the concentration of nickel existing in the active layer is about 3 × 10 ¹⁸ cm ⁻³ or less, and 1 × 10 ¹⁶ atoms cm ^{−3 to} 3 × 10 3.
It is considered to be ¹⁸ atoms cm ^-3 .

[Embodiment 6] In this embodiment, as shown in Embodiment 2, nickel is selectively introduced, and an electron is grown by using a region where crystal growth is performed in a lateral direction (a direction parallel to the substrate) from that portion. 4 shows an example of forming a device. When such a configuration is employed, the nickel concentration in the active layer region of the device can be further reduced, and a highly preferable configuration can be obtained from the viewpoint of electrical stability and reliability of the device.

As a method for introducing the nickel element in this embodiment, the method shown in Embodiments 3 and 4 may be used.

This embodiment relates to a process for manufacturing a TFT used for controlling pixels of an active matrix. FIG. 4 shows a manufacturing process of this embodiment. First, the substrate 20
1 is washed and has a thickness of 2 by a plasma CVD method using TEOS (tetraethoxysilane) and oxygen as source gases.
A base film 202 of silicon oxide with a thickness of 2,000 ° is formed. Then, the thickness is 500 to 1500 by the plasma CVD method.
{, For example, 1000} intrinsic (I-type) amorphous silicon film 2
03 is formed. Next, continuously thickness 500-2000
{, For example, 1000} silicon oxide film 205 with plasma C
The film is formed by the VD method. Then, the silicon oxide film 205 is selectively etched to form a region 2 where the amorphous silicon is exposed.
06 is formed.

Then, a solution (here, an acetate solution) containing nickel, which is a catalyst element for promoting crystallization, is applied by the method described in Example 2. The concentration of nickel in the acetic acid solution is 100 ppm. Other detailed steps and conditions are the same as those described in the second embodiment.
This step may be performed by the method described in the third or fourth embodiment.

Thereafter, under a nitrogen atmosphere, 500 to 620
C., for example, at 550.degree. C., for 4 hours, to crystallize the silicon film 303. FIG. In the crystallization, the crystal growth proceeds in a direction parallel to the substrate as indicated by an arrow, starting from a region 206 where the nickel and silicon films are in contact. In the drawing, a region 204 indicates a portion crystallized by directly introducing nickel, and a region 203 indicates a portion crystallized in the lateral direction. The crystal in the horizontal direction indicated by 203 is 2
It is about 5 μm. The crystal growth direction is roughly <11
1> It has been confirmed that the direction is the axial direction. (FIG. 4
(A))

Next, the silicon oxide film 205 is removed. At this time, the oxide film formed on the surface of the region 206 is also removed at the same time. Then, after patterning the silicon film 204, dry etching is performed to form an island-shaped active layer region 208.
At this time, a region indicated by 206 in FIG. 4A is a region where nickel is directly introduced, and is a region where nickel is present at a high concentration. It has also been confirmed that nickel also exists at a high concentration at the tip of crystal growth. It has been found that in these regions, the nickel concentration is higher than in the intermediate region. Therefore, in the present embodiment, in the active layer 208, these regions where the nickel concentration is high do not overlap with the channel formation region.

Thereafter, 10% by volume containing water vapor of 100%
The surface of the active layer (silicon film) 208 is oxidized by leaving it for 1 hour in an atmosphere of atmospheric pressure at 500 to 600 ° C., typically 550 ° C.
To form The thickness of the silicon oxide film is 1000 °. After the silicon oxide film 209 is formed by thermal oxidation, the substrate is placed in an ammonia atmosphere (1 atm, 100%) at 400 ° C.
To be held. Then, in this state, the substrate is irradiated with infrared light having a peak at a wavelength of 0.6 to 4 μm, for example, 0.8 to 1.4 μm for 30 to 180 seconds, and the silicon oxide film 20 is irradiated.
9 is subjected to a nitriding treatment. At this time, 0.
HCl of 1 to 10% may be mixed.

A halogen lamp is used as the infrared light source. The intensity of the infrared light is adjusted so that the temperature on the single crystal silicon wafer of the monitor is between 900 and 1200 ° C. Specifically, the temperature of the thermocouple embedded in the silicon wafer is monitored, and this is fed back to the infrared light source. In this embodiment, the temperature rise is constant, the speed is 50 to 200 ° C./sec, and the temperature is lowered by natural cooling to 20 to 100 ° C.
° C. This infrared light irradiation selectively heats the silicon film, so that heating of the glass substrate can be minimized. (FIG. 4 (B))

Subsequently, by a sputtering method,
Aluminum (including 0.01 to 0.2% scandium) having a thickness of 3000 to 8000 °, for example, 6000 ° is formed. Then, the gate electrode 210 is formed by patterning the aluminum film. (Fig. 2 (C))

Further, the surface of the aluminum electrode is anodized to form an oxide layer 211 on the surface. This anodization is performed in an ethylene glycol solution containing tartaric acid at 1 to 5%. The thickness of the obtained oxide layer 211 is 2
000. Note that the oxide 211 has a thickness for forming an offset gate region in a later ion doping process, so that the length of the offset gate region can be determined in the anodic oxidation process. (FIG. 4
(D))

Next, a gate electrode portion, that is, the gate electrode 210 and its surrounding oxide layer 211 are used as masks in an active layer region (which constitutes a source / drain and a channel) by an ion doping method (also called a plasma doping method). In addition, an impurity (here, phosphorus) which imparts the N conductivity type in a self-aligned manner is added. Phosphine (PH ₃ ) is used as the doping gas, and the acceleration voltage is set to 60 to 90 kV, for example, 80 kV. Dose amount is 1 × 10 ¹⁵ to 8 × 10
¹⁵ cm ^-2 , for example, 4 × 10 ¹⁵ cm ^-2 . As a result, N-type impurity regions 212 and 213 can be formed. As is clear from the figure, the impurity region and the gate electrode are offset from each other by a distance x. Such an offset state is particularly effective in reducing a leakage current (also referred to as an off-state current) when a reverse voltage (minus in the case of an N-channel TFT) is applied to the gate electrode.
In particular, in the TFT for controlling the pixels of the active matrix as in the present embodiment, it is desired that the leakage current is low so that the electric charge accumulated in the pixel electrode does not escape in order to obtain a good image, so that an offset is provided. That is valid.

Thereafter, annealing was performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) is used, but another laser may be used. The irradiation condition of the laser light is such that the energy density is 200 to 400 mJ / c.
m ² , for example, 250 mJ / cm ^2, and 2
Irradiation was performed for 10 to 10 shots, for example, 2 shots. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the irradiation with the laser light. (FIG. 4
(E))

Subsequently, a silicon oxide film 21 having a thickness of 6000.degree.
4 is formed as an interlayer insulator by a plasma CVD method. Further, a transparent polyimide film 215 is formed by spin coating, and the surface is flattened. On the plane thus formed, a thickness of 80
A 0 ° transparent conductive film (ITO film) is formed, and is patterned to form a pixel electrode 216.

Then, contact holes are formed in the interlayer insulators 214 and 215, and the electrodes / wirings 217 and 218 of the TFT are formed of a metal material, for example, a multilayer film of titanium nitride and aluminum. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at 1 atm to complete an active matrix pixel circuit having a TFT. (FIG. 4
(F))

[Embodiment 7] FIG. 5 is a sectional view showing a manufacturing process of this embodiment. First, the substrate (Corning 7059) 50
A silicon oxide base film 102 having a thickness of 2000 ° was formed on the substrate 1 by a sputtering method. The substrate is annealed at a temperature higher than the strain temperature before or after the formation of the base film, and then slowly cooled to a strain temperature or lower at 0.1 to 1.0 ° C./min. Substrate shrinkage in the accompanying steps (including the thermal oxidation step of the present invention and the subsequent thermal annealing step) is small, and mask alignment is ready. For Corning 7059 substrate, 1-4 at 620-660 ° C.
After annealing for an hour, the temperature is gradually reduced at 0.03 to 1.0 ° C./min, preferably 0.1 to 0.3 ° C./min.
It is good to take out at the stage when the temperature has dropped to ° C.

Next, a thickness of 5
An intrinsic (I-type) amorphous silicon film of 00 to 1500 °, for example, 1000 ° was formed. Then, the amorphous silicon film was crystallized by the method described in the first embodiment. Then, the silicon film is crystallized by annealing at 600 ° C. for 48 hours in a nitrogen atmosphere (atmospheric pressure), and the silicon film is patterned into a size of 10 to 1000 μm square to form an island-shaped silicon film (TFT active layer) 50.
3 was formed. (FIG. 5 (A))

Thereafter, a pyrogenic reaction method is carried out in an oxygen atmosphere containing 70 to 90% of water vapor at 1 atm, 500 to 750 ° C., typically 600 ° C. at a ratio of hydrogen / oxygen = 1.5 to 1.9. Formed. The silicon film surface was oxidized by being left in such an atmosphere for 3 to 5 hours to form a silicon oxide film 504 having a thickness of 500 to 1500 °, for example, 1000 °. Notable teeth, due to such oxidation, the surface of the initial silicon film is reduced by 50 ° or more, and as a result, contamination of the outermost surface portion of the silicon film is
This means that the silicon oxide interface is not reached, that is, a clean silicon-silicon oxide interface is obtained. Since the thickness of the silicon oxide film is twice the thickness of the silicon film to be oxidized,
When a silicon film having a thickness of 1000 mm is oxidized to obtain a silicon oxide film having a thickness of 1000 mm, the remaining silicon film has a thickness of 500 mm.
It means Å.

In general, the thinner the silicon oxide film (gate insulating film) and the active layer, the better the characteristics such as improved mobility and reduced off current. On the other hand, in the initial crystallization of the amorphous silicon film, the larger the film thickness, the easier the crystallization. Therefore, conventionally, there has been a contradiction in terms of characteristics and process regarding the thickness of the active layer. The present invention has solved this contradiction for the first time. That is, before crystallization, an amorphous silicon film is formed thick to obtain a good crystalline silicon film. Then, the silicon film is thinned by oxidizing the silicon film to improve the characteristics as a TFT. Further, in this thermal oxidation, an amorphous component and a crystal grain boundary where recombination centers are apt to exist are easily oxidized, and as a result, recombination centers in the active layer are reduced. This increases the product yield.

After forming the silicon oxide film 504 by thermal oxidation, the substrate is placed in a dinitrogen monoxide atmosphere (1 atm, 100 atm).
%) And annealed at 600 ° C. for 2 hours. (FIG. 5 (B)) Subsequently, a thickness of 3000 to 8 is applied by a low pressure CVD method.
000 °, for example, 6000 ° of polycrystalline silicon (0.01 to
(Containing 0.2% phosphorus). Then, the gate electrode 505 was formed by patterning the silicon film. Further, using the silicon film as a mask, an impurity (here, phosphorus) imparting an N conductivity type to the active layer region (which constitutes the source / drain and the channel) is self-aligned by an ion doping method (also referred to as a plasma doping method). ) Was added. Phosphine (PH ₃ ) as doping gas
And the acceleration voltage was set to 60 to 90 kV, for example, 80 kV. The dose was 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 5 × 10 ¹⁵ cm ⁻² . As a result, N-type impurity regions 506 and 507 were formed.

Thereafter, annealing was performed by laser light irradiation. As the laser light, a KrF excimer laser (wavelength: 248 nm, pulse width: 20 nsec) was used, but another laser may be used. The irradiation condition of the laser beam is such that the energy density is 200 to 400 mJ / cm ² ,
For example, 250 mJ / cm ^2, and ² to 10
A shot, for example, two shots was irradiated. The effect may be increased by heating the substrate to about 200 to 450 ° C. during the irradiation with the laser light. (FIG. 5 (C))

This step may be performed by lamp annealing using near-infrared light. Near infrared rays are more easily absorbed by crystallized silicon than amorphous silicon, and effective annealing comparable to thermal annealing at 1000 ° C. or higher can be performed. On the other hand, a glass substrate (far-infrared light is absorbed by the glass substrate, but visible / near-infrared light (wavelength 0.5 to 4
(μm) is hardly absorbed), so it is not necessary to heat the glass substrate to a high temperature and requires only a short processing time. Therefore, it is the most suitable method in the process where shrinkage of the glass substrate becomes a problem. It can be said that.

Subsequently, a silicon oxide film 50 having a thickness of 6000.degree.
8 was formed as an interlayer insulator by a plasma CVD method. Polyimide may be used as the interlayer insulator. Further, a contact hole is formed, and TF is formed by a metal material, for example, a multilayer film of titanium nitride and aluminum.
T electrodes / wirings 509 and 510 were formed. Finally, 1
Annealing was performed at 350 ° C. for 30 minutes in a hydrogen atmosphere at atmospheric pressure to complete the TFT. (FIG. 5 (D))

The mobility of the TFT obtained by the above method is 110 to 150 cm ² / Vs, and the S value is 0.2 to 0.5.
V / digit. In addition, a P-channel TFT in which the source / drain was doped with boron was manufactured by the same method, and the mobility was 90 to 120 cm ² / Vs.
The S value is 0.4 to 0.6 V / digit, the mobility is 20% or more higher than the case where a gate insulating film is formed by a known PVD method or CVD method, and the S value is 20% or more. Diminished. Also, from the viewpoint of reliability, the T
FT is TF manufactured by high temperature thermal oxidation at 1000 ° C.
Good results were shown, which were comparable to T.

[Embodiment 8] This embodiment shows an example in which the present invention is applied to an active matrix type liquid crystal display device. FIG. 7 is a top view schematically illustrating one substrate of the active matrix type liquid crystal display device of FIG. 6.

In the figure, reference numeral 61 denotes a glass substrate;
Reference numeral 2 denotes a pixel area configured in a matrix, and several hundreds × several hundreds of pixels are formed in the pixel area. Each of the pixels is provided with a TFT as a switching element. The driver TFT for driving the TFT in this pixel area is disposed in the peripheral driver area 6.
2. The pixel region 63 and the driver region 62 are formed integrally on the same substrate 61.

The TFT arranged in the driver region 62 needs to flow a large current, and needs high mobility.
In addition, since the TFTs arranged in the pixel region 63 need to have a high retention rate of the charges of the pixel electrodes, the TFTs need to have a characteristic with a small off-current (leakage current). For example, as the TFT arranged in the pixel region 63, the TFT described in Embodiment 5 can be used.

[Embodiment 9] In this embodiment, a rubbing treatment is performed on the surface of a silicon oxide film before the step of applying an aqueous solution of nickel acetate in the manufacturing method shown in Embodiment 1, whereby the surface of the silicon oxide film is treated. To form fine abrasions on
This is an example in which nickel is introduced into an amorphous silicon film with a certain direction, width, and interval.

First, a silicon oxide film was formed on a substrate (Corning 7059) as a base film by sputtering.
00 ° was formed. Then, the amorphous silicon film is plasma-CV
The film was formed at 300 to 800 °, for example, 500 ° by Method D. Then, a hydrofluoric acid treatment was performed to remove dirt and a natural oxide film, and thereafter, irradiation with UV light was performed in an oxygen atmosphere to form a silicon oxide film of 10 to 100 °. At this time, a silicon oxide film may be formed by treatment with hydrogen peroxide or thermal oxidation.

After the formation of the silicon oxide film, a rubbing treatment was performed on the surface of the silicon oxide film to form fine scratches on the film surface as shown in FIG. This rubbing treatment was performed using a diamond paste, but it is also possible to use a cotton cloth, rubber, or the like. Where the abrasion is in a certain direction, width,
Preferably, it is an interval.

After the unevenness due to abrasion was formed on the film surface as described above, a nickel acetate film was formed by spin coating in the same manner as in Example 1. At this time, the nickel acetate aqueous solution uniformly penetrates into the concave portion of the scratch formed in the previous step.

Thereafter, in the same manner as in Example 1, a heat treatment was performed in a heating furnace at 550 ° C. for 4 hours in a nitrogen atmosphere. As a result, a crystalline silicon film (crystalline silicon film) was obtained. In this embodiment, the rubbing treatment is performed on the silicon oxide film to introduce nickel into the amorphous silicon film with a certain direction, width, and interval. Therefore, as shown in FIG. This crystalline silicon film was obtained in which the direction and size of the crystal grain boundaries were uniform to some extent. That is, like a rectangle or ellipse,
Many long crystal grains were obtained in one direction. In FIG. 7B, the shape of the crystal is described as being elliptical, but crystals of other shapes were obtained at the same time. The longitudinal direction of the crystal grains was roughly the direction of rubbing.

The width and interval of the unevenness may be optimized by changing the rubbing time, the density of the diamond paste, and the like. However, since the width and interval cannot be clearly measured by microscopic observation, conditions were determined so that the size of crystal grains of the obtained crystalline silicon film, the density of the remaining amorphous silicon, and the like were optimized. In this embodiment, the size (major axis) of the remaining amorphous silicon (non-crystallized region) is 1 μm or less, preferably
The thickness was set to 0.3 μm or less.

In the case where nickel acetate was applied without rubbing treatment and crystallization was performed as in Example 1, the nickel penetration was not uniform, and the crystallization was not uniform. A circular uncrystallized region having a size of about 10 to 10 μm was observed. However, in this embodiment,
The number of such uncrystallized regions was significantly reduced, and their size could be reduced.

[Embodiment 10] This embodiment is an example in which a pixel TFT is manufactured using the crystalline silicon film manufactured in Embodiment 9. FIG. 8 shows a manufacturing process of this embodiment. First, the substrate 8
01 (Corning 7059, 10 cm square), a silicon oxide film 802 is formed as a base film by plasma CVD.
A film was formed at 000 °. Then, the amorphous silicon film is formed to a thickness of 300 to 1000 °, for example, 500
成膜 was formed.

Thereafter, as in Example 9, a silicon oxide film was formed in the form of an amorphous silicon film, rubbing was performed, and a nickel acetate film was formed by spin coating. Then, heat treatment was performed at 550 ° C. for 4 hours in a nitrogen atmosphere to crystallize. Many of the crystals were long in one direction.

Thereafter, a laser beam was applied to further improve the crystallinity. At this time, the KrF excimer laser light (wavelength: 248 nm) is applied at 200 to 350 mJ / cm ^2.
By irradiation, a good crystalline silicon film 803 was further obtained. Further, as a result, the uncrystallized region that was slightly present was completely crystallized. (FIG. 8A)

Next, the crystalline silicon film 803 thus obtained was patterned to form an island-like region 804 (island-like silicon film). When this island-like region is formed, there are two types of directions, perpendicular and parallel to the crystal grain boundaries, as shown in FIGS. 9A and 9B.

At this time, when the current flowing through the TFT crosses the grain boundary, the resistance of the grain boundary is large. In addition, current easily flows along the grain boundaries. Therefore, depending on the number and direction of the grain boundaries included in the channel region, the leakage current of the TFT (the drain current when a reverse bias voltage is applied to the gate electrode. For example, in the case of an N-channel type TFT, the gate electrode Drain voltage with negative voltage applied to
Is greatly affected. In particular, when there are a plurality of TFTs, if the number and direction of the crystals (grain boundaries) existing in the channels of the TFTs vary greatly, this may cause a variation in the leak current.

This becomes a serious problem when the size of the crystal grains is equal to or smaller than the size of the channel. If the channel is sufficiently large compared to the crystal grains, such variations are averaged out and are not observed as a phenomenon. For example, in the situation where one grain boundary exists in the channel or not, if the grain boundary does not exist, the same characteristics as a single crystal TFT can be expected. On the other hand, when the grain boundary exists parallel to the drain current, the leak current increases. Conversely, when the grain boundary exists at right angles to the drain current, the leakage current becomes smaller.

In this embodiment, since the crystal grows long and thin in the rubbing direction, when the direction in which the drain current flows is set parallel to the direction (FIG. 9A), the crystal is grown in the channel region. The number of existing grain boundaries (crystals) is hardly averaged, and the leakage current is likely to vary. And in general,
Since the direction of the drain current is the direction of the grain boundary, the leakage current is large. On the other hand, when taken vertically as shown in FIG. 9B, in the present invention, since the width of the crystal grain 901 is almost constant, the grain boundary 903 existing in the channel region 902 is formed.
Are almost equal, and stable I _off can be expected. Therefore, as shown in FIG. 9B, the island-shaped silicon film 804 may be formed in a direction in which the direction in which the drain current flows is perpendicular to the grain boundary direction (that is, substantially perpendicular to the rubbing direction).
This island-shaped silicon film 804 forms an active layer of the TFT.

In the present embodiment, in addition to the above, there was a drop due to averaging of crystal grains due to the rubbing treatment. For example, if the size of the crystal grains fluctuates significantly, the number of crystals that can exist in the channel will fluctuate greatly,
In particular, it caused a variation in leakage current. In the case of Example 1, since the diffusion of nickel was non-uniform, the size of the crystal grains may be varied, and 10 μm
The large uncrystallized region described above was remarkably poor in crystallinity even when crystallized by laser irradiation.

However, when the rubbing treatment is performed as in the present embodiment, the crystal size becomes relatively uniform, and the uncrystallized region is crystallized by the laser irradiation when the crystal in the vicinity is not crystallized. Due to the strong influence, epitaxial growth was performed, so that good crystallinity was exhibited. The effect obtained by performing the rubbing treatment as described above was observed. Next, a gate insulating film 805 having a thickness of 20
A silicon oxide film of 0 to 1500 °, for example, 1000 ° was formed by a plasma CVD method.

Thereafter, an aluminum (containing 1 wt% Si or 0.1 to 0.3 wt% Sc) film having a thickness of 1000 to 3 μm, for example, 5000 ° is formed by a sputtering method, and is patterned. hand,
A gate electrode 806 was formed. Next, the substrate was adjusted to pH 7,
It was immersed in an ethylene glycol solution of 1 to 3% tartaric acid, and anodized using platinum as a cathode and an aluminum gate electrode 806 as an anode. The anodic oxidation was first completed by increasing the voltage to 220 V at a constant current and maintaining the state for 1 hour. In this way, the thickness of 1500-3500
An anodic oxide 807 having a thickness of, for example, 2000 mm was formed. (FIG. 8 (B))

Thereafter, the island is formed by ion doping.
The gate electrode 806 is used as a mask on the silicon
Impurities were implanted in a self-aligned manner. Here, diborane (B
_TwoH ₆) Is implanted with boron as a doping gas to form a P-type
An impurity region 808 was formed. In this case, the dose of boron
Amount is 4-10 × 10^Fifteencm^-2And the acceleration voltage is 65 kV
Was. (FIG. 8 (C))

Further, a KrF excimer laser (wavelength 2
Irradiation of 48 nm and a pulse width of 20 nsec) was performed to activate the doped impurity region 808. Laser energy density is 200-400mJ / c
m ² , preferably 250 to 300 mJ / cm ² was suitable. Next, as an interlayer insulating film 809, plasma C
A silicon oxide film was formed to a thickness of 3000 ° by the VD method.

Then, the interlayer insulating film 809 and the gate insulating film 805 were etched to form a contact hole in the source. Thereafter, an aluminum film is formed by a sputtering method, and is patterned to form a source electrode 8.
10 was formed. (FIG. 8 (D))

Finally, a silicon nitride film having a thickness of 2000 to 6000 Å, for example, 3000 と し て is formed as a passivation film 811 by a plasma CVD method, and the interlayer insulating film 809 and the gate insulating film 805 are etched.
A contact hole was formed for the drain. Then, an indium tin oxide film (ITO film) was formed, and this was etched to form a pixel electrode 812. (FIG. 8E) The pixel TFT was formed as described above.

[0129]

[Effect] By manufacturing a semiconductor device using a crystalline silicon film which is crystallized at a low temperature in a short time by introducing a catalytic element, a device having high productivity and excellent characteristics can be obtained.

[Brief description of the drawings]

FIG. 1 shows the steps of an example.

FIG. 2 shows a process of an example.

FIG. 3 shows a relationship between a nickel concentration in a solution and a crystal growth distance in a lateral direction.

FIG. 4 shows a manufacturing process of an example.

FIG. 5 shows a manufacturing process of an example.

FIG. 6 shows a configuration of an example.

FIG. 7 shows the crystal growth of an example.

FIG. 8 shows a manufacturing process of the example.

FIG. 9 shows an arrangement of an active layer of the TFT according to the embodiment.

[Explanation of symbols]

 11: Glass substrate 12: Amorphous silicon film 13: Silicon oxide film 14: Nickel-containing acetic acid solution film 15: Spinner 21: Mask Silicon oxide film 20 silicon oxide film 11 glass substrate 104 active layer 105 silicon oxide film 106 gate electrode 109 oxide layer 108 source / Drain region 109: drain / source region 110: interlayer insulating film (silicon oxide film) 111: pixel electrode (ITO) 112: electrode 113: electrode

────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] August 8, 2001 (2001.8.8)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claim 5

[Correction method] Change

[Correction contents]

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] Claim 6

[Correction method] Change

[Correction contents]

Continuing from the front page (72) Inventor Hirohide Zhang 398, Hase, Atsugi-shi, Kanagawa F-term in the Semiconductor Energy Laboratory Co., Ltd. 5F052 AA02 AA17 AA24 BB07 CA07 DA01 DB02 DB03 DB07 EA01 EA15 FA06 FA19 JA01 5F110 AA16 BB02 CC02 DD02 DD13 EE03 EE06 EE09 EE34 EE43 EE44 EE45 FF02 FF04 FF23 FF26 FF29 FF30 FF32 FF36 GG02 GG13 GG16 GG25 GG35 GG45 GG47 HJ01 PPJNN HJ12 HJ23 HL01 HL03 NN04 NN04 NN03 PP34 QQ11 QQ19 QQ24

Claims (10)

[Claims] An amorphous silicon film is formed on a substrate, and a solution containing an element that promotes crystallization of the amorphous silicon film is held in contact with a part of the amorphous silicon film. A method for manufacturing a semiconductor device in which a crystalline silicon film is heated and crystallized, wherein the concentration of the element in the solution is 200 ppm or less, and the concentration of the element in the silicon film after the crystallization is 1 × 10
^A method for manufacturing a semiconductor device, which is ¹⁶ to 1 × 10 ¹⁹ atoms / cm ³ . 2. The method for manufacturing a semiconductor device according to claim 1, wherein the solution has a time to be kept in contact with the amorphous silicon film before the crystallization. 3. The method according to claim 2, wherein the concentration of the element in the silicon film after the crystallization is adjusted by the holding time. 4. A silicon film is formed on a substrate, a solution containing nickel is brought into contact with and held by the silicon film, the solution is dried to form a layer containing nickel, and the silicon film is heated. A method for manufacturing a semiconductor device to be crystallized, further comprising an oxide film between the silicon film and the layer containing nickel, wherein the nickel is diffused into the silicon film through the oxide film. Of manufacturing a semiconductor device. 5. A silicon film is formed on a substrate, a solution containing 200 ppm of nickel is in contact with and held in contact with the silicon film, and the solution containing nickel is dried to form a film containing nickel on the silicon film. A method of manufacturing a semiconductor device in which the silicon film is heated and crystallized, wherein the nickel concentration in the silicon film after the crystallization is 1 × 10
^A method for manufacturing a semiconductor device, which is ¹⁶ to 1 × 10 ¹⁹ atoms / cm ³ . 6. A silicon film is formed on a substrate, a solution containing an element that promotes crystallization of an amorphous silicon film is applied on a first region of the silicon film, and the silicon film is heated. A method for manufacturing a semiconductor device, comprising: growing a crystal from the first region to a second region not directly coated with a solution containing the element; and forming an active layer in the second region. The method for manufacturing a semiconductor device, wherein the concentration of the element in the second region after the formation is 1 × 10 ¹⁶ to 1 × 10 ¹⁹ atoms / cm ³ . 7. The method according to claim 6, wherein the silicon film is amorphous. 8. The method for manufacturing a semiconductor device according to claim 6, wherein the first region has a higher concentration of the element than the second region. 9. The method for manufacturing a semiconductor device according to claim 6, wherein the second region is patterned after the heating. 10. The method for manufacturing a semiconductor device according to claim 6, wherein the element is Ni, Pd, or Pt.