JP2002107559A - Substrate for optical integrated circuit - Google Patents

Substrate for optical integrated circuit

Info

Publication number
JP2002107559A
JP2002107559A JP2000294716A JP2000294716A JP2002107559A JP 2002107559 A JP2002107559 A JP 2002107559A JP 2000294716 A JP2000294716 A JP 2000294716A JP 2000294716 A JP2000294716 A JP 2000294716A JP 2002107559 A JP2002107559 A JP 2002107559A
Authority
JP
Japan
Prior art keywords
light receiving
substrate
receiving element
integrated circuit
optical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000294716A
Other languages
Japanese (ja)
Inventor
Yuriko Ueno
由里子 上野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2000294716A priority Critical patent/JP2002107559A/en
Publication of JP2002107559A publication Critical patent/JP2002107559A/en
Pending legal-status Critical Current

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  • Optical Couplings Of Light Guides (AREA)
  • Optical Integrated Circuits (AREA)
  • Light Receiving Elements (AREA)

Abstract

PROBLEM TO BE SOLVED: To miniaturize an optical integrated circuit substrate and shorten the height of it while optically coupling an optical waveguide with a semiconductor photodetector with high light receiving efficiency. SOLUTION: The optical integrated circuit substrate is provided with a surface light receiving type semiconductor photodetector 2 which is disposed on a substrate 1 and an optical waveguide which is formed on the semiconductor light photodetector 2 and has at least a lower clad part 3 and a core part 4. The core part 4 is bent in a nearly V shape over the semiconductor photodetector 2 and its bottom part is abutted on the light receiving surface of the semiconductor light photodetector 2. Since light propagating through the core part 4 is directly inputted into the light receiving surface from the bottom part abutted on the light receiving surface, the efficiency of the optical coupling between the optical waveguide and the semiconductor photodetector 2 is high, and optical coupling is efficiently performed with a small light receiving area.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、光導波路と半導体
受光素子とを同一基板に集積する光集積回路基板に関
し、例えばWDM(Wavelength Division Multiplex:
波長分割多重伝送方式)用受光回路基板のように同一基
板上に複数の半導体受光素子およびその他のデバイスを
搭載するような場合に好適に利用され、光導波路と半導
体受光素子とを同一基板に集積して基板サイズの小型化
と受光効率の増加を実現できる光集積回路基板に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical integrated circuit board in which an optical waveguide and a semiconductor light receiving element are integrated on the same substrate, for example, a WDM (Wavelength Division Multiplex: WDM).
It is suitably used when a plurality of semiconductor light-receiving elements and other devices are mounted on the same substrate, such as a light-receiving circuit substrate for wavelength division multiplex transmission, and the optical waveguide and the semiconductor light-receiving element are integrated on the same substrate. In addition, the present invention relates to an optical integrated circuit substrate capable of realizing a reduction in substrate size and an increase in light receiving efficiency.

【0002】[0002]

【従来の技術】従来、WDM用受光回路基板等のような
光集積回路基板における半導体受光素子と光導波路との
接続は、光導波路層の上方に半導体受光素子を実装し、
光導波路からの光は、光導波路に作り込んだミラーやグ
レーティングを通して光路変更することによって半導体
受光素子の受光部に入力させるのが一般的であった。
2. Description of the Related Art Conventionally, the connection between a semiconductor light receiving element and an optical waveguide in an optical integrated circuit board such as a light receiving circuit board for WDM is performed by mounting the semiconductor light receiving element above the optical waveguide layer.
In general, light from an optical waveguide is input to a light receiving section of a semiconductor light receiving element by changing an optical path through a mirror or a grating formed in the optical waveguide.

【0003】この方法では、光導波路層の上部に半導体
受光素子が集積されており、基板全体のサイズが大きい
ものであった。また、半導体受光素子を実装する際の位
置合わせも赤外線を裏面から当てて画像認識を行ないア
ライメントをする必要があり、光集積回路を作製する基
板としては、赤外線を透過する基板であることが必要で
あることから基板材料の種類に対する限定もあった。さ
らに、光導波路に作り込むミラーやグレーティングの作
製プロセスも煩雑であった。
In this method, a semiconductor light receiving element is integrated on an optical waveguide layer, and the size of the entire substrate is large. In addition, when mounting the semiconductor light receiving element, it is necessary to perform image recognition by applying infrared light from the back side to perform alignment, and a substrate for manufacturing an optical integrated circuit must be a substrate that transmits infrared light. Therefore, there is also a limitation on the type of substrate material. Further, the process of manufacturing mirrors and gratings to be formed in the optical waveguide is complicated.

【0004】そこで、基板サイズの小型化を図った光集
積回路基板の例が特開平3−191572号公報に提案されて
いる。その例を図4に断面図で示す。図4において、21
はSi基板、22は絶縁性または導電性の接合部材、23は
受光素子チップのn形部、24は受光素子チップのp形
部、25は光導波路のコア部に相当する高屈折率層、26は
光導波路のクラッド部に相当する低屈折率層、27は発光
素子チップのp形部、28は発光素子のn形部である。受
光素子チップのn形部23およびp形部24で受光部が、発
光素子チップのp形部27およびn形部28で発光部が形成
されている。
Therefore, an example of an optical integrated circuit board having a reduced board size has been proposed in Japanese Patent Application Laid-Open No. 3-191572. FIG. 4 is a cross-sectional view showing an example thereof. In FIG.
Is an Si substrate, 22 is an insulating or conductive bonding member, 23 is an n-type part of the light-receiving element chip, 24 is a p-type part of the light-receiving element chip, 25 is a high refractive index layer corresponding to a core part of the optical waveguide, 26 is a low-refractive-index layer corresponding to the clad part of the optical waveguide, 27 is a p-type part of the light-emitting element chip, and 28 is an n-type part of the light-emitting element. The n-type part 23 and the p-type part 24 of the light-receiving element chip form a light-receiving part, and the p-type part 27 and the n-type part 28 of the light-emitting element chip form a light emitting part.

【0005】これによれば、受光素子チップおよび発光
素子チップがSi基板21に形成されたV溝に平坦化材料
29により溝埋めされて埋め込まれているので、光集積回
路基板全体の高さはSi基板21と光導波路のコア部25お
よびクラッド部26との高さで決まることとなり、光導波
路と半導体受光素子との集積がコンパクトに実現されて
いる。
According to this, a light receiving element chip and a light emitting element chip are formed in a V-groove formed in the Si substrate 21 with a planarizing material.
Since the groove is filled with 29, the entire height of the optical integrated circuit substrate is determined by the height of the Si substrate 21, the core portion 25 and the clad portion 26 of the optical waveguide, and the optical waveguide and the semiconductor light receiving element Is realized compactly.

【0006】また、特開平7−128531号公報に提案され
た光集積回路基板の例を図5に断面図で示す。クラッド
部36中に形成された光導波路のコア部35が半導体層33と
光吸収層34とから成る半導体受光素子の上面に乗り上げ
るように屈曲し、半導体受光素子の端面とコア部35との
間を下部のクラッド部36で埋め込まれている構造を有
し、コア部35の屈曲部からの放射光を半導体受光素子の
光吸収層34に取り込むことによって、光導波路と半導体
受光素子との結合効率を高くしている。
FIG. 5 is a sectional view showing an example of an optical integrated circuit board proposed in Japanese Patent Application Laid-Open No. Hei 7-128531. The core part 35 of the optical waveguide formed in the clad part 36 is bent so as to ride on the upper surface of the semiconductor light receiving element composed of the semiconductor layer 33 and the light absorbing layer 34, and is formed between the end face of the semiconductor light receiving element and the core part 35. Is embedded in the lower clad portion 36, and the light emitted from the bent portion of the core portion 35 is taken into the light absorbing layer 34 of the semiconductor light receiving element, thereby coupling efficiency between the optical waveguide and the semiconductor light receiving element. Is higher.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、特開平
3−191572号公報に提案された光集積回路基板に関して
は、受光素子および発光素子を埋め込むためにはV溝の
形成が必要であり、V溝を形成できるSi基板上にしか
光導波路と半導体受光素子を集積できない、という問題
点があった。
However, with respect to the optical integrated circuit board proposed in Japanese Patent Application Laid-Open No. 3-191572, it is necessary to form a V-groove in order to embed a light-receiving element and a light-emitting element. There has been a problem that the optical waveguide and the semiconductor light receiving element can be integrated only on the Si substrate on which can be formed.

【0008】また、図4に示す構造では、シミュレーシ
ョンで見積もると、光導波路を伝搬してきた光は10%程
度しか半導体受光素子の受光部に結合されず、受光効率
が低いという問題点もあった。
Further, in the structure shown in FIG. 4, when estimated by simulation, only about 10% of the light propagating through the optical waveguide is coupled to the light receiving portion of the semiconductor light receiving element, and the light receiving efficiency is low. .

【0009】また、特開平7−128531号公報に提案され
た光集積回路基板に関しては、光導波路と半導体受光素
子とをそれぞれ2つの平行する光導波路とみなして、光
導波路の結合の原理を用いた結合を考えているが、光導
波路のコア部35の屈曲部において光を放射させることに
よって光導波路と半導体受光素子との光結合効率を高め
ている。
Further, regarding the optical integrated circuit board proposed in Japanese Patent Application Laid-Open No. Hei 7-128531, the optical waveguide and the semiconductor light receiving element are regarded as two parallel optical waveguides, respectively, and the principle of coupling of the optical waveguides is used. Although light coupling is considered, light is emitted at the bent portion of the core portion 35 of the optical waveguide to increase the optical coupling efficiency between the optical waveguide and the semiconductor light receiving element.

【0010】しかしながら、この例においては、光結合
の原理に従うと、光導波路と半導体受光素子の受光部と
の屈折率差が大きいため、光導波路を伝搬していた光が
半導体受光素子を伝搬するには、非常に長い結合長が必
要である。これについて、図6に光導波路と半導体受光
素子とを2つの平行した光導波路と考えた場合の結合長
(Waveguide length)に対する結合効率の例を線図で示
す。図6において、横軸は結合長Waveguide length(単
位:μm)、縦軸は結合係数Coupling efficientを表わ
し、黒四角の点および特性曲線は結合長に対する結合係
数の変化の様子を示している。これより分かるように、
光導波路を伝搬している光の10%を入力させる場合にお
いても、約1500μmという非常に長い距離が必要であ
り、基板サイズの小型化が困難であるという問題点があ
った。
However, in this example, according to the principle of optical coupling, since the difference in the refractive index between the optical waveguide and the light receiving portion of the semiconductor light receiving element is large, the light propagating through the optical waveguide propagates through the semiconductor light receiving element. Requires very long bond lengths. FIG. 6 is a diagram showing an example of the coupling efficiency with respect to the coupling length (Waveguide length) when the optical waveguide and the semiconductor light receiving element are considered as two parallel optical waveguides. In FIG. 6, the horizontal axis represents the coupling length Waveguide length (unit: μm), the vertical axis represents the coupling coefficient Coupling efficient, and the black square points and the characteristic curves show how the coupling coefficient changes with the coupling length. As you can see,
Even when inputting 10% of the light propagating through the optical waveguide, a very long distance of about 1500 μm is required, and it is difficult to reduce the size of the substrate.

【0011】本発明は上記従来技術における問題点に鑑
みてなされたものであり、その目的は、Si基板以外に
も各種の基板上に集積でき、また、光導波路を伝搬する
光に対する半導体受光素子の受光効率の良い光集積回路
基板を提供することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems in the prior art, and has as its object to integrate a semiconductor light receiving element for light propagating through an optical waveguide, which can be integrated on various substrates other than a Si substrate. An object of the present invention is to provide an optical integrated circuit substrate having high light receiving efficiency.

【0012】[0012]

【課題を解決するための手段】本発明の光集積回路基板
は、基板上に配設された面受光型の半導体受光素子と、
この半導体受光素子上に形成された、少なくとも下部ク
ラッド部およびコア部を有する光導波路とを具備して成
り、前記コア部は、前記半導体受光素子の上方で略V字
状に屈曲してその底部が前記半導体受光素子の受光面に
当接していることを特徴とするものである。
An optical integrated circuit board according to the present invention comprises: a surface light receiving type semiconductor light receiving element disposed on a substrate;
An optical waveguide having at least a lower cladding part and a core part formed on the semiconductor light receiving element, wherein the core part is bent substantially in a V shape above the semiconductor light receiving element and has a bottom part. Are in contact with the light receiving surface of the semiconductor light receiving element.

【0013】また、本発明の光集積回路基板は、上記構
成において、前記コア部の略V字状に屈曲した前記底部
は、その上面と前記受光面との間で前記コア部を伝搬す
る光が複数回反射するように前記受光面に平行な領域を
有していることを特徴とするものである。
Further, in the optical integrated circuit board according to the present invention, in the above-described configuration, the bottom portion of the core portion bent in a substantially V-shape is a light propagating through the core portion between its upper surface and the light receiving surface. Has a region parallel to the light receiving surface so that the light is reflected a plurality of times.

【0014】また、本発明の光集積回路基板は、上記各
構成において、前記コア部の略V字状に屈曲した前記底
部は、その上面が前記コア部よりも屈折率の低い誘電体
または金属で覆われていることを特徴とするものであ
る。
In the optical integrated circuit board according to the present invention, in each of the above structures, the bottom portion of the core portion bent in a substantially V-shape may be a dielectric or metal whose upper surface has a lower refractive index than the core portion. It is characterized by being covered with.

【0015】[0015]

【発明の実施の形態】本発明の光集積回路基板によれ
ば、基板上に例えば実装されあるいは形成されて配設さ
れた面受光型の半導体受光素子に対して、その上に光導
波路を積層するように形成していることから、半導体受
光素子と光導波路とを同一基板に効率的に集積すること
ができ、従来のように基板上に光導波路を形成した後で
半導体受光素子を実装した集積回路基板と比較して小型
化・低背化できるとともに、この光導波路上にさらに別
の光電子デバイス等を搭載実装することができるので、
特に基板上に半導体受光素子および光電子デバイスをそ
れぞれ複数個搭載するような光集積回路基板について
も、光集積回路基板の小型化を実現することができる。
According to the optical integrated circuit substrate of the present invention, an optical waveguide is laminated on a surface light receiving type semiconductor light receiving element mounted or formed on a substrate, for example. As a result, the semiconductor light receiving element and the optical waveguide can be efficiently integrated on the same substrate, and the semiconductor light receiving element is mounted after forming the optical waveguide on the substrate as in the related art. Since it is possible to reduce the size and height as compared with the integrated circuit substrate and to mount and mount another optoelectronic device or the like on this optical waveguide,
In particular, even for an optical integrated circuit substrate in which a plurality of semiconductor light receiving elements and a plurality of optoelectronic devices are mounted on the substrate, the size of the optical integrated circuit substrate can be reduced.

【0016】また、本発明の光集積回路基板によれば、
半導体受光素子を形成することができる基板や、半導体
受光素子を搭載実装することができる基板であれば各種
の基板を用いることができ、半導体受光素子の配設構造
に制約がないので、従来のようにV溝の形成が必要なS
i基板に限らず、電気的特性の良いセラミック基板等、
信号処理の高速化および光電子デバイスの高集積化によ
り好適な基板を使用することができる。
Further, according to the optical integrated circuit board of the present invention,
Various substrates can be used as long as the substrate can form a semiconductor light receiving element or a substrate on which a semiconductor light receiving element can be mounted and mounted. Need to form a V-groove
Not only i-substrate but also ceramic substrate with good electrical characteristics,
Suitable substrates can be used for high-speed signal processing and high integration of optoelectronic devices.

【0017】また、本発明の光集積回路基板によれば、
面受光型の半導体受光素子に対して、その上に少なくと
も下部クラッド部およびコア部を有する光導波路を形成
し、このコア部を半導体受光素子の上方で略V字状に屈
曲させてその底部が半導体受光素子の受光面に当接して
いるものとしたことから、従来のように2つの光導波路
の結合の理論を利用した結合と比較して、コア部を伝搬
する光を受光面に当接したコア部の底部から受光面へ直
接入力することができるため、光導波路と半導体受光素
子との光結合の結合効率が高く、小さい受光面積で効率
的に光結合を行なうことができる光集積回路基板とな
る。
According to the optical integrated circuit board of the present invention,
An optical waveguide having at least a lower cladding part and a core part is formed on a surface light receiving type semiconductor light receiving element, and this core part is bent in a substantially V shape above the semiconductor light receiving element so that the bottom part is formed. Since the light receiving surface of the semiconductor light receiving element is in contact with the light receiving surface, light propagating through the core portion is brought into contact with the light receiving surface as compared with the conventional coupling using the coupling theory of two optical waveguides. An optical integrated circuit that can directly input light from the bottom of the core part to the light receiving surface, so that the optical coupling between the optical waveguide and the semiconductor light receiving element is high and the optical coupling can be efficiently performed with a small light receiving area It becomes a substrate.

【0018】また、本発明の光集積回路基板によれば、
光導波路のコア部の略V字状に屈曲した底部が、その上
面と半導体受光素子の受光面との間で、コア部を伝搬す
る光が複数回反射するように受光面に平行な領域を有し
ている場合には、コア部の略V字状に屈曲した底部から
受光面に光が直接入力される際に、大きな屈折率差を有
するコア部の底面と半導体受光素子の受光面との界面で
反射された光がこの受光面に平行な領域の上面で反射さ
れて再び受光面へ入力されることとなり、これを複数回
繰り返すことによって、受光効率をさらに高めることが
できる光集積回路基板となる。
According to the optical integrated circuit substrate of the present invention,
A substantially V-shaped bent bottom of the core portion of the optical waveguide forms an area parallel to the light receiving surface between the upper surface and the light receiving surface of the semiconductor light receiving element so that light propagating through the core portion is reflected multiple times. When light is directly input to the light receiving surface from the substantially V-shaped bottom portion of the core portion, the light receiving surface of the semiconductor light receiving element has the bottom surface of the core portion having a large refractive index difference and the light receiving surface of the semiconductor light receiving element. The light reflected at the interface is reflected on the upper surface of the region parallel to the light receiving surface and is input to the light receiving surface again. By repeating this plural times, the optical integrated circuit can further increase the light receiving efficiency. It becomes a substrate.

【0019】さらに、本発明の光集積回路基板によれ
ば、光導波路のコア部の略V字状に屈曲した底部が、そ
の上面がコア部よりも屈折率の低い誘電体で覆われてい
るか、または金属で覆われている場合には、コア部の略
V字状に屈曲した底部から受光面に光が直接入力される
際に、大きな屈折率差を有するコア部の底面と半導体受
光素子の受光面との界面で反射された光がこの誘電体ま
たは金属で覆われた上面で確実に反射されて再び受光面
へ入力されることとなり、受光効率をさらに高めること
ができる光集積回路基板となる。そして、上記の受光面
に平行な領域を有するものと併用した場合には、コア部
の底部の上面に入射した光を確実に効率よく反射して再
び受光面に入力させることができ、受光効率をより一層
高めることができる高効率な光集積回路基板となる。
Further, according to the optical integrated circuit board of the present invention, is the bottom portion of the core portion of the optical waveguide bent in a substantially V shape covered with a dielectric material having a lower refractive index than that of the core portion? Or when covered with metal, when light is directly input to the light receiving surface from the substantially V-shaped bent bottom of the core, the bottom surface of the core having a large refractive index difference and the semiconductor light receiving element The light reflected at the interface with the light receiving surface of the optical integrated circuit substrate that can be reliably reflected on the upper surface covered with the dielectric or metal and is input to the light receiving surface again, thereby further improving the light receiving efficiency Becomes When used in combination with the above-described one having a region parallel to the light receiving surface, light incident on the upper surface of the bottom of the core portion can be reliably and efficiently reflected and input to the light receiving surface again. And a high-efficiency optical integrated circuit substrate that can further enhance the optical integrated circuit substrate.

【0020】以下、本発明の光集積回路基板について図
面を参照しつつ説明する。
Hereinafter, an optical integrated circuit substrate according to the present invention will be described with reference to the drawings.

【0021】図1は、本発明の光集積回路基板の実施の
形態の一例を示す光集積回路基板の断面図である。
FIG. 1 is a sectional view of an optical integrated circuit board showing an example of an embodiment of the optical integrated circuit board of the present invention.

【0022】本発明の光集積回路基板は、図1に示すよ
うに、基板1上に配設された面受光型の半導体受光素子
2と、この基板1上の半導体受光素子2上に形成され
た、下部クラッド部3・コア部4・上部クラッド部5か
ら成る光導波路とを具備するものである。なお、上部ク
ラッド部5は必ずしも必要なものではなく、上部クラッ
ド部5を形成せず、コア部4の上部を空気(比誘電率は
約1)としておくことによっても、光導波路による良好
な光伝送および半導体受光素子2への良好な光接続を行
なうことができる。
As shown in FIG. 1, an optical integrated circuit board of the present invention is formed on a surface light receiving type semiconductor light receiving element 2 provided on a substrate 1 and on the semiconductor light receiving element 2 on the substrate 1. Further, an optical waveguide including a lower clad part 3, a core part 4, and an upper clad part 5 is provided. Note that the upper clad portion 5 is not always necessary, and that the upper clad portion 5 is not formed, and the upper portion of the core portion 4 is made of air (having a relative dielectric constant of about 1). Good transmission and good optical connection to the semiconductor light receiving element 2 can be performed.

【0023】図1に示す例では、半導体受光素子2上に
形成された光導波路のコア部4が、半導体受光素子2の
上方で略V字状に屈曲してその底部が半導体受光素子2
の受光面に当接している。これにより、従来の光集積回
路基板のように2つの光導波路の結合の理論を利用した
結合と比較して、光導波路を伝搬する光は、コア部4の
屈曲した部分の底部からこれが当接している半導体受光
素子2の受光面へ直接入力することとなるため、小さい
受光面積で効率的に光結合を行なうことができる。
In the example shown in FIG. 1, the core portion 4 of the optical waveguide formed on the semiconductor light receiving element 2 is bent in a substantially V shape above the semiconductor light receiving element 2 and the bottom thereof is
Abut on the light receiving surface. As a result, light propagating through the optical waveguide comes into contact with the core portion 4 from the bottom at the bent portion, as compared with the coupling using the coupling theory of two optical waveguides as in the conventional optical integrated circuit board. Since the light is directly input to the light receiving surface of the semiconductor light receiving element 2, optical coupling can be efficiently performed with a small light receiving area.

【0024】次に、図2に本発明の光集積回路基板の実
施の形態の他の例を図1と同様の断面図で示す。図2に
おいて図1と同様の箇所には同じ符号を付してある。こ
の例においても、光導波路の上部クラッド部5は必ずし
も必要なものではない。
Next, FIG. 2 shows another embodiment of the optical integrated circuit board according to the present invention in a sectional view similar to FIG. In FIG. 2, the same parts as those in FIG. 1 are denoted by the same reference numerals. Also in this example, the upper clad part 5 of the optical waveguide is not always necessary.

【0025】図2に示す例では、半導体受光素子2上に
形成された光導波路のコア部4が、半導体受光素子2の
上方で略V字状に屈曲してその底部が半導体受光素子2
の受光面に当接しており、この底部が、コア部4の底面
と半導体受光素子2の受光面との界面で反射された光が
コア部4を伝搬しながら底部の上面と半導体受光素子2
の受光面との間で複数回反射するように受光面に平行な
領域を有している。これにより、図中に光の伝搬の様子
を矢印で示したように、コア部4を伝搬する光が底部の
受光面に平行な領域の上面で反射されて再び受光面へ入
力され、再び受光面で反射された光がさらに上面で反射
されて受光面を入力されることとなり、これを複数回繰
り返すことができることから、受光効率をさらに高める
ことができる光集積回路基板となる。
In the example shown in FIG. 2, the core portion 4 of the optical waveguide formed on the semiconductor light receiving element 2 is bent in a substantially V shape above the semiconductor light receiving element 2 and the bottom thereof is
The light reflected at the interface between the bottom surface of the core portion 4 and the light receiving surface of the semiconductor light receiving element 2 propagates through the core portion 4 while the bottom surface is in contact with the light receiving surface of the semiconductor light receiving element 2.
Has a region parallel to the light receiving surface so as to be reflected a plurality of times with the light receiving surface. Thereby, as shown by arrows in the drawing, the light propagating in the core portion 4 is reflected on the upper surface of the region parallel to the light receiving surface at the bottom and is input to the light receiving surface again, and The light reflected on the surface is further reflected on the upper surface and input to the light receiving surface, and this can be repeated a plurality of times, so that the optical integrated circuit substrate can further improve the light receiving efficiency.

【0026】なお、図1および図2に示す例において、
6はいずれもコア部4の略V字状に屈曲した底部の上面
を覆う、コア部4よりも屈折率の低い誘電体または金属
を示している。この誘電体または金属6は、図示したよ
うに光導波路の略V字状に屈曲させたコア部4の上に位
置する上部クラッド部5の一部を置換し、この部分に充
填されるようにして設けてもよいし、この部分の上部ク
ラッド部5を除去して露出させたコア部4の上面を覆う
膜状のものとして被着させてもよいし、この部分の上部
クラッド部5を除去してコア部4の上面を空気中に露出
させ、低屈折率の空気をコア部4の上面を覆う誘電体6
として用いてもよい。また、上部クラッド部5の屈折率
がコア部4よりも十分低い場合には、この上部クラッド
部5をそのまま誘電体6として使用してもよい。
In the example shown in FIGS. 1 and 2,
Numeral 6 denotes a dielectric or metal having a lower refractive index than the core 4 and covers the upper surface of the bottom of the core 4 which is bent in a substantially V shape. The dielectric or metal 6 replaces a part of the upper clad part 5 located above the core part 4 of the optical waveguide which is bent in a substantially V-shape as shown in FIG. The upper clad portion 5 may be removed, the upper clad portion 5 may be removed, and the upper clad portion 5 may be applied as a film covering the exposed upper surface of the core portion 4. Then, the upper surface of the core portion 4 is exposed to air, and air having a low refractive index is covered with a dielectric material 6 covering the upper surface of the core portion 4.
May be used. When the refractive index of the upper clad 5 is sufficiently lower than that of the core 4, the upper clad 5 may be used as it is as the dielectric 6.

【0027】このようにコア部4の略V字状に屈曲した
底部の上面をコア部4よりも屈折率の低い誘電体または
金属6で覆うことにより、コア部4の底面と半導体受光
素子2の受光面との界面で反射された光がこの誘電体ま
たは金属6で覆われたコア部4の上面で確実に反射され
て再び受光面へ入力されることとなり、受光効率をさら
に高めることができる。そして、コア部4の底部を受光
面に平行な領域を有するものとした場合には、コア部4
の底部の上面に入射した光を複数回にわたって確実に効
率よく反射して再び受光面に入力させることができ、受
光効率をより一層高めることができる高効率な光集積回
路基板とすることができる。
By covering the upper surface of the bottom portion of the core portion 4 bent in a substantially V-shape with the dielectric or metal 6 having a lower refractive index than the core portion 4 in this manner, the bottom surface of the core portion 4 and the semiconductor light receiving element 2 are covered. The light reflected at the interface with the light receiving surface is surely reflected on the upper surface of the core portion 4 covered with the dielectric or metal 6, and is input to the light receiving surface again, so that the light receiving efficiency can be further improved. it can. When the bottom of the core 4 has a region parallel to the light receiving surface, the core 4
The light incident on the upper surface of the bottom can be efficiently and reliably reflected a plurality of times, and can be input again to the light receiving surface, thereby providing a highly efficient optical integrated circuit substrate that can further increase the light receiving efficiency. .

【0028】本発明の光集積回路基板において、半導体
受光素子2が配設され、その上に光導波路が形成される
基板1には、光集積回路基板や光電子混在基板の光信号
を扱う基板として使用される種々の基板、例えば、シリ
コン基板やアルミナ基板・ガラスセラミックス基板・多
層セラミック基板等が使用できる。
In the optical integrated circuit board of the present invention, the semiconductor light receiving element 2 is provided, and the optical waveguide is formed thereon. Various substrates used, for example, a silicon substrate, an alumina substrate, a glass ceramic substrate, a multilayer ceramic substrate, and the like can be used.

【0029】基板1上に配設される面受光型の半導体受
光素子2には、例えば、フォトダイオード(PNフォト
ダイオード・PINフォトダイオードあるいはアバラン
シェフォトダイオード・MSM(Metal-Semiconductor-
Metal)フォトダイオード等)が用いられ、これらが搭
載実装されあるいは形成されて配設される。半導体受光
素子2の受光面は、基本的には基板1の上面とほぼ平行
にその素子2の上部に位置するものであるが、このよう
な位置に限定されるものではなく、半導体受光素子2の
どこに位置していてもよい。ただし、受光面の位置によ
っては、最大受光効率を得ることができる最適設計を行
ない、その最適設計に見合った光導波路を形成する必要
がある。
The surface light receiving type semiconductor light receiving element 2 disposed on the substrate 1 includes, for example, a photodiode (PN photodiode / PIN photodiode or avalanche photodiode / MSM (Metal-Semiconductor-
Metal) photodiodes, etc. are used, and these are mounted or mounted or formed and disposed. The light receiving surface of the semiconductor light receiving element 2 is basically located above the element 2 substantially in parallel with the upper surface of the substrate 1, but is not limited to such a position. May be located anywhere. However, depending on the position of the light receiving surface, it is necessary to carry out an optimal design for obtaining the maximum light receiving efficiency and to form an optical waveguide corresponding to the optimal design.

【0030】基板1および半導体受光素子2上に形成さ
れる光導波路は、少なくとも下部クラッド部3とコア部
4とを有しており、好ましくはこれに上部クラッド部5
を有する3層から成る3次元導波路形状の光導波路であ
る。その形成材料としては、例えばシロキサン系ポリマ
を用いることが望ましい。シロキサン系ポリマによる光
導波路とすれば、下部および上部クラッド部3・5にシ
ロキサン系ポリマを用い、コア部4に金属、例えばチタ
ン(Ti)を含有したシロキサン系ポリマを用いた光導
波路とすることにより、チタン含有量の制御によって所
望の屈折率差を有する光導波路を容易に作製することが
でき、半導体受光素子2との受光効率が最大となる構造
のものを設計することが容易となる。
The optical waveguide formed on the substrate 1 and the semiconductor light receiving element 2 has at least a lower clad part 3 and a core part 4, preferably an upper clad part 5.
Is a three-dimensional waveguide shape optical waveguide composed of three layers having the following. It is desirable to use, for example, a siloxane-based polymer as the forming material. If the optical waveguide is made of a siloxane-based polymer, the lower and upper clad portions 3 and 5 are made of a siloxane-based polymer, and the core portion 4 is made of a siloxane-based polymer containing a metal, for example, titanium (Ti). Thereby, an optical waveguide having a desired refractive index difference can be easily manufactured by controlling the titanium content, and it becomes easy to design a structure having the maximum light receiving efficiency with the semiconductor light receiving element 2.

【0031】このようなシロキサン系ポリマとしては、
ポリマの骨格にシロキサン結合が含まれている樹脂であ
ればよく、例えばポリフェニルシルセスキオキサン・ポ
リメチルフェニルシルセスキオキサン・ポリジフェニル
シルセスキオキサン等がある。
As such a siloxane-based polymer,
Any resin may be used as long as it has a siloxane bond in the polymer skeleton. Examples thereof include polyphenylsilsesquioxane, polymethylphenylsilsesquioxane, and polydiphenylsilsesquioxane.

【0032】また、コア部4およびクラッド部3・5に
含有させる金属としてはチタンに限られるものではな
く、ゲルマニウム(Ge)・アルミニウム(Al)・エ
ルビウム(Er)等も使用できる。これらの金属を含有
したコア部4を形成するには、その金属アルコキシドを
添加したシロキサン系ポリマ層を形成し、これを所望の
形状・寸法に加工すればよい。
The metal contained in the core portion 4 and the cladding portions 3 and 5 is not limited to titanium, but may be germanium (Ge), aluminum (Al), erbium (Er), or the like. In order to form the core portion 4 containing these metals, a siloxane-based polymer layer to which the metal alkoxide is added may be formed and processed into desired shapes and dimensions.

【0033】なお、クラッド部3・5に用いるシロキサ
ン系ポリマにも上記と同様の金属を含有させてもよく、
その場合はコア部4との含有量の差により屈折率差を設
けるようにすればよい。
The siloxane-based polymer used for the cladding portions 3 and 5 may contain the same metal as described above.
In that case, a difference in refractive index may be provided depending on a difference in content from the core portion 4.

【0034】また、光導波路の材料としてはこの他に
も、低損失で光を伝搬させることができる透明性があ
り、また所望の屈折率差を得ることができるコア部材と
クラッド部材の組み合わせであれば各種の材料を用いる
ことができ、シロキサン系ポリマ以外に、例えばフッ素
化ポリイミド・ポリメチルメタクリレート(PMMA)
・ポリカーボネート(PC)等の溶液状態で塗布可能な
光学材料が好適に用いられる。
In addition, as a material of the optical waveguide, there is a combination of a core member and a clad member having transparency that can transmit light with low loss and that can obtain a desired refractive index difference. Various materials can be used as long as they are present. In addition to the siloxane-based polymer, for example, fluorinated polyimide / polymethyl methacrylate (PMMA)
-An optical material such as polycarbonate (PC) that can be applied in a solution state is suitably used.

【0035】下部クラッド部3の厚み、つまり、基板1
からこの基板1にほぼ平行に形成されたコア部4までの
厚みは、形成材料について基板1との相互作用により放
射損失が発生しないような厚みをあらかじめ実験で調
べ、その厚み以上に形成する。
The thickness of the lower cladding 3, that is, the substrate 1
The thickness from the material to the core portion 4 formed substantially parallel to the substrate 1 is determined by experimentation in advance so that the material does not cause radiation loss due to the interaction with the substrate 1, and is formed to be equal to or greater than the thickness.

【0036】略V字状に屈曲させ、その底部を半導体受
光素子2の受光面と当接させるコア部4は、その底部が
受光面と当接している長さを、半導体受光素子2の感度
と受光面積の大きさによって変化させ、シミュレーター
による計算等によって最大の結合効率を得るように設計
しておく。そのように設計した構造を実現するために
は、半導体受光素子2を配設した基板1上にまず下部ク
ラッド部3の材料となるシロキサン系ポリマを滴下し、
スピンコーターやバーコーター等の光学材料を基板1上
に塗布することが可能な装置を使用して下部クラッド部
3を成膜し、その後、半導体受光素子2の受光面上部の
膜をエッチングによって加工する。エッチングに使用さ
れる装置は、例えばECR・RIE・レーザ等を採用で
き、それぞれエッチング条件を最適化することによっ
て、設計に合わせた形状を加工することができる。そし
て、この上にコア部4を成膜し、同様にエッチングによ
って所望の形状に加工して光導波路を形成する。
The core portion 4 which is bent in a substantially V-shape, and whose bottom portion is in contact with the light receiving surface of the semiconductor light receiving element 2, determines the length of the bottom portion in contact with the light receiving surface by the sensitivity of the semiconductor light receiving element 2. And the size of the light receiving area, and are designed to obtain the maximum coupling efficiency by calculation with a simulator or the like. In order to realize such a designed structure, first, a siloxane-based polymer serving as a material of the lower cladding part 3 is dropped on the substrate 1 on which the semiconductor light receiving element 2 is disposed,
The lower clad portion 3 is formed using a device capable of applying an optical material such as a spin coater or a bar coater on the substrate 1, and thereafter, the film on the light receiving surface of the semiconductor light receiving element 2 is processed by etching. I do. As an apparatus used for etching, for example, ECR, RIE, laser, or the like can be adopted. By optimizing the respective etching conditions, it is possible to process a shape according to the design. Then, a core portion 4 is formed thereon, and processed into a desired shape by etching in the same manner to form an optical waveguide.

【0037】なお、略V字状に屈曲したコア部4の底部
の上面は、上部クラッド部5をそのまま形成しておく他
にも、底部の上面で確実に伝搬光を反射させることがで
きる点で、コア部4よりもさらには上部クラッド部5よ
りも屈折率の低い誘電体または金属6で覆うようにして
おくとよい。このような低屈折率の誘電体あるいは金属
6の材料としては、コア部4さらには上部クラッド部5
よりも屈折率が小さくコア部4との屈折率差が大きいも
のほどよい。例えば、前述のように空気層であってもよ
く、その他、フッ化マグネシウム(MgF2)・フッ化
リチウム(LiF)等の透明誘電体や金(Au)・アル
ミニウム(Al)・銀(Ag)等の金属であってもよ
い。
The upper surface of the bottom of the core portion 4 which is bent in a substantially V-shape, in addition to the formation of the upper clad portion 5 as it is, is capable of reliably reflecting propagating light on the upper surface of the bottom. Therefore, it is preferable to cover with a dielectric or metal 6 having a lower refractive index than the core 4 and the upper clad 5. The material of such a low-refractive-index dielectric or metal 6 includes the core 4 and the upper clad 5
The smaller the refractive index is, the better the refractive index difference from the core portion 4 is. For example, an air layer may be used as described above, and a transparent dielectric such as magnesium fluoride (MgF 2 ) / lithium fluoride (LiF) or gold (Au) / aluminum (Al) / silver (Ag) may be used. And the like.

【0038】以上の図1および図2に示すような本発明
の光集積回路基板は、例えば図3に斜視図で示すよう
な、基板11上に多数の半導体受光素子14が配設されると
ともにその上にそれぞれ光導波路13が形成され、さらに
多数の光増幅器15等の光電子デバイスが搭載された光集
積回路モジュール等に使用され、それにより、この光集
積回路モジュールは、光導波路13と半導体受光素子14と
を高い受光効率で光結合させつつ、そのモジュールのサ
イズの小型化を図ることができるものとなる。
The optical integrated circuit board of the present invention as shown in FIGS. 1 and 2 has a large number of semiconductor light receiving elements 14 disposed on a substrate 11 as shown in, for example, a perspective view in FIG. An optical waveguide 13 is formed thereon, and is used for an optical integrated circuit module or the like in which a large number of optoelectronic devices such as an optical amplifier 15 are mounted. It is possible to reduce the size of the module while optically coupling the element 14 with high light receiving efficiency.

【0039】なお、図3において、12は外部との光信号
のやりとりを行なうための光ファイバであり、16は光増
幅器15を駆動するために基板11上に形成された電極部で
ある。
In FIG. 3, reference numeral 12 denotes an optical fiber for exchanging optical signals with the outside, and reference numeral 16 denotes an electrode portion formed on the substrate 11 for driving the optical amplifier 15.

【0040】[0040]

【実施例】次に、本発明の光集積回路基板について具体
例を説明する。
Next, a specific example of the optical integrated circuit board of the present invention will be described.

【0041】[例1]まず、アルミナ基板1上に、面受
光型の半導体受光素子2を実装し、下部および上部クラ
ッド部3・5がシロキサン系ポリマ、コア部4がチタン
含有シロキサン系ポリマから成るステップインデックス
型光導波路を具備した、図2に示した例と同様な構成の
光集積回路基板を作製した。このときコア部4およびク
ラッド部3・5の屈折率をそれぞれ1.450および1.445と
して、コア部4の幅を6μm、高さを6μmとし、下部
クラッド部3の厚み(基板1から基板1に平行に形成さ
れたコア部4までの厚み)を10μm、上部クラッド部5
の厚みを10μmとした。なお、半導体受光素子2には厚
みが2μm、受光面積が200μm径のものを用いた。
[Example 1] First, a surface light receiving type semiconductor light receiving element 2 is mounted on an alumina substrate 1, and lower and upper cladding portions 3.5 are made of a siloxane-based polymer, and a core portion 4 is made of a titanium-containing siloxane-based polymer. An optical integrated circuit substrate having the same configuration as the example shown in FIG. At this time, the refractive index of the core 4 and the claddings 3 and 5 is 1.450 and 1.445, respectively, the width of the core 4 is 6 μm, the height is 6 μm, and the thickness of the lower cladding 3 (from the substrate 1 to the substrate 1 in parallel). The thickness up to the formed core 4) is 10 μm, and the upper clad 5
Was 10 μm in thickness. The semiconductor light receiving element 2 had a thickness of 2 μm and a light receiving area of 200 μm in diameter.

【0042】また、半導体受光素子2の上面とその上で
略V字状に屈曲させたコア部4の底部の下面とは接して
おり、このときの半導体受光素子2の受光面とそれに向
かうコア部4とがなす角度は約10度、半導体受光素子2
の受光面上におけるコア部4の底部の平行な領域の長さ
は6μmであった。
The upper surface of the semiconductor light-receiving element 2 is in contact with the lower surface of the bottom of the core portion 4 bent substantially in a V-shape thereon. The angle between the part 4 and the semiconductor light receiving element 2 is about 10 degrees.
The length of the parallel region at the bottom of the core portion 4 on the light receiving surface was 6 μm.

【0043】さらに、半導体受光素子2の上部に位置す
るコア部4の底部の上面は、上部クラッド部5を形成し
た後、これにエッチング用のマスクパターンを形成し、
RIEによるドライエッチングを施して上部クラッド部
5を除去して、空気層で覆われた状態とした。
Further, on the upper surface of the bottom of the core portion 4 located above the semiconductor light receiving element 2, after forming an upper clad portion 5, a mask pattern for etching is formed thereon.
The upper clad portion 5 was removed by dry etching by RIE, so that the upper clad portion 5 was covered with an air layer.

【0044】このようにして作製した本発明の光集積回
路基板において、光導波路と半導体受光素子2との結合
効率を測定したところ、従来技術による光集積回路基板
の約3倍である約30%の結合効率を有していることが確
認できた。
When the coupling efficiency between the optical waveguide and the semiconductor light receiving element 2 of the optical integrated circuit board of the present invention thus manufactured was measured, it was about 30%, which is about three times that of the optical integrated circuit board according to the prior art. It was confirmed that the coupling efficiency was as follows.

【0045】なお、以上の実施例では基板1にアルミナ
基板を使用したが、この他に窒化アルミニウム基板やシ
リコン基板・ガラスセラミックス基板等を用いても、同
様に良好な結合効率を有していた。
In the above embodiment, an alumina substrate was used as the substrate 1. However, even when an aluminum nitride substrate, a silicon substrate, a glass ceramic substrate, or the like was used, good coupling efficiency was similarly obtained. .

【0046】また、図1に示した例のように、コア部4
の屈曲した底部に半導体受光素子2の受光面に平行な領
域を形成せず、受光面に所定の角度を持って当接する底
部だけで半導体受光素子2の受光面への結合を行なう構
造においても、良好な結合効率を有していた。このよう
にコア部4の底部に受光面に平行な領域を設けない構造
は、特に半導体受光素子2の受光面積が小さい場合に有
効である。
Also, as in the example shown in FIG.
A structure in which a region parallel to the light-receiving surface of the semiconductor light-receiving element 2 is not formed at the bent bottom of the semiconductor light-receiving element 2 and the semiconductor light-receiving element 2 is coupled to the light-receiving surface of the semiconductor light-receiving element 2 only at the bottom that contacts the light-receiving surface at a predetermined angle. Had good coupling efficiency. Such a structure in which the region parallel to the light receiving surface is not provided at the bottom of the core portion 4 is effective particularly when the light receiving area of the semiconductor light receiving element 2 is small.

【0047】なお、以上はあくまで本発明の実施の形態
の例示であって、本発明はこれらに限定されるものでは
なく、本発明の要旨を逸脱しない範囲で種々の変更や改
良を加えることは何ら差し支えない。
It should be noted that the above is only an example of the embodiment of the present invention, and the present invention is not limited to the embodiment. Various changes and improvements can be made without departing from the gist of the present invention. No problem.

【0048】[0048]

【発明の効果】以上のように、本発明の光集積回路基板
によれば、基板上に配設された面受光型の半導体受光素
子に対して、その上に光導波路を積層するように形成し
ていることから、半導体受光素子と光導波路とを同一基
板に効率的に集積することができ、従来のように基板上
に光導波路を形成した後で半導体受光素子を実装した集
積回路基板と比較して小型化・低背化できるとともに、
この光導波路上にさらに別の光電子デバイス等を搭載実
装することができるので、特に基板上に半導体受光素子
および光電子デバイスをそれぞれ複数個搭載するような
光モジュールに用いることにより、その小型化を実現す
ることができる。
As described above, according to the optical integrated circuit substrate of the present invention, an optical waveguide is formed so as to be stacked on a surface light receiving type semiconductor light receiving element provided on the substrate. As a result, the semiconductor light receiving element and the optical waveguide can be efficiently integrated on the same substrate, and an integrated circuit substrate on which the semiconductor light receiving element is mounted after forming the optical waveguide on the substrate as in the related art. Compared to miniaturization and height reduction,
Since further opto-electronic devices can be mounted and mounted on this optical waveguide, miniaturization is realized especially by using an optical module in which a plurality of semiconductor light receiving elements and opto-electronic devices are respectively mounted on a substrate. can do.

【0049】また、本発明の光集積回路基板によれば、
面受光型の半導体受光素子を配設することができる基板
であれば各種の基板を用いることができ、信号処理の高
速化および光電子デバイスの高集積化により好適な基板
を使用することができる。
According to the optical integrated circuit board of the present invention,
Various substrates can be used as long as a substrate on which a surface light receiving type semiconductor light receiving element can be provided, and a substrate suitable for high-speed signal processing and high integration of an optoelectronic device can be used.

【0050】また、本発明の光集積回路基板によれば、
面受光型の半導体受光素子に対して、その上に少なくと
も下部クラッド部およびコア部を有する光導波路を形成
し、このコア部を半導体受光素子の上方で略V字状に屈
曲させてその底部が半導体受光素子の受光面に当接して
いるものとしたことから、コア部を伝搬する光を受光面
に当接したコア部の底部から受光面へ直接入力すること
ができるため、光導波路と半導体受光素子との光結合の
結合効率が高く、小さい受光面積で効率的に光結合を行
なうことができる。
According to the optical integrated circuit board of the present invention,
An optical waveguide having at least a lower cladding part and a core part is formed on a surface light receiving type semiconductor light receiving element, and this core part is bent in a substantially V shape above the semiconductor light receiving element so that the bottom part is formed. Since the light receiving surface of the semiconductor light receiving element is in contact with the light receiving surface, light propagating through the core can be directly input to the light receiving surface from the bottom of the core in contact with the light receiving surface. The coupling efficiency of the optical coupling with the light receiving element is high, and the optical coupling can be efficiently performed with a small light receiving area.

【0051】また、本発明の光集積回路基板によれば、
光導波路のコア部の略V字状に屈曲した底部が、その上
面と半導体受光素子の受光面との間で、コア部を伝搬す
る光が複数回反射するように受光面に平行な領域を有し
ている場合には、コア部の底面と半導体受光素子の受光
面との界面で反射された光がこの受光面に平行な領域の
上面で反射されて再び受光面へ複数回入力されることと
なり、受光効率をさらに高めることができる。
According to the optical integrated circuit board of the present invention,
A substantially V-shaped bent bottom of the core portion of the optical waveguide forms an area parallel to the light receiving surface between the upper surface and the light receiving surface of the semiconductor light receiving element so that light propagating through the core portion is reflected multiple times. If it has, the light reflected at the interface between the bottom surface of the core portion and the light receiving surface of the semiconductor light receiving element is reflected on the upper surface of a region parallel to the light receiving surface and is input to the light receiving surface a plurality of times again. As a result, the light receiving efficiency can be further increased.

【0052】さらに、本発明の光集積回路基板によれ
ば、光導波路のコア部の略V字状に屈曲した底部が、そ
の上面がコア部よりも屈折率の低い誘電体または金属で
覆われている場合には、コア部の底面と半導体受光素子
の受光面との界面で反射された光がこの誘電体または金
属で覆われた上面で確実に反射されて再び受光面へ入力
されることとなり、受光効率をさらに高めることができ
る。そして、コア部の底部に半導体受光素子の受光面に
平行な領域を有するものと併用した場合には、コア部の
底部の上面に入射した光を確実に効率よく反射して再び
受光面に入力させることができ、受光効率をより一層高
めることができる高効率な光集積回路基板となる。
Further, according to the optical integrated circuit board of the present invention, the substantially V-shaped bottom of the core portion of the optical waveguide is covered with a dielectric or metal whose refractive index is lower than that of the core portion. In this case, the light reflected at the interface between the bottom surface of the core and the light receiving surface of the semiconductor light receiving element is surely reflected by the upper surface covered with the dielectric or metal and is input to the light receiving surface again. And the light receiving efficiency can be further increased. When used together with a semiconductor light receiving element having a region parallel to the light receiving surface of the semiconductor light receiving element at the bottom of the core, light incident on the upper surface of the bottom of the core is reliably reflected efficiently and input to the light receiving surface again. Thus, a highly efficient optical integrated circuit substrate that can further increase the light receiving efficiency can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の光集積回路基板の実施の形態の一例を
示す断面図である。
FIG. 1 is a sectional view showing an example of an embodiment of an optical integrated circuit substrate according to the present invention.

【図2】本発明の光集積回路基板の実施の形態の他の例
を示す断面図である。
FIG. 2 is a sectional view showing another example of the embodiment of the optical integrated circuit substrate of the present invention.

【図3】本発明の光集積回路を使用した光集積回路モジ
ュールの例を示す斜視図である。
FIG. 3 is a perspective view showing an example of an optical integrated circuit module using the optical integrated circuit of the present invention.

【図4】従来の光集積回路基板の例を示す断面図であ
る。
FIG. 4 is a cross-sectional view illustrating an example of a conventional optical integrated circuit substrate.

【図5】従来の光集積回路基板の他の例を示す断面図で
ある。
FIG. 5 is a sectional view showing another example of a conventional optical integrated circuit substrate.

【図6】光導波路と半導体受光素子を2つの平行した導
波路と考えた場合の結合長に対する結合効率の変化を示
す線図である。
FIG. 6 is a diagram illustrating a change in coupling efficiency with respect to a coupling length when an optical waveguide and a semiconductor light receiving element are considered as two parallel waveguides.

【符号の説明】[Explanation of symbols]

1、11・・・基板 2、14・・・半導体受光素子 3・・・・・光導波路の下部クラッド部 4・・・・・光導波路のコア部 5・・・・・光導波路の上部クラッド部 6・・・・・コア部4より屈折率の低い誘電体または金
1, 11 ... substrate 2, 14 ... semiconductor light receiving element 3 ... lower cladding part of optical waveguide 4 ... core part of optical waveguide 5 ... upper cladding of optical waveguide Portion 6: Dielectric or metal having lower refractive index than core portion 4

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 基板上に配設された面受光型の半導体受
光素子と、該半導体受光素子上に形成された、少なくと
も下部クラッド部およびコア部を有する光導波路とを具
備して成り、前記コア部は、前記半導体受光素子の上方
で略V字状に屈曲してその底部が前記半導体受光素子の
受光面に当接していることを特徴とする光集積回路基
板。
A semiconductor light receiving element of a surface light receiving type disposed on a substrate; and an optical waveguide formed on the semiconductor light receiving element and having at least a lower cladding part and a core part. An optical integrated circuit board, wherein the core portion is bent in a substantially V-shape above the semiconductor light receiving element, and a bottom portion thereof is in contact with a light receiving surface of the semiconductor light receiving element.
【請求項2】 前記コア部の略V字状に屈曲した前記底
部は、その上面と前記受光面との間で前記コア部を伝搬
する光が複数回反射するように前記受光面に平行な領域
を有していることを特徴とする請求項1記載の光集積回
路基板。
2. The bottom portion of the core portion, which is bent in a substantially V shape, is parallel to the light receiving surface so that light propagating through the core portion between the upper surface and the light receiving surface is reflected a plurality of times. 2. The optical integrated circuit substrate according to claim 1, wherein the substrate has an area.
【請求項3】 前記コア部の略V字状に屈曲した前記底
部は、その上面が前記コア部よりも屈折率の低い誘電体
または金属で覆われていることを特徴とする請求項1ま
たは請求項2記載の光集積回路基板。
3. The bottom portion of the core portion, which is bent in a substantially V-shape, has an upper surface covered with a dielectric or a metal having a lower refractive index than the core portion. The optical integrated circuit board according to claim 2.
JP2000294716A 2000-09-27 2000-09-27 Substrate for optical integrated circuit Pending JP2002107559A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000294716A JP2002107559A (en) 2000-09-27 2000-09-27 Substrate for optical integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000294716A JP2002107559A (en) 2000-09-27 2000-09-27 Substrate for optical integrated circuit

Publications (1)

Publication Number Publication Date
JP2002107559A true JP2002107559A (en) 2002-04-10

Family

ID=18777260

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000294716A Pending JP2002107559A (en) 2000-09-27 2000-09-27 Substrate for optical integrated circuit

Country Status (1)

Country Link
JP (1) JP2002107559A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007013202A (en) * 2003-11-28 2007-01-18 Korea Electronics Telecommun Optical coupling apparatus capable of integrating photodetector
JP2007509372A (en) * 2003-10-27 2007-04-12 アールピーオー・ピーティワイ・リミテッド Planar waveguide having patterned clad and manufacturing method thereof
JP6523573B1 (en) * 2018-02-19 2019-06-05 三菱電機株式会社 Semiconductor optical integrated device
CN114460683A (en) * 2020-11-10 2022-05-10 中国科学院半导体研究所 Microwave photon on-chip system based on optical core particles

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007509372A (en) * 2003-10-27 2007-04-12 アールピーオー・ピーティワイ・リミテッド Planar waveguide having patterned clad and manufacturing method thereof
JP4732356B2 (en) * 2003-10-27 2011-07-27 アールピーオー・ピーティワイ・リミテッド Planar waveguide having patterned clad and manufacturing method thereof
US8021900B2 (en) 2003-10-27 2011-09-20 Rpo Pty Limited Planar waveguide with patterned cladding and method for producing same
US8994037B2 (en) 2003-10-27 2015-03-31 Zetta Research And Development Llc-Rpo Series Planar waveguide with patterned cladding and method for producing same
JP2007013202A (en) * 2003-11-28 2007-01-18 Korea Electronics Telecommun Optical coupling apparatus capable of integrating photodetector
JP6523573B1 (en) * 2018-02-19 2019-06-05 三菱電機株式会社 Semiconductor optical integrated device
WO2019159345A1 (en) * 2018-02-19 2019-08-22 三菱電機株式会社 Semiconductor optical integrated device
CN114460683A (en) * 2020-11-10 2022-05-10 中国科学院半导体研究所 Microwave photon on-chip system based on optical core particles

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