JP2002100505A - Thermister/capacitor composite lamination ceramic electronic component - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make an electronic component of an arbitrary semiconductor ceramic material system and an electronic component of an arbitrary dielectric ceramic material system composite by further enlarging a selection range of electric characteristics. SOLUTION: A semiconductor ceramic material layer is formed by mixing and baking calcinated powder of a semiconductor ceramic material which is formed by calcinating two or more kinds of metallic oxides such as Mn, Co, Ni, Cu or the like at a temperature lower than its sintering temperature by 100 deg.C, and calcinated powder of insulator ceramic material which is mainly composed of Ni-Zn-Cu ferrite or the like and is formed by calcinating it at 700 to 800 deg.C. The dielectric ceramic material layer is formed by mixing and baking calcinated powder of a dielectric ceramic material, which is mainly composed of PbTiO3 or the like and is formed by calcinating it at a temperature lower than its sintering temperature by 100 deg.C, and calcinated powder of an insulator ceramic material. The rate of calcinated powder of an insulator ceramic material incorporated in an insulator ceramic material layer and the rate of calcinated powder of an insulator ceramic material incorporated in a dielectric ceramic material layer are the same, and the rate is at least 40 to 80 wt.%.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a ceramic electronic component in which a semiconductor ceramic material layer corresponding to a thermistor and a dielectric ceramic material layer corresponding to a capacitor are laminated. More specifically, a composite multilayer ceramic having both characteristics as a dielectric and characteristics as an NTC (negative characteristic) thermistor, suitable as a composite ceramic element material mounted on a circuit board for temperature compensation of a piezoelectric material such as quartz. It relates to electronic components.

[0002]

2. Description of the Related Art Conventionally, when a circuit in which a thermistor and a capacitor (capacitor) are formed in parallel, such as a temperature compensation circuit of an oscillation circuit, a single thermistor and a single capacitor are used. Mounting on a substrate by flow or reflow soldering has been performed. However, forming a circuit using multiple thermistors and capacitors requires a large mounting area to mount many components on the same substrate.
It does not meet the current situation where electronic devices are required to be miniaturized.
On the other hand, as a composite element having a thermistor function and a capacitor function in one chip, a green sheet of a dielectric material is laminated and sintered on the plate surface of a plate-shaped thermistor sintered body, and then cut into a chip shape. There is disclosed a material or a plate-shaped dielectric sintered body in which a green sheet of a thermistor material is superposed and sintered, and then cut into chips. In this composite device, the mounting area can be reduced by stacking and mounting the components, but when the components are stacked, the desired electrical characteristics are obtained because the adhesion on the stacked surface is not sufficient. It was difficult.

In order to solve these problems, the present applicant has developed a composite ceramic comprising 10 to 90% by weight of a perovskite-based dielectric and 90 to 10% by weight of a metal composite oxide NTC thermistor. In addition, a composite ceramic element has been proposed in which external electrodes are formed on both end faces of a body in which the composite ceramic layers and the internal electrode layers are alternately laminated (Japanese Patent Laid-Open No. 2000-7254).
8). This composite ceramic element is manufactured by the following method. First, a perovskite dielectric and a metal composite oxide NT
Each of the C thermistors is mixed with raw materials and fired (800 to 1).
000 ° C.), and these dielectrics and the thermistor are mixed and pulverized at a predetermined ratio to obtain a mixed powder. An organic solvent and a binder are added to the mixed powder and kneaded to form a ceramic paste, which is formed into a green sheet according to a conventional method. A conductive material paste for forming an internal electrode layer is printed on the green sheet in a predetermined pattern to form an internal electrode layer. A green sheet is superimposed on this and the internal electrode layer is printed. This lamination and printing are repeated a required number of times to form a laminated sheet. The laminated sheet is subjected to a pressure treatment and then cut into chips. After removing the binder, 1
It is fired at about 000 to 1200 ° C. to obtain a composite ceramic sintered body chip. After subjecting the chip to a polishing process such as barrel polishing, a pair of external electrodes is formed on both end surfaces of the chip by dipping, plating, etc., and, if necessary, firing to burn the external electrodes onto the chip. Products.

[0004]

However, although the composite ceramic element product disclosed in Japanese Patent Application Laid-Open No. 2000-72548 can be miniaturized, the specific resistance is low since the final firing temperature is 1000 to 1200 ° C. Only Ag having a melting point of 960 ° C. cannot be used as an internal electrode. For this reason, it is necessary to use an internal electrode containing Ag having a high melting point in Pd, and there is a problem that the specific resistance of the internal electrode becomes large. In addition, since this composite ceramic is a sintered body of a mixed powder of a dielectric composition and a thermistor composition, a relatively large amount of reaction products that impair the thermistor or capacitor characteristics at the particle interface during firing are generated. There was also.

It is an object of the present invention to form an internal electrode of 100% Ag by sintering at 960 ° C. or lower in the atmosphere and to provide a thermistor parallel resistance of 10Ω or more and 10-30 MH at 25 ° C.
An object of the present invention is to provide a thermistor-capacitor composite multilayer ceramic electronic component capable of increasing the parallel capacitance at z to 5 pF or more and the thermistor B constant to 2000 K or more. Another object of the present invention is to provide a thermistor-capacitor composite multilayer ceramic which has relatively few reaction products at the grain boundaries of an object to be fired, provides desired thermistor characteristics and capacitor characteristics, and does not generate cracks or warpage after firing. To provide electronic components. Still another object of the present invention is to provide a thermistor-capacitor composite multilayer ceramic electronic component capable of reducing the mounting area of a thermistor-capacitor parallel circuit such as a temperature compensation circuit of an oscillation circuit.

[0006]

The invention according to claim 1 is
As shown in FIG. 1 to FIG. 3 and FIG.
1 and a dielectric ceramic material layer 12 are laminated to form a base, and a first laminate composed of the semiconductor ceramic material layer 11 is a thermistor having a pair of first internal electrodes 31. 12 is a capacitor having a plurality of planar second internal electrodes formed in parallel with each other, and the semiconductor ceramic material layer 11 is formed of MnO, Co
It consists of two or more metal oxides selected from the group consisting of O, NiO, CuO, Fe ₂ O ₃ and Al ₂ O ₃ and is calcined at a temperature 100 ° C. lower than the sintering temperature or at the sintering temperature. A calcined body powder or a sintered body powder of a semiconductor ceramic material having a spinel structure as a first aggregate obtained by firing;
Sinterable at temperatures below 60 ° C, 700-800 ° C
Is mixed with a calcined body powder of an insulating porcelain material as a matrix material calcined at the temperature described above, and the mixture is baked, and the dielectric porcelain material layer 12 is made of PbTiO ₃ , BaTiO ₃ and SrT.
Dielectric as a second aggregate containing one or more members selected from the group consisting of iO ₃ as main components and calcined or fired at a temperature 100 ° C. lower than the sintering temperature or at the sintering temperature Calcined body powder or sintered body powder of porcelain material,
The above-mentioned insulator ceramic material as a matrix material is mixed and fired, and the volume ratio of the calcined powder of the insulator ceramic material contained in the semiconductor ceramic material layer 11 and the insulation contained in the dielectric ceramic material layer 12 are obtained. A thermistor-capacitor composite multilayer ceramic electronic component, wherein the volume ratio of the calcined body powder of the body porcelain material is the same and the volume ratio is 40 to 80 volume%.

In the composite monolithic ceramic electronic component according to the first aspect of the present invention, the semiconductor ceramic material and the dielectric ceramic material are preliminarily fired or calcined at a sintering temperature or a temperature close to the sintering temperature. During firing of the laminate, reactivity at the grain boundaries of the semiconductor ceramic material and the insulator ceramic material and at the grain boundaries of the dielectric ceramic material and the insulator ceramic material are suppressed. Insulating porcelain material is composed of the first and second laminates as 9
When firing at a temperature of 60 ° C. or less, the semiconductor porcelain material and the dielectric porcelain material are encapsulated in a dispersed state, respectively.
Thermistor parallel resistance is 10Ω or more and 10 to 3 at 25 ° C.
Thermistor B with a parallel capacitance of 5 pF or more at 0 MHz
The constant can be 2000K or more, and low-temperature sintering can be realized by the insulator porcelain material.

The invention according to claim 2 is the invention according to claim 1, wherein the volume ratio of the calcined body powder or the sintered body powder of the semiconductor ceramic material contained in the semiconductor ceramic material layer 11 is determined. The volume ratio of the calcined powder or the sintered powder of the dielectric ceramic material contained in the material layer 12 is the same. The invention according to claim 3 is the invention according to claim 1, wherein the volume ratio of the calcined body powder or the sintered body powder of the semiconductor porcelain material contained in the semiconductor porcelain material layer 11 is further reduced. Different from the volume ratio of the calcined body powder or sintered body powder of the dielectric ceramic material contained in,
It is characterized in that the sintered body powder of the insulating porcelain material is included as the third aggregate by the difference in the volume ratio. In the composite multilayer ceramic electronic component according to the second or third aspect, the first and second laminates can have the same coefficient of thermal expansion, the same sintering temperature, and the like, so that cracks and warpage do not occur after firing.

The invention according to claim 4 is the invention according to claims 1 to 3
The invention according to any of the above, wherein the insulator porcelain material further comprises N
It is characterized by being a calcined body powder of a porcelain material containing i-Zn-Cu-based ferrite as a main component. These insulator porcelain materials relatively little impair the characteristics of the semiconductor porcelain material as a thermistor and the characteristics of the dielectric porcelain material as a capacitor.

[0010] The invention according to claim 5 is the invention according to claims 1 to 4.
The invention according to any one of the above, further characterized in that each of the first internal electrode 31 and the second internal electrode 32 is made of 100% Ag. In the composite multilayer ceramic electronic component according to the fifth aspect, sintering can be performed at a low temperature due to the presence of the insulator porcelain material, so that an internal electrode of 100% Ag can be realized.

[0011]

Embodiments of the present invention will now be described with reference to the drawings. The electronic component of the present invention is a multilayer ceramic chip component in which a thermistor and a capacitor are combined using a semiconductor ceramic material and a dielectric ceramic material. As shown in FIGS. 1 to 5, the multilayer ceramic chip component 1
Reference numeral 0 denotes a base 13 formed by laminating a semiconductor ceramic material layer 11 (hereinafter, referred to as a semiconductor layer) and a dielectric ceramic material layer 12 (hereinafter, referred to as a dielectric layer). A pair of internal electrodes 31 formed so as to face each other along the lamination surface is provided in the first laminate made of the semiconductor layer 11, and formed in parallel with each other in the second laminate made of the dielectric layer 12. A plurality of planar internal electrodes 32 are provided as shown in FIG.
3 and 5).

The semiconductor layer 11 is made of MnO, CoO, NiO,
It is composed of two or more metal oxides selected from the group consisting of CuO, Fe ₂ O ₃ and Al ₂ O ₃ and has a sintering temperature of 1 or more.
Sintered at a temperature of 960 ° C or lower with a calcined or sintered powder of a semiconductor ceramic material (first aggregate) having a spinel structure which is calcined or fired at a temperature as low as 00 ° C or its sintering temperature. This is obtained by mixing and calcining a calcined body powder of an insulating ceramic material (matrix material) calcined at a temperature of 700 to 800 ° C. (FIG. 4). The dielectric layer 12 is made of Pb
A dielectric material containing one or more members selected from the group consisting of TiO ₃ , BaTiO ₃ and SrTiO ₃ as main components and calcined or fired at a temperature 100 ° C. lower than the sintering temperature or at the sintering temperature. The calcined body powder or sintered body powder of the porcelain material (second aggregate) and the calcined body powder of the matrix material are mixed and fired (FIG. 4). The volume ratio of the calcined body powder of the matrix material contained in the semiconductor layer 11 and the volume ratio of the calcined body powder of the matrix material contained in the dielectric layer 12 are the same, and the volume ratio is 40 to
It is in the range of 80% by volume.

The volume ratio of the calcined powder or sintered powder of the first aggregate contained in the semiconductor layer 11 is determined by the dielectric layer 12.
May be the same as or different from the volume ratio of the calcined body powder or the sintered body powder of the second aggregate contained in the second aggregate. The volume ratio of the calcined body powder or the sintered body powder of the first aggregate contained in the semiconductor layer 11 is different from the volume ratio of the calcined body powder or the sintered body powder of the second aggregate contained in the dielectric layer 12. In this case, the sintered body powder of the matrix material is included as the third aggregate by an amount different from the volume ratio. Further, first and second external electrodes 41 and 42 are formed on both ends of the base 13, respectively (FIGS. 1, 2 and 5). The first and second external electrodes 41 and 42 are electrically connected to the internal electrodes 31 and 32. The internal electrodes 31 and 32 are A
g is preferably formed by 100%.

A method for manufacturing an electronic component according to the present invention will be described with reference to FIGS. (a) Manufacturing method of semiconductor porcelain material (first aggregate) Semiconductor porcelain materials include Mn oxide (MnO) powder, Co oxide (CoO) powder, Ni oxide (NiO) powder, Cu
Two or more selected from the group consisting of oxide (CuO) powder, Fe oxide (Fe ₂ O ₃ ) powder, and Al oxide (Al ₂ O ₃ ) powder are used as main raw material powders. The raw material powder may contain other elements (eg, Mg, Ca, Si, etc.) other than the above metal elements for the purpose of adjusting the B constant and the resistivity or decreasing the dielectric constant. The above raw material powders are mixed at a predetermined ratio by a wet or dry method to obtain a first mixed powder. A binder is added to the obtained first mixed powder, and the mixture is kneaded and granulated to form a predetermined shape. The molded body is heated in an air atmosphere at a temperature lower than its sintering temperature by one.
It is calcined at a temperature lower by 00 ° C., preferably 50 ° C., or calcined at the sintering temperature to produce a calcined or sintered body of a metal oxide. The calcination temperature or the calcination temperature varies depending on the composition of the raw material powder.
400 ° C. The reason why the temperature may be lower by 100 ° C. than the sintering temperature is that the reactivity at the grain boundary of the calcined body powder can be suppressed even at this temperature when firing with the fourth and fifth mixed powders described below. is there.

Next, the calcined or sintered body of the obtained metal oxide is pulverized by a ball mill or the like and sieved to obtain a first aggregate having an average particle diameter of 10 μm or less, preferably 1 to 6 μm. This is usually the case for a laminated thermistor with a single layer thickness of 20
If the average particle size of the first aggregate exceeds 10 μm, a layer containing the first aggregate and the matrix material cannot be formed. The particle size of the first aggregate is made larger than the particle size of the insulating ceramic material powder of the matrix material described below.
Preferably, it is about one digit larger than the matrix material. This is because if the particle size of the semiconductor porcelain material is equal to or smaller than the particle size of the insulator porcelain material, when the semiconductor porcelain material and the insulator porcelain material are mixed and fired, voids are generated in the semiconductor porcelain material layer, This is because it causes cracks and distortion of the semiconductor ceramic material layer.

(B) Manufacturing method of dielectric porcelain material (second aggregate) PbTiO ₃ , BaTiO ₃ and Sr
One or more selected from the group consisting of TiO _{3 is used} as a main component. That is, the second aggregate has one or more powders selected from the group consisting of Pb ₂ O powder, BaO powder and SrO powder, and TiO ₂ powder as main raw material powders. The raw material powder may contain other elements (for example, Mo, W, Ag, etc.) for the purpose of increasing the dielectric constant or stabilizing the temperature characteristics. The above raw material powders are mixed at a predetermined ratio in a wet or dry system to obtain a second mixed powder. A binder is added to the obtained second mixed powder, and the mixture is kneaded and granulated to form a predetermined shape. This molded body is heated at 100 ° C.
Preferably, it is calcined at a temperature lower by 50 ° C. or calcined at the sintering temperature to produce a calcined body or a sintered body. The calcination temperature or the calcination temperature varies depending on the composition of the raw material powder, and is, for example, 1100 to 1300 ° C. The reason why the temperature may be lower by 100 ° C. than the sintering temperature is the same as the reason described in the above (a).

Next, the calcined or sintered body of the obtained metal oxide is pulverized by a ball mill or the like and sieved to obtain a second aggregate having an average particle diameter of 10 μm or less, preferably 1 to 6 μm. This is because a multilayer capacitor (capacitor) generally has a thickness of 10 to 20 μm, and if the average particle size of the second aggregate exceeds 10 μm, a layer containing the second aggregate and the matrix material cannot be formed. is there. The particle size of the second aggregate is made larger than the particle size of the insulating ceramic material powder of the matrix material described below. Preferably one more than the matrix material
Increase by about an order of magnitude. The reason for this is the same as the reason described in the above (a), because it causes cracks and distortion of the dielectric ceramic material layer.

(C) Manufacturing method of insulator porcelain material (matrix material) The insulator porcelain material can be sintered at a temperature of 960 ° C. or less and calcined at a temperature of 700 to 800 ° C. Z
It is a calcined body powder of a porcelain material containing n-Cu-based ferrite as a main component. The magnetic porcelain material containing Ni-Zn-Cu ferrite as a main component includes Fe oxide (Fe ₂ O ₃ ) powder, Ni oxide (NiO) powder, and Zn oxide (ZnO).
Powder and Cu oxide (CuO) are the main raw material powders.
The raw material powder may contain other elements (for example, Mg, Ca, etc.) other than the above metal elements for the purpose of improving sinterability. The raw material powder is mixed at a predetermined ratio by a wet or dry method to obtain a third mixed powder. Fe ₂ O ₃ is 48 to 52 mol%, NiO is 10 to 40 mol%, ZnO 10 to 40 mol% and CuO are weighed at a ratio of 10 to 30 mol%. The obtained third mixed powder is calcined at a temperature of 700 to 800 ° C. to obtain a calcined body, and this Ni—Zn—Cu ferrite calcined body is pulverized by a ball mill or the like and sieved.
A calcined powder of a powdery insulating porcelain material to be a matrix material having a smaller particle size than the first and second aggregates described in (a) and (b) is obtained. The average particle size of the first and second aggregates is 1 to 10 μm
When it is set to m, the average particle size of the matrix material of the insulating porcelain material is set to less than 1 μm, preferably 0.1 to 0.5 μm for the above-described reason.

(D) Method for manufacturing first laminate including internal electrode 31 The calcined body powder (first mixed powder) of the first aggregate of (a) and the matrix material of (c) above The body powder (third mixed powder) is mixed in a wet or dry manner to obtain a fourth mixed powder.
The mixing ratio of the matrix material is 40 to 80% by volume, and the balance is the first aggregate. If the matrix material is less than 40% by volume, the fired first laminate becomes porous and practical strength cannot be obtained. In addition, when the first laminate is plated, a plating solution enters the inside of the first laminate. There is a risk. If it exceeds 80% by volume, the ratio of the first aggregate will decrease too much,
A first laminate having excellent thermistor characteristics cannot be obtained. First
The mixing ratio of the aggregate and the matrix material is determined from the above range according to the required thermistor characteristics.

As shown in FIG. 3, the first state of the green state
The stacked body is formed by stacking a plurality of semiconductor layers 11a and 11b, and a first internal electrode 31 is formed on the surface of these semiconductor layers 11a and 11b.
Formed. In order to form the semiconductor layers 11a and 11b, a dispersing agent, a binder, a plasticizer, a solvent, and the like are added to the fourth mixed powder and mixed, and then a printing material paste (hereinafter, referred to as a first paste) is used.
After preparing one or both of a paint for forming a green sheet (hereinafter referred to as paint for a first sheet) and a paint for forming a green sheet (hereinafter referred to as a paint for a first sheet), the first laminate in a green state is formed by one or both of a print laminate and a sheet laminate. The body 21 is manufactured. The internal electrode 31 is formed by printing a conductive paste of 100% Ag during lamination of the first printing paste or the first sheet paint.

(E) The first of the second laminate including the internal electrode 32
Laminating Method to Laminate The calcined body powder of the second aggregate (b) (the second mixed powder) and the calcined body powder of the matrix material (c) of the above (c) (the third mixed powder) are wet or The fifth mixed powder is obtained by dry mixing.
The mixing ratio of the matrix material is 40 to 80% by volume, and the balance is the second aggregate. If the amount of the matrix material is less than 40% by volume, the second laminate after firing becomes porous, and practical strength cannot be obtained. In addition, when the second laminate is plated, a plating solution enters the inside of the second laminate. There is a risk. If it exceeds 80% by volume, the ratio of the second aggregate will be too low,
A second laminate having a high dielectric constant cannot be obtained. The mixing ratio of the second aggregate and the matrix material is determined from the above range according to the required dielectric constant.

As shown in FIG. 3, the second green state
The dielectric layer 12 of the laminate is laminated on the first green laminate 22. The second stacked body includes a plurality of dielectric layers 12a and 12a.
b, 12c, and these dielectric layers 12a, 12b
Is formed by forming a second internal electrode 32 on the surface of the substrate. In order to form the dielectric layers 12a to 12c, a dispersant, a binder, a plasticizer, a solvent, and the like are added to the fifth mixed powder and mixed.
After preparing one or both of the printing paste and the paint for the second sheet, the first laminate 2 in a green state is formed by one or both of the printing lamination and the sheet lamination.
1 on top of each other. The internal electrode 32 is formed by printing a conductive paste of 100% Ag between layers of the second printing paste or the second sheet paint.

The volume ratio of the calcined powder of the second aggregate contained in the dielectric layer 12 is the same as the volume ratio of the calcined powder of the first aggregate contained in the semiconductor layer 11. Alternatively, they may be different. However, when the volume ratio of the second aggregate contained in the dielectric layer 12 is different from the ratio of the first aggregate contained in the semiconductor layer 11, the sintered body powder of the matrix material is reduced by the difference in the volume ratio. It is contained as a third aggregate. For example, the ratio of the first aggregate in the semiconductor layer 11 is 60% by volume, and the ratio of the second aggregate in the dielectric layer 12 is 40% by volume.
In this case, 20% by volume (60% by volume) in the dielectric layer 12
-40% by volume) uses a sintered body powder obtained by holding a matrix material having the same particle size as the first aggregate at the sintering temperature in the atmosphere for about 4 hours as the third aggregate.

After the green laminate 23, which is the laminated first and second laminates, is cut to a predetermined size and held in the atmosphere at 200 to 400 ° C. for 24 hours or more to perform a binder removal process. Baking in an air atmosphere at a temperature of 960 ° C. or less. By this firing, the matrix material (c) in the semiconductor layer 11 becomes a sintered body, and the first aggregate that has been sintered or almost sintered is dispersed in the sintered body, and the dielectric layer 12 The matrix material of (c) above becomes a sintered body, and the second aggregate that has been sintered or almost sintered and the matrix material that has been sintered (the second aggregate) Having the same particle size as above) is dispersed. Since the firing temperature of 960 ° C. or lower is lower than the melting point of Ag, the internal electrodes 31 and 32 are not damaged by the firing, and the specific resistance of the internal electrodes 31 and 32 of 100% Ag can be reduced. Further, a conductive paste containing Ag as a main component is baked on both ends of the fired body. This allows the internal electrode 3
First and second electrically connected to the first and internal electrodes 32
The external electrodes 41 and 42 are formed, and the multilayer ceramic chip component 10 is manufactured.

[0025]

Next, embodiments of the present invention will be described in detail. As shown in <Embodiment 1> FIG. 4, first, MnO ₃ powder 4
5 mol%, 46 mol% of CoO and 9 mol% of CuO were weighed and mixed by a wet mill. A binder was added to the mixed powder, kneaded and granulated, and molded into a predetermined shape. The molded body was fired at 1300 ° C. for 4 hours in an air atmosphere to obtain a sintered body. This sintered body was pulverized by a ball mill and sieved to produce a sintered body powder of a first aggregate (semiconductor porcelain material) having an average particle diameter of 6 μm.

Also, 50 mol% of Fe ₂ O ₃ powder, 15 mol% of NiO, 25 mol% of ZnO and 10 mol% of CuO were weighed and mixed by a wet mill. This mixed powder was calcined at 800 ° C. for 4 hours in an air atmosphere to obtain Ni-
A Zn-Cu ferrite calcined body was obtained. This calcined body was pulverized with a ball mill and sieved to produce a calcined body powder of a matrix material (insulating porcelain material) having an average particle size of 0.3 μm.

On the other hand, 50 mol% of SrO powder and TiO
_{The two} powders were each weighed at 50 mol% and mixed by a wet mill. A binder is added to this mixed powder and kneaded and granulated,
After molding into a predetermined shape, the molded body is heated at 1250 ° C. for 4 hours.
After sintering in the atmosphere for a time, a sintered body of SrTiO ₃ was obtained. The sintered body was pulverized by a ball mill and sieved to produce a sintered body powder of a second aggregate (dielectric ceramic material) having an average particle size of 6 μm. Further, similarly to the above matrix material, Fe ₂
50 mol% of O ₃ powder, 15 mol% of NiO, 25 mol% of ZnO and 10 mol% of CuO were weighed and mixed by a wet mill, and the mixed powder was temporarily baked at 800 ° C. for 4 hours in an air atmosphere. By baking, a Ni-Zn-Cu ferrite calcined body was obtained. The calcined body was pulverized with a ball mill and sieved to produce a sintered body powder of a matrix material having an average particle diameter of 0.3 μm.

Next, the obtained sintered powder of the first aggregate and the calcined powder of the matrix material were combined with the sintered powder of the first aggregate /
Matrix material calcined powder = 60% by volume / 40% by volume
To produce a third mixed powder, and a dispersant, a binder, a plasticizer, a solvent, and the like were added to the mixed powder and mixed to prepare a first printing paste. This first
A first laminate in a green state was prepared by alternately screen printing a printing paste and a 100% Ag conductive paste. Next, the sintered powder of the second aggregate and the calcined powder of the matrix material were wet-mixed at a ratio of sintered powder of the second aggregate / calcined powder of the matrix material = 60% by volume / 40% by volume. The mixture was mixed to prepare a fifth mixed powder, and a dispersant, a binder, a plasticizer, a solvent, and the like were added to the mixed powder and mixed to prepare a second printing paste. This second printing paste and a 100% Ag conductive paste were alternately screen-printed on the first green laminate to produce a second green laminate. A green laminate is formed by the first and second laminates.

A method for forming the green laminate will be described with reference to FIG. 3 (a-1) to (i-1) are top views of the lamination process, and FIGS. 3 (a-2) to (i-2) are FIGS.
FIG. 2 is a sectional view taken along line AA in (1) to (i-1).

First, as shown in FIGS. 3 (a-1) to 3 (a-2), the first base portion 11a of the first laminate 21 in the green state made of the first print paste prepared as described above is prepared. did.
Next, an electrode film 11c was formed on the first base portion 11a using a conductive paste to be slightly smaller than the first base portion 11a (FIGS. 3B-1 to B-2). The first printing paste is screen-printed thereon to form the first intermediate portion 11b of the first laminate 21.
(FIGS. 3 (c-1) to (c-2)). An electrode film 11d is formed on the intermediate portion 11b with a conductive paste by the first intermediate portion 11b.
It was formed one size smaller (FIGS. 3 (d-1) to (d-2)).

The intermediate portion 11b on which the electrode film 11d is formed
The second printing paste was screen-printed on the entire surface to form a second base portion 12a of the second laminate (FIG. 3 (e-1)).
~ (E-2)). Next, an electrode film 12d was formed on the second base portion 12a using a conductive paste to be slightly smaller than the second base portion 12a (FIGS. 3 (f-1) to (f-2)). The second printing paste was screen-printed thereon to form the second intermediate portion 12b of the second laminate 22 in a green state (FIGS. 3 (g-1) to (g-).
2)). An electrode film 12e was formed on the second intermediate portion 12b with a conductive paste to be slightly smaller than the second intermediate portion 12b (FIGS. 3 (h-1) to (h-2)). Thereby, the electrode film 12d
The electrode film 12e is formed so as to be parallel to the second intermediate portion 12b. A second printing paste is screen-printed on the entire surface thereof, and the second upper portion 1 of the second stacked body 22 is printed.
2c was formed (FIGS. 3 (i-1) to (i-2)).

The green laminate 23 obtained by laminating the first and second laminates 21 and 22 is placed in air at 200 to 200 μm.
After the binder was removed at a temperature of 400 ° C. for 24 hours to perform a binder removal treatment, it was held at 900 ° C. for 4 hours in the air and fired to obtain a sintered body having internal electrodes 31 and 32. At both ends of the sintered body, part of the conductor films 11c and 11d as the internal electrodes 31 and part of the conductor films 12d and 12e as the internal electrodes 32 were exposed. As shown in FIGS. 1 and 5, a conductive paste containing Ag as a main component is baked at both ends of the sintered body to form first and second external electrodes 41 and 42. A multilayer ceramic chip component 10 as shown was obtained. FIG. 2 shows an equivalent circuit of the chip component 10.

<Example 2> As a first aggregate, 29 mol% of MnO ₃ powder, 44 mol% of CoO and 27 mol% of Al ₂ O ₃ powder were converted into AlO _{3/2 and} weighed, and mixed by a wet mill. did. A binder was added to the mixed powder, and the mixture was kneaded and granulated to form a predetermined shape.
It was fired at 0 ° C. for 4 hours in an air atmosphere to obtain a sintered body. This sintered body was pulverized by a ball mill and sieved to produce a sintered body powder of a first aggregate (semiconductor porcelain material) having an average particle diameter of 6 μm. PbO powder and TiO ₂ powder were weighed at 50 mol% and 50 mol%, respectively, as a second aggregate, and mixed by a wet mill. A binder is added to the mixed powder, and the mixture is kneaded and granulated to form a predetermined shape.
The sintered body was fired at 50 ° C. for 4 hours in an air atmosphere to obtain a sintered body of PbTiO ₃ . This sintered body is pulverized with a ball mill and sieved, and the second aggregate having an average particle size of 6 μm (dielectric ceramic material)
Was produced. Except for the above, a multilayer ceramic chip component was produced in the same manner as in Example 1. This multilayer ceramic chip component was designated as Example 2.

Example 3 The sintered powder of the first aggregate was Mn.
45 mol% of O ₃ powder, 46 mol% of CoO and CuO
Is mixed, granulated, molded, calcined, and pulverized, and the calcined body powder of the matrix material is made of 50% Fe ₂ O ₃ powder.
It is prepared by mixing, granulating, molding, firing and pulverizing 15 mol% of NiO, 15 mol% of NiO, 25 mol% of ZnO and 10 mol% of CuO. Also, the sintered powder of the second aggregate is composed of 50 mol% and 50 mol% of PbO powder and TiO ₂ powder, respectively.
Each was weighed and mixed by a wet mill. Further, the sintered powder of the first aggregate and the calcined powder of the matrix material are mixed in a ratio of sintered powder of the first aggregate / calcined powder of the matrix material = 60% by volume / 40% by volume. Thus, a fourth mixed powder was prepared. Also, the sintered powder of the second aggregate and the calcined powder of the matrix material were obtained by mixing the sintered powder of the second aggregate / the calcined powder of the matrix material / the sintered powder of the matrix material = 40% by volume /
A fifth mixed powder was prepared by mixing at a ratio of 40% by volume / 20% by volume. Except for the above, a multilayer ceramic chip component was obtained in the same manner as in the first embodiment. This multilayer ceramic type chip component was used as Example 3.

<Comparative Evaluation and Evaluation> The DC resistance value in the first laminate of the multilayer ceramic chip components of Examples 1 to 3 was measured, and the B constant was calculated based on the results. Further, the capacitance of the capacitor in the second laminate was measured. The results are shown in Table 1 together with the aggregate composition, the matrix material composition, their mixing ratio and the firing temperature.

[0036]

[Table 1]

In Table 1, of the mixing ratios of the dielectric layers of Example 3, the parentheses indicate the ratio of the sintered powder of the matrix material. As is clear from Table 1, a composite element in which a thermistor element and a capacitor element are formed in parallel in a single element is 9
It was obtained by baking in an air atmosphere at about 00 ° C. Although not specifically described herein, an element having a wide range of circuit constants could be obtained by changing the material composition of the aggregate and the mixing ratio of the aggregate and the matrix material. Example 3
As described above, the multilayer ceramic chip component of Example 1 and the multilayer ceramic chip component of Examples 1 and 2 (the first material in the magnetic layer) can be changed even if the composition ratio of the second aggregate is changed from the composition ratio of the first aggregate. As in the case of (1) the ratio of the aggregate and the ratio of the second aggregate in the dielectric layer were the same, no cracking or warpage occurred.

[0038]

As described above, according to the present invention, two or more metal oxides selected from the group consisting of MnO, CoO, NiO, CuO, Fe ₂ O ₃ and Al ₂ O ₃ are used for the semiconductor layer. Calcined powder of the first aggregate made of material and Ni-Zn-Cu
Be by mixing and firing the calcined body powder of matrix material mainly composed of system ferrite, the dielectric layer is PbTiO ₃
The calcined body powder of the matrix material in the semiconductor layer and the dielectric layer is obtained by mixing and calcining the calcined body powder of the second aggregate and the like and the calcined body powder of the matrix material having the above as a main component. Have the same volume ratio, and the ratio is at least 40 to 80.
Wt%, the first and second laminates are fired at the first
The reactivity at the grain boundaries of the aggregate and the matrix material and the grain boundaries of the matrix material and the second aggregate are suppressed. In addition, since the matrix material encapsulates the first and second aggregates in a dispersed state when the first and second laminates are fired at a temperature of 960 ° C. or less, the thermistor parallel resistance is 10Ω or more,
The parallel capacitance at 10 ° C. to 30 MHz at 25 ° C. can be 5 pF or more, the thermistor B constant can be 2000 K or more, and low-temperature sintering can be realized by the matrix material.

If the volume ratio of the calcined body powder of the first aggregate in the semiconductor layer is the same as the volume ratio of the calcined body powder of the second aggregate in the dielectric layer, the first and second aggregates are obtained. Since the thermal expansion coefficient and the sintering temperature of the two laminates can be the same, cracks and warpage do not occur after sintering. Further, even if the volume ratio of the calcined body powder of the first aggregate in the semiconductor layer is different from the volume ratio of the calcined body powder of the second aggregate in the dielectric layer, the difference in the volume ratio between the matrix and the matrix If the material is a sintered body powder, the thermal expansion coefficient and the sintering temperature of the first and second laminates can be made the same as in the above, so that cracks and warpage do not occur after sintering. Furthermore, since it can be fired at a low temperature due to the presence of the matrix material, Ag 100%
Internal conductors and internal electrodes can be realized.

[Brief description of the drawings]

FIG. 1 is an external perspective view of a multilayer ceramic chip component according to an embodiment of the present invention and Example 1.

FIG. 2 is an equivalent circuit diagram thereof.

FIG. 3 is a view showing a process of manufacturing the multilayer ceramic chip component according to the embodiment of the present invention and Example 1.

FIG. 4 is a block diagram showing a manufacturing process of the multilayer ceramic chip component of the embodiment of the present invention and Example 1.

FIG. 5 is a longitudinal sectional view of the multilayer ceramic chip component according to the embodiment of the present invention and Example 1.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Multilayer ceramic type chip component (electronic component) 11 Semiconductor layer (semiconductor ceramic material layer) 12 Dielectric layer (dielectric ceramic material layer) 13 Base | substrate 31 1st internal electrode 32 2nd internal electrode

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4G018 AA01 AA21 AA22 AA23 AA24 AA25 AA28 AB02 AC01 5E034 AC02 BA10 BB01 BC02 DA02 DB15 DB20 DC05 DD04

Claims (5)

[Claims] A base is formed by laminating a semiconductor ceramic material layer (11) and a dielectric ceramic material layer (12), and a first laminate comprising the semiconductor ceramic material layer (11) is a pair of first ceramics. Internal electrode (31)
A thermistor having the dielectric ceramic material layer (12)
A capacitor having a plurality of planar second internal electrodes (32) formed in parallel with each other, wherein the semiconductor ceramic material layer (11) is made of MnO, CoO, NiO,
It is composed of two or more metal oxides selected from the group consisting of CuO, Fe ₂ O ₃ and Al ₂ O ₃ and has a sintering temperature of 1 or more.
Sintered at a temperature of 960 ° C or lower with a calcined body powder or a sintered body powder of a semiconductor ceramic material having a spinel structure as a first aggregate which is calcined or fired at a temperature lower than 00 ° C or its sintering temperature. And calcined at a temperature of 700 to 800 ° C. by mixing and calcining a calcined body powder of an insulator ceramic material as a matrix material, wherein the dielectric ceramic material layer (12) is made of PbTiO _3. , BaTiO ₃
And at least one of two or more selected from the group consisting of SrTiO ₃ and SrTiO ₃ and calcined or fired at a temperature 100 ° C. lower than the sintering temperature or at the sintering temperature.
A calcined body powder or sintered body powder of a dielectric ceramic material as an aggregate and the insulator ceramic material as a matrix material are mixed and fired, and are included in the semiconductor ceramic material layer (11). The volume ratio of the calcined body powder of the insulating ceramic material and the volume ratio of the calcined body powder of the insulating ceramic material contained in the dielectric ceramic material layer (12) are the same, and the volume ratio is 40 to 80. A thermistor-capacitor composite multilayer ceramic electronic component characterized by volume%. 2. A volume ratio of a calcined body powder or a sintered body powder of a semiconductor ceramic material contained in a semiconductor ceramic material layer (11) and a calcining of a dielectric ceramic material contained in a dielectric ceramic material layer (12). 2. The thermistor-capacitor composite multilayer ceramic electronic component according to claim 1, wherein the volume ratio of the body powder or the sintered body powder is the same. The volume ratio of the calcined body powder or the sintered body powder of the semiconductor ceramic material contained in the semiconductor ceramic material layer (11) is determined by calcining the dielectric ceramic material contained in the dielectric ceramic material layer (12). 2. The thermistor-capacitor composite multilayer ceramic electronic component according to claim 1, wherein the volume ratio of the body powder or the sintered body powder is different, and the sintered body powder of the insulating porcelain material is included as the third aggregate by the difference in the volume ratio. . 4. The thermistor-capacitor composite multilayer ceramic electronic component according to claim 1, wherein the insulator porcelain material is a calcined powder of a porcelain material containing Ni—Zn—Cu ferrite as a main component. 5. A first internal electrode (31) and a second internal electrode (32).
The thermistor-capacitor composite multilayer ceramic electronic component according to any one of claims 1 to 4, wherein each of the components comprises 100% Ag.