JP2002094370A - Superconducting semiconductor hybrid integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a superconducting semiconductor hybrid integrated circuit that attains an ultra-high speed operation of several GHz or higher with low power consumption, by effectively combining the advantages of a superconducting circuit with the advantages of a semiconductor circuit. SOLUTION: The hybrid integrated circuit includes a circuit 13 consisting of a superconducting element, a circuit 12 consisting of a semiconductor element and a DC power supply line 11, the circuit 12 consisting of the semiconductor element is inserted between a bias line of the circuit 13 consisting of the superconducting element and the DC power supply line 11 and the circuit 12 consisting of the semiconductor element acts as a switch to supply bias current to the circuit 13 consisting of the superconducting element.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a hybrid integrated circuit including a circuit composed of a superconducting element operating at a very low temperature and a circuit composed of a semiconductor element. In particular, the present invention relates to a technique for supplying a bias current to a superconducting integrated circuit.

[0002]

2. Description of the Related Art Superconducting integrated circuits are roughly classified into two types. One is a superconducting integrated circuit based on a method called voltage-type logic, which utilizes a strong nonlinearity appearing in the current-voltage characteristics of a Josephson element.
The voltage type logic has the same logic type as the logic used in a semiconductor integrated circuit.

The other is a superconducting integrated circuit utilizing a nonlinearity of a current phase characteristic of a Josephson element and based on a method called a fluxoid type logic.

A voltage-based logic superconducting integrated circuit sets a constant voltage (usually, a state "0" to a zero voltage level and a state "1" to a desired output voltage level for a fixed time (for example, during a clock cycle). Is a circuit that performs a logical operation according to this voltage level.

[0005] A voltage-type logic superconducting integrated circuit has the characteristic that once it switches to the voltage state, it does not return to the initial state (superconducting state) unless the bias current is returned to zero (therefore, both latching elements). being called).

Therefore, a superconducting integrated circuit composed of latching elements requires an AC bias current (or a unipolar rectangular wave pulse) in order to return to the initial state after the completion of the logic operation. Therefore, in a superconducting integrated circuit constituted by a latching element, it is necessary to bias an AC high-frequency current.

In recent years, a fluxoid type superconducting single flux quantum device (SFQ device) which operates with a direct current (DC) bias and can operate at a higher speed has been actively studied. Since all superconducting integrated circuits of the fluxoid type are biased by direct current (DC), they do not require an alternating current (AC) power supply and can operate at higher speed.

In both the voltage-type superconducting integrated circuit and the fluxoid-type superconducting integrated circuit, a constant bias current equal to or less than the superconducting critical current value is applied to the Josephson element at all times. . At this time, the current flows to the ground through the Josephson element because the Josephson element maintains the superconducting state.

This is the initial state of the superconducting element, and this state is maintained unless an input signal is input. In this state, if an input signal is input, the input signal current flows into the Josephson element in addition to the bias current. Switch to state.

As described above, a bias resistor is usually inserted between the power supply line and the Josephson element in order to keep a certain bias current flowing at all times. Is consumed by the inserted bias resistor. This is the same whether it is a voltage-type logic latching element or a fluxoid-type SFQ element.

As described above, in the superconducting element, a state in which a current always flows is an initial state (a state in which a current is flowing through the element is a steady state, and is sometimes referred to as "always on").

Although a current always flows through the Josephson element, no power is consumed because the Josephson element itself is in a superconducting state. However, power is always consumed by the bias resistor inserted to flow a constant current, which accounts for a large part of the power consumption of the superconducting integrated circuit.

The power supply line of the superconducting integrated circuit has a capacity of 10
Since a constant voltage of about mV is set, the required bias current increases as the number of elements increases, and as a result, the impedance of the power supply line decreases.

For example, in a superconducting integrated circuit in which one Josephson element has a superconducting critical current value of 0.2 mA and 10,000 Josephson elements are integrated, the total current is about 2
A, and when the voltage of the power supply line is 10 mV, the impedance of the power supply line is very small, 5 mΩ.

Conventionally, a high-frequency bias current is generated by a signal generator in a room temperature environment, impedance-converted in a superconducting chip, and supplied to a circuit composed of superconducting elements.

As described above, in order to operate the superconducting integrated circuit, it is necessary to supply a large bias current to the power supply line of the low-impedance superconducting integrated circuit.

Conventionally, as a method of supplying a large bias current to a superconducting integrated circuit, there is a technique using a thin-film transformer or a resonance circuit using an inductor and a capacitor. These are both techniques for supplying a high-frequency large current to a superconducting integrated circuit.

FIG. 7 shows a block diagram of a conventional power supply circuit using a transformer.

A signal generator 71 placed in a room temperature environment, a transformer 72 placed in a low temperature environment, and a superconducting integrated circuit
It consists of 73. The transformer 72 in a low-temperature environment is formed of a thin film, and is usually formed on the same chip as the superconducting integrated circuit 73.

The signal generator 71 in a room temperature environment generates a sine wave signal having an internal impedance of 50Ω and a voltage amplitude of several volts. Since the voltage of the power supply line of the superconducting integrated circuit 73 is usually about 10 mV, the transformer
By using 72, current amplification of several hundred times or more is possible.

FIG. 8 shows a block diagram of a power supply circuit using an LC resonance circuit using an inductor and a capacitor.

It comprises a signal generator 81 placed in a room temperature environment, an LC resonance circuit 82 placed in a low temperature environment, and a superconducting integrated circuit 83. In this method, the current is amplified by matching the impedance of 50 Ω of the signal generator 81 and the impedance of several mΩ of the power supply line of the superconducting integrated circuit 83 in a room temperature environment by the LC resonance at the resonance frequency.

These are methods for supplying an AC bias current to a superconducting integrated circuit including a voltage-type logic latching element. On the other hand, since the bias current of a superconducting integrated circuit containing a single flux quantum of the fluxoid type logic is a DC current, such a method of performing current amplification cannot be directly used. A method of directly supplying a DC bias current to all devices has been adopted.

However, the above-described conventional power supply method for a superconducting integrated circuit has the following problems.

First, since no measure has been taken to reduce the bias current of the superconducting integrated circuit itself,
There is a problem that the power consumption of the superconducting integrated circuit itself increases in proportion to the increase in the scale of the superconducting integrated circuit.

Further, since the bias current increases in proportion to the increase in the circuit scale, even if the bias current is a direct current, as in the case of a superconducting integrated circuit of a fluxoid type logic, it exceeds 10 A. It was not easy to supply a large current.

Second, in the method using the transformer, it is very difficult to supply a high-frequency AC bias current of 1 GHz or more due to the phase shift and the parasitic capacitance in the transformer. was there.

Third, in the method using the LC resonance circuit,
As the frequency increases, the inductance and capacitance values become relatively small, and the influence of parasitic inductance and capacitance on the pads and bonding parts of the integrated circuit increases, which also makes it difficult to supply high-frequency current. was there.

Further, in this LC resonance method, matching can be achieved only at the resonance frequency. Therefore, if a plurality of LC resonance circuits are used, the resonance frequency of the entire circuit will not match due to variations in the parameters of the elements, and impedance matching will be achieved. There was also a problem that it disappeared.

In the prior art, it was very difficult to supply a large DC current exceeding several A or a large high frequency current exceeding several GHz to the superconducting integrated circuit.

[0031]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and has as its object to effectively combine the advantages of a superconducting circuit with those of a semiconductor circuit. Accordingly, it is an object of the present invention to provide a superconducting semiconductor hybrid integrated circuit which can operate at an ultra-high speed of several GHz or more and consumes less power.

[0032]

According to the present invention, there is provided a hybrid integrated circuit including a circuit formed of a superconducting element, a circuit formed of a semiconductor element, and a DC power supply line. A circuit composed of a semiconductor element is inserted between a bias line and a DC power supply line of a circuit composed of the superconducting element, and a circuit composed of the semiconductor element is a circuit composed of the superconducting element. Function as an open / close switch for supplying a bias current to the switch.

Here, the circuit composed of the semiconductor element has a first bias input terminal, a signal input terminal, and an output terminal, and the circuit composed of the superconducting element has a second bias input terminal. A first bias input terminal.
The output terminal is connected to the DC power supply line, and
Connected to the bias input terminal of

Further, the circuit constituted by the semiconductor element is normally in an OFF state, and is turned ON only when an input signal supplied from the signal input terminal exceeds a predetermined threshold value. The bias current is supplied to a circuit including the superconducting element via a second bias input terminal.

The circuit formed by the semiconductor element is preferably a field-effect transistor or a high electron mobility transistor used under the same low temperature environment as the circuit formed by the superconducting element.

Preferably, the circuit constituted by the superconducting element includes a superconducting single flux quantum element biased by a direct current or a superconducting latching element biased by an alternating current.

Further, the circuit constituted by the superconducting element and the circuit constituted by the semiconductor element are formed on the same semiconductor substrate, and the circuit constituted by the superconducting element is
A circuit formed of the superconducting element and a circuit formed of the semiconductor element are formed on a circuit formed of the semiconductor element via an insulating layer, and are connected through a contact hole.

Alternatively, the circuit constituted by the superconducting element is formed on a first substrate, and the circuit constituted by the semiconductor element is formed on a second substrate different from the first substrate. The first substrate and the second substrate may be connected by flip chip bonding via bumps.

Preferably, the circuit constituted by the semiconductor element is disposed near the circuit constituted by the superconducting element and within a distance equal to or less than the wavelength of the operating frequency of the circuit constituted by the superconducting element. Have been.

Further, according to the present invention, in a hybrid integrated circuit including a circuit block composed of a plurality of semiconductor elements, a circuit block composed of a plurality of superconducting elements, and a DC power supply line, Circuit block is inserted between the bias line of the circuit block composed of each superconducting element and the DC power supply line, and the circuit block composed of the plurality of semiconductor elements is connected to the plurality of superconducting elements. Function as an open / close switch for selectively supplying a bias current to an arbitrary block of the circuit block configured by the above.

In this case, a plurality of circuit blocks composed of the superconducting elements are arranged in an array, and the circuit blocks composed of the semiconductor elements are selectively biased with respect to an arbitrary superconducting circuit block. It is desirable to supply current.

The superconducting circuit block is preferably constituted by a superconducting random access memory.

[0043]

According to the present invention, it is possible to eliminate the problems of the prior art by arranging a power supply circuit composed of semiconductor elements in the vicinity of a superconducting integrated circuit (almost a distance less than the wavelength of the operating frequency). Making it possible.

More specifically, the superconducting semiconductor hybrid integrated circuit of the present invention is a hybrid integrated circuit including a circuit constituted by a superconducting element, a circuit constituted by a semiconductor element, and a DC power supply line. Is inserted between the bias line of the circuit constituted by the superconducting element and the DC power supply line, and the circuit constituted by the semiconductor element applies a bias current to the circuit constituted by the superconducting element. It has a function as an open / close switch for supplying.

A feature of the present invention is that a digital integrated circuit which is ultra-high speed and can greatly reduce power consumption by combining a semiconductor circuit which is always off and a superconducting circuit which is always on and has the property of non-volatility. The point is that it can be realized.

More specifically, as described above, in the Josephson element, the state in which current always flows is the initial state (always on), so that current always flows through the Josephson element. However, the Josephson element itself is in a superconducting state and does not consume power.

However, power is always consumed by the bias resistor inserted for flowing a constant current, and this power accounts for a large part of the power consumption of the superconducting integrated circuit. On the other hand, a semiconductor element, especially an NMOS transistor or a field effect transistor (FET), is always in a high impedance state, and almost no current flows through the semiconductor element (always off).

Current flows from the power supply line only when an input signal is input to the gate of the semiconductor element. Therefore, there is a feature that almost no power is consumed at all times.

Therefore, by supplying a bias current to the superconducting element through a semiconductor circuit having such characteristics, the bias current does not always flow in the superconducting element, Only when the device operates, an input signal can be applied to the semiconductor circuit in advance, the semiconductor circuit can be turned on, and a bias current can be supplied to the superconducting device.

Thus, the power consumed by the bias resistor of the superconducting integrated circuit can be significantly reduced. When the superconducting circuit is inactive (when the switching operation is not performed), the bias current is cut off (off).
The problem does not arise even if the superconducting circuit is a nonvolatile element.

That is, the superconducting circuit is a nonvolatile element as long as a superconducting environment is maintained because information is stored in a superconducting loop composed of an inductance and a Josephson element. That is, even if the power is turned off, the stored information does not disappear.

Therefore, when the superconducting circuit is not performing a switching operation, the power is turned off only at that time, so that no power is consumed and power consumption can be reduced.

The above method can be effectively used in a random access memory (RAM). In the random access memory, even when the circuit scale (storage capacity) increases, only a specific cell is accessed at a certain time, and a decoder circuit, a driver circuit, And only a part of the gate circuits such as the sense circuit is operating, and many other gate circuits are in an inactive state.

Therefore, by constructing the RAM in blocks, it is only necessary to supply the bias current to one divided RAM block, so that the power consumption of the RAM can be significantly reduced. .

Further, since the unipolar rectangular wave pulse signal can be supplied to the superconducting integrated circuit by the opening / closing function of the DC-biased semiconductor circuit, the superconducting integrated circuit includes a fluxoid type single flux quantum element operated by a DC bias. A bias current can be supplied not only to a conductive integrated circuit but also to a superconductive integrated circuit including a voltage-type logic latching element. Therefore, it is sufficient to prepare only a DC power supply from the outside as a power supply.

Further, by disposing the semiconductor circuit very close to the superconducting integrated circuit (a distance less than the wavelength of the operating frequency), a high-frequency bias signal can be directly transmitted to the superconducting integrated circuit without passing through a long transmission line. Since the transmission is possible, a high-frequency bias current exceeding several GHz can be easily supplied.

[0057]

Next, embodiments of the present invention will be described with reference to the drawings.

(First Embodiment) FIG. 1 is a block diagram showing a superconducting semiconductor hybrid integrated circuit according to a first embodiment of the present invention.

The superconducting semiconductor hybrid integrated circuit of the present embodiment has a DC power supply line (DC) 11, a circuit (SW) 12 composed of semiconductor elements, and a superconducting integrated circuit (SIC) 1.
And 3.

Circuit (SW) 12 composed of semiconductor elements
Are the bias input terminal (B1) and the signal input terminal (I1)
And an output terminal (O1), and a bias input terminal (B
1) is a DC power supply line (DC) via a resistor (Rb) 14
The output terminal (O1) is connected to the bias input terminal (P1) of the superconducting integrated circuit (SIC) 13.

Circuit (SW) 12 composed of semiconductor elements
Is normally in an OFF state, that is, in a high impedance state, and becomes an ON state, that is, in a low impedance state only when the input signal (In) exceeds a certain threshold value, and applies a bias current to the superconducting integrated circuit (SIC) 13. It has a function as a switch to supply.

In the present embodiment, one field effect transistor (FET) is used as the circuit (SW) 12 composed of the semiconductor element. More specifically,
By using, for example, a high electron mobility transistor (HEMT) as the FET transistor, it is possible to operate in the same low temperature environment as the superconducting integrated circuit and at a high speed of about 10 GHz.

FIG. 2 is a schematic diagram showing input / output signal waveforms for explaining the operation of the first embodiment of the superconducting semiconductor hybrid integrated circuit of the present invention in further detail.

FIG. 2A shows a DC power supply line (DC) 11.
Voltage waveform, circuit (SW) 12 composed of semiconductor elements
Voltage waveform of input signal (In) to be applied to output terminal (O1)
5 shows an output current waveform (Out) flowing through.

Circuit (SW) 12 composed of semiconductor elements
Usually has almost no current flowing from the DC power supply line (DC) 11 to the superconducting integrated circuit (SIC) 13 because it is in a high impedance state, but has an input applied to a circuit (SW) 12 composed of semiconductor elements. Only when the signal waveform (In) exceeds a certain threshold value is turned on, that is, in a low impedance state, and a constant current flows from the DC power supply line (DC) 11 to the superconducting integrated circuit (SIC) 13. become.

FIG. 2B shows a case where a sine wave as shown in the figure is input as the input signal waveform (In).
Only when the voltage of the input signal waveform exceeds the threshold value shown by the dotted line, the circuit (SW)
A low impedance state results, resulting in FIG.
An output current (Out) of a rectangular wave as shown in (c) is supplied from a DC power supply line (DC) 11 to a superconducting integrated circuit (SIC) 13 through a circuit (SW) 12 composed of semiconductor elements.

By the above operation, the superconducting integrated circuit (SI
C) A unipolar rectangular wave pulse current can be supplied to 13. In other words, the open / close function as a switch of the circuit (SW) 12 composed of a semiconductor element allows a bias current to be selectively supplied to the superconducting integrated circuit 13 connected thereto in a certain time region according to an input signal. .

FIG. 3 is a schematic cross-sectional view for explaining a first device structure of the first embodiment of the superconducting semiconductor hybrid integrated circuit of the present invention.

The semiconductor device 31 having the semiconductor transistor 36 on the semiconductor substrate is manufactured by the usual semiconductor manufacturing process.
Is formed thereon, and then a superconducting integrated circuit (superconducting element) 32 is formed thereon via an insulating layer such as SiO2.

The semiconductor element 31 and the superconducting integrated circuit 32 are connected via a contact hole 33. Here, the superconducting integrated circuit 32 has a superconducting ground plane 34 and a Josephson junction 35.

In this device structure, since fine contact holes 33 can be formed, there is an effect that the semiconductor element 31 and the superconducting element 32 can be connected at a high density.

Further, a superconducting integrated circuit (superconducting element) 3
2 and the semiconductor element 31 can be arranged close to each other, so that the inductance of the wiring between the two elements can be minimized, and there is an effect that high-frequency operation is enabled.

FIG. 4 is a schematic cross-sectional view for explaining a second device structure of the first embodiment of the superconducting semiconductor hybrid integrated circuit of the present invention.

The second device structure comprises a substrate 41 on which a semiconductor element is formed and a substrate 42 on which a superconducting element is formed.
Are flip-chip bonded by bumps 43.

In this device structure, since the semiconductor element and the superconducting element can be manufactured by separate manufacturing processes, there is an advantage that a conventional manufacturing process can be used.

As described above, the superconducting semiconductor hybrid integrated circuit of this embodiment makes it possible to supply a bias current to a superconducting integrated circuit (SIC) only when necessary according to an input signal. Thus, there is an effect that power consumption can be reduced as compared with a case where a bias current is constantly supplied to the superconducting integrated circuit.

Further, since a unipolar rectangular wave pulse current can be supplied, a circuit composed of superconducting elements (superconducting integrated circuit (SIC)) can operate in a superconducting single circuit operated with a DC bias. There is an effect that it becomes possible to include not only a flux quantum element (SFQ element) but also a superconducting latching element that operates with a bias of an alternating current.

In this embodiment, one field effect transistor (FET) is used as a circuit (SW) composed of semiconductor elements in the simplest case. The same effect can be obtained as long as the circuit has a function of transitioning to a low impedance state and changing the output current according to the above.

For example, NMOS transistors, CMOS
It is also possible to use a transistor or a flip-flop circuit formed with these. However, it is necessary to use those semiconductor circuits whose circuit constants are optimized so as to operate in the same low-temperature environment as the superconducting integrated circuit.

In this embodiment, a sine wave signal is used as an input signal. However, it is necessary to add an optimum input signal depending on the characteristics of a circuit (SW) composed of semiconductor elements. For example, when a flip-flop is used as a circuit (SW) including a semiconductor element, a similar effect can be obtained by adding a trigger signal such as set and reset necessary for the circuit.

Further, here, it is assumed that the sine wave input signal is applied from the outside, but the set and reset signals as described above may be output signals from another semiconductor circuit inside the chip. good.

Alternatively, a signal from a superconducting circuit may be used. In this case, the output signal level of the Josephson element is about 3 mV in the case of the Nb / AlOx / Nb junction, so it is necessary to amplify the voltage to the input signal level of the semiconductor circuit.

A superconducting semiconductor interface circuit for performing voltage amplification is described in the literature (Cryogenics, vol. 30, pp. 1005-100).
8, Dec. 1990). By using such an interface circuit, the bias current can be controlled according to the output of the superconducting circuit.

(Second Embodiment) FIG. 5 is a block diagram showing a superconducting semiconductor hybrid integrated circuit according to a second embodiment of the present invention.

The superconducting semiconductor hybrid integrated circuit of the present embodiment has circuits (SW1 and SW2) 52a, 52 each composed of a DC power supply line (DC) 51 and two semiconductor elements.
b and two superconducting integrated circuits (SIC1 and SIC2) 53
a, 53b.

Circuits 52a, 52 composed of respective semiconductor elements
2b and circuits 53a and 53b composed of superconducting elements
Has the same circuit configuration as the first embodiment. This embodiment has a circuit configuration in which two circuits of the first embodiment are arranged in parallel with a DC power supply line (DC) 51.

The operation of each constituent circuit of the present embodiment is described in the first
Is the same as that of the first embodiment except that the input signal 1 (I
n) and the input signal 2 (In), the circuits (SW1 and SW2) 52a, 52b composed of semiconductor elements are arbitrarily selected, and the superconducting integrated circuit (53a or 53b) connected to the selected circuit. Only the bias current (output current Out1 or Out2) is supplied.

As a result, it becomes possible to supply a bias current to a superconducting integrated circuit (53a or 53b) to a necessary place (circuit) for a necessary time, which is further different from that of the first embodiment. This has the effect of significantly reducing power consumption.

This embodiment is different from the first embodiment shown in FIG.
And a device structure similar to the device structure shown in FIG.

Further, in this embodiment, the circuit configuration in which the two circuits of the first embodiment are arranged in parallel with the DC power supply line (DC) 51 is shown. The same effect can be obtained even if they are arranged.

(Third Embodiment) FIG. 6 is a block diagram showing a superconducting semiconductor hybrid integrated circuit according to a third embodiment of the present invention.

In the present embodiment, there are a plurality of circuits (SW) 62 composed of semiconductor elements and a plurality of circuits (SIC) 63 composed of superconductive elements connected thereto, which are arranged in an array. ing.

In this embodiment, a superconducting random access memory is used as the circuit (SIC) 63 composed of superconducting elements. More specifically, a DC power supply line (DC) 6
Circuit (SW) 6 composed of semiconductor elements connected to 1
2 and a superconducting RAM block 63 including a latching element connected to a circuit (SW) 62 composed of the semiconductor element are arranged in a matrix array of 4 rows and 4 columns, and
It is composed of a block row decoder circuit 64 and a block column decoder circuit 65 for selecting a circuit 62 composed of two semiconductor elements.

For example, one superconducting RAM block 63
Is composed of a storage cell array having a storage capacity of 1 kbits, a driver circuit, a decoder circuit, a sense circuit, and the like. Can be configured.

Circuit (SW) 63 composed of semiconductor elements
Also has a function of taking AND logic of signals from the block row decoder circuit 64 and the block column decoder circuit 65,
Only when selected by AND logic, it is turned on, that is, in a low impedance state, and one superconducting RAM connected to a circuit (SW) 62 composed of the semiconductor element.
The power supply current can be selectively supplied only to the block 63.

In FIG. 6, a circuit (SW) 62 composed of a semiconductor element in the second row and third column is selected (in FIG. 6, indicated by oblique lines), and a superconducting RAM block 63 connected thereto is selected. Only the bias current is supplied.

In the case of the storage circuit having such a block configuration,
With increasing storage capacity, superconducting R arranged in an array
Although the number of AM blocks 63 increases, at the time of writing or reading, basically only one memory cell needs to be selected, so that a bias current is supplied to only one superconducting RAM block 63 at the time of writing or reading. Just do it.

In other words, since it is not necessary to supply a bias current to most of the superconducting RAM blocks 63 that are not accessed, it is possible to greatly reduce power consumption.

Therefore, the number of superconducting RAM blocks 63 arranged in an array increases as the storage capacity increases. Therefore, the circuit 62 composed of semiconductor elements for selecting these superconducting RAM blocks 63 is also required. Although it increases somewhat, the power consumed in the semiconductor circuit part increases slightly,
The power consumed by a superconducting element is basically one superconducting R
It does not increase beyond the power consumption of the AM block 63.

That is, although the present embodiment is a random access memory having a storage capacity of 16 kbits, it is only necessary to supply a bias current to only a 1 kbit RAM block, as compared with a case where a bias current is supplied to the whole. Only 1 / 16th the power consumption is required.

In this embodiment, a 16 kbit random access memory arranged in a matrix array of 4 rows and 4 columns is constructed. However, even if a random access memory having a larger matrix array is constructed,
The power consumption of the superconducting circuit portion is basically only the power consumption of the 1 kbit superconducting RAM block.

As described above, even when a large-scale random access memory is formed by the superconducting semiconductor hybrid integrated circuit of the present embodiment, a random operation memory capable of operating at a high speed of several GHz or more with a small power consumption can be obtained. There is an effect that an access memory can be realized.

[0103]

According to the present invention, by combining the advantages of the superconducting circuit and the advantages of the semiconductor circuit effectively, several GHs can be obtained.
It is possible to realize a superconducting semiconductor hybrid integrated circuit capable of operating at an ultra-high speed of z or more and having extremely low power consumption.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a superconducting semiconductor hybrid integrated circuit according to a first embodiment of the present invention;

FIGS. 2A and 2B are schematic diagrams of input / output signal waveforms for describing a first embodiment of a superconducting semiconductor hybrid integrated circuit according to the present invention, wherein FIG. 2A shows a voltage waveform of a DC power supply line (DC);
(B) is a voltage waveform of the input signal (In), and (c) is an output current (Out).

FIG. 3 is a schematic cross-sectional view for explaining a first device structure of the first embodiment of the superconducting semiconductor hybrid integrated circuit of the present invention.

FIG. 4 is a schematic sectional view for explaining a second device structure of the first embodiment of the superconducting semiconductor hybrid integrated circuit of the present invention.

FIG. 5 is a block diagram illustrating a superconducting semiconductor hybrid integrated circuit according to a second embodiment of the present invention;

FIG. 6 is a block diagram illustrating a superconducting semiconductor hybrid integrated circuit according to a third embodiment of the present invention;

FIG. 7 is a block diagram for explaining a power supply circuit using a conventional transformer.

FIG. 8 is a block diagram for explaining a power supply circuit using a conventional LC resonance circuit.

[Explanation of symbols]

11, 51, 61 DC power supply line (DC) 12, 52a, 52b, 62 Circuit composed of semiconductor elements (SW) 13, 53a, 53b Circuit composed of superconducting elements (superconducting integrated circuit) 31 Semiconductor element Reference Signs List 32 superconducting element 33 contact hole 41 substrate on which semiconductor is formed 42 substrate on which superconducting element is formed 63 superconducting RAM block I1, I2 input signal terminal of circuit composed of semiconductor elements B1, B2 composed of semiconductor elements Input terminals O1, O2 of the circuit composed of semiconductor elements P1, P2 Bias current input terminals Rb, Rb1, Rb2 of the circuit composed of superconducting elements Bias resistance Out Output current In Input signal

Continued on the front page (72) Inventor Kazuki Miyahara 1-14-3 Shinonome, Koto-ku, Tokyo Foundation International Research Institute for Superconducting Technology, Superconductivity Engineering Laboratory (72) Inventor Yoichi Enomoto 1-chome, Shinonome, Koto-ku, Tokyo No. 14-3 F-term in the Superconductivity Engineering Research Center, International Superconducting Technology Research Center (Reference) 4M113 AA04 AA14 AA25 AA44 AC01 AC44 AC45 AD22 AD24 AD42 AD62 CA13 4M114 AA29 AA40 BB05 CC09 5J042 AA01 BA00 BA02 CA07 CA08 CA15 CA20 CA22 CA29 DA02 DA03

Claims (12)

[Claims] 1. A hybrid integrated circuit including a circuit constituted by a superconducting element, a circuit constituted by a semiconductor element, and a DC power supply line, wherein the circuit constituted by the semiconductor element is constituted by the superconducting element. Wherein the circuit formed of the semiconductor element is inserted between the bias line of the circuit and the DC power supply line, and functions as an on / off switch for supplying a bias current to the circuit formed of the superconducting element. Superconducting semiconductor hybrid integrated circuit. 2. The circuit constituted by the semiconductor element has a first bias input terminal, a signal input terminal, and an output terminal, and the circuit constituted by the superconducting element has a second bias input terminal. 2. The superconducting semiconductor hybrid integrated circuit according to claim 1, wherein a first bias input terminal is connected to the DC power supply line, and the output terminal is connected to a second bias input terminal. circuit. 3. A circuit constituted by the semiconductor element is normally in an OFF state, and is turned on only when an input signal supplied from the signal input terminal exceeds a predetermined threshold value.
3. The superconducting semiconductor hybrid integrated circuit according to claim 2, wherein said bias current is supplied to a circuit constituted by said superconducting element via a second bias input terminal in an N state. 4. The superconducting semiconductor hybrid integrated circuit according to claim 1, wherein the circuit including the semiconductor element is a field effect transistor. 5. The circuit according to claim 1, wherein the circuit constituted by the semiconductor element is a high electron mobility transistor used in the same low-temperature environment as the circuit constituted by the superconducting element. Conductive semiconductor hybrid integrated circuit. 6. A circuit comprising a superconducting single flux quantum device biased by a direct current or a superconducting latching device biased by an alternating current. Superconducting semiconductor hybrid integrated circuit. 7. A circuit constituted by the superconducting element and a circuit constituted by the semiconductor element are formed on the same semiconductor substrate, and the circuit constituted by the superconducting element is provided via an insulating layer. And a circuit formed by the superconducting element and a circuit formed by the semiconductor element are connected to each other through a contact hole. Item 3. A superconducting semiconductor hybrid integrated circuit according to item 1. 8. A circuit constituted by the superconducting element is formed on a first substrate, and a circuit constituted by the semiconductor element is formed on a second substrate different from the first substrate. The superconducting semiconductor hybrid integrated circuit according to claim 1, wherein the first substrate and the second substrate are connected by flip chip bonding via bumps. 9. A circuit constituted by the semiconductor element is arranged near a circuit constituted by the superconducting element and within a distance equal to or less than a wavelength of an operating frequency of the circuit constituted by the superconducting element. The superconducting semiconductor hybrid integrated circuit according to claim 1, wherein 10. A hybrid integrated circuit including a circuit block composed of a plurality of semiconductor elements, a circuit block composed of a plurality of superconducting elements, and a DC power supply line, a circuit block composed of each semiconductor element. Is inserted between the bias line of the circuit block composed of each superconducting element and the DC power supply line, and the circuit block composed of the plurality of semiconductor elements is
A superconducting semiconductor hybrid integrated circuit, which functions as an on / off switch for selectively supplying a bias current to an arbitrary block of the circuit block including the plurality of superconducting elements. 11. A circuit block comprising a plurality of said superconducting elements is arranged in an array, and a circuit block comprising said semiconductor element is provided with a bias current selectively with respect to an arbitrary superconducting circuit block. 11. The superconducting semiconductor hybrid integrated circuit according to claim 10, wherein: 12. The superconducting semiconductor hybrid integrated circuit according to claim 11, wherein said superconducting circuit block comprises a superconducting random access memory.