JP2002094329A - Microwave band doubly balanced mixer circuit - Google Patents

Microwave band doubly balanced mixer circuit

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Publication number
JP2002094329A
JP2002094329A JP2000281280A JP2000281280A JP2002094329A JP 2002094329 A JP2002094329 A JP 2002094329A JP 2000281280 A JP2000281280 A JP 2000281280A JP 2000281280 A JP2000281280 A JP 2000281280A JP 2002094329 A JP2002094329 A JP 2002094329A
Authority
JP
Japan
Prior art keywords
transistor
signal
frequency
intermediate frequency
mixer circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000281280A
Other languages
Japanese (ja)
Other versions
JP3723435B2 (en
Inventor
Hiroyuki Nakamoto
博之 中本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP2000281280A priority Critical patent/JP3723435B2/en
Publication of JP2002094329A publication Critical patent/JP2002094329A/en
Application granted granted Critical
Publication of JP3723435B2 publication Critical patent/JP3723435B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a microwave band doubly balanced mixer circuit used for a microwave band, that prevents operation from becoming unstable due to the oscillation of the circuit itself. SOLUTION: In the microwave band doubly balanced mixer circuit of this invention, bases of each pair of transistors(TR) are placed closely for the connection in the shortest distance, common-mode local oscillation signals are applied to the bases of the pair of TRs, high-frequency amplifier signals with different phases are applied to the emitters of the pair TRs to mix the local oscillation signals and the high-frequency amplifier signals and to extract an intermediate frequency signal.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はマイクロ波帯域の高
周波信号を使用する携帯電話等に用いられるマイクロ波
帯ダブルバランス型ミキサ回路に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microwave band double-balanced mixer circuit used in a portable telephone or the like using a high frequency signal in a microwave band.

【0002】[0002]

【従来の技術】マイクロ波帯の高周波信号を用いた携帯
電話機等の無線通信機においては、アンテナに受信され
たマイクロ波帯の高周波信号を先ず高周波増幅回路で増
幅した後、ミキサ回路で周波数変換し更に復調等が行わ
れる。
2. Description of the Related Art In a radio communication device such as a portable telephone using a microwave band high-frequency signal, a microwave band high-frequency signal received by an antenna is first amplified by a high-frequency amplifier circuit and then frequency-converted by a mixer circuit. Further, demodulation and the like are performed.

【0003】図2は従来のダブルバランス型ミキサ回路
を利用した携帯電話機の高周波部分のブロック図の例で
ある。1はアンテナ又はケーブル等を介して受信された
受信信号を処理する受信部、2はアンテナ又はケーブル
等を介して送信される送信信号を処理する送信部であ
る。
FIG. 2 is an example of a block diagram of a high-frequency portion of a portable telephone using a conventional double-balanced mixer circuit. 1 is a receiving unit that processes a received signal received via an antenna or a cable or the like, and 2 is a transmitting unit that processes a transmission signal transmitted via an antenna or a cable or the like.

【0004】前記受信部1はアンテナ等に受信されたマ
イクロ波帯の高周波信号を増幅する高周波増幅回路5
と、PLL6にて発振周波数が制御される電圧制御発振
器よりなる局部発振器7と、該局部発振器7よりバッフ
ァーアンプ6を介して加わる局部発振信号と前記高周波
増幅回路5よりの高周波信号とを混合するミキサ回路9
と、該ミキサ回路9で変換された中間周波数信号を増幅
する中間周波増幅回路10とよりなる。
The receiving section 1 is a high-frequency amplifier circuit 5 for amplifying a high-frequency signal in a microwave band received by an antenna or the like.
And a local oscillator 7 composed of a voltage-controlled oscillator whose oscillation frequency is controlled by the PLL 6, and a local oscillation signal applied from the local oscillator 7 via the buffer amplifier 6 to a high-frequency signal from the high-frequency amplifier circuit 5. Mixer circuit 9
And an intermediate frequency amplifying circuit 10 for amplifying the intermediate frequency signal converted by the mixer circuit 9.

【0005】また送信部2は送信するべき送信信号が変
換された中間周波数信号を増幅する中間周波増幅回路1
7と、該中間周波増幅回路17よりの中間周波数信号と前
記局部発振器7よりバッファーアンプ18を介して加わ
る局部発振信号と混合するミキサ回路19およびミキサ
回路19よりのマイクロ波帯の高周波数信号を増幅し、
前記アンテナに供給する高周波増幅回路20とよりな
る。
[0005] A transmitting section 2 includes an intermediate frequency amplifying circuit 1 for amplifying an intermediate frequency signal obtained by converting a transmission signal to be transmitted.
7, a mixer circuit 19 for mixing the intermediate frequency signal from the intermediate frequency amplifier circuit 17 with a local oscillation signal applied from the local oscillator 7 via a buffer amplifier 18, and a high frequency signal in the microwave band from the mixer circuit 19. Amplify,
And a high-frequency amplifier circuit 20 for supplying the antenna.

【0006】受信状態では、アンテナを介して高周波増
幅回路5に加えられた高周波信号は前記高周波増幅回路
5で増幅され、さらにミキサ回路9に加わり局部発振器
からの局部発振信号とミキサされ、前記ミキサ回路9か
ら中間周波数信号が取出され中間周波増幅回路10で増
幅される。
In the receiving state, the high-frequency signal applied to the high-frequency amplifier circuit 5 via the antenna is amplified by the high-frequency amplifier circuit 5 and further added to the mixer circuit 9 to be mixed with the local oscillation signal from the local oscillator. An intermediate frequency signal is extracted from the circuit 9 and amplified by the intermediate frequency amplifier circuit 10.

【0007】ところで前記ミキサ回路9はエミッタが対
向して配置されて接続されたトランジスタ21とトラン
ジスタ22及び同様にエミッタが対向して配置され且つ
接続されたトランジスタ23とトランジスタ24、前記
トランジスタ21とトランジスタ22の接続されたエミ
ッタにコレクタが接続されたトランジスタ25、前記ト
ランジスタ23とトランジスタ24の接続されたエミッ
タにコレクタが接続されたトランジスタ26とよりな
る。
The mixer circuit 9 includes a transistor 21 and a transistor 22 whose emitters are arranged oppositely and connected, similarly a transistor 23 and a transistor 24 whose emitters are arranged oppositely and connected, and the transistor 21 and the transistor A transistor 25 has a collector connected to the emitter connected to the transistor 22, and a transistor 26 has a collector connected to the emitter connected to the transistors 23 and 24.

【0008】前記トランジスタ21とトランジスタ24
のベースは接続されており、また前記トランジスタ22
とトランジスタ23のベースは接続されている。さらに
前記トランジスタ21とトランジスタ23のコレクタは
接続されると共に抵抗27を介して電源電圧Vccが加
えられ、同様にさらに前記トランジスタ22とトランジ
スタ24のコレクタは接続されると共に抵抗28を介し
て電源電圧Vccが加えられる。
The transistor 21 and the transistor 24
Are connected to each other, and the transistor 22
And the base of the transistor 23 are connected. Further, the collectors of the transistors 21 and 23 are connected and the power supply voltage Vcc is applied via a resistor 27. Similarly, the collectors of the transistors 22 and 24 are connected and the power supply voltage Vcc is connected via a resistor 28. Is added.

【0009】前記トランジスタ25とトランジスタ26
のエミッタは抵抗31を介して接続されていると共に、
夫々抵抗29、30を介して接地されている。
The transistor 25 and the transistor 26
Are connected via a resistor 31 and
They are grounded via resistors 29 and 30, respectively.

【0010】前記高周波増幅器5の出力段は差動アンプ
で構成されており、増幅された高周波増幅信号Rf+と
該高周波増幅信号Rf+と180度位相を異にする高周
波増幅信号Rf-とが取出され、前記高周波増幅信号R
f+はトランジスタ25のベースに加えられ、また高周
波信号Rf-はトランジスタ26のベースに加えられ
る。
The output stage of the high-frequency amplifier 5 is constituted by a differential amplifier, and the amplified high-frequency amplified signal Rf + and the high-frequency amplified signal Rf- which is 180 degrees out of phase with the high-frequency amplified signal Rf + are output. The high frequency amplified signal R
f + is applied to the base of transistor 25 and high frequency signal Rf- is applied to the base of transistor 26.

【0011】また前記バッファアンプ8は差動アンプで
構成されており、局部発振器7からの局部発振信号をバ
ッファし局部発振信号Lo+と該局部発振信号Lo+と1
80度位相を異にする局部発振信号Lo-を出力し、局
部発振信号Lo+はトランジスタ21とトランジスタ2
4のベースに加えられ、局部発振信号Lo-はトランジ
スタ22とトランジスタ23のベースに加えられる。
The buffer amplifier 8 is constituted by a differential amplifier, buffers the local oscillation signal from the local oscillator 7, and outputs the local oscillation signal Lo + and the local oscillation signal Lo +.
A local oscillation signal Lo- having a phase difference of 80 degrees is output, and the local oscillation signal Lo + is
4 and the local oscillation signal Lo- is applied to the bases of the transistors 22 and 23.

【0012】前記トランジスタ21のベースに局部発信
信号Lo+が加えられ、エミッタに高周波増幅信号Rf+
が加えられるのでミキサされコレクタから中間周波信号
が取出される。またトランジスタ23のベースに局部発
信信号Lo-が加えられ、エミッタに高周波増幅信号R
f-が加えられコレクタから中間周波信号IF+が取出さ
れる。
A local oscillation signal Lo + is applied to the base of the transistor 21, and a high-frequency amplified signal Rf + is applied to the emitter.
Is added, and an intermediate frequency signal is extracted from the collector. A local transmission signal Lo- is applied to the base of the transistor 23, and the high-frequency amplified signal R-
f- is applied and an intermediate frequency signal IF + is taken from the collector.

【0013】同様にしてトランジスタ22のベースに局
部発信信号Lo-が加えられ、エミッタに高周波増幅信
号Rf+が加えられるのでミキサされコレクタから中間
周波信号が取出される。またトランジスタ24のベース
に局部発信信号Lo+が加えられ、エミッタに高周波増
幅信号Rf-が加えられコレクタから中間周波信号IF-
が取出される。
Similarly, the local oscillation signal Lo- is applied to the base of the transistor 22 and the high-frequency amplification signal Rf + is applied to the emitter, so that the signal is mixed and the intermediate frequency signal is extracted from the collector. The local oscillation signal Lo + is applied to the base of the transistor 24, the high-frequency amplified signal Rf- is applied to the emitter, and the intermediate frequency signal IF- is applied from the collector.
Is taken out.

【0014】前記取出された中間周波信号IF+と中間
周波信号IF-は中間周波増幅器10の前段の差動アン
プに加えられる。
The extracted intermediate frequency signal IF + and intermediate frequency signal IF- are applied to a differential amplifier preceding the intermediate frequency amplifier 10.

【0015】[0015]

【発明が解決しようとする課題】前記ダブルバランス型
ミキサ回路をマイクロ波帯域で用いた場合、接続するト
ランジスタのベースの配線が長くなると、各トランジス
タ間で信号の位相差を生じ異常発振し、回路自体の動作
が不安定になる場合があった。
When the double-balanced mixer circuit is used in the microwave band, if the wiring length of the base of the transistor to be connected becomes long, a signal phase difference occurs between the transistors and abnormal oscillation occurs. In some cases, the operation itself became unstable.

【0016】[0016]

【課題を解決するための手段】本発明のダブルバランス
型ミキサ回路は第1トランジスタと第2トランジスタ及
び第3トランジスタと第4トランジスタのベースを夫々
最短距離で接続されるように設け、第1局部発振信号を
前記第1トランジスタと第2トランジスタのベースに加
え、第2局部発振信号を前記第3トランジスタと第4ト
ランジスタのベースに加え、第1トランジスタと第3ト
ランジスタのエミッタを接続し前記第5トランジスタか
らの第1高周波増幅信号を加え、第2トランジスタと第
4トランジスタのエミッタを接続し前記第6トランジス
タからの第2高周波増幅信号を加え、第1トランジスタ
と第4トランジスタのコレクタを接続し、第1中間周波
信号を取出し、第2トランジスタと第3トランジスタの
コレクタを接続し、第2中間周波信号を取出す構成をな
す。
A double-balanced mixer circuit according to the present invention is provided so that the bases of a first transistor and a second transistor and the bases of a third transistor and a fourth transistor are connected to each other at the shortest distance, and a first local mixer is provided. An oscillating signal is applied to the bases of the first and second transistors, a second local oscillating signal is applied to the bases of the third and fourth transistors, and the emitters of the first and third transistors are connected. Adding a first high-frequency amplified signal from a transistor, connecting the emitters of a second transistor and a fourth transistor, adding a second high-frequency amplified signal from the sixth transistor, connecting the collectors of the first and fourth transistors, Take out the first intermediate frequency signal and connect the collectors of the second and third transistors Forming a structure for taking out the second intermediate frequency signal.

【0017】[0017]

【発明の実施の形態】本発明のマイクロ波帯ダブルバラ
ンス型ミキサ回路を図面に従って説明する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS A microwave band double balanced mixer circuit according to the present invention will be described with reference to the drawings.

【0018】図1は本発明のマイクロ波帯ダブルバラン
ス型ミキサ回路のブロック図で、従来と同じ構成部分は
同一番号を付する。
FIG. 1 is a block diagram of a microwave-band double-balanced mixer circuit according to the present invention.

【0019】1はアンテナ又はケーブル等を介して受信
された受信信号を処理する受信部、2はアンテナ又はケ
ーブル等を介して送信される送信信号を処理する送信部
である。
Reference numeral 1 denotes a reception unit for processing a reception signal received via an antenna or a cable or the like, and reference numeral 2 denotes a transmission unit for processing a transmission signal transmitted via an antenna or a cable or the like.

【0020】前記受信部1はアンテナ等に受信されたマ
イクロ波帯の高周波信号を増幅する高周波増幅回路5
と、PLL6にて発振周波数が制御される電圧制御発振
器よりなる局部発振器7と、該局部発振器7よりバッフ
ァーアンプ6を介して加わる局部発振信号と前記高周波
増幅回路5よりの高周波信号とを混合するミキサ回路9
と、該ミキサ回路9で変換された中間周波数信号を増幅
する中間周波増幅回路10とよりなる。
The receiving section 1 is a high-frequency amplifier circuit 5 for amplifying a high-frequency signal in a microwave band received by an antenna or the like.
And a local oscillator 7 composed of a voltage-controlled oscillator whose oscillation frequency is controlled by the PLL 6, and a local oscillation signal applied from the local oscillator 7 via the buffer amplifier 6 to a high-frequency signal from the high-frequency amplifier circuit 5. Mixer circuit 9
And an intermediate frequency amplifying circuit 10 for amplifying the intermediate frequency signal converted by the mixer circuit 9.

【0021】また送信部2は送信するべき送信信号が変
換された中間周波数信号を増幅する中間周波増幅回路1
7と、該中間周波増幅回路17よりの中間周波数信号と前
記局部発振器7よりバッファーアンプ18を介して加わ
る局部発振信号と混合するミキサ回路19および該ミキ
サ回路19よりのマイクロ波帯の高周波数信号を増幅
し、前記アンテナに供給する高周波増幅回路20とより
なる。
A transmitting section 2 is an intermediate frequency amplifier circuit 1 for amplifying an intermediate frequency signal obtained by converting a transmission signal to be transmitted.
7, a mixer circuit 19 for mixing the intermediate frequency signal from the intermediate frequency amplifier circuit 17 with a local oscillation signal applied from the local oscillator 7 via a buffer amplifier 18, and a high frequency signal in the microwave band from the mixer circuit 19. And a high-frequency amplifier circuit 20 for amplifying the same and supplying the amplified signal to the antenna.

【0022】受信状態では、アンテナ又はケーブルを介
して高周波増幅回路5に加えられた高周波信号は前記高
周波増幅回路5で増幅され、さらにミキサ回路9に加わ
りミキサされる。ミキサ回路9では前記高周波信号と局
部発振器7からの局部発振信号とがミキサされ中間周波
数信号が取出され中間周波増幅回路10で増幅される。
In the receiving state, a high-frequency signal applied to the high-frequency amplifier circuit 5 via an antenna or a cable is amplified by the high-frequency amplifier circuit 5 and further added to the mixer circuit 9 where the signal is mixed. In the mixer circuit 9, the high-frequency signal and the local oscillation signal from the local oscillator 7 are mixed, and an intermediate frequency signal is extracted and amplified by the intermediate frequency amplifier circuit 10.

【0023】ところで前記ミキサ回路9はベースが最短
距離に接続されるように近接して設けた第1トランジス
タ35及び第2トランジスタ36と、同様にベースが最
短距離に接続されるように近接して設けた第3トランジ
スタ37及び第4トランジスタ38と、ベースに高周波
増幅器5で増幅された第1高周波増幅信号Rf+が加え
られる第5トランジスタ39と、ベースに高周波増幅器
5で増幅され前記と180度位相を異にする第2高周波
増幅信号Rf-が加えられる第6トランジスタ40とよ
りなる。
By the way, the mixer circuit 9 is close to the first transistor 35 and the second transistor 36 provided close to each other so that the base is connected to the shortest distance, similarly to the mixer circuit 9 so that the base is connected to the shortest distance. The third transistor 37 and the fourth transistor 38 provided, the fifth transistor 39 to which the first high-frequency amplification signal Rf + amplified by the high-frequency amplifier 5 is added to the base, and the 180-degree angle amplified by the high-frequency amplifier 5 to the base. A sixth transistor 40 to which a second high-frequency amplified signal Rf- having a different phase is added.

【0024】前記第1トランジスタ35と第2トランジ
スタ36及び第3トランジスタ37と第4トランジスタ
38のベースを夫々接続する配線の特性インピーダンス
と電気長を同一にしている。
The characteristic impedance and the electrical length of the wiring connecting the bases of the first transistor 35 and the second transistor 36 and the base of the third transistor 37 and the fourth transistor 38 are made the same.

【0025】また第1トランジスタ35と第3トランジ
スタ37のエミッタは接続され前記第5トランジスタ3
9からの高周波増幅信号Rf+が加えられ、又前記第2
トランジスタ36と第4トランジスタ38のエミッタは
接続され前記第6トランジスタ40からの高周波増幅信
号Rf-が加えられる。
The emitters of the first transistor 35 and the third transistor 37 are connected, and the fifth transistor 3
9 is added to the high-frequency amplified signal Rf +
The emitters of the transistor 36 and the fourth transistor 38 are connected, and the high-frequency amplified signal Rf- from the sixth transistor 40 is applied.

【0026】さらに第1トランジスタ35と第4トラン
ジスタ38のコレクタは接続さると共に抵抗41を電源
電圧Vccが加えられ、同様に第2トランジスタ36と
第3トランジスタ37のコレクタは接続さると共に抵抗
42を電源電圧Vccが加えられる。
Further, the collectors of the first transistor 35 and the fourth transistor 38 are connected and the power supply voltage Vcc is applied to the resistor 41. Similarly, the collectors of the second transistor 36 and the third transistor 37 are connected and the resistor 42 is connected to the power source. Voltage Vcc is applied.

【0027】前述したように第1トランジスタ35のベ
ースに局部発信信号Lo+が加えられ、エミッタに高周
波増幅信号Rf+が加えられミキサされる。また第4ト
ランジスタ38のベースに局部発信信号Lo-が加えら
れ、エミッタに高周波増幅信号Rf-が加えられミキサ
される。
As described above, the local transmission signal Lo + is applied to the base of the first transistor 35, and the high-frequency amplified signal Rf + is added to the emitter, and the mixer is mixed. The local transmission signal Lo- is added to the base of the fourth transistor 38, and the high-frequency amplified signal Rf- is added to the emitter, and the mixer is mixed.

【0028】同様に前記第2トランジスタ36のベース
に局部発信信号Lo+が加えられ、エミッタに高周波増
幅信号Rf-が加えられミキサされ、また第4トランジ
スタ38のベースに局部発信信号Lo-が加えられミキ
サされる。
Similarly, the local transmission signal Lo + is added to the base of the second transistor 36, the high-frequency amplified signal Rf- is added to the emitter and mixed, and the local transmission signal Lo- is added to the base of the fourth transistor 38. Is mixed.

【0029】前記局部発振器7は前記制御信号にてPL
L6が制御され、局部発振器7からは丁度高周波信号と
中間周波数分だけ異なる周波数の局部発振信号を発振す
るので、前記ミキサされることにより第1トランジスタ
35と第4トランジスタ38のエミッタから中間周波信
号IF+が取出され、第2トランジスタ36と第3トラ
ンジスタ37のエミッタから中間周波信号IF+が取出
される。
The local oscillator 7 receives the control signal PL
L6 is controlled, and the local oscillator 7 oscillates a local oscillation signal having a frequency just different from the high-frequency signal by the intermediate frequency. IF + is taken out, and the intermediate frequency signal IF + is taken out from the emitters of the second transistor 36 and the third transistor 37.

【0030】前記取出された中間周波信号IF+と中間
周波信号IF-は中間周波増幅器10の前段の差動アン
プに加えられる。
The extracted intermediate frequency signal IF + and intermediate frequency signal IF− are applied to a differential amplifier preceding the intermediate frequency amplifier 10.

【0031】[0031]

【発明の効果】本発明のダブルバランス型ミキサ回路は
第1トランジスタと第2トランジスタ及び第3トランジ
スタと第4トランジスタの1ベースが最短距離で接続さ
れるように近接して設けたので、ベース間を接続する配
線の浮遊容量あるいはインダクタンスを最小にでき、高
い周波数まで回路動作を安定にできる。
According to the double-balanced mixer circuit of the present invention, one base of the first transistor and the second transistor and one base of the third transistor and the fourth transistor are provided close to each other so as to be connected at the shortest distance. Can minimize the stray capacitance or inductance of the wiring connecting the circuit, and can stabilize the circuit operation up to high frequencies.

【0032】さらに各トランジスタのベースを夫々接続
する配線の特性インピーダンスと電気長を同一にするこ
とにより、各トランジスタ間での信号の位相差の発生を
防止し、異常発振の発生するのを防げる。
Further, by making the characteristic impedance and the electrical length of the wiring connecting the bases of the respective transistors the same, it is possible to prevent the occurrence of the phase difference of the signal between the respective transistors and the occurrence of the abnormal oscillation.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明のマイクロ波帯ダブルバランス型ミキサ
回路のブロック図である。
FIG. 1 is a block diagram of a microwave band double balanced mixer circuit of the present invention.

【図2】従来のマイクロ波帯ダブルバランス型ミキサ回
路のブロック図である。
FIG. 2 is a block diagram of a conventional microwave band double balanced mixer circuit.

【符号の説明】[Explanation of symbols]

1 受信部 2 送信部 5 高周波増幅回路 7 局部発振回路 9 ミキサ回路 10 中間周波増幅回路 35 第1トランジスタ 36 第2トランジスタ 37 第3トランジスタ 38 第4トランジスタ 39 第5トランジスタ 40 第6トランジスタ DESCRIPTION OF SYMBOLS 1 Receiving part 2 Transmitting part 5 High frequency amplifier circuit 7 Local oscillation circuit 9 Mixer circuit 10 Intermediate frequency amplifier circuit 35 1st transistor 36 2nd transistor 37 3rd transistor 38 4th transistor 39 5th transistor 40 6th transistor

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】ベースが最短距離に接続されるように近接
して設けた第1トランジスタ35及び第2トランジスタ
36と、 ベースが最短距離に接続されるように近接して設けた第
3トランジスタ37及び第4トランジスタ38と、 ベースに高周波増幅器5で増幅された第1高周波増幅信
号Rf+が加えられる第5トランジスタ39と、 ベースに高周波増幅器5で増幅され前記第1高周波増幅
信号Rf+と180度位相を異にする第2高周波増幅信
号Rf-が加えられる第6トランジスタ40とよりな
り、 局部発振器7よりの第1局部発振信号を前記第1トラン
ジスタ35と第2トランジスタ36のベースに加え、前
記第1局部発振信号と180度位相を異にする局部発振
器よりの第2局部発振信号を前記第3トランジスタ37
と第4トランジスタ38のベースに加え、 第1トランジスタ35と第3トランジスタ37のエミッ
タを接続し前記第5トランジスタ39からの第1高周波
増幅信号Rf+を加え、第2トランジスタ36と第4ト
ランジスタ38のエミッタを接続し前記第6トランジス
タ40からの前記第2高周波増幅信号Rf-を加え、 第1トランジスタ35と第4トランジスタ38のコレク
タを接続し、第1中間周波信号IF+を取出し、第2ト
ランジスタ36と第3トランジスタ37のコレクタを接
続し、第1中間周波信号と180度位相を異にする第2
中間周波信号IF-を取出し、夫々中間周波増幅器10
に加えることを特徴とするマイクロ波帯ダブルバランス
型ミキサ回路。
1. A first transistor 35 and a second transistor 36 provided close to each other so that a base is connected to the shortest distance, and a third transistor 37 provided close to a base so as to be connected to the shortest distance. A fourth transistor 38, a fifth transistor 39 to which a first high frequency amplified signal Rf + amplified by the high frequency amplifier 5 is added to a base, and a first high frequency amplified signal Rf + amplified by the high frequency amplifier 5 to the base and 180. A sixth local oscillator 40 to which a second high-frequency amplified signal Rf- having a different phase is added. A first local oscillation signal from the local oscillator 7 is applied to the bases of the first transistor 35 and the second transistor 36. A second local oscillation signal from a local oscillator 180 degrees out of phase with the first local oscillation signal is supplied to the third transistor 37.
In addition to the base of the fourth transistor 38 and the emitters of the first transistor 35 and the third transistor 37, the first high-frequency amplified signal Rf + from the fifth transistor 39 is added, and the second transistor 36 and the fourth transistor 38 , The second high-frequency amplified signal Rf- from the sixth transistor 40 is added, the collectors of the first transistor 35 and the fourth transistor 38 are connected, the first intermediate frequency signal IF + is taken out, and the second The transistor 36 and the collector of the third transistor 37 are connected, and the second intermediate frequency signal is 180 degrees out of phase with the second intermediate frequency signal.
The intermediate frequency signal IF- is taken out and the intermediate frequency amplifier 10
A microwave band double-balanced mixer circuit characterized in that:
【請求項2】第1トランジスタ35と第2トランジスタ
36及び第3トランジスタ37と第4トランジスタ38
のベースを夫々接続する配線の特性インピーダンスと電
気長を同一にすることを特徴とする請求項1に記載のマ
イクロ波帯ダブルバランス型ミキサ回路。
2. A first transistor 35 and a second transistor 36, and a third transistor 37 and a fourth transistor 38.
2. The microwave-balanced double-balanced mixer circuit according to claim 1, wherein the characteristic impedance and the electrical length of the wiring connecting each of the bases are the same.
JP2000281280A 2000-09-18 2000-09-18 Microwave double-balance mixer circuit Expired - Lifetime JP3723435B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000281280A JP3723435B2 (en) 2000-09-18 2000-09-18 Microwave double-balance mixer circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000281280A JP3723435B2 (en) 2000-09-18 2000-09-18 Microwave double-balance mixer circuit

Publications (2)

Publication Number Publication Date
JP2002094329A true JP2002094329A (en) 2002-03-29
JP3723435B2 JP3723435B2 (en) 2005-12-07

Family

ID=18765963

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000281280A Expired - Lifetime JP3723435B2 (en) 2000-09-18 2000-09-18 Microwave double-balance mixer circuit

Country Status (1)

Country Link
JP (1) JP3723435B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004075393A1 (en) * 2003-02-19 2004-09-02 Fujitsu Limited Load variation correcting circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004075393A1 (en) * 2003-02-19 2004-09-02 Fujitsu Limited Load variation correcting circuit

Also Published As

Publication number Publication date
JP3723435B2 (en) 2005-12-07

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