JP2002094018A - Method of manufacturing electronic device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing an electronic device which manufactures a conductive oxide film which is further superior in characteristics. SOLUTION: The electronic device manufacturing method comprises a step (a) of forming a compound conductor film on a base and a step (b) of treating the compound conductor film in a liquid phase for adjusting the composition of at least the surface.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing an electronic device, and more particularly to a method for manufacturing an electronic device using a compound conductor film as an electrode or a wiring.

[0002]

2. Description of the Related Art Electronic devices such as semiconductor devices include an electronic device including a capacitor. The capacitor has a dielectric film and a pair of electrodes facing each other across the dielectric film,
Functions such as charge / discharge of electric charge (DC voltage), stabilization of voltage, passage of AC components and cutoff of DC components can be achieved.

[0005] A semiconductor memory device usually has one transistor and one capacitor. If the capacitor dielectric film is formed of a high dielectric film having a high relative dielectric constant of 20 or more, a memory element having a small electrode area and a high charge storage capability can be formed. If the capacitor dielectric film is formed of a ferroelectric film, a nonvolatile memory element that can store information even when the power supply voltage is cut off can be formed. As such a ferroelectric, for example, Pb (Zr, Ti) O
₃ (Lead zirconate titanate, PZT), BaSrTi
Perovskite-type oxides such as O ₃ and SrBiTa (Nb) O ₉ have been studied.

[0004] For example, La, Nb, C
Materials doped with a, Sr, and the like are also known as ferroelectrics, but in the present specification, these doped ones will be referred to as lead zirconate titanate (PZT) and the like.

When these high dielectric or ferroelectric capacitor dielectric films are used, the electrodes, particularly the lower electrode, which is the base of the dielectric film, are hardly oxidized, such as platinum group metals such as Pt, Ir, and Ru. IrO _x , Ru which maintains conductivity
Platinum group oxides such as _{O x, SrRuO 3 (SRO)} , LaN
It is desirable to form with a perovskite-type conductive oxide such as iO ₃ or (La, Sr) CoO ₃ (LSCO).

In particular, SRO and LSCO have the same perovskite crystal structure as perovskite-type PZT, and exhibit high reliability with respect to bipolar switching.

A ferroelectric random access memory (FeR)
AM) is also required to have high integration and low voltage at the same time. For example, the driving voltage is shifting from 5V to 3V or less. In order to reduce the switching voltage, the ferroelectric film needs to be thin, for example, 100 nm or less, and at the same time, it is necessary to form a good electrode-ferroelectric film contact.

As the thickness of the ferroelectric film decreases, the minimum electric field (coercive electric field, Ec) required to reverse the polarization of the ferroelectric capacitor tends to increase. This tendency is particularly strong in a capacitor in which a PZT dielectric film is sandwiched between metal electrodes. The increase in the coercive electric field of the PZT film is attributed to the stress at the interface and the contact of the interface.

When the electrode in contact with PZT is formed of an oxide, the coercive electric field is less deteriorated and a lower coercive electric field can be realized as compared with the case of a metal electrode. However, the oxide electrode is PZT
The film is more sensitive to the excess Pb amount in the film, easily causes mutual diffusion, and easily generates a high leak current.

As a method of forming a perovskite type ferroelectric film and a perovskite type oxide electrode, a combination of vapor deposition, chemical solution deposition (CSD, sol-gel method) and annealing for crystallization after film deposition is used. Are known. C
SD is excellent in that the composition of a material to be formed can be accurately controlled, and is widely used as a method for forming a ferroelectric film.

At present, the SRO film and the LSCO film are generally formed by sputtering and then crystallized by annealing. Since an amorphous film has a high electric resistivity, it is necessary to convert the amorphous film into a crystallized film. When the SRO film formed at room temperature is crystallized by annealing, it becomes a porous film and is not suitable as an electrode of FeRAM. When the SRO film is deposited at a high substrate temperature, a dense film having a crystalline orientation can be formed. However, also in this case, the characteristics as FeRAM are not always satisfactory.

[0012]

A method for forming a conductive oxide film has not yet been established.

It is an object of the present invention to provide a method of manufacturing an electronic device capable of manufacturing a conductive oxide film having more excellent characteristics.

It is another object of the present invention to provide a method of manufacturing an electronic device capable of forming a ferroelectric capacitor having excellent characteristics.

[0015]

According to one aspect of the present invention, (a) a step of forming a compound conductor film on a base;
(A) performing a liquid phase treatment on the compound conductor film to adjust at least the surface composition.

Preferably, the step (a) includes forming a compound conductor film of an amorphous layer, and (c) after the step (a), crystallizing the compound conductor film by heat treatment.

The liquid phase treatment is performed with water, an acid, or an organic solvent. When the compound conductor film contains excess Sr, the excess Sr dissolves in the liquid, and at least the surface composition can be adjusted.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, the characteristics of a conventional ferroelectric capacitor were considered.

FIG. 6A schematically shows the structure of a ferroelectric capacitor. A lower electrode 2, a ferroelectric film 3, and an upper electrode 4 are stacked on a base substrate 1 to form a ferroelectric capacitor. The ferroelectric film 3 is, for example, a PZT film. The lower electrode 2 and the upper electrode 4 are formed, for example, in a two-layer stack having a symmetric structure. For example, the lower electrode 2 is an electrode in which an SRO film is formed on a Pt film, and the upper electrode 4 is
This is an electrode in which a Pt film is formed on an RO film.

FIG. 6B shows a state in which the lower electrode 2 is formed on the base 1. The lower electrode 2 has a configuration in which an SRO film 15 is formed on a Pt film 14. The composition distribution in the lower electrode was examined.

FIG. 7C is a graph showing the composition distribution in the depth direction. The horizontal axis indicates the depth in units of nm, and the vertical axis indicates the atomic percentage of the composition. The lower electrode 2 has a thickness of about 75 n.
In this configuration, an SRO film having a thickness of about 50 nm is formed on a Pt film having a thickness of m. The composition distribution was examined in the depth direction from the surface.

As is apparent from the figure, the depth 2 in the SRO film
Ru gradually decreases from around 0 nm to the surface. Sr slightly increases from around 20 nm in depth, and increases remarkably near the surface. That is, the surface of the SRO film is in an Sr-rich state. This is believed to be because RuO _x is more volatile and escapes from the surface. In other words, there is excess Sr on the surface.
It is fully conceivable that this excess Sr has various effects on the ferroelectric capacitor.

After forming the lower electrode, to form a ferroelectric capacitor, a ferroelectric film 3 is formed on the lower electrode 2 as shown in FIG. Need to be formed. When the ferroelectric film 3 is formed by, for example, chemical solution deposition (CSD), a PZT raw material dissolved or dispersed in an organic solvent is applied on the lower electrode, followed by drying and annealing. At this stage,
If excess Sr is present on the surface of the lower electrode 1, a reaction may occur between the excess Sr and the PZT material, that is, the PZT film.

SrO is a very reactive substance,
At 500 ° C. or higher, it reacts with Pb in the PZT film to form SrPbO ₃ as a semiconductor. Also, Sr can substitute for Pb in the PZT lattice and penetrate into the lattice. Even if the Pb site in PZT is replaced with Sr,
There is no practical problem.

However, a problem occurs when Sr reacts with Pb to form a reaction product at the interface between the electrode and the ferroelectric film or at the grain boundary of the ferroelectric film. That is, by forming a semiconductor in the ferroelectric film, the leakage current of the ferroelectric capacitor increases, and the reliability of the capacitor decreases. Therefore, 2-methoxyethanol (2-M), which is generally used as a solvent in the sol-gel method, is used.
E) was used to examine whether Sr in SRO elutes.

As shown in FIG. 7A, a ferroelectric powder POW serving as a sample is charged into a container V, 2-ME as a solvent is introduced as a liquid phase LIQ, and the mixture is stirred at 124 ° C. for 5 hours. By refluxing with ST or the like, a reaction occurs between the liquid phase LIQ and the powder POW, and the remaining liquid phase LIQ is subjected to inductively coupled plasma atomic emission spectroscopy (ICP-AE).
S) Determined by analysis.

The powders used as the samples were (1) SRO powder having a stoichiometric composition and (2) SRO powder having a 10% excess of Sr over the stoichiometric composition. Note that Sr
SRO with a 10% excess can be represented as Sr _1.1 RuO _3.1 . This is because Sr _1.1 RuO _3.1 = 0.9 SrRu
It can be expressed as O ₃ +0.1 Sr ₂ RuO ₄ and can be considered as a mixture of two substances. The reason why a powder sample was used instead of the SRO film formed on the substrate was to increase the reaction amount and increase the reaction area.

FIG. 7B shows the results of ICP-AES analysis. Focusing on Sr and Ru, which are the constituent elements of SRO, the Sr concentration and the Ru concentration in the liquid were examined.

In the case of stoichiometric SrO powder, S
r and Ru are approximately corresponding amounts of 1.4 ppm and 1.7
ppm was eluted in the liquid. On the other hand, in the case of SRO powder in which the non-stoichiometric composition of Sr is 10% excess, the Ru concentration in the liquid is increased by about 3 times and the Sr concentration in the liquid is about 25 times.
The strength has also increased. From this result, excess S was found on the SRO film surface.
If r is present, it is presumed that Sr can be easily eluted into the solvent 2-ME in the subsequent PZT film-forming step of CSD. Sr eluted in the solvent 2-ME is S
It is conceivable to form r (OC ₂ H ₄ OCH ₃ ) ₂ .

When Sr enters the PZT film in this manner, the above-described reaction occurs with PZT, and the semiconductor SrP
It is considered that bO ₃ or the like is produced as a reaction product.

When the SRO film is formed, particularly when the SRO film is formed by CSD or low-temperature sputtering,
It will be inevitable that the components of the film will contain SrO _x and RuO _x . RuO _x has the property of being more easily volatilized than SrO _x , and thus more easily escapes from the SRO film. Therefore, the SRO film surface becomes Sr-rich. In order to reduce the influence of the excess Sr, it is considered effective to remove the excess Sr after forming the SRO film.

Hereinafter, a method of manufacturing a ferroelectric capacitor according to an embodiment of the present invention will be described with reference to the drawings.

As shown in FIG. 1A, a base substrate 1 is prepared. In the sample, the thickness is about 250 nm on the surface.
Wafer 1 having a diameter of 150 mm provided with a thermal oxide film 12
1 was used as a base substrate 1.

As shown in FIG. 1B, it is preferable to provide an adhesive layer 13 on the base substrate 1. In the sample, a Ti film having a thickness of 30 nm was formed by sputtering, and then heated at 550 ° C. for about 30 minutes in an O ₂ atmosphere to convert the Ti film into a TiO ₂ film 13. TiO ₂ film 13
Is an insulating film, and a Si substrate 11, a SiO ₂ film 12, Ti
The undersubstrate 1 can be newly considered together with the O ₂ film 13.

The lower electrode 2 is formed on the adhesive layer 13.
In the sample, the thickness is about 75 nm on the adhesive layer 13.
Was formed by sputtering, and an SRO film 15 was formed on the Pt film 14 by sputtering. SR
O sputtering is performed using a 12-inch SRO target, a 1 Pa Ar / O ₂ mixed gas as a working gas,
700 W of D on a substrate heated to room temperature and 550 ° C.
The SRO film 15 having a thickness of 50 to 75 nm was formed by C sputtering.

A sample formed at room temperature is hereinafter referred to as a sample RT, and a sample formed at 550 ° C. is hereinafter referred to as a sample HT. It is considered that the surface of the SRO film 15 is Sr-rich. Prior to the formation of the dielectric film, each sample was subjected to a liquid phase treatment.

As shown in FIG. 1C, the wafer having the lower electrode 2 formed on the base substrate 1 was placed in a Teflon cup, and 100 ml of liquid was injected to perform a liquid phase treatment. The sample RT was treated with distilled water. For sample HT, 0.1 M HNO ₃
The solution was treated for 1 minute at room temperature. Each sample was treated with distilled water and 0.1 M HNO ₃
The solution was analyzed by ICP mass spectrometry.

The table in FIG. 3A shows the results of ICP mass spectrometry. The sample RT formed at room temperature was treated with distilled water, but the Sr concentration in the liquid phase was 2 × 10 ¹⁵ at / cm ^2.
And the amount was equivalent to three atomic layers. In contrast,
The sample HT formed at a high temperature was treated with 0.1 M HNO ₃ , but the Sr concentration in the liquid phase was 6 × 10 ¹⁴ at /
cm ² (corresponding to one atomic layer). The Ru concentration is
1 × 10 ¹² which is the measurement limit for each sample
at / cm ² or less.

From the results shown in FIG. 3A, it can be seen that S
The RO film is an amorphous layer, and Sr elutes in the liquid phase.
It is assumed that the concentration is high. In any case, the fact that Sr was eluted in the liquid phase indicates that excess Sr of the SRO film was eluted in the liquid phase, and the composition in the film was considered to be closer to the stoichiometric composition. Can be

The sample RT was subsequently crystallized by annealing at 600 ° C. It will be inevitable that RuO escapes during the annealing step. Then, the surface becomes Sr-rich. After annealing for crystallization, a liquid phase treatment of the HNO ₃ solution was further performed.

FIG. 3B shows that the sample RT was heated at 600 ° C.
Crystallized by annealing, then HNO _ThreeWhen processing was performed
5 shows the Sr concentration in the liquid phase. HNO_ThreeProcessing is 0.1M
HNO_ThreeAnd 1.0M HNO_ThreePerformed at two concentrations
Was. For comparison, HNO_ThreeSome samples are not processed
Prepared. Then, the surface of the SRO film was examined with an atomic force microscope.
Observation was made to observe surface irregularities. FIG. 3 (B)
Are shown together.

As is clear from the figure, S eluted in the liquid phase
The r concentration is 3.2 × 10 ¹⁵ a irrespective of the concentration of HNO _3.
t / cm ² , which was equivalent to 5 atomic layers.
0.1M is the HNO3 concentration for removing Sr,
It is considered to be a sufficiently high concentration. Further, even if the SRO film is once subjected to the liquid phase treatment, it is considered that the surface becomes Sr-rich again when the high-temperature annealing is performed.

It can be seen that liquid phase treatment with an acid solution such as distilled water or HNO ₃ is effective for removing excess Sr. In addition,
As the liquid for the liquid phase treatment, in addition to the above-mentioned distilled water and HNO ₃ , acid solutions such as HF, H ₃ PO ₄ , H ₂ SO ₄ , and HCl, and organic solvents and the like are considered to be effective.

The surface irregularities observed with an atomic force microscope were almost the same irrespective of the presence or absence of the treatment. Therefore, it is considered that there is no need to worry that the surface of the SRO film is roughened even if the liquid phase processing is performed.

As shown in FIG. 1 (Cx), a RuO _x thin film 19 may be deposited to adjust the excess Sr of the SRO film on the surface of the lower electrode 2. Excess Sr will be absorbed by RuO _x . In order to examine the interface between the lower electrode 2 and the ferroelectric film 3, three types of samples were prepared.

The sample C1-5 has an SRO film 1 at 550 ° C.
5 is deposited, and about 5 nm thick RuO
_{The x} film was deposited by sputtering. In sample C1-6, the SRO film was heated at 550 ° C.
And a liquid phase treatment was not performed thereafter. Sample C1-7 is 550 ° C.
SRO film sputtering, followed by 0.1M HNO ₃
This is a sample that has been subjected to a liquid phase treatment. The configuration other than the SRO film is the same as that described in the above-described process.

As shown in FIG. 2D, a ferroelectric film 16 is formed on the lower electrode 2. On the lower electrodes 2 of the three types of samples, a PLZT film (Zr: Ti = 45: 55), which is PZT containing La, was formed to a thickness of 150 nm by CSD and then annealed to crystallize. Observation by X-ray analysis revealed that the formed PLZT film was strongly (111) oriented in all samples.

PLZT (composition ratio 110: 1.5: 35:
65) The CSD solution was applied on the lower electrodes of the three samples, and pyrolysis (removal of unnecessary components) was performed at 300 ° C. for 3 minutes to form a PLZT film. PLZ
The T film formation and the pyrolysis process are repeated twice, and the total thickness is 1
It was 50 nm. The PLZT film is heat-treated by rapid thermal annealing in an oxygen atmosphere at 600 ° C. for 5 minutes,
Crystallized.

As shown in FIG. 2E, the ferroelectric film 16
An upper electrode 4 is formed thereon. In the sample, a metal shadow mask is provided on the substrate for electrical measurement,
An SRO film having a thickness of about 15 nm and a Pt film having a thickness of about 75 nm were formed by sputtering. Thereafter, the capacitor structure was annealed at about 600 ° C. for 1 hour in an O ₂ atmosphere. 3
The electrical properties of the different samples were measured. By measurement,
Some interesting results were obtained.

First, the sample in which the RuO _x film was not formed did not show a shift in coercive electric field, and the switching test was performed using bipolar pulses of 3 V and 6 V. As a result, the fatigue was almost zero. . In the sample in which the RuO _x film was laminated on the SRO film, a short circuit occurred between the lower electrode and the upper electrode, and electrical characteristics could not be measured.

FIG. 3C shows the measurement result of the leak current. The leakage current of sample C1-6 not subjected to the liquid phase treatment was 1000 (Acm ⁻² or more), whereas the leakage current of sample C1-7 subjected to the liquid phase treatment was 2
7. The positive polarity is 37, which is about 1/30 or less. The sample C1-5 was short-circuited as described above and could not be measured. It will be apparent that liquid phase treatment is extremely effective for reducing leakage current.

Sr is SrPb which is a semiconductor in PLZT.
O ₃ or Sr ₂ PbO ₄ as an insulator can be formed. Also, Sr can replace Pb and enter the A site of PLZT. It is conceivable that the excess Sr of the lower electrode is solid-phase diffused into the PLZT film by CSD. Therefore, for samples C1 to C6 and samples C1 to C7, SR
After forming the O film and the PLZT film, the composition was analyzed by SIMS.

FIGS. 4A and 4B show SIMS measurement results. The horizontal axis indicates the time of etching from the surface in the depth direction, and the vertical axis indicates the signal intensity of SIMS in arbitrary units. The measurement was performed by irradiating Cs ions and detecting CsM ions. FIG. 4A shows a measurement result of a sample in which the SRO film was formed and the liquid phase treatment was not performed, and FIG. 4B was a case where the SRO film was formed and the liquid phase treatment was performed with HNO ₃ . It is a measurement result of a sample. A PLZT film, an SRO film, and a Pt film are stacked from the surface.

In both graphs, a comparison of the distribution of SrCs ions shows that the Sr distribution at the interface with the PLZT film is higher in the sample subjected to the liquid phase treatment with HNO _{3 than} in the sample not subjected to the liquid phase treatment. It can be seen that the decrease is rapid. However, even in the sample subjected to the liquid phase treatment with HNO ₃ , the solid phase diffusion of Sr is deep in the PLZT film.

[0055] Only the results, when the liquid phase treated with HNO _3, why it is difficult to infer whether the leakage current is reduced to 1/30 or less, the liquid phase process of HNO _3, laminate structure It can be seen from these graphs that the Sr distribution changes.

In the above samples, distilled water and HNO ₃ solution were used to remove excess Sr from the SRO film surface. Other acid solutions could be used instead of the HNO ₃ solution. Also, an organic solvent such as ethyl alcohol could be used instead of water.

Although a PLZT film was used as the ferroelectric film,
Other ferroelectric films or high dielectric films having a relative dielectric constant of 20 or more could be used. It is particularly effective for a perovskite oxide dielectric film.

In the above samples, excess Sr on the surface of the SRO film was removed by liquid phase treatment. A similar process,
It will also be effective in removing excess Sr from the LSCO film surface.

The case where the element to be adjusted is Sr has been described. In addition to Sr, La, Pb, Ir, Pt, Ru, Ba,
It would be possible to use the above-described liquid phase treatment for adjusting Co, Ca, Ni and the like. These elements can form SrRuO ₃ , LaNiO _x , IrO _x , I
r, (Sr, Pb) RuO ₃ , (La, Sr) CoO ₃ ,
Pt, PtO, CaRuO ₃ , BaRuO ₃ , (Sr, C
a) It is a constituent element such as RuO ₃ . It could also be used to prepare compounds of these elements, especially oxides.
In the above sample, the upper electrode was formed by sputtering through a mask. The upper electrode can be deposited on the entire surface of the ferroelectric film or the high dielectric film, and thereafter, a mask can be formed on the upper electrode with a resist, an insulating film, or the like, and the entire capacitor structure or a part thereof can be patterned by etching. . When etching is performed, it may be desirable to anneal the capacitor structure after etching to recover the damage due to etching.

In the above sample, the lower electrode is
t and an SRO film, and the upper electrode is
It was formed by stacking t films. Instead of these electrode structures, other electrode structures could be employed. For example, Pt
Could be used instead of IrO _x . In this case, the resistance to H ₂ permeation will increase, and it will be possible to reduce the deterioration of the capacitor characteristics due to the heat treatment in H ₂ .

In the above-mentioned sample, TiO ₂ was used as the adhesive layer. As the adhesive layer, a conductive film such as IrO _x could be used instead of the TiO ₂ film. When an IrO _x film is used as the adhesion layer, the adhesion layer is formed of W
It could be formed directly on the plug or polycrystalline Si plug.

By using the above-described capacitor forming process, a semiconductor device having a capacitor can be manufactured.

FIG. 5 schematically shows a structure of a semiconductor device having a capacitor. LOC on the surface of p-type Si substrate 11
The element isolation region 12 is formed by the OS. Stacking a gate oxide film, a polycrystalline silicon layer, and a silicide layer as necessary in the active region defined by the element isolation region 12,
An insulated gate electrode G is formed. Note that sidewall spacers can be formed on both side surfaces of the gate electrode G.

Using the gate electrode G as a mask, impurities are ion-implanted into regions on both sides thereof to form a pair of source / drain regions S / D. Thus, a MOS transistor structure is formed. An MOS transistor structure is embedded to form an interlayer insulating film 22 of SiO ₂ or the like.

An opening 23 is formed in the interlayer insulating film 22 and, for example,
For example, a polycrystalline silicon plug 24 is formed. Plug 24
Is formed, an etch stopper is formed on the interlayer insulating film 22.
To form a SiN film 26 which functions. Etch stopper
On the film 26, SiO _TwoA film 27 is formed. necessary
According to this SiO_TwoAn adhesion film is formed on the film 27.

In the area on the right side of the figure, the SiO ₂ film 2
7, Pt film 14, SRO film 15, PLZT film 1
6. The SRO film 17 and the Pt film 18 are stacked and patterned to form a ferroelectric capacitor structure. The lower electrodes 14 and 15 are patterned differently from the laminated structure to form a contact region. After forming the ferroelectric capacitor, an SiO ₂ film 50 is formed on the entire surface of the substrate.

Openings 52 and 54 are formed on the upper electrode of the capacitor and on one of the plugs, a conductive layer 56 for local wiring is formed and patterned to form a local wiring for connecting the transistor and the ferroelectric capacitor. I do. Thereafter, an interlayer insulating film 58 such as SiO ₂ is formed on the entire surface of the substrate. An opening 60 is formed on the other plug and the conductive layer 62 is formed.
To form an electrode and a wiring to be connected to another plug. Thus, a FeRAM cell is created.

It is to be noted that an interlayer insulating film may be further formed if necessary.
The process of forming a wiring layer is repeated to create a multilayer wiring structure.

The present invention has been described in connection with the preferred embodiments.
The present invention is not limited to these. For example, an electronic device having a capacitor other than a semiconductor memory could be manufactured. It will be apparent to those skilled in the art that various changes, improvements, combinations, and the like can be made.

[0070]

The chemical composition of at least the surface of the compound conductor film can be adjusted by performing a liquid phase treatment after forming the compound conductor film.

The capacitor characteristics of the ferroelectric capacitor can be improved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a substrate schematically illustrating a capacitor forming process according to an embodiment of the present invention.

FIG. 2 is a cross-sectional view of a substrate schematically illustrating a process of forming a capacitor according to an embodiment of the present invention.

FIG. 3 is a table showing experimental results of samples according to an example of the present invention.

FIG. 4 is a graph showing a SIMS measurement result of a sample according to an embodiment of the present invention.

FIG. 5 is a cross-sectional view schematically showing a configuration of an FeRAM device according to an embodiment of the present invention.

FIG. 6 is a cross-sectional view and a graph for explaining a preliminary experiment serving as a basis of the present invention.

FIG. 7 is a sectional view and a table for explaining a preliminary experiment of the present invention.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 base substrate 2 lower electrode 3 dielectric film 4 upper electrode 11 Si substrate 12 SiO ₂ film 13 TiO ₂ film 14, 18 Pt film 15, 17 SRO film 15t SRO film subjected to liquid phase treatment 16 PLZT film

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 27/10 651 F-term (Reference) 5F058 BA11 BB10 BC01 BF46 BF55 BF62 BH20 BJ04 5F083 AD21 AD49 FR02 JA14 JA15 JA38 JA39 JA43 JA45 MA06 MA17 MA19 MA20 PR23 PR33 5F103 AA08 BB22 DD30 GG03 HH03 LL14 PP06 RR10

Claims (4)

[Claims] 1. An electronic device comprising: (a) a step of forming a compound conductor film on a base; and (a) a step of performing a liquid phase treatment on the compound conductor film to adjust at least the surface composition. Production method. 2. The method according to claim 1, wherein the step (a) comprises forming a compound conductor film in an amorphous phase, and further comprising (c) crystallizing the compound conductor film by heat treatment after the step (a). 3. The method for manufacturing an electronic device according to 1 or 2. 3. The compound conductor is a perovskite-type oxide conductor, and (d) after the step (a), forming a perovskite-type dielectric film on the compound conductor film; 3. The method of manufacturing an electronic device according to claim 1, further comprising: (e) forming an upper electrode layer on the perovskite dielectric film. 4. The semiconductor device according to claim 1, wherein the base is a semiconductor substrate having a semiconductor element and an electrode connected to the semiconductor element, and the compound conductor film contains excess Sr and is formed on the electrode. 4. The method for manufacturing an electronic device according to claim 3.