JP2002082833A - High speed data writing system using nonvolatile cache memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a host processor to fast process a transaction by effectively utilizing a high speed nonvolatile cache memory existing in a plurality of storage controllers. SOLUTION: In the case of data for writing, two or more specific areas of a high speed nonvolatile cache memory in a storage controller is previously secured, the data are temporarily stored here and saved to another storage device at the time when the entire area is used to make the area available again, the two or more nonvolatile memory specific areas are made to be ready, and the nonvolatile cache memory is made to be always available. In the case of database record data, the data are temporarily stored in the free area of a nonvolatile cache memory in another storage controller, when the host processor does not have the free area of its nonvolatile cache memory, and as soon as the free area can be secured, the data are written in a low speed storage device such as a disk.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a data writing system including a host processor, a plurality of large-scale storage devices, a processor connecting the host processor and the storage device, and a storage control device having a nonvolatile cache memory. A high-speed cache memory utilization method.

[0002]

2. Description of the Related Art In a database system or the like on a host processor, logging data is collected for each transaction for recovery processing such as a system failure. Transactions are not processed. The writing operation of the disk is slower than the operation of the host processor due to the limitation of the rotation speed of the disk.
Before writing to a disk as described in US Pat. No. 5,586,291, US Pat. No. 5,586,291, the database system writes to a high-speed writable non-volatile cache memory in the disk controller before the next transaction. Proceed to processing.

However, since the operation of the disk is slow, it takes time to write data from the non-volatile cache memory area to the disk. Therefore, the area overflows, and the host processor waits until data is written to the disk. , The next transaction cannot be processed. In order to prevent overflow, it is necessary to make adjustments so that only a data amount smaller than the size of the non-volatile cache memory is written to the disk. However, there is a possibility that the non-volatile cache memory becomes full due to other disk write amounts. Adjustment is difficult, and it is necessary to prepare a nonvolatile cache memory more than necessary.

Further, since the logging data and the like are once written from a nonvolatile cache memory to a disk storage device, the data is compressed again by a host processor and stored in another storage disk storage device or tape storage device. It took time for the storage to become available again, requiring more disk storage.

On the other hand, there is a method of storing database records in one large-scale non-volatile memory area as described in Japanese Patent Application Laid-Open No. 06-083781, but a non-volatile memory is required separately from the disk controller. Therefore, at the time of writing to the disk because there is only one memory area, there is a problem that a write wait occurs depending on the usage rate and the size of the cache memory of the disk control device. Further, when storing data on a disk, only the cache of the disk controller of the disk can be used, and even if there is an unused area in a cache area in another disk controller, it cannot be used.

US Pat. No. 5,848,241 describes a method having a resource sharing mechanism between a disk storage device and a host processor. Writing to the disk becomes slow, and the resource sharing mechanism waits for the completion of writing.

[0007]

The access time of a disk is relatively slower than that of a host processor operating a database system or the like because the disk is a rotating body. In general, a large-scale data storage device increases the recording density at a cost that is not too high, so that the access time becomes slow.

Further, the database system on the host processor collects logging data for recovery processing such as a system failure for each transaction. However, collection of logging data is terminated to avoid complication of the recovery processing. Until then, the next transaction cannot be processed. A similar problem occurs when processing a large number of database records as well as logging data.

Therefore, data is always stored in a faster non-volatile storage device to shorten the data storage processing time,
An object of the present invention is to enable a host processor to process a transaction at high speed by effectively utilizing a high-speed nonvolatile cache memory in a plurality of storage controllers. Specifically, the disk controller is provided with a plurality of non-volatile cache memories so that continuous transaction processing can be executed, and each of the non-volatile cache memories of the plurality of disk controllers is It is an object of the present invention that the host processor can execute data processing quickly without waiting time by making it available under the management of the device.

[0010]

In order to solve the above problems, the present invention mainly employs the following configuration.

A host processor, a plurality of storage devices,
A high-speed data writing system including a processor that couples the host processor and the storage device and a plurality of storage controllers having a non-volatile cache memory, wherein the host processor is connected to a storage device to which the data is written A high-speed data writing system for temporarily using a nonvolatile cache memory of a storage control device coupled to another storage device when there is not enough free space in the nonvolatile cache memory of the specified storage control device.

A high-speed data write system including a host processor, a plurality of storage devices, and a plurality of storage control devices having a non-volatile cache memory and a processor connecting the host processor and the storage device. A high-speed data writing system in which one of the plurality of storage controllers has a specific area of two or more nonvolatile cache memories.

A high-speed data writing system comprising a host processor, a plurality of storage devices, and a plurality of storage control devices having a non-volatile cache memory and a processor connecting the host processor and the storage device. When the nonvolatile cache memory of the storage controller coupled to the storage device to which the data is written does not have sufficient free space, the nonvolatile cache memory of the storage controller coupled to another storage device is temporarily stored. A high-speed data write system that uses and controls various types of shared use of the nonvolatile cache memories of the plurality of storage control devices between the storage control devices.

A high-speed data write system comprising a host processor, a plurality of storage devices, and a plurality of storage control devices having a non-volatile cache memory and a processor connecting the host processor and the storage device. A specific storage control device of the plurality of storage control devices has a specific area of two or more nonvolatile cache memories, and a write request to the specific area with a write unnecessary flag to the storage device. Is transmitted from the host processor to the specific storage controller, the specific storage controller writes data from the host processor to the one specific area, and the specific storage controller writes the data when the entire one specific area is used. Sends a data evacuation request to the host processor, and the host processor Data, a storage request is issued to another storage device, and after the storage in the other storage device is completed, the one specific area is made writable again, while the host processor newly writes to the storage device. Send a write request with an unnecessary flag to a specific area of another nonvolatile cache memory different from the one specific area,
A high-speed data writing system in which the specific storage control device writes data from a host processor to the other specific area.

A high-speed data write system comprising a host processor, a plurality of storage devices, and a plurality of storage controllers having a non-volatile cache memory and a processor connecting the host processor and the storage devices. Connecting the plurality of storage controllers with a connection cable and updating the processing result of the host processor to the storage device when there is not enough free space in the nonvolatile cache memory of the storage controller at the storage destination. And obtaining a free space of a nonvolatile cache memory of a storage control device different from the storage control device via the connection cable, writing a request to another storage control device, and writing the write request to the nonvolatile cache memory. Temporary storage in a storage device coupled to the storage control device, the storage control device stores the changed storage destination The data is stored in the nonvolatile cache memory in the storage control device, and when the host processor requests the storage control device to read data, the storage control device checks a current storage destination in the nonvolatile cache memory, The changed data is read from the non-volatile cache memory of the another storage control device, and when a free area is created in the non-volatile cache memory area where there was not enough free space, the another storage control device is configured to execute the another storage control device. Reads the data temporarily stored in the storage device coupled to the storage device, requests the update source storage control device to write the data, and erases the temporarily stored data after the completion of the writing to the update source storage control device. The storage control device is a high-speed data writing system for erasing the changed storage destination.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A high-speed data writing system according to various embodiments of the present invention will be described below with reference to the drawings. First, an outline of the present invention will be described. In a database system or the like on a host processor, transaction results and logging data are output, but are stored in a nonvolatile storage device for recovery processing such as a system down. The next transaction is not processed. For data to be written, such as logging data that requires such a high-speed response, the data is temporarily stored in a high-speed nonvolatile memory area in the storage control device, and is not written to a low-speed storage device such as a disk. When the entire memory area is used, it is saved in another storage device, and the memory area is made usable again. Here, since it takes time until the data is saved, two or more nonvolatile cache memory areas are prepared, and the host processor instructs the storage control device when writing to a storage device such as a disk is necessary. Therefore, it is intended to make it possible to write at high speed in order to distinguish from reading and writing of other data.

For record data to be read / written in the database, a vacant area is searched for in a high-speed nonvolatile cache memory in a plurality of storage controllers in order to reduce the writing time, and is temporarily stored. This is intended to reduce the write waiting time of the processor by writing to the original low-speed storage device later.

Hereinafter, various embodiments of the present invention will be specifically described.

[Embodiment 1] In FIG. 1, a high-speed data writing system includes a host processor 101, disk storage devices 128, 130, and 132, and a processor 113 for connecting the host processor and a disk control device.
Disk control devices 112, 11 having 117, 121
6 and 120, and the host processor 101
Above the database subsystem 102 is a control processor 103 and a buffer area 106 to store data.
The data is written using 108.

The disk controller 120 has two or more specific areas 122 and 123 of a nonvolatile cache memory, and the host processor 101 has a disk write unnecessary flag (a flag indicating that it is not necessary to immediately write data to the disk). Write request to the disk controller 120
The disk controller 120 writes the data from the host processor 101 to the existing area without writing to the disk 132 in the specific area 122 of the non-volatile cache memory. Is used, the disk controller 120
Sends a data save request to the host processor 101. Then, the host processor 101 sends a write request with a disk write unnecessary flag to the specific area 123 different from the specific area 122 to the disk controller 1.
20 to a specific area 123 of the nonvolatile cache memory different from the specific area 122.
The data from 01 is additionally written.

The host processor 101 writes the data in the specified area 122 of the used nonvolatile cache memory to the save data buffer 104 or 105, and thereafter, saves the save data buffer 104 or 10
If necessary, the data in 5 is compressed and a write request is made to another disk controller 112 or 116. Upon receiving the write request, the disk controller 112 or the disk controller 116 controls the control processors 113 and 117.
The nonvolatile cache memory 114 or 1
18 is temporarily written to the host processor 101
And the host processor 101 makes the nonvolatile cache memory area 122 usable again. The written save data is stored in the disk storage device 128.
Alternatively, it is stored in 130 as storage data 129 or 131.

Since the storage speed in the disk storage devices 128 and 130 is lower than the processing speed of the host processor 101, the nonvolatile cache memory areas 122 and 123
Two or more evacuation data buffers 104 and 105 are prepared. That is, in the example of FIG. 1, the data in the buffer 104 of the two evacuation buffers corresponding to the two nonvolatile cache memories is stored in the disk storage device 12 when necessary.
8, the buffer 105 and the corresponding specific area 123 of the non-volatile cache memory are writable, and the host processor 101 is ready for transaction processing.

Here, the data to be subjected to the write request with the disk write unnecessary flag mentioned as an example is, for example, logging data. Logs that occur at the same time as reading and writing to the database regularly require a large amount of writing, which is a performance bottleneck.

The embodiment of the present invention is characterized in that these data are temporarily stored in a cache, and the data is written to the disk over time, thereby making it possible to reduce the write waiting time. Further, even if the flash memory becomes widespread in the future, the present invention can be an effective configuration for avoiding the write waiting time because the price of the high-speed memory and the low-speed memory are probably different due to the hierarchical memory configuration.

[Embodiment 2] In FIG. 2, the high-speed data writing system includes a host processor 201, a tape storage device 227, a disk storage device 229, and processors 213 and 217 connecting these storage devices and the host processor. It has a tape controller 212 and a disk controller 216, and a non-volatile memory controller 220 coupled to the host processor 201. A database subsystem 202 is provided on the host processor 201, and the control processor 203 and the data are Data is written using the buffer areas 206 to 208 to be stored.

In the nonvolatile memory control device 220, specific areas 222, 22 of two or more nonvolatile cache memories
3 and the host processor 201
When the data in the specific data area 208 is sent to the non-volatile memory control device 220, the non-volatile memory control device 220 writes the data in the specific area 222 of the non-volatile cache memory. The non-volatile memory controller 220 is connected to the host processor 20.
1 sends a data save request. Then, the host processor 201 issues a write request to the specific area 223 different from the specific area 222 to the nonvolatile memory control device 22.
0, and the host processor 20 is stored in a specific area 223 of the nonvolatile cache memory different from the specific area 222.
1, the host processor 201 reads the data in the specified area 222 of the used nonvolatile cache memory into the plurality of save data buffers 204 or 205.

Thereafter, if necessary, the data in the save data buffer 204 or 205 is compressed and a write request is issued to another storage controller 212 or 216. Upon receiving the write request, the tape controller 212 or the disk controller 216 controls the control processors 213 and 217.
The nonvolatile cache memory 214 or 2
18 is temporarily written to the host processor 201
And the host processor 201
The non-volatile cache memory area 222 is made usable again.

The written save data 214 or 2
18 is stored in the tape storage device 227 or the disk storage device 229 as storage data 228 or 230. Since the storage speed in the storage devices 227 and 229 is slower than the processing speed of the host processor 201, two or more nonvolatile cache memory specific areas 222 and 223 and evacuation data buffers 204 to 205 are prepared. Further, since the tape storage device is slower than the disk storage device, it is possible to copy the data to the tape storage device after storing it once in the disk storage device, instead of writing directly from the evacuation data buffer 204 or 205 separately.

In the second embodiment, in comparison with the first embodiment of the present invention, the nonvolatile memory control device 220 installs two or more nonvolatile cache memories without installing a disk storage device attached thereto. In this case, the memory can always be used so that transaction processing can be executed without waiting time.

[Embodiment 3] Normally, in reading data, a volatile area is used without using a nonvolatile area. Only when writing data, non-volatility is used so that data is not erased. Usually, at most, writing is 20% or less of the whole (input / output processing to the disk). If there is no free space in the cache, writing will be awaited. Further, in general, the usage rate of the nonvolatile area is 1
The user sets the size in consideration of the read / write ratio so as not to become 00%. Also, the usage and capacity of the cache can be monitored at all times, and it can be checked whether the data to be written is stored in the nonvolatile cache. The result checked here is expressed as a usage rate in the following description.

In the third embodiment of the present invention shown in FIG.
The high-speed data writing system uses the host processor 30
, 332, disk storage devices 327, 329, and a processor 31 that couples a host processor and storage devices.
Disk controllers 312, 316 having 3,317
And a non-volatile memory control device 320 for coupling a plurality of host processors 301 and 332. A database subsystem 302 or 333 is provided on the host processor 301 or 332 to store data with the control processor 303 or 334. The data is read and written using the buffer areas 306 to 308 or 339 to 341 to be written.

When the host processor 301 reads data in the disk 327 and updates and writes the data, the host processor reads the data from the nonvolatile cache memory 31.
4 is obtained from the disk controller 312, and if the usage is lower, a write request is sent to the disk controller 312 as it is. If the usage rate of the memory 314 is high, the usage rate of the other nonvolatile cache memory 318 is obtained from the disk control device 316, and the nonvolatile cache memory 31
If the usage rate of the memory 8 is higher, a write request is issued to the disk controller 312. If the usage rate of the memory 318 is lower, the write unnecessary flag (the disk storage device 32) is required.
9, a write request is made to the disk controller 316.

At this time, the host processor 301 transfers the data in the buffers 306 to 308 to the disk controller 3
16, the disk controller 316 writes the data to the specific area 318 of the non-volatile cache memory, and notifies the host processor 301 that the writing has been completed.
The host processor 301 includes the nonvolatile memory control device 32
0 is notified of the write destination change (read disk 32
7), which is stored in the non-volatile cache memory 322.

After the other host processor 332 reads the data from the disk controller 312 or 316, it checks whether the storage location of the data has been changed in the nonvolatile cache memory 322, and if the host processor 301 If the data has been changed and stored in another non-volatile cache memory 318, the data is read again from the disk control device 316 at the change destination. When the storage area can be secured in the nonvolatile cache memory 314, the host processor 301 reads the temporarily stored data in the nonvolatile cache memory 318 and sends the disk control device 312 a disk write necessary flag (disk storage device 327). To the nonvolatile cache memory 314.
After the completion of writing, the host processor 301 notifies the nonvolatile memory control device 320 of the change of the storage destination. The data written in the nonvolatile cache memory 314 is stored in the disk storage device 327 as storage data 328.

In the third embodiment of the present invention, when a plurality of host processors exist and the plurality of host processors share a disk controller and a disk storage device, a so-called SAN (Storage Area) is used.
Network) or NAS (Network Att)
The present invention is characterized in that a nonvolatile cache memory of a disk control device is shared and used effectively and efficiently in an environment of an "acquired storage". Here, it is not presupposed that a plurality of host processors exist, but it is presumed that the non-volatile cache memory is shared by the disk controllers. When writing data to be read or written, if there is no free space in the cache memory of the disk control device corresponding to the read disk, the data is written to the free space of the nonvolatile cache memory of another disk control device.
The other disk controller is instructed that writing to the disk is unnecessary, and writing is performed, and the change of the writing destination is notified. After a free area is created in the original nonvolatile cache memory area, the host processor instructs disk writing and stores the data in the original disk, and notifies the change of the writing destination again.

[Fourth Embodiment] In a fourth embodiment of the present invention shown in FIG. 4, the high-speed data writing system includes the host processors 401 and 435 and the disk storage device 43.
1, 432, disk controllers 416, 420 having processors 417, 421 for controlling a host processor and a disk storage device, and a disk controller and a plurality of host processors 40 in a host processor 401.
An input / output processor 443 for controlling the input / output of a nonvolatile memory control device 424 which couples the control processor 403 with the database subsystems 402, 409 and 436 on the host processors 401 and 435; , 410 or 437 and buffer areas 406, 407, 413 and 414 for storing data.
Alternatively, data is read and written using 440 to 442.

When the control processor 403 reads data on the disk 431 and updates and writes the data,
The processor 403 requests the I / O processor 443 to write, and the I / O processor 443 obtains the usage rate of the non-volatile cache memory 418 from the disk control device 416. If the usage rate is low, the disk control device 41
6, the usage rate of the other nonvolatile cache memory 422 or 427 is obtained from the disk control device 420 or the nonvolatile memory control device 424, and the usage rate of the nonvolatile cache memory 418 is obtained. If it is lower, the disk controller 416 is requested to write. If the usage rate of the non-volatile cache memory 422 is lower, a write request is made to the disk controller 420 with a write unnecessary flag (a write unnecessary flag to the disk storage device 432), and the usage rate of the non-volatile cache memory 427 is If the value is low, a write request is issued to the nonvolatile memory control device 424.

For example, when the control processor 403 requests the data in the buffers 406 and 407 (data read from the disk 431) to the input / output processor 443 and sends it to the disk control unit 420, the disk control unit 42
0 writes data to a specific area 422 of the nonvolatile cache memory, transmits a write end to the control processor 403, the control processor 403 notifies the nonvolatile memory control unit 424 of the change of the write destination, and writes the write destination management nonvolatile cache. It is stored in the memory 426. After the other control processor 410 or 437 requests data from the input / output processor 443 and reads the data from the disk control device 416, it checks whether the storage destination of the data has been changed in the write destination management nonvolatile cache memory 426, If the control processor 403 has previously changed the same data and stored it in another non-volatile cache memory 422, the control processor 403 reads the data again from the disk control device 420 of the changed destination.

When the storable area is secured in the nonvolatile cache memory 418,
The temporarily stored nonvolatile cache memory 42
2 is read, and a write request is made to the disk controller 416 with a disk write required flag,
After the writing to the nonvolatile cache memory is completed, the input / output processor 443 notifies the nonvolatile memory control device 424 of the change of the storage destination again. Non-volatile cache memory 4
The data written in 18 is stored as storage data 433 in the disk storage device 431.

Fifth Embodiment In the fifth embodiment of the present invention shown in FIG. 5, the high-speed data writing system includes a host processor 501 and disk storage devices 530 and 53.
2, 534, and disk controllers 512, 517, 522 having processors 513, 518, 523 for coupling the host processor and the disk storage device.
16, 521, and a database subsystem 502 is provided on the host processor 501, and reads and writes data using the control processor 503 and buffer areas 506 to 508 for storing data.

When the host processor 501 reads data stored in the disk storage device 530 and updates and writes the data, when the storage area is insufficient in the non-volatile cache memory 514, a non-volatile cache memory other than the disk controller 512 is used. The free space 519 is obtained from the disk controller 517 via the connection cable 516, and if the free space in the non-volatile cache memory 519 is smaller, it is written to the disk storage device 530; A write request is made via 516. At this time, the disk control device 517 writes the data in the nonvolatile cache memory area 519, temporarily stores the data in the storage device 532, transmits a write end to the storage control device 512, and transmits the data to the storage control device 512.
12 stores the write destination change in the nonvolatile cache memory area 514.

When the host processor 501 requests to read the data from the disk controller 512, the storage controller 512 checks whether the storage destination of the data has been changed in the nonvolatile cache memory 514, and if another storage control If it is stored in the device 517, it is read from the disk control device 517 of the change destination, and the result is transmitted to the host processor 501.

When a storable area is secured in the nonvolatile cache memory 514, the storage control device 517 reads the data 533 temporarily stored in the storage device 532 and issues a write request to the disk control device 512.
After the writing to the nonvolatile cache memory 514 is completed, the data temporarily stored is erased, and the disk control device 5
12 erases the change storage destination in the nonvolatile cache memory 514. Non-volatile cache memory 51
4 is stored in the original disk storage device 5
30 as stored data 531.

In this embodiment, a plurality of disk controllers can mutually use the nonvolatile cache memory mounted on each disk controller, and furthermore, a connection cable for connecting the disk controllers is provided. The management of each nonvolatile cache memory is controlled by a disk controller.

Embodiment 6 In Embodiment 6 of the present invention shown in FIG. 6, a plurality of disk controllers 612, 616, 62
0 is a configuration of a single host processor system connected to the two nonvolatile storage controllers 637 and 642 and sharing the nonvolatile cache memories 639, 644 and 645. A single processor system includes one host processor 601, two non-volatile storage controllers 637, 642, and a plurality of disk storage devices 628, 630, 632 connected to a disk controller.

The storage controllers 612, 616, and 620
It comprises processors 613, 617, 621, nonvolatile cache memories 614, 618, 622, 623 and volatile cache memories 615, 619, 624. In the host processor 601, the database subsystem 602 includes the disk storage devices 628, 630, 6
The processor 603 and the temporarily stored buffers 606, 607, and 608 are used to update the data 629, 631, and 633 in 32.

For example, when the host processor 601 writes data to the disk storage device 628, if there is sufficient storage space in the nonvolatile cache memory 614, the disk control device 612 writes the data to the nonvolatile cache memory 614. If a sufficient storage area cannot be secured in the nonvolatile cache memory 614, the disk controller 61
2 sends the write request to the nonvolatile storage controllers 637 and 6
42 and the other non-volatile cache memories 618, 62
If there is a sufficient storage area in 2, 623, 639, or 644, one of the non-volatile cache memories usable by the non-volatile storage control device 637 or 642, for example, 6
18 is written. If necessary, do not write to the disk drive.

Thereafter, the nonvolatile storage controller 637 or 642 sends a write completion to the disk controller 612, and the host processor 601 receives the write completion from the disk controller 612. Nonvolatile storage control device 6
37 or 642 stores the updated data from the disk control unit 616 when the nonvolatile cache memory 614 has a sufficient storage area or when the processing amount of the host processor 601 becomes small. Move to storage device 628. Then, the disk controller 616 makes the temporarily written cache area reusable after receiving the write completion from the nonvolatile storage controller 637 or 642.

Another configuration example is the host processor 601.
However, when writing data to the disk storage device 628 or 630 having the same data for backup, the host processor 601 has an area in which the nonvolatile cache memories 614 and 618 can be written.
If there is sufficient storage space in both non-volatile cache memories 614 and 618, host processor 601 issues a write request to 612 and 616. If, for example, there is not enough storage space in the non-volatile cache memory 614, the processor 601 issues a write request to the disk controller 616, and the disk controller 616 writes data to the non-volatile cache memory 618. The host processor 601 receives the write completion from the disk controller 616. When a sufficient storage area is created in the non-volatile cache memory 614 or when the processing amount of the host processor 601 becomes low, the host processor 601
28, the data is copied from the disk controller 616. Thereafter, the host processor 601 releases the non-volatile used area in the non-volatile cache memory 614 or 618, which had less space.

Embodiment 7 Embodiment 7 shown in FIG.
This is a case where a single host processor shown in FIG. 6 is replaced with a plurality of host processors. Two high-speed coupling devices 737,
742 is a nonvolatile memory control device 637, 64 of FIG.
Used as 2.

[Embodiment 8] FIG. 8 shows disk devices 849 and 850 in the high-speed connection device of FIG. 7 in order to temporarily store data as well as redundantly store data.
It is the one that has.

In the contents of all the embodiments of the present invention described above, it is necessary for the user to register the nonvolatile cache memory area usable by each host processor in advance, and to increase the number of registrations. Thus, it is possible to increase the area that can be shared, and the functions and functions of the present invention can be realized.

The embodiment of the present invention can be realized even in a storage area network environment, and its effect is great. The host processor described in the above embodiment can be a large computer, a workstation, a server, a PC, or any other processor device to which a storage can be connected.

As described above, the embodiments of the present invention include those having the following structures, functions, and actions.

In a database system or the like on the host processor, transaction results and logging data are stored in a storage device, but the next transaction is processed until it is stored in a non-volatile storage device for recovery processing such as a system down. Not done. Such high-speed response is required, and for data that should not be lost, the data is temporarily resident in a plurality of high-speed nonvolatile memory areas in the disk control device, and is not written to a low-speed storage device such as a disk. When the entire non-volatile memory area is used, the disk control device notifies the host processor of the change of the storage destination, and the host processor records the collected data in the non-volatile memory in another disk storage device, and again executes the non-volatile storage. The volatile memory area.

Since it takes time to record data on the disk, two or more high-speed nonvolatile memory areas are prepared in the disk controller, and a plurality of nonvolatile cache memory areas that can be used in advance are registered in the host processor. In advance, these are used in order to keep the nonvolatile cache memory available.

If there is no free space in the non-volatile cache memory of the disk controller for the record data in the database, the host processor temporarily stores the record data in an empty area of the non-volatile cache memory of the plurality of disk controllers. Later, the data is written to the disk controller. If the temporary storage area is a non-volatile memory such as a backup battery, a disk storage device is not required.The host processor reads the data in the non-volatile memory area, compresses it, and stores it in an auxiliary storage device such as a disk or tape. After storing the data, the nonvolatile memory area is made usable again.

For data to be written, the data is temporarily stored in two or more nonvolatile cache memory areas in the disk controller, and the host processor does not write the data to the disk when the entire area is used. If it is necessary to compress the data, a write request is issued to a non-volatile cache memory in an auxiliary storage control device such as another disk control device or a tape control device, and it takes time to write the data. A volatile memory area is prepared, and when writing is completed, the area is made available again.

When writing the data to be read / written, the cache memory in the disk controller cannot store all the data and needs to write the data to the disk. If there is free space, instruct disk writing if there is free space, and if there is no free space, instruct other disk controllers to write to the disk controller that has free space in the non-volatile cache memory. And write. At this time, the change of the write destination is transmitted to the other host processor, and after the free space is created in the original non-volatile cache memory area, the host processor instructs the disk write and stores the data on the original disk. To the write destination again. Also, if there is a backup battery in the temporary storage area, no disk is required.

[0060]

According to the present invention, the speed is increased by effectively utilizing a plurality of high-speed and expensive non-volatile cache memories so that the host processor does not wait for writing to a large-scale storage device which takes more time than the cache memory. The host processor can be used effectively.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration and connections of a host processor, a disk control device, and a disk storage device in a high-speed data writing system according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a configuration and connections of a host processor, a tape control device, a magnetic tape, a disk control device, and a disk storage device in the high-speed data writing system according to the second embodiment of the present invention.

FIG. 3 is a diagram illustrating a configuration and connections of a plurality of host processors, a disk control device, a disk storage device, and a nonvolatile memory control device in the high-speed data writing system according to the third embodiment of the present invention.

FIG. 4 is a diagram illustrating a configuration and connections of a plurality of host processors, a disk control device, a disk storage device, and an input / output processor in a high-speed data writing system according to a fourth embodiment of the present invention.

FIG. 5 is a diagram illustrating a configuration and connections of a host processor, a disk control device, and a disk storage device in a high-speed data writing system according to a fifth embodiment of the present invention.

FIG. 6 is a diagram illustrating a configuration and connections of a host processor, a disk control device, a disk storage device, and a nonvolatile storage control device in a high-speed data writing system according to a sixth embodiment of the present invention.

FIG. 7 is a diagram illustrating a high-speed data writing system according to a seventh embodiment of the present invention, in which a plurality of host processors are used in the sixth embodiment of FIG. 6;

FIG. 8 is a high-speed data writing system according to an eighth embodiment of the present invention, in which the high-speed coupling device of FIG. 7 includes a disk device that not only temporarily stores data but also redundantly holds data. FIG. 2 is a diagram illustrating a configuration and connections.

[Explanation of symbols]

101: Host Processor, 102: Database Subsystem, 103, 113, 117, 121: Control Processor, 104: Evacuation Data Buffer 1, 105: Evacuation Data Buffer 2, 106: Data Buffer 1, 1
07 ... data buffer 2, 108 ... data buffer 3,
109, 110, 111, 125, 126, 127... Connection cables, 112, 116, 120... Disk control devices, 114, 118.
5, 119, 124 ... volatile cache memory, 122
... Non-volatile cache memory areas 1 and 123 ... Non-volatile cache memory areas 2, 128, 130 and 132 ... Disk storage devices, 129, 131 and 133 ... Storage data, 201 ... Host processor, 202 ... Database subsystems, 203 and 213 , 217, 221 ... control processor, 204 ... evacuation data buffer 1, 205
... Data buffer 2, 206 for evacuation, Data buffer 1, 207, Data buffer 2, 208, Data buffer 3, 209, 210, 211, Connection cable, 21
2,216 ... disk control device, 214,218,22
4 Non-volatile cache memory, 215, 219 Volatile cache memory, 220 Non-volatile memory control device, 222 Non-volatile cache memory specific area 1, 2
23 ... Non-volatile cache memory specific areas 2, 225
226: connection cable, 227: auxiliary storage device such as a magnetic tape, 228, 230 ... storage data, 229 ... disk storage device, 301 ... host processor 1, 302 ... database subsystem 1, 303, 313, 317,
321, 334: control processor, 304: evacuation data buffer 1, 305: evacuation data buffer 2, 30
6 Data buffer 1, 307 Data buffer 2, 3
08 Data buffer 3, 309, 310, 311, 3
25, 326, 331, 335, 338 ... connection cables, 312, 316 ... disk control devices, 314, 31
8. Non-volatile cache memory, 315, 319, 32
4, volatile cache memory, 320, nonvolatile memory control device, 322, nonvolatile cache memory area 1,
323: Non-volatile cache memory area 2, 327, 3
29: disk storage device, 328, 330 ... storage data, 332 ... host processor 2, 333 ... database subsystem 2, 336 ... evacuation data buffer 1,
337: Evacuation data buffers 2, 339: Data buffers 1, 340: Data buffers 2, 341: Data buffers 3, 401: Host processor 1, 402: Database subsystem 1, 403: Control processor, 4
04 evacuation data buffer 1, 405 evacuation data buffer 2, 406 data buffer 1, 407 data buffer 2, 408 data bus, 409 database subsystem 2, 410 control processor 2, 41
1 ... Evacuation data buffer 3, 412 ... Evacuation data buffer 4, 413 ... Data buffer 3, 414 ... Data buffer 4, 415, 429, 430 ... Connection cable,
416: Disk control device, 417: Disk control processor 1, 418, 422: Non-volatile cache memory, 419, 423, 428: Volatile cache memory, 420: Disk control device 1, 421: Disk control processor, 424: Non-volatile Memory controller, 42
5: control processor, 426: nonvolatile cache memory area for writing destination management, 427: nonvolatile cache memory area 1, 431 ... disk storage device 1, 432 ...
Disk storage devices 2, 433, 434 ... storage data, 4
35 Host processor 2, 436 Database subsystem 3, 437, 518, 523 Control processor 438 Save data buffer 1, 439 Save data buffer 2, 440 Data buffer 1, 441
... data buffers 2, 442 ... data buffers 3, 44
3 ... I / O processor, 501 ... Host processor 1,
502... Database subsystem 1, 503, 513
.., Control processor, 504, evacuation data buffer 1,
505: Evacuation data buffer 2, 506: Data buffer 1, 507: Data buffer 2, 508: Data buffer 3, 509, 510, 511, 516, 521
527, 528, 529: Connection cables, 512, 51
7, 522: Disk control device, 514, 519, 52
4,525: Non-volatile cache memory, 515, 52
0,526 ... volatile cache memory, 530, 53
2,534: disk storage devices, 531, 533, 53
5: stored data, 601: host processor 1, 602
... Database subsystem 1, 603, 613, 61
7, 621, 638, 643 ... control processor, 604
... Data buffer 1, 605 for evacuation Data buffer 2, 606 for evacuation Data buffer 1, 607 Data buffer 2, 608 Data buffer 3, 609, 61
0,611,625,626,627,634,63
5,636 ... connection cable, 612, 616, 620 ...
Disk controller, 615, 619, 624, 641,
646: Volatile cache memory, 614, 618, 6
22, 623, 639, 640, 644, 645: Non-volatile cache memory, 628, 630, 632, 63
7, 642... Disk storage device, 629, 631, 63
3 ... storage data, 701: host processor 1, 702
... Database subsystem 1, 703, 713, 71
7, 721, 738, 743, 751 ... control processor, 704 ... evacuation data buffer 1, 705 ... evacuation data buffer 2, 706 ... data buffer 1, 707
... data buffers 2 and 708 ... data buffers 3 and 70
9,710,711,725,726,727,73
4,735,736,747,748 ... connection cable,
712, 716, 720, 737, 742: Disk controller, 714, 718, 722, 723, 739, 7
40, 744, 745: Non-volatile cache memory, 7
15,719,724,741,746 ... volatile cache memory, 728,730,732 ... disk storage device, 729,731,733 ... storage data, 749 ... host processor 1,750 ... database subsystem 1,752 ... evacuation Data buffer 1, 753, 859
... Evacuating data buffers 2, 754, 860 ... Data buffers 1, 755, 861 ... Data buffers 2, 75
6,862 data buffer 3, 801 host processor 1, 802 database subsystem 1, 80
3,813,817,821,838,843,857
... the control processor, 804 ... the evacuation data buffer 1,
805: Evacuation data buffer 2, 806: Data buffer 1, 807: Data buffer 2, 808: Data buffer 3, 809, 810, 811: Connection cable, 8
12,816,820,847 ... disk control device, 8
14,818,822,823,839,840,84
4,845: nonvolatile cache memory, 815, 81
9,824,841,846... Volatile cache memory, 827,834,835,835,851,85
2,853,854 ... Connection cable, 825,826,
828, 830, 832, 848, 849, 850: Disk storage device, 829, 831, 833: Storage data, 837, 842: High-speed coupling device, 855: Host processor 1, 856: Database subsystems 1, 8
58 ... data buffer 1 for saving, 859 ... data buffer 2 for saving

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G06F 12/16 340 G06F 12/16 340Q (72) Inventor Akihiro Uchida 1st Horiyamashita, Hadano City, Kanagawa Prefecture, Inc. Hitachi Server Enterprise Server Division (72) Inventor Kenichi Takamoto 2880 Kokutsu, Odawara-shi, Kanagawa F-term in Hitachi, Ltd. Storage Systems Division F-term (reference) BA01 CA12 CC08 CE12 CE14 CH02

Claims (12)

[Claims] 1. A high-speed data writing system comprising: a host processor; a plurality of storage devices; and a plurality of storage control devices having a non-volatile cache memory and a processor connecting the host processor and the storage device. The host processor, when the nonvolatile cache memory of the storage control device coupled to the storage device to which the data is written does not have a sufficient free space, stores the nonvolatile cache of the storage control device coupled to another storage device. A high-speed data writing system characterized by temporarily using a memory. 2. A high-speed data writing system comprising: a host processor; a plurality of storage devices; and a plurality of storage control devices having a non-volatile cache memory and a processor connecting the host processor and the storage device. Thus, one storage control device among the plurality of storage control devices,
A high-speed data writing system having two or more specific areas of a nonvolatile cache memory. 3. A high-speed data writing system comprising: a host processor; a plurality of storage devices; and a plurality of storage controllers having a non-volatile cache memory and a processor connecting the host processor and the storage device. The high-speed data writing system, wherein the host processor temporarily uses a storage device other than the storage device to which the data is to be written. 4. A high-speed data write system comprising a host processor, a plurality of storage devices, and a plurality of storage control devices having a non-volatile cache memory and a processor connecting the host processor and the storage devices. When the non-volatile cache memory of the storage control device coupled to the storage device to which the data is written does not have sufficient free space, the non-volatile cache memory of the storage control device coupled to another storage device is temporarily stored. A high-speed data writing system, wherein various types of control of shared use of the nonvolatile cache memories of the plurality of storage control devices are controlled by the storage control devices. 5. A high-speed data writing system comprising: a host processor; a plurality of storage devices; and a plurality of storage control devices having a non-volatile cache memory and a processor connecting the host processor and the storage device. A specific storage controller among the plurality of storage controllers,
When the host processor sends a write request to the specific area with a write unnecessary flag to a storage device to the specific storage control device, the specific storage controller has two or more specific areas of the nonvolatile cache memory. The storage controller writes data from the host processor to the one specific area, and when the entire one specific area is used, the specific storage controller sends a data evacuation request to the host processor, Reads the data of the one specific area and issues a storage request to another storage device, and makes it possible to rewrite the one specific area after the storage in the other storage device is completed. A write request with a write unnecessary flag to the storage device is transmitted to another nonvolatile cache different from the one specific area. Feeding in a specific area of memory, high-speed data writing system in which the particular storage control device is characterized in that the write data from the host processor to the other specific area. 6. A host processor, a plurality of storage devices, a plurality of storage control devices having a non-volatile cache memory and a processor connecting the host processor and the storage device, and a high-speed non-volatile connected to the host processor. A non-volatile memory control device having a processor with a memory, wherein the non-volatile memory control device has a specific area of two or more non-volatile cache memories; When a write request to the specific area with a write unnecessary flag is sent from the host processor to the nonvolatile memory control device, the nonvolatile memory control device stores data from the host processor in the one specific area. When writing is performed and the entire one specific area is used, the nonvolatile memory control device Sends a data evacuation request to the host processor, the host processor reads the data in the one specific area, issues a storage request to the storage device, and rewrites the one specific area after the storage in the storage device is completed. On the other hand, the host processor sends a write request with a new write unnecessary flag to the storage device to a specific area of another nonvolatile cache memory different from the one specific area, and controls the nonvolatile memory. A high-speed data writing system, wherein the device writes data from a host processor to the another specific area. 7. A plurality of host processors, a plurality of storage devices, a plurality of storage control devices having a non-volatile cache memory and a processor connecting the host processor and the storage devices, and a plurality of storage processors connected to the plurality of host processors. A non-volatile memory control device having a processor with a high-speed non-volatile memory, the storage control device being a storage destination when a processing result of the host processor is updated in the storage device If there is not enough free space in the non-volatile cache memory, a shared write area is defined by searching for a free area in the non-volatile cache memory of a storage control device other than the storage control device, and a write unnecessary flag for the storage device is determined. With a write request to another storage controller and temporarily store it in the non-volatile cache memory. Transmitting the changed storage destination to the nonvolatile memory control device, and confirming the current storage destination in the nonvolatile memory control device when another host processor reads data from the storage control device; The changed data is read from the non-volatile cache memory of the storage control device, and when a free area is created in the non-volatile cache memory area where there was not enough free area, a free space is notified to the host processor, and another non-volatile cache memory is temporarily stored. The host processor reads the data stored in the storage device, attaches a flag indicating that the storage device needs to be written to the storage device of the update source, makes a write request again, and temporarily writes all data to the storage device of the update source. Release the nonvolatile cache memory area of the another storage control device used and A high-speed data writing system for notifying a control device of a change in a storage destination. 8. A host processor incorporating a database subsystem, a plurality of storage devices, an input / output processor coupled to the database subsystem, a processor coupled to the input / output processor and the storage device, and a nonvolatile memory. A plurality of storage controllers having non-volatile cache memory, and a non-volatile memory controller having a processor with high-speed non-volatile memory coupled to the database subsystem, and wherein the one host processor is connected to another A high-speed data writing system linked to a host processor, wherein the database subsystem requests the input / output processor to write when updating the processing result of the one host processor to the storage device, The processor is not in control of the storage controller at the storage location If there is not enough free space in the non-volatile cache memory, and if there is not enough free space, it searches for a free space in the non-volatile cache memory of another storage controller other than the storage controller concerned, and allocates a shared write area. Define, add a write unnecessary flag to the storage device, make a write request to another storage control device, temporarily store it in the non-volatile cache memory, and transmit the changed storage destination to the non-volatile memory control device, When another host processor requests data from the input / output processor and reads the data from the storage controller, the current storage destination in the nonvolatile memory controller is confirmed, and the data is changed from the nonvolatile cache memory of the another storage controller. The data is read, and if there is free space in the non-volatile cache memory area where there was not enough free space, the input / output processor Read the data stored in another non-volatile cache memory, add the flag to the storage device of the update source, write it to the storage device, request a write again, and write all the data to the storage device of the update source The high-speed data writing system, wherein after completion, the input / output processor notifies the nonvolatile memory control device of the change of the storage destination. 9. A high-speed data writing system comprising: a host processor; a plurality of storage devices; and a plurality of storage control devices having a non-volatile cache memory and a processor connecting the host processor and the storage device. Connecting the plurality of storage control devices with a connection cable, and when updating the processing result of the host processor to the storage device, there is not enough free space in the nonvolatile cache memory of the storage control device at the storage destination. And obtaining a free space of a nonvolatile cache memory of a storage control device different from the storage control device via the connection cable, writing a request to another storage control device, and writing the write request to the nonvolatile cache memory. Temporary storage in a storage device coupled to the storage control device, and the storage control device The data is stored in the non-volatile cache memory in the storage control device, and when the host processor requests the storage control device to read data, the storage control device checks the current storage destination in the non-volatile cache memory, and The changed data is read from the non-volatile cache memory of another storage control device, and when there is a free area in the non-volatile cache memory area where there was no sufficient free area, the another storage control apparatus
The data temporarily stored in the storage device coupled to the another storage control device is read, a write request is issued to the update source storage control device, and the data is temporarily stored after completion of the writing to the update source storage control device. A high-speed data writing system, wherein the stored data is erased, and the storage controller erases the changed storage destination. 10. A high-speed data writing system comprising: a host processor; a plurality of storage devices; and a plurality of storage control devices having a non-volatile cache memory and a processor connecting the host processor and the storage device. A nonvolatile memory control device having a processor with a high-speed nonvolatile memory is coupled to each of the plurality of storage control devices so that the nonvolatile memory of the nonvolatile memory control device is shared; When updating the result to the storage device, if there is not enough free space in the nonvolatile cache memory of the storage controller at the storage destination, the storage controller issues a write request to the nonvolatile memory controller and A non-volatile memory controller can be used within the storage controller and the non-volatile memory controller. The cache memory is selected and the data is temporarily written, and the nonvolatile memory control device sends the temporary write completion to the storage control device, and writes the data to the nonvolatile cache memory region where there was no sufficient free space. When a free area is created, the nonvolatile memory control device reads data from the write destination of the data and writes it to the storage control device of the update source, and temporarily receives the write completion from the nonvolatile memory control device, A high-speed data writing system wherein a written nonvolatile cache area is reusable. 11. The high-speed data writing system according to claim 6, wherein said nonvolatile memory control device is coupled to a plurality of host processors. 12. The high-speed data writing system according to claim 6, wherein the non-volatile memory control device includes a disk device that holds data outside the high-speed non-volatile memory. High-speed data writing system.