JP2002077752A - Broadcast receiving tuner - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a broadcast receiving tuner which uses a PLL 11 capable of being controlled in common when the channel of a digital broadcast and segment data are selected and which can select them at a time. SOLUTION: The broadcast receiving tuner is provided with a first intermediate-frequency signal tuning stage over a wide bandwidth for selecting the channel, a second intermediate-frequency signal tuning stage over a narrow bandwidth for selecting a partial segment in one channel, and the PLL 11 which controls respective frequencies of a first local oscillation signal and a second local oscillation signal. The PLL 11 is provided with a first frequency divider 111 which frequency divides the first local oscillation signal, a second frequency divider 112 which frequency divides the second local oscillation signal, a first frequency comparator 113 which compares the first frequency-divided local oscillation signal with a first reference frequency signal, and a second frequency comparator 114 which frequency-compares the second frequency-divided local oscillation signal with a second reference frequency signal. In the first and second frequency dividers 111, 112, a frequency dividing ratio is controlled by respective frequency dividing signal supplied from a common frequency-dividing signal distributor 117.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a broadcast receiving tuner and, more particularly, to the influence of a high-level television broadcast signal on an adjacent channel when a digital broadcast signal allocated to an empty channel of a television broadcast signal is received. The present invention relates to a broadcast receiving tuner that can reduce the number of channels and can easily perform channel selection.

[0002]

2. Description of the Related Art Recently, in the terrestrial television broadcasting, a transition from an analog system to a digital system has been attempted in order, and as a transition stage, an analog system in which the analog system and the digital system are mixed in a unified manner. Digital mixing methods are being considered. According to the results of this study,
In Japan, broadcasting using a mixed analog-digital system is scheduled from 2003.

[0003] In the analog-digital mixed system, a television broadcast already allocated to a predetermined channel is directly allocated to the same channel, and a digital broadcast is allocated to an empty channel of the television broadcast. In this case, the digital broadcasting divides the bandwidth (6 MHz) of one vacant channel of the television broadcasting into 13 OFDM (orthogonal frequency division multiplexing) segments and divides approximately 429 per segment.
It has a bandwidth of kHz, and these 13 OFDM segments are provisionally divided into a maximum of three layers.

FIG. 6 is a characteristic diagram showing an example of a frequency arrangement in the analog-digital mixed system, in which existing television broadcasts are allocated to channel (CH) 4 and channel (CH) 6. This is an example in which digital broadcasting is allocated to an empty channel (CH) 5.

As shown in FIG. 6, channels 4 and 6 are television broadcasting channels used for existing television broadcasting, and a relatively high level analog electric field is generated over the entire television broadcasting channel. Is what it is. Channel 5 is a digital broadcast channel, and includes 13 OFDs 1 to 13.
M segments are set and arranged by frequency division.

FIG. 4 is a block diagram showing an example of a configuration of a main part of a broadcast receiving tuner capable of receiving a digital broadcast which has been already proposed in such an analog-digital mixed system.

As shown in FIG. 4, the broadcast receiving tuner includes a high frequency variable filter (RFFIL) 41, a high frequency amplification stage (RF AMP) 42, a first frequency mixing stage (MIX1) 43, and a first local unit. Oscillator (OSC1) 44
And a first intermediate frequency filter (first IF FI
L) 45A, 45B, first intermediate frequency amplification stages (first IF AMP) 46A, 46B arranged in parallel, second frequency mixing stage (MIX2) 47, and second local oscillator (OSC2)
48 and a second intermediate frequency filter (second IFFIL) 49
A second intermediate frequency amplification stage (second IF AMP) 50;
It includes changeover switches 51A and 51B that operate in conjunction with each other, a second intermediate frequency signal output terminal 52, a receiving antenna 53, and a frequency adjustment mechanism (F CONT). in this case,
As the first intermediate frequency filters 45A and 45B, surface acoustic wave (SAW) filters capable of selecting a desired frequency band with high accuracy are used.

The high frequency variable filter 41 has an input connected to the receiving antenna 53 and an output connected to an input of the high frequency amplifying stage 42. The first frequency mixing stage 43 includes a first
The input is connected to the output of the high frequency amplification stage 42, the second input is connected to the output of the first local oscillator 44, and the output is connected to the movable contact of the changeover switch 51A. First intermediate frequency filter 45
A is input to one fixed contact of the changeover switch 51A,
The outputs are respectively connected to the inputs of the first intermediate frequency amplification stage 46A. The first intermediate frequency filter 45B has an input connected to the other fixed contact of the changeover switch 51A, and an output connected to the input of the first intermediate frequency amplifying stage 46B. The output of the first intermediate frequency amplification stage 46A is connected to one fixed contact of the changeover switch 41B, and the output of the first intermediate frequency amplification stage 46B is connected to the other fixed contact of the changeover switch 51B. The second frequency mixing stage 47 has a first input connected to the movable contact of the changeover switch 51B, a second input connected to an output of the second local oscillator 48, and an output connected to an input of the second intermediate frequency filter 49. The second intermediate frequency amplification stage 50 has an input connected to the output of the second intermediate frequency filter 49 and an output connected to the second intermediate frequency signal output terminal 52. The pass band and the local oscillation frequency of the high-frequency variable filter 41 and the first local oscillator 44 are linked and controlled by the control of the frequency adjustment mechanism 54.

In this case, the first intermediate frequency is selected to be 58 MHz, and the pass band width of the first intermediate frequency filter 45A is about 429 k, which is equal to the bandwidth of one OFDM segment.
Hz, the pass band width of the first intermediate frequency filter 45B is 3
About 1287k equal to the bandwidth of one OFDM segment
Hz. The second intermediate frequency is 8.12
MHz or 4.06 MHz, and the second intermediate frequency filter 49 is set to pass 8.12 MHz or 4.06 MHz.

The operation of the known broadcast receiving tuner according to the above configuration is as follows. By adjusting the frequency adjusting mechanism 54, the pass frequency band of the high frequency variable filter 41 and the first
When the frequency of the first local oscillation signal of the local oscillator 44 is controlled and the digital broadcast signal of channel 5 is set to the receiving state, the digital broadcast signal of channel 5 received by the receiving antenna 53 is received by the high-frequency variable filter 41. Is amplified to a predetermined level by the high frequency amplification stage 42 and supplied to the first frequency mixing stage 43. Since the first local oscillator 44 controls the frequency of the first local oscillation signal frequency to the receiving state of the digital broadcast signal of channel 5, the first local oscillator 44 separates the digital broadcast signal and the first local oscillation signal in frequency in the first frequency mixing stage 43. A mixed signal that is mixed and becomes an intermediate frequency signal is output.

When the movable contacts of the changeover switches 51A and 51B have been switched to the solid line positions in FIG. 4, the mixed signal output from the first frequency mixing stage 43 is
A, the data (signal) of one OFDM segment, for example, the OFDM segment 7 at the center of the channel 5 is selectively extracted in the first intermediate frequency filter 45A through the first intermediate frequency filter 45A. The data (signal) of the segment 7 is amplified to a predetermined level in the first intermediate frequency amplifying stage 46A, and supplied to the second frequency mixing stage 47 through the changeover switch 51B. On the other hand, when the movable contacts of the changeover switches 51A and 51B have been switched to the positions indicated by the dotted lines in FIG.
Is supplied to the first intermediate frequency filter 45B through the changeover switch 51A, and the three OFDM segments in the first intermediate frequency filter 45B
For example, data (signals) of the OFDM segments 1 to 3 on the low frequency side of the channel 5 are selectively extracted, and the data (signals) of the selectively extracted OFDM segments 1 to 3 are set to a predetermined level in the first intermediate frequency amplification stage 46B. The signal is amplified and supplied to the second frequency mixing stage 47 through the changeover switch 51B.

[0012] The second frequency mixing stage 47 is composed of the OFDM segment data (signal) supplied from the first intermediate frequency amplifying stage 46A or the first intermediate frequency amplifying stage 46B and the second local oscillator 48 output from the second local oscillator 48. An oscillation signal is frequency-mixed, and a second mixed signal serving as a second intermediate frequency signal is output by the frequency mixing. The second mixed signal removes unnecessary frequency components other than the second intermediate frequency signal in a second intermediate frequency filter 49, is amplified to a predetermined level in a second intermediate frequency amplifying stage 50, and passes through a second intermediate frequency signal output terminal 52. It is supplied to the utilization circuit.

By the way, the broadcast receiving tuner has a first
Intermediate frequency filter 45A or first intermediate frequency filter 4
When one or three OFDM segments are selectively extracted in 5B, the analog broadcast electric field of a high-level adjacent channel is affected. At the same time, the analog broadcast electric field is selectively extracted. It becomes difficult to remove the electric field.

In order to eliminate such a problem, the present applicant has proposed a broadcast receiving tuner which is not affected by an analog broadcast electric field of an adjacent channel.
-0000.

FIG. 5 is a block diagram showing an example of a main configuration of a broadcast receiving tuner proposed by the present applicant.

In FIG. 5, components having the same functions as those shown in FIG. 4 are denoted by the same reference numerals.

The broadcast receiving tuner shown in FIG.
An intermediate frequency signal circuit is provided with a first intermediate frequency filter 45 and a first intermediate frequency amplifying stage 46. The first intermediate frequency filter 45 is provided with a frequency of a frequency adjusting mechanism 54 coupled to a first local oscillator 44. It has a wide pass band width of 6 MHz for passing a plurality of segment groups (for example, one channel) selected by control, and the second intermediate frequency filter 49 provided in the second intermediate frequency signal circuit has a second A frequency fine adjustment mechanism (FR) coupled to the local oscillator 48
CONT) 55 has a narrow pass bandwidth of 8.12 MHz or 4.06 MHz for passing a part of a plurality of segment groups tuned by the frequency control of 55, and the other configuration is the known configuration shown in FIG. Broadcast tuner is no different.

The operation of this broadcast receiving tuner according to the above configuration is as follows. However, in this case,
It is assumed that five digital broadcasting channels are allocated.

First, the pass frequency band of the high frequency variable filter 41 and the first local oscillation signal frequency of the first local oscillator 43 are controlled by adjusting the frequency adjustment mechanism 54, and the digital broadcast signal of channel 5 is set to the receiving state. Then, the digital broadcast signal of channel 5 received by the receiving antenna 53 is selectively extracted by the high frequency variable filter 41, amplified to a predetermined level by the high frequency amplification stage 42, and supplied to the first frequency mixing stage 43. The first local oscillator 44
Since the frequency of the first local oscillation signal is frequency-controlled to the receiving state of the digital broadcast signal of channel 5, in the first frequency mixing stage 43, the digital broadcast signal and the first local oscillation signal are frequency-mixed. A mixed signal serving as one intermediate frequency signal is output. This mixed signal is supplied to the first intermediate frequency filter 45, and the 13 intermediate frequency filters 45 correspond to one channel due to the wide pass band width of the first intermediate frequency filter 45.
Data (signal) of the FDM segment is selectively extracted.
The data (signals) of the 13 OFDM segments 7 selected and extracted are amplified to a predetermined level by a first intermediate frequency amplification stage 46 and supplied to a second frequency mixing stage 37.

The second frequency mixing stage 37 includes thirteen OFDs.
The data (signal) of the M segment and the second local oscillation signal output from the second local oscillator 48 are frequency-mixed, and the frequency mixing outputs a second mixed signal that becomes a second intermediate frequency signal. At this time, the data (signal) of the 13 OFDM segments is adjusted by adjusting the frequency fine adjustment mechanism 55.
, For example, data (signals) of any one OFDM segment or data (signals) of any three adjacent OFDM segments are selected and extracted by the second intermediate frequency filter 49. Then, the frequency of the second local oscillation signal of the second local oscillator 48 is finely adjusted. Accordingly, when the second mixed signal output from the second local oscillator 48 is supplied to the second intermediate frequency filter 49, the second mixed signal is supplied due to its narrow pass band.
Data (signal) of any one OFDM segment in intermediate frequency signal or any three adjacent OFD segments
Only the signal component including the data (signal) of the M segment is selectively extracted, and the selected and extracted second intermediate frequency signal is output to the second
It is supplied to the intermediate frequency amplification stage 50. Second intermediate frequency amplification stage 1
“0” amplifies the second intermediate frequency signal to a predetermined level, and is output from the second intermediate frequency signal output terminal 52 to the utilization circuit.

As described above, the proposed broadcast receiving tuner selects and extracts a digital broadcast channel by interlocking control of the pass frequency band of the high frequency variable filter 41 and the first local oscillation signal frequency of the first local oscillator 44. Thereafter, by finely adjusting the frequency of the second local oscillation signal of the second local oscillator 48, data (signal) of one OFDM segment or data (signal) of three OFDM segments
, The data (signal) can be selectively extracted in a state where the influence of the adjacent analog broadcast electric field is minimized.

[0022]

The proposed broadcast receiving tuner can selectively extract data (signal) while minimizing the influence of an adjacent analog broadcast electric field. The selection and extraction of the digital broadcast channel by the adjustment mechanism 54 and the selection and extraction of the data (signal) of one or three OFDM segments by the frequency fine adjustment mechanism 55 must be performed together.

The present invention has been made in view of such technical background, and an object thereof is to provide a phase-locked loop (PLL) that can be commonly controlled when selecting a digital broadcast channel and selecting segment data. The present invention provides a broadcast receiving tuner that makes it possible to select them at once.

[0024]

In order to achieve the above object, a broadcast receiving tuner according to the present invention converts a received signal to a first signal.
A first local oscillator and a first frequency conversion stage for converting into an intermediate frequency signal, a first intermediate frequency signal tuning stage having a wide bandwidth connected to the first frequency conversion stage for selecting a channel, and a first intermediate frequency signal A second local oscillator and a second frequency conversion stage for converting to an intermediate frequency signal, and a narrow bandwidth second intermediate frequency signal tuning connected to the second frequency conversion stage for selecting some segments in one channel Stage and a phase locked loop for controlling a first local oscillation frequency of the first local oscillator and a second local oscillation frequency of the second local oscillator, the phase locked loop dividing at least the first local oscillation signal First
A frequency divider; a second frequency divider for dividing the second local oscillation signal; a first frequency comparator for comparing the frequency of the divided first local oscillation signal with the first reference frequency signal; A second frequency comparator for comparing the frequency of the divided second local oscillation signal and the second reference frequency signal, wherein the first frequency divider and the second frequency divider are a common divided signal divider The main configuration is such that the frequency division ratio is controlled by each frequency division signal supplied from.

According to this main configuration, the pass band width of the first intermediate frequency signal tuning stage is selected to be a wide band for channel selection, and the pass bandwidth of the second intermediate frequency signal tuning stage is set to a part of the channel. Since the segment is selected to have a narrow bandwidth that can be selected, and some of the segments are selected by fine adjustment of the second local oscillation frequency of the second local oscillator, the analog broadcast channel is included in some of the selected segments. Even if they are adjacent to each other, some segments can be effectively selected without being affected by the analog broadcasting electric field, and the frequency division of the first local oscillation signal and the second local oscillation signal is common in the phase locked loop. Since this is performed by the divided signal distributor, it is possible to select a channel and select some segments in the channel simply by supplying one channel selection signal to the divided signal distributor. It becomes ability.

In the above main configuration, the first frequency divider is a first program divider, the second frequency divider is a second program divider, and the divided signal divider is a first divider which is a divider control unit. It is preferable to have a configuration.

According to the first configuration, each configuration of the first frequency divider, the second frequency divider, and the divided signal distributor becomes relatively simple, and is also suitable for integration thereof. ing.

Further, the divider control section in the first configuration outputs a code for setting each division ratio of the first program divider and the second program divider based on the content of the tuning signal supplied from the outside. It is preferable to use the second configuration.

According to the second configuration, the setting of the frequency division ratios of the first program divider and the second program divider can be achieved by relatively simple means.

Further, in the second configuration, the code for setting the division ratio of the first program divider is 8 bits when receiving the VHF band, and 9 bits with the most significant bit 1 added when receiving the UHF band. It is preferable that the code for setting the frequency division ratio of the second program divider has a third configuration in which the code is always 9 bits.

According to the third configuration, an 8-bit or 9-bit code is used for channel selection, and a 9-bit code is used for segment selection.
Since bit codes are used, channel selection and segment selection can be performed effectively regardless of the frequency band.

In addition, in the above main configuration, the first reference frequency signal and the second reference frequency signal are obtained by dividing the output reference frequency of the external reference frequency oscillator by different division ratios. 4 is preferable.

According to the fourth configuration, the first reference frequency signal for controlling the frequency of the first local oscillation signal of the first local oscillator and the second reference frequency for controlling the frequency of the second local oscillation signal of the second local oscillator A signal can be obtained by dividing the output reference frequency of one external reference frequency oscillator at a different frequency division ratio, and the reference frequency oscillator can be shared.

In the fourth configuration, it is preferable that the output reference frequency of the external reference frequency oscillator is a fifth configuration selected as a multiple of 2 MHz.

According to the fifth configuration, when dividing the output reference frequency of the reference frequency oscillator to obtain the first reference frequency signal and the second reference frequency signal, both of the division ratios are integer ratios. And the setting of the frequency division ratio becomes easy.

Further, in the main configuration, the phase locked loop includes a first charge pump circuit for smoothing the first comparison signal output from the first frequency comparator, and a second comparison circuit output from the second frequency comparator. It is preferable to have a sixth configuration including a second charge pump circuit for smoothing a signal.

According to the sixth configuration, since the first charge pump circuit and the second charge pump circuit are provided, the voltage value of each frequency control signal can be stabilized.

[0038]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows a broadcast receiving tuner according to an embodiment of the present invention, and is a block diagram showing the configuration of a main part thereof.

As shown in FIG. 1, the broadcast receiving tuner according to this embodiment includes a high-frequency fixed tuning filter (R).
F FIL) 1 and high frequency amplification stage (RF AMP) 2
A high-frequency tunable filter (RF VFIL) 3;
A first frequency mixing stage (MIX1) 4, a first intermediate frequency filter (IF FIL1) 5, and a first intermediate frequency amplifying stage (I
F AMP1) 6 and the second frequency mixing stage (MIX2) 7
When a filter (3 segments FIL) 8 ₁ to select the three segments, the filter (1 segment FIL) 8 ₂ for selecting one segment, and the second intermediate-frequency amplifier stage (IF AMP2) 9, interlocked Operating changeover switches 10 ₁ and 10 ₂ and a phase locked loop (PLL) 11
, A first local oscillator (OSC1) 12, a second local oscillator (OSC2) 13, and a crystal controlled reference frequency oscillator (X
Tal) 14, a receiving antenna 15, and a signal output terminal 16.

In this case, the first intermediate frequency is 58 MHz, and the pass bandwidth of the first intermediate frequency filter 5 is 6 MHz, which is equal to the bandwidth of one channel. The second intermediate frequency is 8.12 MHz or 4.06 MHz, and 3
Pass bandwidth of the filter 8 ₁ to select the number of segments is about 1287KHz, the passband width of the filter 8 ₂ to select one of the segments is about 429KHz.

The high-frequency fixed tuning filter 1 has an input connected to the receiving antenna 15 and an output connected to the input of the high-frequency amplification stage 2. The high-frequency tunable filter 3 is
The input is connected to the output of the high frequency amplification stage 2, the output is connected to the first input of the first frequency mixing stage 4, and the control input is connected to the first output of the phase locked loop 11. The first frequency mixing stage 4
The second input is connected to the output of the first local oscillator 12, and the output is connected to the input of the first intermediate frequency filter 5, respectively. The first intermediate frequency amplification stage 6 has an input connected to the output of the first intermediate frequency filter 5 and an output connected to a first input of the second frequency mixing stage 7. The second frequency mixer stage 7, the second input is the output of the second local oscillator 13, the output is connected to the movable contact of the changeover switch 10 _1. Filter 8 ₁ to select the three segments has an input to one of the contact of the changeover switch 10 _1, the output is connected to one contact of the changeover switch 10 _2. Filter 8 ₂ to select one of the segments, the input and the other contact of the changeover switch 10 _1,
Output is connected to the other contact of the changeover switch 10 _2. The second intermediate frequency amplifier stage 9, the input is movable contact of the changeover switch 10 _2, the output is connected to the signal output terminal 16. The phase-locked loop 11 has a first input
The control output of the local oscillator 12, the second input to the control output of the second local oscillator 13, the first output to the input of the first local oscillator 12, the second output to the input of the second local oscillator 13, the reference frequency The inputs are respectively connected to crystal controlled reference frequency oscillators 14. A gain control signal (AGC) for controlling the gain is input to the high frequency amplification stage 2, and a tuning signal (I ² C control signal) for controlling the phase locked loop 11 is input to the phase locked loop 11. You.

The broadcast receiving tuner according to this embodiment having the above-described configuration operates roughly as follows.

When a tuning signal is generated by operating an external device, for example, a keyboard, and the tuning signal is supplied to the phase locked loop 11 as an I ² C control signal, the phase locked loop 11 obtains a first output. The first local oscillator signal frequency of the first local oscillator 12 is selected according to the control signal to be received, and the pass frequency band of the high-frequency tunable filter 3 is selected so that one channel, for example, a 5-channel digital broadcast signal is received. At the same time, the second local oscillation signal frequency of the second local oscillator 13 is selected to set three segments in the channel 5, for example, segments 5, 6, and 7 to the selected state. Note that this time, the movable contact of the changeover switch 10 _1, 10 ₂ are switched to the solid line position of the figure, the filter ₈₁ for selecting the three segments are inserted and connected. In such a state, the digital broadcast signal of channel 5 is received by receiving antenna 1
5, the received signal is filtered by a high-frequency fixed tuning filter 1 to remove unnecessary frequency components, amplified to a predetermined level by a high-frequency amplifier stage 2, and
Only the digital signal in the frequency band of the channel 5 is selectively extracted and supplied to the first frequency mixing stage 4.

The first frequency mixing stage 4 receives the supplied digital signal and the first local oscillation signal supplied from the first local oscillator 12 (the frequency of the first local oscillation signal is changed to a state in which the channel 5 digital signal is received). ), And outputs a first mixed signal to be a first intermediate frequency signal, which is supplied to a subsequent first intermediate frequency filter 5. The first intermediate frequency filter 5 selectively extracts a first intermediate frequency signal having a bandwidth of one channel corresponding to a predetermined first intermediate frequency from the supplied first mixed signal. The selectively extracted first intermediate frequency signal is selectively amplified and supplied to the second frequency mixing stage 7.

The second frequency mixing stage 7 supplies the supplied first intermediate frequency signal and the second local oscillation signal supplied from the second local oscillator 13 (the frequency of the second local oscillation signal is 3 mixing frequency and in which) are frequency controlled ready to select the segments, the second mixed signal serving as the second intermediate frequency signal output, supplied to the filter ₈₁ for selecting the succeeding three segments I do. Filter 8 ₁ to select the three segments, OFDM segment data having a bandwidth of three segments corresponding to a predetermined second intermediate frequency in the supplied second mixed signal (second intermediate frequency signal) The second intermediate frequency amplifying stage 9 selectively amplifies the selectively extracted OFDM segment data (second intermediate frequency signal) and supplies it to a utilization circuit (not shown) through a signal output terminal 16.

In this case, the second local oscillation signal frequency of the second local oscillator 13 may be selected to set one segment in the channel 5, for example, the selected state of the segment 5. In this case, the changeover switches 10 ₁ , 1
0 Each movable contact ₂ is switched to the dotted line position of FIG, 1
Filter 8 ₂ is inserted and connected for selecting the segments.

Next, FIG. 2 is a block diagram showing an example of a specific configuration of the phase locked loop 11 shown in FIG.

In FIG. 2, the same components as those shown in FIG. 1 are denoted by the same reference numerals.

As shown in FIG. 2, the phase locked loop (PLL) 11 includes a first prescaler / program divider (PS & PDV1) 11 ₁ , a second prescaler / program divider (PS & PDV2) 11 ₂ ,
Frequency comparator and (COMP1) 11 _3, a second frequency comparator (COMP2) 11 _4, a first low-pass filter and a charge pump circuit (LPF & CP1) 11 _5, a second low-pass filter and a charge pump circuit (LPF & CP
2) 11 ₆ and divider controller (DV CONT) 11
₇ and control signal interface (I ² C I / F) 1
₁₈ , bit adder 11 ₉ , 1/4 frequency divider 11
_10, a 1/14-frequency divider 11 _11, a first local oscillation signal input terminal 11 _12, a second local oscillation signal input terminal 11 _13, a first frequency control signal output terminal 11 _14, a second frequency control a signal output terminal 11 _15, the reference frequency signal input terminal 11 _16, and a channel selection signal input terminal 11 _17, the bit signal input terminal 11 _18.

Then, the first prescaler / program data
Vida 11₁The input is the first local oscillation signal input terminal 11₁₂
And the control input is the divider controller 11₇Output to the first output
The force is the first frequency comparator 11_ThreeConnected to the first input of
Is done. Second prescaler and program divider 11_Two
The input is the second local oscillation signal input terminal 11₁₃And control input
Is a bit adder 11₉Output is compared to the second frequency
Table 11_FourAre respectively connected to the first inputs of. 1st frequency
Comparator 11_ThreeThe second input is a 1/4 frequency divider 11 _TenOutput
And the output is the first low-pass filter and charge pump circuit
11_FiveConnected to the inputs of Second frequency comparator
11_FourMeans that the second input is a 1/14 frequency divider 11₁₁To the output of
The output is the second low-pass filter and charge pump circuit 11
₆Connected to the inputs of 1st low pass filter
Charge pump circuit 11_FiveIs the first local oscillation signal
Output terminal 11₁₄Connected to the second low-pass filter and channel
Page pump circuit 11₆Is the second local oscillation signal output terminal
11_FifteenConnected to. Divider controller 11₇Is the input
Control signal interface 11₈And the second output is a bit
Adder 11₉Are respectively connected to the first inputs of. Control signal
No. interface 11₈Is the channel selection signal input terminal 11
₁₇And the bit adder 11₉Indicates that the second input is a bit
Signal input terminal 11₁₈Connected to. 1/4 frequency divider 11
_TenIndicates that the input is the reference frequency signal input terminal 11₁₆And the output is 1
/ 14 frequency divider 11₁₁Connected to the inputs of

In this case, the first local oscillation signal input terminal 11 ₁₂
Is connected to the control output of the first local oscillator 12, and the second local oscillation signal input terminal 11 ₁₃ is connected to the control output of the second local oscillator 13. The first frequency control signal output terminal 11 ₁₄
The second frequency control signal output terminal 11 ₁₅ is connected to the control input of the local oscillator 12 and the control input of the second local oscillator 13. The reference frequency signal input terminal 11 ₁₆ is connected to the output of the crystal controlled reference frequency oscillator 14 and
₁₁₇ is connected to an input operation device (not shown) such as a keyboard. The bit signal input terminal ₁₁₁₈ is connected to a 1-bit generator (not shown).

[0053] Next, FIG. 3 is an explanatory view showing a list of codes at the time of channel selection output from the divider controller 11 ₇ illustrated in FIG.

In FIG. 3, the chart on the right is a code for selecting each channel in the VHF band, and the chart on the left is U
This code is used to select each channel in the HF band.

In each figure, the first column (leftmost column)
Is the selected channel, the second column is the center frequency in MHz,
The third column is a magnification of the center frequency with respect to the step frequency of 2 MHz, and the fourth column (the rightmost column) is a binary code representing the magnification. For example, when the selected channel is four channels (4ch) in the VHF band, the center frequency (FRE)
Q) is 230 MHz, the center frequency 230 MHz is 115 times the step frequency 2 MHz, and the magnification 115 is represented by a binary code 1110011. Similarly, the selected channel is 13 channels of the UHF band (1
3ch), the center frequency (FREQ) is 2
It is 65 MHz, the center frequency 265 MHz is 265 times the step frequency 2 MHz, and the magnification 265 is represented by the binary code 1000001001.

The operation of the phase locked loop 11 having the above configuration will be described with reference to FIG.

[0057] When the first local oscillation signal from first local oscillator 12 to the first local oscillation signal input terminal 11 _12, first
Local oscillation signal is divided in a first prescaler and program divider 11 _1, the first local oscillation signal frequency division is supplied to the first input of a first frequency comparator 11 _3.
On the other hand, when the reference frequency signal from a crystal controlled reference frequency oscillator 14 to the reference frequency signal input terminal 11 ₁₆ is supplied, the reference frequency signal is divided by 1/2-frequency divider 11 _10, it is divided reference frequency signal is supplied to the second input of the first frequency comparator 11 _3. First frequency comparator 11 _3, the divided and a first local oscillation signal and the divided reference frequency signal to the frequency comparison, a first comparison signal representative of their frequency difference first low-pass filter and a charge pump Circuit 11 ₅
To supply. The first low-pass filter and a charge pump circuit 11 _5, a first comparison signal to form a first frequency control signal is smoothed, the first local oscillator to the first frequency control signal through a first frequency control signal output terminal 11 ₁₄ 12 to control the oscillation frequency of the first local oscillator 12.

Similarly, the second local oscillator 13 outputs the second
When the second local oscillation signal to the local oscillation signal input terminal 11 ₁₃ is supplied, the second local oscillation signal is divided in a second prescaler and program divider 11 _2, the second local oscillation signal frequency division is first It is supplied to the first input of the second frequency comparator 11 _4. Also at this time, the crystal controlled reference frequency oscillator 1
4 the reference frequency signal to the reference frequency signal input terminal 11 ₁₆ is supplied from the reference frequency signal, 1/4 frequency divider 1
Are each division at 1 ₁₀ and 1/14 frequency divider 11 _11, the divided reference frequency signal is supplied to the second input of the second frequency comparator 11 _4. Second frequency comparator 11 ₄ divided down and a second local oscillation signal and the divided reference frequency signal to the frequency comparison, a second comparison signal representative thereof frequency difference second low-pass filter and a charge pump Circuit 11 ₆
To supply. The second low-pass filter and charge pump circuit 11 _6, the second comparison signal to form a smooth and a second frequency control signal, the second local oscillator the second frequency control signal through a second frequency control signal output terminal 11 ₁₅ 13 to control the oscillation frequency of the second local oscillator 13.

[0059] In this phase-locked loop 11, a first frequency dividing ratio of the prescaler and the program divider 11 _1, 8-bit code output from the divider controller 11 ₇ (V
HF band broadcast signal reception) or 9-bit code (U
Set by the reception time) of the broadcast signal of the HF band, the frequency division ratio of the second prescaler and program divider 11 ₂ are set by the 9-bit code output from the bit adder 11 _9. In this case, to set the frequency division ratio and a second prescaler and program division ratio of divider 11 ₂ of the first prescaler and program divider 11 _1, first,
Operated in the order which is predetermined manipulation device such as a keyboard, and supplies the control signal interface 11 ₈ through desired to select a channel to form a channel selection signal, selects the signal the formed channel selection signal input terminal 11 ₁₇ . Channel selection signal, after being interfaced by the control signal interface 11 _8, is supplied to the divider controller 11 _7, to form the 8-bit code or 9-bit code corresponding to the channel selection signal.

In this case, if the channel selection signal selects any channel in the VHF band, the divider controller 1
₁₇ outputs an 8-bit code corresponding to the channel shown in the table on the left side of FIG. 3 to the first output, and outputs an 8-bit code corresponding to the segment to be selected to the second output. Then, 8-bit code outputted from the first output is supplied to the first prescaler and program divider 11 _1, first prescaler and program divider 11 ₁
Is set so as to be a frequency division ratio suitable for the VHF channel to be selected. Also, 8-bit code outputted from the second output is supplied to a bit adder 11 _9, where the supplied 8-bit code to a bit signal input terminal 11
_The 1-bit code supplied from ₁₈ is added to form a 9-bit code. Then, this 9-bit code is
Is supplied to the prescaler and the program divider 11 _2,
A second frequency dividing ratio of the prescaler and the program divider 11 ₂ is set to be a frequency division ratio commensurate with the segments selected.

On the other hand, if the channel selection signal selects any channel in the UHF band, the divider controller 11 ₇
Outputs a 9-bit code corresponding to the channel shown in the table on the right side of FIG. 3 to the first output, and outputs an 8-bit code corresponding to the selected segment to the second output. In this case, 9-bit code output from the divider controller 11 ₇ are those formed by adding the most significant bits 1 to 8-bit code. The 9-bit code outputted from the first output is supplied to the first prescaler and program divider 11 _1, the frequency division ratio of the first frequency dividing ratio of the prescaler and the program divider 11 _1, commensurate with the UHF channels to choose Set to be. Also,
8-bit code outputted from the second output is supplied to a bit adder 11 _9, where 1-bit code supplied to the supplied 8-bit code from the bit signal input terminal 11 ₁₈ adds a 9-bit code Form. Thereafter, the 9-bit code is supplied to a second prescaler and program divider 11 _2, the second division ratio of the prescaler and the program divider 11 ₂ is set to be a frequency division ratio commensurate with the segments selected.

[0062] In this phase-locked loop 11, the reference frequency signal supplied to the first frequency comparator 11 ₃ and the second frequency comparator 11 ₄ includes a crystal controlled reference frequency oscillator 14
Divides the 8 MHz reference frequency signal by different frequency division ratios, ４ and 1/56 = (１ ／) × (1/14)
The first local oscillator 12
2M by dividing the frequency of 8 MHz by 1/4
And the second local oscillator 13 divides 8 MHz by 1/56 to obtain a step frequency of 14 MHz.
The step frequency becomes 2.857 KHz. The oscillation frequency of the crystal controlled reference frequency oscillator 14 is not limited to 8 MHz, but may be set to a multiple of 2 MHz, for example, 4 MHz. When the oscillation frequency of the crystal controlled reference frequency oscillator 14 is set to 4 MHz instead of 8 MHz, the frequency divider 1
It is necessary to change each of the frequency division ratios of 1 ₁₀ and 11 ₁₁ to match the set frequency. When the oscillation frequency is changed from 8 MHz to 4 MHz, the 1/4 frequency divider 11 ₁₀
May be changed to a 1/2 frequency divider.

[0063]

As described above, according to the present invention, the pass band width of the first intermediate frequency signal tuning stage is selected to be a wide band capable of channel selection, and the pass bandwidth of the second intermediate frequency signal tuning stage is selected. Since a small bandwidth is selected so that some segments in the channel can be selected, and selection of some segments is performed by fine-tuning the second local oscillation frequency of the second local oscillator, some of the selected segments are selected. Even when an analog broadcast channel is adjacent to a segment, there is an effect that some segments can be effectively selected without being affected by the analog broadcast electric field. In the phase locked loop, the first local oscillation signal Since each frequency division of the second local oscillation signal is performed by a common frequency division signal divider, one division is applied to the frequency division signal divider.
Only by supplying one tuning signal, there is an effect that it is possible to select a channel and select some segments in the channel.

According to the present invention, the code for setting the frequency division ratio of the first program divider is 8 bits when receiving the VHF band and 9 bits with the most significant bit 1 added when receiving the UHF band. Since the code for setting the division ratio of the two-program divider is always 9 bits, an 8-bit or 9-bit code can be used for channel selection, and a 9-bit code can be used for segment selection. Channel selection and segment selection can be performed effectively without the need.

Further, according to the present invention, a first reference frequency signal for controlling the frequency of the first local oscillation signal of the first local oscillator and a second reference frequency signal for controlling the frequency of the second local oscillation signal of the second local oscillator Can be obtained by dividing the output reference frequency of one external reference frequency oscillator with a different frequency division ratio, and the reference frequency oscillator can be shared, and the output reference frequency of the external reference frequency oscillator is set to 2 MHz. If the frequency is selected as a multiple of the reference frequency oscillator, when the output reference frequency of the reference frequency oscillator is frequency-divided to obtain the first reference frequency signal and the second reference frequency signal, both of the frequency division ratios become integer ratios, There is an effect that the setting of is easy.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a broadcast receiving tuner according to the present invention and showing a main configuration thereof.

FIG. 2 is a block diagram showing an example of a specific configuration of a phase locked loop shown in FIG.

FIG. 3 is an explanatory diagram showing a list of codes at the time of channel selection output from the divider controller shown in FIG. 2;

FIG. 4 is a block diagram showing an example of a main configuration of a broadcast receiving tuner capable of receiving a digital broadcast that has already been proposed in an analog-digital mixed system.

FIG. 5 is a block diagram showing an example of a main configuration of a broadcast receiving tuner proposed by the present applicant.

FIG. 6 is a characteristic diagram showing an example of a frequency arrangement in an analog-digital mixed system.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 high-frequency fixed tuning filter (RF FIL) 2 high-frequency amplification stage (RF AMP) 3 high-frequency variable tuning filter (RF VFIL) 4 first frequency mixing stage (MIX1) 5 first intermediate frequency filter (IF FIL1) 6 first intermediate frequency Amplification stage (IF AMP1) 7 Second frequency mixing stage (MIX2) 8 ₁ Filter for selecting 3 segments (3 segment FIL) 8 ₂ Filter for selecting 1 segment (1 segment FIL) 9 2nd intermediate frequency Amplification stage (IF AMP2) 10 ₁ , 10 ₂ selector switch 11 Phase locked loop (PLL) 11 ₁ First prescaler and program divider (PS)
& PDV1) 11 ₂ Second prescaler and program divider (PS
& PDV2) 11 ₃ First frequency comparator (COMP1) 11 ₄ Second frequency comparator (COMP2) 11 ₅ First low-pass filter and charge pump circuit (LPF & CP1) 11 ₆ Second low-pass filter and charge pump circuit (LPF & CP2) 11 ₇ Divider controller (DV CONT) 11 ₈ Control signal interface (I ² C I / F) 11 _9- bit adder 11 ₁₀ 1/2 divider 11 ₁₁ 1/14 divider 11 ₁₂ First local oscillation signal input terminal 11 ₁₃ Second local oscillation signal input terminal 11 ₁₄ First frequency control signal output terminal 11 ₁₅ Second frequency control signal output terminal 11 ₁₆ Reference frequency signal input terminal 11 ₁₇ Channel selection signal input terminal 11 _18- bit signal input terminal 12 First Local oscillator (OSC1) 13 Second local oscillator (OSC2) 14 Crystal controlled reference frequency oscillator (X Tal) 15 Receiving antenna 16 signal output terminal

Continued on the front page F term (reference) 5C025 AA15 AA18 AA23 AA25 BA03 DA01 5K020 AA02 BB09 DD11 EE01 EE04 GG01 KK01

Claims (7)

[Claims] A first local oscillator and a first frequency conversion stage for converting a received signal into a first intermediate frequency signal, and a first intermediate frequency signal having a wide bandwidth connected to the first frequency conversion stage for selecting a channel. A tuning stage and a second intermediate frequency signal
A second local oscillator and a second frequency conversion stage for converting to an intermediate frequency signal; and a narrow bandwidth second intermediate frequency signal connected to the second frequency conversion stage for selecting some segments in the one channel. A tuning stage and the first local oscillator
A phase locked loop for controlling a local oscillation frequency and a second local oscillation frequency of the second local oscillator, wherein the phase locked loop comprises at least a first frequency divider for dividing the first local oscillation signal; A second frequency divider for dividing the second local oscillation signal, a first frequency comparator for comparing the frequency of the divided first local oscillation signal and the first reference frequency signal, and a second frequency divider for dividing the frequency. A second frequency comparator for comparing the frequency of the local oscillation signal with a second reference frequency signal, wherein the first frequency divider and the second frequency divider are supplied from a common divided signal divider A broadcast receiving tuner, wherein a frequency division ratio is controlled by each divided signal to be transmitted. 2. The frequency divider according to claim 1, wherein the first frequency divider is a first program divider, the second frequency divider is a second program divider, and the divided signal divider is a divider control unit. The broadcast receiving tuner according to claim 1, wherein 3. The divider control unit outputs a code for setting each division ratio of the first program divider and the second program divider based on the content of a tuning signal supplied from the outside. The broadcast receiving tuner according to claim 2, wherein 4. A code for setting a frequency division ratio of the first program divider is 8 bits when receiving a VHF band.
4. The broadcast receiving tuner according to claim 3, wherein the code for setting the frequency division ratio of the second program divider is always 9 bits, with 9 bits to which the most significant bit 1 is added when receiving the F band. . 5. The apparatus according to claim 1, wherein the first reference frequency signal and the second reference frequency signal are obtained by dividing an output reference frequency of an external reference frequency oscillator by different division ratios. 2. The broadcast receiving tuner according to 1. 6. The broadcast receiving tuner according to claim 5, wherein an output reference frequency of the external reference frequency oscillator is selected to be a multiple of 2 MHz. 7. The phase locked loop includes a first charge pump circuit for smoothing a first comparison signal output from the first frequency comparator, and a second comparison signal output from the second frequency comparator. The broadcast receiving tuner according to claim 1, further comprising a second charge pump circuit for smoothing.