JP2002076777A - Analog frequency divider and transceiver using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an analog microwave frequency divider with stable and easy-to-design structure suitable for use as a local oscillator in a microwave band, being configured with circuits for obtaining frequency-divided wave with out using a multiplier. SOLUTION: A feedback loop FL1 is provided between an input 1 and an output 2 of the analog frequency divider. At least two mixers 13, 14 are serially incorporated in the feedback loop FL1. By establishing a pass band using band- pass filters 9A, 9B, 9C and 10 so as to satisfy an appropriate frequency dividing rate for each purpose, the frequency-divided wave having an arbitrary frequency dividing rate can be obtained. Because two mixers are incorporated, the operating frequency of each mixer 13, 14 can be maintained constant, thus enabling easy design. In addition, because amplifiers 4, 8 are connected directly sandwiched by mixers 13, 14, mutual influence occurring between the amplifies 4, 8 is reduced. Thus setting each amplification ratio becomes easy, bringing about easy designing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microwave analog frequency divider which can be used for a local oscillator in a microwave band, and a transmitting / receiving apparatus having the same.

[0002]

2. Description of the Related Art Generally, in a microwave local oscillator, an analog frequency divider for microwave is used to stabilize a local oscillation frequency.

FIG. 6 shows a block diagram of a general microwave analog frequency divider.

In this analog frequency divider, a mixer (frequency mixer) 103, an amplifier 104, and a band-pass filter 105 are connected in series between an input terminal 101 and an output terminal 102, and the output side of the amplifier 104 and the mixer 103 Between (N
-1) The multiplier 108 is connected.

[0005] In the analog frequency divider of the circuit arrangement, the output of the amplifier 104 to the mixer 103 (N-1) by feeding back the frequency doubled, frequency f _in of the input signal F _in (1 /
N) A harmonic has been obtained.

Here, the input frequency is f _in , the output frequency is f _out , the frequency of the input signal to the mixer 103 is RF, the frequency of the signal output from the mixer 103 is IF, and the The operation of this analog frequency divider will be described with the frequency of the input signal as L0.

First, when a signal of frequency RF is input to mixer 103, a signal of frequency IF is output from mixer 103. The signal of this frequency IF is supplied to the amplifier 1
Amplified at 04 to form a feedback circuit (N (N is an integer) -1)
The signal is input to the multiplier 108. This (N-1) multiplier 108
Outputs a signal of frequency L0. This frequency L0 is
It becomes (N-1) times the frequency IF. That is,
(1) is established.

L 0 = (N−1) IF (1) The signal of this frequency L 0 is output from the (N−1) multiplier 108.
The signal is input to the mixer 103, mixed with the signal of the frequency RF, and the signal of the frequency IF is output. This frequency IF
Is the value obtained by subtracting the frequency L0 from the frequency RF (RF-L
0). That is, the following equation (2) holds.

IF = RF−L0 (2) From the two equations (1) and (2), when L0 is eliminated and rearranged, IF = RF / N (3). Here, since RF = f _in and IF = f _out , f _out = f _in / N (4) The equation (4) indicates that the output frequency f _out is 1 / N (N is an integer) of the input frequency f _in .

As described above, in the structure of a general frequency divider,
An (N-1) multiplier is used for the feedback path. Since this multiplier handles a harmonic such as a doubled wave, it must be operated in a non-linear region. Therefore, the efficiency is lower than when an amplifier is used.

In addition, in the above-mentioned conventional structure, when a signal is input, some frequency components are mixed and gradually become (1/1 /
N) The level of the harmonic increases. Then, in the (1 / N) f _in, the operation of the circuit is similar to the oscillation. In other words, at the time of rising, there are some frequency components for a while,
A multiplier that needs to handle those frequency components requires a wide frequency band.

As a result, there is a problem that the rise of the divided frequency is easily affected by the efficiency of the frequency multiplier.

Therefore, the above problem does not exist in a 1/2 frequency divider that does not require a multiplier, but it is difficult to make a circuit such as a 1/3 frequency divider that requires a frequency multiplier of 2 or more. There was a problem.

On the other hand, according to the technique disclosed in Japanese Patent Application Laid-Open No. 62-207010, the above problem is solved by using the circuit shown in FIG.

That is, in the frequency divider shown in FIG. 7, the output b of the mixer 203 is divided into two, and the amplifiers 206 and 2
After being amplified at 07, one of the signals passes through the band-pass filter 210 so that only the component of the predetermined frequency band A is passed. The other signal passes through a band-pass filter (or low-pass filter) 209, so that only a component of another frequency band B is passed.

Thereafter, the component of the frequency band A and the component of the frequency band B are combined again, amplified by the amplifier 204, and then applied to the IF terminal C of the mixer 203. Thus, a frequency-divided output of the frequency band B is obtained through the buffer amplifier 8.

[0017] In this case, the frequency band A is, (1-1 / N) f _in
, And the frequency band B is a f _in / N. In the configuration of the frequency divider shown in FIG. 7, a frequency divider is not used, and an arbitrary frequency division can be obtained by adjusting the filters 209 and 210.

[0018]

By the way, in the conventional analog frequency divider as shown in FIG.
This is a structure in which only one mixer 203 is incorporated in one.

For this reason, an input wave is input to the RF input a of the mixer 203, a feedback wave is input to the LO input c, and the mixer 203 mixes the input wave and the feedback wave to generate a signal including a divided frequency. Output. The divided frequency is adjusted by the amplifier 20 in the subsequent stage.
After being amplified by 6,207, the filters 209,21
At 0, each signal is extracted and appropriately split into two routes, one to the output 202 and one to the feedback loop 211.

Therefore, the amplifiers 206 and 2 in the latter stage are used.
When adjusting the amplification factor of 07, when the input signal F _in is not applied, if the oscillation extent low amplification factor does not occur, and the input signal F _in it is applied, amplified to the extent that begins to occur the oscillation operation It is necessary to select an appropriate value for the amplification rate so as to increase the rate.

However, by design, such a delicate amplification factor
Setting was difficult. In addition, in the conventional frequency divider,
Amplifiers 206 and 20 in front of filters 209 and 210
7 and the amplifier 204, respectively.
f_in, f_in/ N, (1-1 / N) f _inAdjust the amplification factor for
And it is very difficult to balance the three amplification factors.
And the design is difficult.

Further, in the above conventional art, in the structure on one mixer 203, you do not have to deal with two frequencies _{f in / N, f in (} 1-1 / N), the mixer 203, each input It is necessary to provide a circuit for preventing signals to the output terminals a, b, and c from being transmitted to the other terminals, which makes the design difficult.

SUMMARY OF THE INVENTION An object of the present invention is to provide a circuit capable of obtaining an arbitrary frequency division without using a multiplier, having a stable and easy-to-design structure, and being suitable for use in a microwave band local oscillator. Provide a container.

[0024]

In order to achieve the above object, an analog divider according to the present invention is provided with a feedback loop between an input and an output, in which at least two frequency mixers are connected in series. It is characterized by being incorporated.

According to the present invention, since at least two frequency mixers are incorporated in series in the feedback loop, a predetermined operating frequency can be assigned to each frequency mixer, and setting of the frequency mixer is facilitated. . This also simplifies the setting of the amplification factor of the amplifier connected to the output side of each frequency mixer.

In one embodiment of the analog frequency divider,
In the analog frequency divider, an input signal is input to two frequency mixers.

In this embodiment, since an input signal is input to two frequency mixers, the two frequency mixers
A signal having a stable input frequency can always be input, and the frequency can be easily adjusted.

In another embodiment, the analog frequency divider is
In the analog frequency divider, an input signal is input only to a first frequency mixer in the feedback loop, a signal having the same frequency as the input signal is taken out from an output of the first frequency mixer, and a second This is a configuration for inputting to a frequency mixer.

In this embodiment, an input signal is input to only the first frequency mixer, a signal having the same frequency as the input signal is extracted from the output of the first frequency mixer, and input to the second frequency mixer. . Therefore, a loop including the first and second frequency mixers is not formed between the feedback loop and the input terminal, and there is an advantage that unnecessary oscillation hardly occurs and circuit design becomes easy.

In one embodiment, the analog frequency divider inputs an input signal of an input frequency to an input terminal of a first frequency mixer, and outputs an amplified signal from an output terminal of the first frequency mixer. From the input signal, N (N is an integer) of the above input frequency
The signal of the one-half frequency is taken out, inputted to the input terminal of the second frequency mixer, and the other of the second frequency mixer is inputted.
By inputting an input signal of the input frequency to two input terminals, a signal of a frequency obtained by subtracting 1 / N of the input frequency from the input frequency is output from the second frequency mixer, A signal output from the second frequency mixer is input to another input terminal of the first frequency mixer, and a signal having a frequency 1 / N of the input frequency is mixed with the first frequency mixer. Remove from container.

In this embodiment, a feedback loop including the first frequency mixer and the second frequency mixer has
It is possible to obtain a signal of the 1 / N frequency whose level is increased. In addition, a predetermined operating frequency can be assigned to each frequency mixer, which facilitates setting of the frequency mixer.

In another embodiment, the analog frequency divider comprises:
In the analog frequency divider, the frequency mixer and the amplifier connected to the output side of the frequency mixer are constituted by one nonlinear amplifier.

In this embodiment, the frequency mixer and the amplifier connected to the output side of the frequency mixer are constituted by one nonlinear amplifier, so that the circuit configuration can be simplified.

The transmitting / receiving apparatus according to one embodiment includes at least one analog divider.

According to the transmitting / receiving apparatus of this embodiment, since at least one analog frequency divider is provided,
A transmission / reception device in which setting of the amplification factor of the amplifier in the frequency divider is easy and setting of the mixer is easy can be realized.

[0036]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail based on the illustrated embodiments.

[First Embodiment] FIG. 1 shows the configuration of an analog frequency divider according to a first embodiment of the present invention. This first
In the embodiment, a demultiplexing circuit 33 is connected to the signal input terminal 1, and the first input terminal 13A of the first mixer 13 and the first input terminal 14A of the second mixer 14 are connected to the demultiplexing circuit 33.

An amplifier 4 is connected to an output terminal 13C of the first mixer 13, and a band-pass filter 9 is connected to the amplifier 4.
A is connected. A first output terminal 2a is connected to the output side of the bandpass filter 9A. On the other hand, a band-pass filter 9C is connected to a connection line between the amplifier 4 and the filter 9A, and the band-pass filter 9C is connected to a second input terminal 14B of the second mixer 14.

The output terminal 14C of the second mixer 14 is connected to the amplifier 8, and the amplifier 8 is connected to the second output terminal 2b via the band pass filter 9B. A band-pass filter 10 is connected to a connection line between the amplifier 8 and the band-pass filter 9 B. The band-pass filter 10 is connected to a second input terminal 13 of the first mixer 13.
B.

In the frequency divider having the above circuit configuration, as shown in FIG. 1, a first mixer 13, an amplifier 4, a filter 9C, a second mixer 14, an amplifier 8, a filter 9B and a filter 10 constitute a feedback loop FL1. ing.

In this frequency divider, an input from an oscillator (not shown) is provided.
The frequency f_inInput signal F_inIs entered and the minute
In the wave circuit 33, the first mixer 13 and the second mixer 14
And split into two. Then, in the feedback loop FL1,
Due to noise and transients in the feedback loop FL1
And the frequency f_in(1-1 / N) signal component F_in(1-1 /
N) occurs. Here, N is an integer. This frequency
f_in(1-1 / N) signal component F_in(1-1 / N) and above input
Signal F_inIs input to the first mixer 13 and mixed
As a result, the frequency f_in/ N signal F_in/
N and frequency f _in(1-1 / N) signal F_in(1-1 / N)
obtain.

The signal F _in / N and the signal F
The _in (1-1 / N), is amplified by the amplifier 4, the pass band is input to the band-pass filter 9A is a (f _in / N), the output component of the frequency f _in / N from the output terminal 2a The signal is taken _out as a signal Fout.

At the same time, from the band-pass filter 9C,
Component of the frequency f _in / N is obtained by the feedback of the component of the frequency f _in / N, the second mixer 14, the input signal F _in
Mix with. Thus, the signal and the signal of (f _in / N) of the frequency _{f in (1 ± 1 / N} ) is outputted from the output terminal 14C. Those signals, amplified by the amplifier 8, the band-pass filter 10 passband is f _in (1-1 / N), the frequency f _in (1-1 / N) of the signal F _in (1-1 / Take out N).

[0044] The signal F _in (1-1 / N) is input again to the input 13B of the mixer 13, the mixer 13, is mixed again with the input signal F _in. Then, the above operation is repeated.

According to the first embodiment, the frequency (f _in / f) whose level is raised by the feedback loop FL1 is increased.
Signal N) F _in / N (i.e., it is possible to take out the 1 / N-harmonic) from the first output terminal 2a.

[0046] In this first embodiment, the input signal F _in the frequency f _in has a chance to launch a subharmonic operate this circuit. Further, when there is no input of the input signal F _in the loop gain of the feedback loop FL1 is set to be 1 or less, oscillation does not start. Further, by setting the passbands of the bandpass filters 9A, 9B, and 9C in accordance with the respective frequency division ratios, a frequency division having an arbitrary frequency division ratio can be obtained.

According to the frequency divider of the first embodiment, unlike the prior art, the first and second feedback loops are provided in the feedback loop FL1.
Since the two mixers 13 and 14 are incorporated, the operating frequency of each mixer 13 and 14 can be made constant,
Design becomes easier. That is, in this embodiment, the first
Mixer 13, the input signal F _in the feedback signal F _in (1-1 /
N) and may be mixed, second mixer 14, may be mixed with the input signal F _in the feedback signal F _in / N.

According to the frequency divider of the first embodiment, unlike the prior art, the amplifiers 4 and 8 are directly connected to the mixers 13 and 14, respectively. The effects of the amplifiers 4 and 8 on each other are reduced,
It becomes easy to set the value of the amplification factor of each of the amplifiers 4 and 8. Therefore, according to this embodiment, appropriate design becomes easier as compared with the related art.

According to this embodiment, the input signal F
Since the _in taking the structure to be input to each mixer 13, the signal F _in the input frequency f _in is input to the mixer 13, 14 is stabilized, it is easy to adjust the frequency.

In the above description, the first output terminal 2a
Output signal F_outThe case where (a) is taken out has been described.
A similar output signal is output from the output terminal 2b in addition to the output terminal 2a.
No. F _out(b) can be taken out. That is, the second
In the mixer 14, the RF signal to the first input terminal 14A
(Input signal F_in) Is also output to the IF side (output terminal 14C).
In this case, the output of the amplifier 8 is F_in, (F_in
± F_in/ N) is output. Therefore,
Signal F_in, (F_in± F_in/ N) with the bandpass filter 9B
To extract the 1 / N frequency from the output terminal 2b.

The band pass filters 9A, 9B,
9C and 10 are composed of, for example, the circuit shown in FIG. In this circuit, a transmission line 832B that operates as an inductance and a capacitor 831B are connected in series between an input terminal 801 and an output terminal 802. A transmission line 832A and a capacitor 831A are connected in parallel to a connection line between the transmission line 832B and the input terminal 801. The transmission line 832A and the capacitor 831A are connected to the ground. Further, the capacitor 831
A transmission line 832C and a capacitor 831C are connected in parallel to a connection line between B and the output terminal 802, and are connected to the ground. This filter circuit is a filter using the resonance frequency of the transmission line and the capacitor. On the other hand, the circuit shown in FIG. 8B is a filter circuit 840 composed of microstrip lines 835A, 835B, 835C, 835D, and each of the lines 835A to 835D.
The frequency, power loss, etc. are determined by the degree of coupling based on the length of D and the distance between the lines.

The demultiplexing circuit 33 splits the signal applied to the input terminal into two, and
For example, as shown in FIG. 10, a Wilkinson duplexer formed by microstrip lines 532A and 532B can be employed. In the circuit of FIG. 10, the input power applied to the input terminal 501 is 2
The two output terminals 502A and 502B are branched at the same phase and power. Incidentally, the line 532A of the circuit, the impedance Z ₀ of 532B, since generally 50Ω system is being used in a microwave band or a millimeter wave band, the value of the resistor 535 is set to 100 [Omega.

As the first and second mixers 13 and 14, for example, anti-parallel diode mixers shown in FIG. 11 can be used. In FIG. 11, the frequencies of the signal L0 and the signal RF input from the input terminals 701A and 701B are the same as those of the diode 734 which is a non-linear element.
A, 734B, and a low-pass filter 712 outputs a signal IF having a frequency of (frequency of signal L0) − (frequency of signal RF) to the output terminal 702 from the mixed signal. In addition, the wavelength λ
Since the open stub 732B and the short stub 732A set to １ of the length are loaded, the signal L0 and the signal RF do not leak to the RF input terminal 701B and the L0 input terminal 701A, respectively.

The amplifiers 4 and 8 include, for example, a heterojunction bipolar transistor (HBT) and HE.
Any non-linear element such as MT (high electron mobility transistor) can be used.

[Second Embodiment] Next, FIG. 2 shows a second embodiment of the present invention. The second embodiment is different from the first embodiment only in a portion surrounded by a two-dot chain line. That is, the second embodiment is different from the first embodiment shown in FIG. 1 only in a circuit portion H surrounded by a two-dot chain line, and therefore, differences from the first embodiment will be mainly described.

In the second embodiment, as shown in FIG. 2, the demultiplexing circuit 33 is not connected to the input terminal 1, and the first mixer 13 is directly connected to the input terminal 1.

A feedback line L2 connected to a connection line L1 between the amplifier 4 and the filter 9A is connected to a band-pass filter 9A.
C and the band pass filter 11. This bandpass filter 11 is connected to the first input terminal 1 of the second mixer 14.
4A, and the bandpass filter 9C is connected to the second
It is connected to the second input terminal 14B of the mixer 14.

[0058] As shown in FIG. 2, in the second embodiment, because the configuration for inputting an input signal F _in only the first mixer 13, a second mixer 14 from the input terminal 1 frequency f
Do not take out the components of _in .

In the second embodiment, the feedback line L2
Through the band-pass filter 11 of the pass band is f _in,
The first input terminal 14 of the component of the frequency f _in the second mixer 14
Input to A. At the same time, the return line L2, through bandpass filter 9C passband is f _in / N, a second input terminal 1 of the frequency (f _in / N) a component of the second mixer 14
4B.

[0060] Thus, from the band pass filter 11 to a first input terminal 14A of the second mixer 14, by adding a signal of a frequency f _in, the demultiplexing circuit 3 in the first embodiment
It has the same effect as applying the input signal F _in the second mixer 14 from 3.

[0061] According to the configuration of the second embodiment, a signal of a frequency f _in the input to the second mixer 14, filter 11
Since taking out using, as compared with the first embodiment, the stability of the signal of the frequency f _in is low. However, this second
In the embodiment, there is no loop connecting the demultiplexing circuit and the two mixers, so that there is an advantage that unnecessary oscillation hardly occurs and circuit design becomes easy. Other operations are the first
This is the same as the embodiment.

According to the second embodiment, the output terminal 2b is connected to the output terminal 2b in the same manner as described in the first embodiment.
A 1 / N sub-frequency can be extracted.

[Third Embodiment] Next, FIG. 3 shows the configuration of a frequency divider according to a third embodiment of the present invention. This third embodiment is different from the amplifier 4 in the second embodiment shown in FIG.
Instead of GaAs MES field effect transistors (FE
T) 21 and GaAs MESF
ET22 was provided. Note that the third embodiment is 1/3
It is a frequency divider.

In this frequency divider, a band-pass filter 11 A is connected to the input terminal 1, and this filter 11 A is connected to the first input terminal 13 A of the first mixer 13. The output terminal 13C of the first mixer 13 is connected to the gate of the FET 21, and the source of the FET 21 is connected to the band-pass filter 9A.
, And is connected to the output terminal 2. Also, FE
The drain of T21 is connected to the ground.

On the other hand, a feedback line L2 is connected to the connection line L1 between the FET 21 and the bandpass filter 9A, and the bandpass filters 11B and 9C are connected to the feedback line L2. The filter 11B is connected to the first input terminal 14A of the second mixer 14, and the filter 9C is connected to the second input terminal 14B of the second mixer 14. The output terminal 14C of the second mixer 14 is connected to the gate of the FET 22, and the source of the FET 22 is connected to the second input terminal 13B of the first mixer 13 via the band pass filter 10. The drain of the FET 22 is connected to the ground.

[0066] In the frequency divider of the third embodiment, the frequency of the input signal F _in was 30 GHz. In this case, FIG.
A signal component of 20 GHz is generated from noise and a transient phenomenon in the feedback loop FL3 indicated by a broken line.

The signal of 20 GHz and the signal of an input frequency of 30 GHz input from the oscillator to the input terminal 1 are input to the first mixer 13 and mixed, and the first mixer 1
10GHz, 20GHz, 30GH from 3C output terminal 13C
Obtain the signal of z. Those 10GHz, 20GHz, 30G
Hz signal is amplified by the FET 21 and the feedback line L
2 and a signal of 10 GHz is extracted by a band-pass filter 9C having a pass band of 10 GHz.
The signal is input to the second input terminal 14B of the mixer 14. Further, a signal of 30 GHz is extracted by the band-pass filter 11B and input to the first input terminal 14A of the second mixer 14.

The second mixer 14 mixes the signal of 30 GHz and the signal of 10 GHz to obtain a frequency of 1 GHz.
A signal of 0 GHz, a signal of 20 GHz, and a signal of 30 GHz are output. These signals are amplified by the FET 22 and pass through the band-pass filter 10 having a pass band of 20 GHz, thereby extracting a signal of 20 GHz. The 20 GHz signal is supplied to the first mixer 13
Is applied again to the second input terminal 13B of the
z is mixed in the input signal F _in again, the above-described operation is repeated.

[0069] Then, by repeating the feedback operation in the feedback loop FL3 mentioned above, taken out from the output terminal 2 a 10GHz signal whose level becomes high as 1/3 frequency F _in. As a result, the signal F _in the frequency f _in is,
When the signal is not input to the input terminal 1, the output signal F
_There is no _out , and the input terminal 1 has an input signal Fin of 30G.
When a signal of Hz (15 dBm) was input, a signal of 10 GHz (5 dBm) was stably obtained from the output terminal 2.

As a matching circuit and a bias circuit which can be employed in the third embodiment, for example, there is a circuit shown in FIG. This circuit includes an input terminal 901 and an output terminal 9
02 and transmission lines 932A and 932C connected in series
And a transmission line 932B and 932D having one end connected to a portion 933 connecting the transmission lines 932A and 932C. The other end of the transmission line 932B is open, and the transmission line 932D is connected to the ground via a resistor 935. This resistor 935 and transmission line 932D
The lead terminal 937 to the connection line is formed, the voltage V _B is adapted to be applied to the lead-out terminals 937 and. According to this circuit, the transmission lines 932A,
The input / output impedance can be adjusted by changing the lengths of 932B, 932C, and 932D. Further, the bias voltage V _B, can be biased voltage.

[Fourth Embodiment] FIG. 4 shows a frequency divider according to a fourth embodiment of the present invention. In the fourth embodiment, unlike the above-described third embodiment, GaAsME
The SFETs 21 and 22 serve as both a mixer and an amplifier. The fourth embodiment is a 1/3 frequency divider.

In the fourth embodiment, the input terminal 1 and the FET
The band-pass filter 11A is connected between the gate of the FET 21 and the drain of the FET 21 is grounded. on the other hand,
The source of the FET 21 is connected to the bandpass filters 11B and 9B.
B, and the filters 11B and 9B are connected to the FET 22
Connected to the gate.

The drain of the FET 22 is grounded, and the source is connected to the output terminal 2 via the band pass filter 9A. This bandpass filter 9A and FET
The band-pass filter 10 is connected to a connection line L11 with the band-pass filter 22.
1 gate.

In the fourth embodiment, GaAs MESF
Utilizing the non-linearity of ET21,22, FET21,22
Is used not only as an amplifying means but also as a mixing means. In FIG. 4, the matching circuits and bias circuits of the amplifiers constituted by the FETs 21 and 22 are omitted.

[0075] In this fourth embodiment, due to noise or transients in the feedback loop FL4 shown by dashed lines, the frequency signal component of 2f _in / 3 is generated, the signal component of the 2f _in / 3 , Input frequency f _in from an oscillator (not shown) connected to input terminal 1
Is input to By amplifying effect a mixer operation of the nonlinearity of the FET 21, the frequency _{f in, f in ± f in} / 3
Is output.

[0076] The frequency f _in, the signal f _in ± f _in / 3, taken bandpass filter 9B, through 11B, the frequency f _in the signal and the frequency f _in / 3 signals, respectively. These two signals are input to the FET 22 and the frequency
a signal (f _in / 3), amplified by mixing the signal of the frequency f _in. Then, the frequency (f
_in / 3), (a signal of _{f in ± f in / 3)} , frequency (2f _in / 3)
Through a band pass filter 10 having
The signal of the frequency (2f _in / 3) is taken out, applied to the input of the FET 21, and the above operation is repeated.

[0077] According to the fourth embodiment, the oscillation of the circuit, the signal power of the raised frequency (f _in / 3) from the bandpass filter 9A is a passband (f _in / 3) It is taken out from the output terminal 2 as an output F _out ,
1/3 frequency-divided signal is the frequency of 1/3 of the input frequency f _in is obtained.

[0078] In this embodiment, the input signal F _in the frequency f _in has a chance to launch a subharmonic operate this circuit. This circuit, when the input signal of the frequency f _in is not, the loop gain is set to be 1 or less, oscillation does not start. Meanwhile, when the input signal f _in is input predetermined level or higher, by using the non-linearity of the amplifier FET21,22 constitutes, when the signal at the amplifier is input, changes the other frequency of the phase the characteristic that is, the signal of the phase of the signal and the frequency of the frequency _{(f in / 3) (2f} in / 3) is changed, the loop gain is set to greater than 1. Thus, in the above-described circuit, oscillation does not occur when there is no input, and oscillation starts only when there is an input.

[Fifth Embodiment] Next, FIG. 5 shows the configuration of a transceiver having a frequency divider according to the present invention. This transmitter / receiver uses any one of the first to fourth embodiments as a frequency divider 4
5 is provided.

This transceiver includes a reference signal source 41, a phase comparator 42, a low-pass filter 43, a voltage controlled oscillator (VC
O) 44 are connected in series in order, and the output side of the oscillator 44 has a phase locked loop PLL which is fed back to the phase comparator 42 via the frequency divider 45. The voltage-controlled oscillator 44 is connected to a mixer 46, and the mixer 46 is connected to a transceiver 48 such as an antenna. The mixer 46 receives the transmission signal 47 and outputs the transmission signal 47.

According to the transceiver of the fifth embodiment, the phase locked loop PLL follows the phase of the reference signal from the reference signal source 41. In the phase locked loop PLL, the signal generated by the voltage controlled oscillator (VC0) 44 is frequency-divided by the frequency divider 45, and the phase of the frequency-divided signal and the phase of the signal from the reference signal source 41 are compared by the phase comparator 42. Compare. And this 2
An error signal between the two signals is output from the phase comparator 42, and the DC voltage component is negatively fed back to the voltage controlled oscillator (VCO) 44 via the low-pass filter 43. By the negative feedback, when the phase or frequency of the oscillator (VCO) 44 fluctuates, the phase or frequency of the oscillator (VCO) 44 is pulled back in the opposite direction with respect to the phase and frequency of the reference signal source 41. Control.

In practice, the output frequency of the oscillator (VCO) 44 is set higher than the output frequency of the reference signal source 41. Therefore, the frequency divider 45 divides the frequency of the output frequency of the oscillator (VCO) 44 to make it the same as the frequency of the reference signal source 41, and then the phase comparator 42 compares the frequency with the signal from the reference signal source 41. Compare.

The signal output from the phase locked loop PLL is multiplied by a transmission signal 47 by a mixer 46 and transmitted from a transmission device 48 such as an antenna. On the other hand, when receiving, a signal received by a receiving device 48 such as an antenna and a signal from the phase-locked loop PLL are multiplied by a mixer 46 and downconverted to take out a signal as a transmission signal 47.

[0084]

As is apparent from the above description, the analog frequency divider of the present invention incorporates at least two frequency mixers in series in the feedback loop, so that a predetermined operating frequency can be set for each frequency mixer. Can be assigned and the setting of the frequency mixer becomes easy. This also simplifies the setting of the amplification factor of the amplifier connected to the output side of each frequency mixer.

Therefore, according to this analog frequency divider, a circuit having a frequency division ratio of 3 or more can be easily designed, and two or more frequency mixers (mixers) are incorporated in the loop. An analog frequency divider that is relatively insensitive and stable to the amplification factor of the amplifier and is easy to design.

In the analog frequency divider according to one embodiment, the input signal is input to the two frequency mixers in the analog frequency divider. Therefore, a signal having a stable input frequency is supplied to the two frequency mixers. Input is always possible, and frequency adjustment becomes easy.

Further, the analog frequency divider according to another embodiment includes:
In the analog frequency divider, an input signal is input only to the first frequency mixer, a signal having the same frequency as the input signal is extracted from an output of the first frequency mixer, and input to the second frequency mixer. Therefore, a loop including the first and second frequency mixers is not formed between the feedback loop and the input terminal, and there is an advantage that unnecessary oscillation hardly occurs and circuit design becomes easy.

The analog frequency divider according to one embodiment of the present invention uses a feedback loop including a first frequency mixer and a second frequency mixer to output a signal having a 1 / N frequency whose level has been increased. Obtainable. In addition, a predetermined operating frequency can be assigned to each frequency mixer, which facilitates setting of the frequency mixer.

Further, the analog frequency divider according to another embodiment includes:
In the analog frequency divider, since the frequency mixer and the amplifier connected to the output side of the frequency mixer are configured by one nonlinear amplifier, the circuit configuration can be simplified.

Further, the transmission / reception apparatus of one embodiment includes at least one or more analog frequency dividers, so that the amplification factor of the amplifier in the frequency divider can be easily set and the mixer can be easily set. Can be realized.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a basic circuit configuration of a first embodiment of an analog frequency divider according to the present invention.

FIG. 2 is a block diagram showing a basic configuration of a second embodiment of the present invention.

FIG. 3 is a block diagram of a third embodiment of the present invention.

FIG. 4 is a block diagram of a fourth embodiment of the present invention.

FIG. 5 is a fifth embodiment of the present invention, wherein
FIG. 13 is a configuration diagram of a transceiver incorporating any one of the frequency dividers of the fourth embodiment.

FIG. 6 is a block diagram showing a conventional general analog frequency divider.

FIG. 7 is a block diagram showing another conventional analog frequency divider.

FIGS. 8A and 8B are block diagrams showing a configuration example of a bandpass filter included in the first to fifth embodiments.

FIG. 9 is a circuit diagram showing a configuration example of a bias circuit used in the first to fifth embodiments.

FIG. 10 is a configuration block diagram of a Wilkinson divider, which is an example of the duplexer of the first embodiment.

FIG. 11 is a configuration block diagram of an anti-parallel diode that is an example of a mixer of the first embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Signal input terminal, 2 ... Signal output terminal, 2a, 2b ... Signal output terminal, 3 ... Frequency mixer (mixer), 4 ... Amplifier,
5 band pass filter (pass band fin / 2), 6 ...
Amplifiers 7 Amplifiers 8 Amplifiers 9 Bandpass filters (passband fin / N) 10 Bandpass filters (passband fin (1-1 / N), 11 Bandpass filters (passband fin) , 12 ... Low-pass filter,
13: frequency mixer (mixer), 14: frequency mixer (mixer), 21: GaAsMSFET, 22: GaAsM
SFET, 31 ... capacitor, 32 ... transmission line, 33 ...
Demultiplexing circuit, 34: diode, 35: resistor, 41: reference signal source, 42: phase comparator, 43: low-pass filter,
44: voltage controlled oscillator (VC0), 45: frequency divider of the present invention, 46: frequency mixer (mixer), 47: transmission signal, 4
8 ... Transceiver such as antenna

Claims (6)

[Claims] 1. An analog frequency divider comprising a feedback loop provided between an input and an output, wherein at least two frequency mixers are incorporated in series in the feedback loop. 2. The analog divider according to claim 1, wherein an input signal is input to two frequency mixers. 3. The analog frequency divider according to claim 1, wherein an input signal is input only to a first frequency mixer in said feedback loop, and an input signal is output from an output of said first frequency mixer. An analog frequency divider having a configuration in which the same frequency signal is extracted and input to a second frequency mixer. 4. An input signal of an input frequency is input to an input terminal of a first frequency mixer, and a signal output from an output terminal of the first frequency mixer and amplified is used to calculate an N signal of the input frequency. (N is an integer) A signal having a frequency of 1 / is taken out and inputted to an input terminal of a second frequency mixer. An input signal of the input frequency is inputted to another input terminal of the second frequency mixer , A signal having a frequency obtained by subtracting 1 / N of the input frequency from the input frequency is output from the second frequency mixer, and output from the second frequency mixer. A signal is input to another input terminal of the first frequency mixer, and a signal having a frequency of 1 / N of the input frequency is taken out from the first frequency mixer. vessel. 5. The analog frequency divider according to claim 1, wherein said frequency mixer and an amplifier connected to the output side of said frequency mixer are constituted by one nonlinear amplifier. Analog divider. 6. A transmission / reception device comprising at least one analog frequency divider according to claim 1. Description: