JP2002064409A - Cdma transmitting-receiving circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a CDMA transmitting-receiving circuit which is capable of coping with a frequency band shift in CDMA modulation signals and of decreasing a transmit/receive processing load of CDMA modulation signals. SOLUTION: A set timing management part 13, which monitors the timing of a frame and switches symbol timing and diffusion codes when a frequency band is shifted, is provided, by which the transmit/receive processing load of CDMA modulation signals can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CDMA transmission / reception circuit compatible with HHO, and more particularly to a CDMA transmission / reception circuit capable of reducing a load of transmission / reception processing of a CDMA modulated signal.

[0002]

2. Description of the Related Art With the recent technological development of mobile communications such as mobile phones, the demand for mobile communications in various industrial fields is rapidly increasing. On the other hand, the rapid increase in the number of mobile communication users has caused a problem that the processing function of wireless transmission and reception at the base station has been reduced and the quality of communication has been degraded. For this reason, various methods for avoiding this have been proposed in each mobile communication system.

As a method of avoiding such a problem, a wideband code division multiple access (W-band), which is a mainstream communication system of the next-generation mobile communication, is used.
In the CDMA communication system, HHO (Hard Hand Over) is adopted. Hereinafter, the principle of HHO will be described.

While a mobile terminal compatible with the CDMA communication system is transmitting and receiving data to and from a base station, the number of users who transmit and receive data to and from this base station increases rapidly, resulting in a decrease in data quality. May be deteriorated, making it difficult to transmit and receive data as before. This is mainly due to the fact that the user who has newly started communication intends to use the frequency band of the CDMA modulated signal used for data transmission / reception, so that the amount of data to be processed increases and a load is imposed on the transmission / reception function. .

[0005] Therefore, in HHO, the base station monitors the load condition of the frequency band of the CDMA modulated signal, and determines whether or not a certain condition (data processing amount, number of users, etc.) is satisfied, and data transmission and reception of the user during communication are performed. Is shifted to a frequency band where the number of users to be handled is small. The shift of the frequency band is premised on shifting to a frequency band handled by a different base station due to the characteristics of mobile communication.

[0006] For the shift of the frequency band, the base station determines in advance the frequency band to be shifted and its timing, and transmits the fact to the mobile terminal in communication, and performs the shift processing by the mobile terminal at the timing of the shift. Is realized by performing the following. At the time of the frequency band shift, the base station performs information necessary for the frequency shift such as the timing of the frame to be shifted, the symbol timing corresponding to the frequency band of the shift destination, and the spreading code (hereinafter referred to as the shift destination information). It has been sent to the terminal in advance. Further, the base station transmits information of a frame number called SFN (System Frame Number) to the mobile terminal together with transmission data for each frame, and the mobile terminal detects a transition timing based on the SFN information. are doing.

The operation of a conventional transmitting / receiving circuit used in a mobile terminal supporting HHO will be described with reference to the drawings. FIG. 8 is a block diagram showing a configuration of a conventional CDMA transmitting / receiving circuit supporting HHO. The CDMA transmission / reception circuit of FIG. 8 is compatible with spread spectrum by orthogonal modulation.
In the CDMA transmitting / receiving circuit of FIG. 8, the function of the receiver is realized in the left part from the control unit 83, and the function of the transmitter is realized in the right part. Hereinafter, the operation of the conventional CDMA transmitting / receiving circuit will be described for each function.

First, the operation of the receiver will be described. A CDMA modulated signal received by an antenna (not shown)
In-phase components (I-phase in the figure) and quadrature components (Q-phase in the figure) are separated into received data and input to the complex correlation unit 81, where digital conversion is performed. Further, the spread code generated by the spread code generation unit 85a is input to the complex correlation unit 81. The complex correlation section 81 performs a despreading complex correlation operation on the received data of each component based on the input spread code, and outputs a correlation value.

The correlation value output from complex correlation section 81 is
The data is input to the data demodulation unit 82. The data demodulation unit 82
Receives the symbol timing clock generated by the symbol timing generation unit 84a. Data demodulation unit 8
In 2, the received data is demodulated at a symbol rate according to the input correlation value and the symbol timing clock, and reproduced in a corresponding data format.

Next, the operation as a transmitter will be described. The data generation unit 86 includes a symbol timing generation unit 84b
Is input. If there is data to be transmitted, the data generation unit 86 performs primary modulation at a symbol rate according to the symbol timing clock, and generates transmission data.

[0011] The transmission data generated by data generator 86 is output to complex spreading section 87. Complex diffusion unit 8
7, the spread code generated by the spread code generation unit 85b is input, and secondary modulation of transmission data, that is, complex spreading is performed based on the spread code. Further, the complex diffusion unit 87
Then, the complex-spread transmission data is converted into the in-phase component (MO in the figure).
The signal is separated into a DI phase) and a quadrature component (MODQ phase in the figure) and wirelessly transmitted as a CDMA modulated signal using an antenna (not shown).

In the CDMA transmission / reception circuit of FIG. 8, a control unit 83 transmits a symbol timing data for generating a desired symbol timing clock to symbol timing generation units 84a and 84b and a spreading code for outputting a desired spreading code. The data is input to spreading code generators 85a and 85b. The control unit 83 performs these controls,
This is performed based on the SFN and the transfer destination information. Hereinafter, details of the control operation in the control unit 83 will be described with reference to the drawings. In the CDMA transmitting and receiving circuit of FIG. 8, the transfer destination information has already been transmitted from the base station, and the control unit 83
Is stored.

When demodulating received data, the data demodulating unit 8
2 extracts the SFN from the demodulated received data and outputs it to the control unit 83. The SFN received by the CDMA transmitting / receiving circuit in FIG. 8 is 000h to FFFh (0 to 40 in decimal notation).
95), it is allocated periodically and repeatedly.

FIG. 9 is a time chart of the symbol timing and spreading code control operation of the CDMA transmission / reception circuit of FIG. In the time chart of FIG. 9, the control unit 83 sends the symbol timing data indicating that a symbol timing clock of 30 ksps is generated to the symbol timing generation units 84a and 84b and the data number of the spreading code No. The spread code data for outputting the spread code of 1 is output to the spread code generators 85a and 85b.

FIG. 9A shows a time chart of SFN. The base station has already set the symbol timing to 120 ksps and the spreading code to the data number No. at SFN = 003. It is assumed that the transfer destination information for changing to the spreading code of 2 is transmitted, and the control unit 83 starts control based on this transfer destination information at the time of SFN = FFE.

When SFN = FFE, the control unit 83 monitors SFN every frame until SFN = 002. SFN = 002 SFN from data demodulation section 82
Is input, the control unit 83 generates symbol timing data for generating a symbol timing clock of 120 ksps (hereinafter referred to as 120 ksps instruction data).
Is given to the symbol timing generation unit 84a when the data number of the spreading code is No. Spreading code data for outputting a spreading code of No. 2 (hereinafter referred to as Code No. 2 instruction data) is input to the spreading code generator 85a. Time charts of the output of the symbol timing data and the spread code data are as shown in FIGS. 9 (2) and 9 (3), respectively.

When the 120 ksps instruction data is input, the symbol timing generation section 84 a
Is input to the data demodulation unit 82 and the spreading code generation unit 85a. Code N
o. 2 when the instruction data is input, the spreading code generator 85
a is the data number No. The spread code 2 is input to the complex correlation unit 81. The time charts of the symbol timing clock and the spreading code are as shown in FIGS. 9 (4) and (5), respectively. By a series of operations described above, C in FIG.
The DMA transmission and reception circuit can realize the shift of the frequency band.

[0018]

However, in the above-mentioned conventional CDMA transmitting / receiving circuit, since the SFN monitoring process is performed by the control unit, the load on the control unit increases when the time until the frequency band shift timing becomes long. In addition, there is a problem that the load of transmission / reception processing of the CDMA transmission / reception circuit increases.

For example, in order to shift the frequency band when SFN = 000, the control unit starts SFN monitoring from SFN = 001. 1SFN =
10 msec, and the control unit has to continuously monitor the SFN until the timing of the transition. Therefore, the control unit sets the SFN for 10 msec * FFFh ≒ 41 sec at worst.
The monitoring process will be performed.

The control unit is actually a CPU (Center Process).
ing unit) or a DSP (Digital Signal Processor). Since the CPU or DSP performs calculation processing at high speed for each processing routine, performing such a single processing over a long period of time makes it impossible to execute other processing, and a large load is imposed on the entire transmission / reception circuit. .

As described above, since the control unit also controls the output of the symbol timing and the spread code, a large load is applied to the control unit, which causes a delay in the processing control of the CDMA modulation signal, which occurs in the control unit. Due to an increase in thermal noise and a decrease in reception sensitivity, C
The load of the transmission / reception processing of the DMA modulation signal increases.

The present invention has been made in view of the above circumstances, and has as its object to provide a CDMA transmission / reception circuit capable of reducing the load of transmission / reception processing of a CDMA modulated signal.

[0023]

SUMMARY OF THE INVENTION In order to solve the above-mentioned problems of the prior art, the present invention relates to a correlation operation section, a data demodulation section, a data generation section, a spreading section, a control section, and a setting timing management section. CDMA transmission / reception circuit including a unit, a first to fourth setting holding unit, a reception symbol timing generation unit, a reception spread code generation unit, a transmission symbol timing generation unit, and a transmission spread code generation unit. The correlation operation unit performs a correlation operation using the received CDMA modulated signal and the spread code output from the reception spread code generation unit, and outputs a calculation result as correlation data. The correlation data is demodulated based on the symbol timing output from the symbol timing generation unit, and SFN data that is timing information for each frame is output from the demodulation result. Generating and outputting transmission data based on the symbol timing output from the trust symbol timing generation unit, the spreading unit performs spreading processing using the transmission data and the spreading code, and outputs a processing result as a CDMA modulated signal; The control unit outputs symbol timing data including an instruction to generate a specific symbol timing, spreading code data including an instruction to generate a specific spreading code, specific symbol timing, and a specific spreading code. The change start SFN data, which is information on the frame timing, is output, and the setting timing management unit monitors the timing of each frame based on the SFN data and the change start SFN data, and outputs the timing when a specific frame timing is reached. Output the timing signal,
The first or third setting holding unit stores the symbol timing data output from the control unit, and when the output timing signal is input, outputs the stored symbol timing data, and outputs the second or fourth setting. The holding unit stores the spread code data output from the control unit, and outputs the stored spread code data when the output timing signal is input,
The receiving symbol timing generation unit, based on the symbol timing data output from the first setting holding unit,
The reception spread code generation unit generates and outputs a symbol timing, and generates a spread code based on the spread code data output from the second setting holding unit and the symbol timing output from the reception symbol timing generation unit. The generation, output, and transmission symbol timing generation unit generates and outputs a symbol timing based on the symbol timing data output from the third setting holding unit, and the transmission spread code generation unit generates the fourth setting. Generating a spread code based on the spread code data output from the holding unit and the symbol timing output from the transmission symbol timing generation unit,
It can output and reduce the load of the transmission / reception processing of the CDMA modulated signal.

[0024]

Embodiments of the present invention will be described with reference to the drawings. C according to the embodiment of the present invention
The DMA transmission / reception circuit is provided with a setting timing management unit that monitors the timing of the frame when the frequency band is shifted and controls the switching of the symbol timing and the spreading code, thereby reducing the load of the transmission / reception processing of the CDMA modulation signal. Can be reduced.

In the claims, the correlation unit is a complex correlation unit 1
The first to fourth setting holding units correspond to the setting holding units 17a to 17d in FIG. 1, the receiving symbol timing generating unit corresponds to the symbol timing generating unit 15a, and the receiving spreading code generating unit corresponds to the spreading code generating unit. The transmission symbol timing generation unit corresponds to the symbol timing generation unit 15b, the transmission spread code generation unit corresponds to the spread code generation unit 16b, and the spreading unit corresponds to the complex spreading unit 19, respectively.

The configuration of the CDMA transmitting / receiving circuit according to the embodiment of the present invention will be described with reference to FIG. FIG. 1 is a configuration block diagram of a CDMA transmission / reception circuit according to an embodiment of the present invention. The CDMA transmission / reception circuit of FIG. 1 supports spread spectrum by orthogonal modulation. The CDMA transmitting / receiving circuit according to the embodiment of the present invention includes a complex correlator 11,
Data demodulation unit 12, setting timing management unit 13, control unit 14, symbol timing generation units 15a and 15
b, spreading code generation units 16a and 16b, setting holding units 17a to 17d, data generation unit 18, and complex spreading unit 1
9.

The complex correlation unit 11 includes an antenna (not shown)
Digitally converts the in-phase component (I-phase in the figure) and the quadrature component (Q-phase in the figure) of the CDMA quadrature modulated signal received at
Based on the spread code output from the spread code generation unit 16 a, a complex despread correlation operation is performed, and a correlation value as an output result is output to the data demodulation unit 12.

The data demodulation unit 12 compares the correlation value output from the complex correlation unit 11 with the symbol timing generation unit 15a.
And demodulates the received CDMA quadrature modulated signal based on the symbol timing clock output from, and outputs the received data obtained by the demodulation in a corresponding data format. Further, the data demodulation unit 12 extracts the SFN or the migration destination information from the demodulated received data and outputs the extracted SFN or the migration destination information to the setting timing management unit 13.

The setting timing management unit 13 outputs the transfer destination information output from the data demodulation unit 12 to the control unit 14, and shifts the frequency band specified by the SFN and the transfer destination information output from the control unit 14. The SFN is monitored based on the SFN information (hereinafter, referred to as change start SFN data). Further, the setting timing management unit 13 outputs an output timing signal for switching the symbol timing clock and the spreading code to the setting holding units 17a to 17d.

The control unit 14 includes a setting timing management unit 13
Stores the symbol timing data designated by the migration destination information based on the migration destination information output from the
And spread code data designated by the transfer destination information to the setting holding units 17c and 17d. Further, the control unit 14 outputs the change start SFN data to the setting timing management unit 13 based on the migration destination information.

The data generator 18 generates transmission data by performing primary modulation on data to be transmitted, based on the symbol timing clock output from the symbol timing generator 15 b, and outputs the data to the complex spreading unit 19. I do.

The complex spreading section 19 performs complex spreading of the transmission data based on the transmission data generated by the data generation section 18 and the spreading code output from the spreading code generation section 16b. Further, the complex spreading section 19 converts the modulated transmission data into an analog signal, and separates and outputs an in-phase component (MODI phase in the figure) and a quadrature component (MODQ phase in the figure).

Symbol timing generators 15a and 15b
Outputs a symbol timing clock at the symbol rate specified by the symbol timing data based on the symbol timing data output from the setting holding units 17a and 17b. The symbol timing generator 15a outputs a symbol timing clock to the data demodulator 12 and the spreading code generator 16a, and the symbol timing generator 15b outputs a symbol timing clock to the data generator 18 and the spreading code generator 16b.

In the W-CDMA communication system, 1
5, 30, 60, 120, 240, 480, 960ks
The controller 14 outputs symbol timing data corresponding to the symbol rates, and the symbol timing generators 15a and 15b generate one of the symbol timing clocks based on the symbol timing data. Can occur.

The spread code generators 16a and 16b are designated by spread code data based on the spread code data output from the setting holders 17a and 17b and the symbol timing clock output from the symbol timing generators 15a and 15b. Generate and output the different types of spreading codes. The spreading code generator 16a outputs the spreading code to the complex correlation unit 11, and the spreading code generator 16b outputs the spreading code to the complex spreading unit 19, respectively.

The spreading code generators 16a and 16b use LC
(Long Code) and Chanelization Code can be generated. The LC generates and outputs a sequential spreading code according to the spreading code data.
The Chanelization Code is for repeatedly generating and outputting a spread code at a symbol timing cycle based on spread code data and a symbol timing clock. Here, the controller 14 determines which type of the spreading code the spreading code generators 16a and 16b generate, and may output the spread code included in the spreading code data.
It may be predetermined in 6a and 16b.

The setting holding units 17a and 17b are connected to the control unit 1
4 holds the symbol timing data output from
When the output timing signal is output from the setting timing management unit 13, the held symbol timing data is output to the symbol timing generation units 15a and 15b. The setting holding unit 17a is a symbol timing generation unit 15
a, the setting holding unit 17b includes the symbol timing generation unit 1
5b each outputs symbol timing data.

The setting holding units 17c and 17d are connected to the control unit 1
4 is held, and when the output timing signal is output from the setting timing management unit 13, the held spreading code data is converted to the spreading code generation unit 1.
6a and 16b. The setting holding unit 17c is connected to the spreading code generation unit 16a, and the setting holding unit 17d is set to the spreading code generation unit 1
The spreading code data is output to each of 6b.

Next, the operation of the CDMA transmitting / receiving circuit according to the embodiment of the present invention will be described with reference to the drawings. First, FIG.
The operation as a receiver and a transmitter in the CDMA transmitting / receiving circuit will be described for each function.

The operation of the receiver will be described.
The CDMA modulated signal received by the antenna is separated into in-phase component and quadrature component reception data and input to the complex correlation unit 11. The complex correlator 11 converts the received data of each component into digital data, and then performs a complex despreading correlation operation on the received data of each component based on the spread code generated by the spread code generator 16a to obtain a correlation value. Is output to the data demodulation unit 12. Here, the spreading code used for complex despreading is
This is the same as the spreading code used for modulating the received data.

The correlation value output from the complex correlation section 11 is
The data is input to the data demodulation unit 12. The data demodulation unit 12 demodulates the received data at a symbol rate according to the input correlation value and the symbol timing clock generated by the symbol timing generation unit 15a, and reproduces the data in a corresponding data format. Note that the symbol timing clock output from the symbol timing generator 15a is input to the spread code generator 16a, whereby a spread code can be generated at a specified symbol rate.

To explain the operation as a transmitter, if there is data to be transmitted, the data generator 18 performs primary modulation at a symbol rate corresponding to the symbol timing clock generated by the symbol timing generator 15b. Generate transmission data. The transmission data generated by the data generation unit 18 is output to the complex spreading unit 19. The complex spreading unit 19 performs secondary modulation of transmission data, that is, complex spreading, based on the spreading code generated by the spreading code generation unit 16b.

The complex spreading section 19 separates the complex-spread transmission data into an in-phase component and a quadrature component and outputs the separated data. The output received data of each component is wirelessly transmitted as a CDMA modulated signal using an antenna (not shown). As in the case of the receiver, the symbol timing clock output from the symbol timing generator 15b is input to the spreading code generator 16b.

Next, the operation of shifting the frequency band of the CDMA transmission / reception circuit of FIG. 1 will be described with reference to the drawings. The base station transmits the migration destination information in advance to the CDMA transceiver that makes the frequency band shift. When receiving the CDMA modulation signal, the data demodulation unit 12 converts the demodulated reception data into S
FN and migration destination information are extracted, and the setting timing management unit 1
Output to 3. The setting timing management unit 13 further outputs the input migration destination information to the control unit 14.

The control unit 14 stores the symbol timing data designated by the transfer destination information at specified timings based on the input transfer destination information, in the setting holding units 17a and 17b.
Then, the spread code data specified by the transfer destination information is output to the setting holding units 17c and 17d. Further, the control unit 14 outputs the change start SFN data to the setting timing management unit 13 based on the migration destination information.

The setting timing management unit 13 monitors the SFN based on the SFN and the change start SFN data every frame until the change start SFN is reached. When the SFN becomes the frame immediately before the change start SFN, the setting timing management unit 13 outputs an output timing signal for switching the symbol timing clock and the spreading code to the setting holding units 17a to 17d. In the configuration block diagram of FIG. 1, the path of the output timing signal is indicated by a thick line.

When the output timing signal is input, the setting holding units 17a to 17d convert the held symbol timing data or spread code data into the symbol timing generation units 15a and 15b or the spread code generation units 16a and 1d.
6b. Symbol timing generator 15a, 1
5b or the spread code generators 16a and 16b output the symbol timing clock or the spread code specified by the transfer destination information, whereby the shift of the frequency band is completed.

The above-mentioned frequency band shifting operation will be specifically described with reference to FIG. FIG. 2 shows the CDM of the present invention.
It is a time chart figure of the control operation of the symbol timing concerning the frequency band shift of the A transmitting / receiving circuit. FIG. 2 illustrates the symbol timing generation unit 15a and the setting holding unit 17a as an example.

The SFN output from the data demodulation unit 12 to the setting timing management unit 13 is the same as the conventional case.
0h to FFFh (0 to 4095 in decimal)
It is allocated periodically and repeatedly. Control unit 1
The symbol timing data indicating that a symbol timing clock of 30 ksps is generated is output from 4 and is stored in the setting holding unit 17 a, and the symbol timing clock of 30 ksps is output from the symbol timing generating unit 15 a.

FIG. 2A shows a time chart of SFN. The base station has already set the symbol timing to 120 ksps and the spreading code to the data number No. at SFN = 003. It is assumed that the transfer destination information for changing to the spreading code of 2 is transmitted, and the control unit 14 starts the control based on this transfer destination information at the time of SFN = FFE.

The setting timing management unit 13 outputs the transfer destination information output from the data modulation unit 12 to the control unit 14,
Remember. When SFN = FFE, the control unit 14 changes the setting change SFN data from the migration destination information, that is, SFN.
= 003 and outputs it to the setting timing management unit 13. Further, the control unit 14 outputs 120 ksps instruction data as symbol timing data to the setting holding unit 17a based on the migration destination information. The setting holding unit 17a holds the input 120 ksps instruction data.

FIG. 2B is a time chart of the symbol timing data output to the setting holding unit 17a, and FIG. 2D is a time chart of the symbol timing data output from the setting holding unit 17a. SFN = FFE
, The symbol timing data is 120 ksp
s, but the symbol timing data output from the setting holding unit 17a is still 30 ksps.

When the change setting SFN data is output from the control unit 14, the setting timing management unit 13 monitors the SFN for each frame until SFN = 002 based on the SFN and the change setting SFN data. When SFN = 002 SFN is input from the data demodulation unit 12, the setting timing management unit 13 stores the output timing signal in the setting holding unit 17
Input to a. A time chart of the output timing signal is as shown in FIG.

When the output timing signal is input, the setting holding unit 17a outputs the 120 ksps instruction data, which is the held symbol timing data, to the symbol timing generation unit 15a. When the 120 ksps instruction data is input, the symbol timing generation unit 15 a
The symbol timing clock of 20 ksps is output to the data demodulation unit 12 and the spreading code generation unit 16a. FIG.
As shown in (4) and FIG. 2 (5) which is a time chart of the symbol timing clock output from the symbol timing generation unit 15a, the switching of the symbol timing clock is completed at the time of SFN = 003 by these control operations. I do.

As described above, using the time chart of FIG.
Symbol timing generation unit 15a and setting holding unit 17a
Has been described, but in the CDMA transmission / reception circuit of FIG. 1, the symbol timing generation unit 15b and the setting holding unit 17b, the spreading code generation unit 16a and the setting holding unit 17c, and the spreading code generation unit 16b
The same control is performed for each set of the setting holding unit 17d. That is, in the CDMA transmitting / receiving circuit of the present invention,
The frequency band is shifted by simultaneously switching the symbol timing and spreading code of the transceiver at the timing of the setting change SFN.

Further, the configuration and operation of the setting timing management section 13 will be described with reference to the drawings. FIG. 3 is a configuration block diagram of the setting timing management unit 13 of the CDMA transmission / reception circuit of FIG. The setting timing management unit of the CDMA transmission / reception circuit of the present invention includes an adding unit 31 and an SFN holding unit 32.
, A comparison unit 33, a frame timing generation unit 34,
It comprises an AND operation unit (and unit in the figure) 35, a flag holding unit 36, and a selection unit 37. Note that, in the configuration block diagram of FIG. 3, a circuit portion that outputs migration destination information to the control unit 14 is not illustrated.

The SFN data output from the data demodulation unit 12 is input to the addition unit 31 in the setting timing management unit 13, 1 is added, and output to the comparison unit 33. The change start SFN data output from the control unit 14 is S
The data is input to and held in the FN holding unit 32. SFN holder 32
Are output to the comparison unit 33.

In the comparing section 33, the SFN data added in the adding section 31 is compared with the change start SFN data held in the SFN holding section 32. If the values of these data match, 1 is determined. , Otherwise 0
Is output. The output result of the comparison unit 33 is the logical product operation unit 3
5 is input.

The AND operation unit 35 further receives the frame timing clock output from the frame timing generation unit 34. Frame timing generator 34
Outputs a frame timing clock as a reference for the timing of each frame in the setting timing management unit. Here, the frame timing generation unit 34 may output a frame timing clock based on the timing of the SFN data output from the data modulation unit 12.

The AND operation unit 35 performs an AND operation on the output result of the comparison unit 33 and the frame timing clock output from the frame timing generation unit 34.
The selector 37 selects 1 if both are 1 and 0 otherwise.
Output to Note that the calculation is performed with the generated clock as 1 for the frame timing clock.

The output result from the flag holding unit 36 is further input to the selecting unit 37. The flag holding unit 36 holds 1 as the value of the setting flag signal indicating that the setting change SFN data is newly input from the control unit 14, and outputs the held value of the setting flag signal to the selecting unit 37. .
Here, the flag holding unit 36 may be configured to hold 1 in synchronization with the input of the change start SFN data.

The selector 37 receives 0 in addition to the output result of the AND operation unit 35 and the setting flag signal held in the flag holding unit 36. The selection unit 37 outputs either the output result of the AND operation unit 35 or 0 according to the value of the setting flag signal held in the flag holding unit 36. The signal selected and output at this time becomes the output timing signal. The selection unit 37 resets the setting flag signal held in the flag holding unit 36 based on the output result of the output timing signal.

The operation of the setting timing management section 13 will be specifically described with reference to FIG. FIG. 4 is a time chart of the operation control of each element of the setting timing management unit 13. 4A shows a time chart of SFN data output from the data demodulation unit 12, and FIG. 4B shows a time chart of SFN data added by the addition unit 31.

At the time of SFN = 3, when 6 is input from the control unit 13 as the change start SFN data, the change start S
The FN data is held in the SFN holding unit 32 and further output to the comparison unit 33. A time chart of the output result from the SFN holding unit 31 is as shown in FIG. The output result of the addition unit 31 is also input to the comparison unit 33, and these data are compared. When SFN = 5, the two coincide with each other.
Output to A time chart of the output result of the comparison unit 33 is as shown in FIG.

FIG. 4E shows the frame timing generator 3
4 shows a time chart of the frame timing clock output in FIG. In the AND operation unit 35, the comparison unit 33
Is ANDed with the frame timing clock, and when both are 1, the AND operation unit 35 outputs 1 to the selection unit 37. FIG. 4F shows a time chart of the output result of the AND operation unit 35. The output of the AND operation unit 35 when the output of the comparison unit 33 is 1 and the frame timing clock is generated is shown. It is clear that the result is 1.

When new setting change SFN data is input from the control unit 14, the flag holding unit 36 holds 1 as the value of the setting flag signal and continues to output it to the selecting unit 37. FIG. 4G shows a time chart of the output result of the flag holding unit 36.

The selection unit 37 determines the value of the setting flag signal held in the flag holding unit 36 by the AND operation unit 3.
Either the output result of 5 or 0 is output as an output timing signal. When the value of the setting flag signal is 1, the selection unit 37 in FIG.
The output result of 5 is output, and when it is 0, 0 is output.

A timing chart of the output result of the selection unit 37 is as shown in FIG. When SFN = 5,
The value of the setting flag signal is 1, and the AND operation unit 35
Is 1, the setting timing management unit outputs the output timing signal to each of the setting holding units 17a to 17d in FIG.
Output to After outputting the output timing signal, the selection unit 37 resets the setting flag signal held in the flag holding unit 36. This is apparent from the timing chart of FIG. 4G that the output result of the flag holding unit is 0 after the output of the output timing signal. By the operation of the setting timing management unit as described above, the CDMA transmission / reception circuit of the present invention can complete the shift of the frequency band by the prescribed SFN.

In the block diagram of the setting timing management section shown in FIG. 3, the flag holding section 36 and the selection section 37 are circuits provided to output the output timing signal only once in a prescribed SFN. For example, SFN = 0
When the shift of the frequency band is to be performed at 06h, it is as if the object can be achieved by using the output result of the AND operation unit 35 as the output timing signal without using the flag holding unit 36 and the selection unit 37. Seems to be.

However, as described above, the same value is periodically assigned to SFN. Assuming that SFN is repeatedly allocated in the range of 000h to FFFh as before, an output timing signal is output at the time when SFN = 006h for each FFFh, unless new change start SFN data is input. That is, an undesirable situation occurs in which the frequency band is shifted again at the timing of the SFN that has already been shifted.

For this reason, a flag holding unit 36 for holding and outputting a setting flag signal indicating that new change start SFN data has been input, an output of an output timing signal is determined based on the value of the setting flag signal, and flag holding is performed. By providing the selection unit 37 for resetting the held content of the unit 36, such a situation is prevented from occurring. That is, when the output result of the AND operation unit 35 becomes 1 for the newly input change start SFN data for the first time,
Since the selection section 37 outputs the output timing signal and resets the setting flag signal held in the flag holding section 36, the output timing signal is not repeatedly output with one change start SFN data.

In the CDMA transmitting / receiving circuit according to the embodiment of the present invention, the shift of the frequency band between the transmitter and the receiver is performed at the same timing, but may be performed at different timings. For example, after performing the frequency band transition operation at the frequency band transition timing specified by the transition destination information, the transmission side frequency band transition operation is performed at the time when transmission data is generated for the first time. Is also good. In this case, the setting timing management unit 13 can monitor the transition timing of the frequency band and output the output timing signal separately for the receiver side and the transmitter side, and the control unit 14 controls the transmission data generation status on the transmitter side. It is necessary to monitor the setting timing and to notify the setting timing management unit 13 of the change start SFN data corresponding to this.

As described above, C in the embodiment of the present invention
According to the DMA transmission / reception circuit, when the frequency band is shifted, S
By causing the setting timing management unit 13 to perform the FN monitoring process, the load on the control unit 14 that controls transmission and reception of the CDMA modulated signal can be reduced.
There is an effect that the load of the transmission / reception processing of the A transceiver can be reduced. That is, in the setting timing management unit 13, SFN
By performing the monitoring process independently of the control unit 14,
Compared to the SFN monitoring process by the conventional control unit,
A lot of time can be devoted to processing control of the CDMA modulated signal. Therefore, since the load on the control unit 14 is reduced, there is an effect that the thermal noise generated in the control unit 14 is reduced and the receiving sensitivity is improved. In particular, when the SFN monitoring process is performed for a long time, the effect is remarkable.

FIG. 5 is a diagram showing a C according to another embodiment of the present invention.
FIG. 3 is a configuration block diagram of a DMA transmission / reception circuit. The configuration and operation of a CDMA transmitting / receiving circuit according to another embodiment of the present invention will be described with reference to the drawings, focusing on differences from the CDMA transmitting / receiving circuit of FIG. The CDMA transmission / reception circuit of FIG. 5 also handles a CDMA modulated signal that has been quadrature-modulated, as in the prior art. In the CDMA transmission / reception circuit of FIG. 5, symbol timing generators 55a to 55d, spread code generators 56a to 56
1 and the selection units 57a to 57d are provided in FIG.
Is different from the configuration of the CDMA transmission / reception circuit.

The setting timing management unit 53 outputs the transfer destination information output from the data demodulation unit 52 to the control unit 54, and outputs the SFN and the change start SFN data specified by the transfer destination information output from the control unit 54. Based on this, SFN is monitored. The setting timing management unit 53 includes a selection unit 57
In order to switch the symbol timing clock or spreading code output from a to 57d, the selection signal is changed and output to the selection units 57a to 57d.

The control unit 54 includes a setting timing management unit 53
The symbol timing data specified by the destination information is sent to the symbol timing generators 55a to 55d, and the spread code data specified by the destination information is sent to the spread code generators 56a to 56d based on the destination information output from. Output. Further, the control unit 54 outputs the change start SFN data to the setting timing management unit 53 based on the migration destination information.

Symbol timing generators 55a to 55d
Outputs the symbol timing clock to the selection unit 57a or 57b at the symbol rate specified by the symbol timing data based on the symbol timing data output from the control unit 54. Among the respective symbol timing generators, the symbol timing generators 55a and 55c provide the selector 57a with the symbol timing generator 5
5b and 55d output a symbol timing clock to the selection unit 57b.

The spread code generators 56a to 56d generate a spread code of the type specified by the spread code data based on the spread code data output from the controller 54, and output the generated spread code to the selector 57c or 57d. Among the respective spread code generators, the spread code generators 56a and 56c include a selector 57c.
The spreading code generators 56b and 56d output a symbol timing clock to the selector 57d.

Selectors 57a to 57d output one of the symbol timing clocks or spread codes output from the plurality of symbol timing generators or spread code generators, and receive a selection signal from set timing manager 53. And outputs a symbol timing clock or a spread code based on the selection signal.

The selector 57a sends one of the symbol timing clocks output from the symbol timing generators 55a and 55c to the data demodulator 52 and the spread code generators 56a and 56c, and the selector 57b sends the symbol timing clock to the symbol timing generator. One of the symbol timing clocks output from 55b and 55d is output to data generator 58 and spread code generators 56b and 56d, respectively.

The selector 57c is provided with a spread code generator 56a.
One of the spread codes output from the spread code generator 56c and the selector 56d is output to the complex correlator 52.
One of the spreading codes output from 6b and 56d is output to complex spreading section 59, respectively.

In the CDMA transmission / reception circuit of FIG. 5, the operations of the complex correlation section 51, data demodulation section 52, data generation section 58 and complex spreading section 59 are the same as those of the CDMA transmission / reception circuit of FIG. .

Next, the operation of shifting the frequency band in the CDMA transmitting / receiving circuit of FIG. 5 will be described with reference to the drawings. FIG.
The operation of the CDMA transmitting / receiving circuit as a transmitter and a receiver is the same as that of the conventional example, and the description is omitted.
The base station transmits the migration destination information in advance to the CDMA transceiver that makes the frequency band shift. When receiving the CDMA modulated signal, the data demodulation unit 52 extracts the SFN and the transfer destination information from the demodulated received data, and outputs the extracted SFN and the transfer destination information to the setting timing management unit 53. The setting timing management unit 53 further outputs the input migration destination information to the control unit 54.

Based on the input destination information, the control unit 54 transmits the symbol timing data specified by the destination information to one of the symbol timing generation units 55a and 55c and the symbol timing generation unit 55b or 55d. The spread code data specified by the transfer destination information is output to one of the spread code generators 56a or 56c and the spread code generator 56b or 56d at a specified timing. Symbol timing generator 55 to which symbol timing data is input, and spread code generator 56 to which spread code data is input
Outputs the designated symbol clock or spreading code to the selectors 57a to 57d. Further, the control unit 54 outputs the change start SFN data to the setting timing management unit 53 based on the migration destination information.

The setting timing management unit 53 monitors the SFN on each frame based on the SFN and the change start SFN data until the change start SFN is reached. When the SFN is the frame immediately before the change start SFN, the setting timing management unit 53 outputs a selection signal for switching the symbol timing clock and the spreading code to the selection units 57a to 57a.
7d. In the block diagram of FIG. 5, the path of the selection signal is indicated by a bold line.

When a selection signal is input, selection units 57a to 57a
7d switches the output symbol timing clock or spread code to the symbol timing clock or spread code specified by the transfer destination information. Each selector 57 outputs the symbol timing clock or the spread code specified by the transfer destination information, whereby the shift of the frequency band is completed.

The above-mentioned frequency band shifting operation will be specifically described with reference to FIG. FIG. 6 is a time chart of a symbol timing control operation according to a frequency band shift of the CDMA transmission / reception circuit according to the specific embodiment of the present invention.
In FIG. 6, the symbol timing generation units 55a and 55c
And the selecting unit 57a as an example.

SFN output from data demodulation section 52 to setting timing management section 53 is the same as that of the conventional case.
0h to FFFh (0 to 4095 in decimal)
It is allocated periodically and repeatedly. The control unit 5
4 outputs symbol timing data indicating that a 30 ksps symbol timing clock is to be generated, and outputs the symbol timing data to the symbol timing generation unit 55a. The symbol timing generation unit 55a outputs a 30 ksps symbol timing clock via the selection unit 57a. Has been output.

FIG. 6A shows a time chart of SFN. The base station has already set the symbol timing to 120 ksps and the spreading code to the data number No. at SFN = 003. It is assumed that the transfer destination information for changing to the spreading code of 2 is transmitted, and the control unit 54 starts control based on this transfer destination information at the time of SFN = FFE.

The setting timing management section 53 outputs the transfer destination information output from the data modulation section 52 to the control section 54 and stores it. When SFN = FFE, the control unit 54 reads the setting change SFN data, that is, SFN = 003, from the migration destination information, and sets the setting timing management unit 53.
Output to The control unit 54 outputs 120 ksps instruction data as symbol timing data to the symbol timing generation unit 55c based on the migration destination information. When the symbol timing data is input, the symbol timing generation unit 55c outputs a symbol timing clock of 120 ksps to the selection unit 57a.

Symbol timing generators 55a and 55
6 (2) and 6 (3) show time charts of the symbol timing data output to c, and FIGS. 6 (4) and 5 (5) show time charts of the symbol timing clocks output from the symbol timing generators 55a and 55c. . FIG. 6 (7) is a time chart of the symbol timing clock output from the selector 57a. As is clear from these time charts, a new symbol timing clock of 120 ksps is output to the selector 57a at the time of SFN = FFE, but the symbol timing clock output from the selector 57a is still 30 ksp.
s.

When the change setting SFN data is output from the control unit 54, the setting timing management unit 53 monitors the SFN for each frame until SFN = 002 based on the SFN and the change setting SFN data. When SFN of SFN = 002 is input from the data demodulation unit 52, the setting timing management unit 53 changes the selection signal and outputs it to the selection unit 57a. The time chart of the selection signal is as shown in FIG.

When the changed selection signal is input, the selector 57a outputs the output symbol timing clock by 30.
Switch from ksps to 120 ksps. Selector 57
The symbol timing clock of 120 ksps output from the data demodulation unit 52 and the spread code generation unit 56
a and 56c. By these control operations described above, the switching of the symbol timing clock is completed at the time of SFN = 003.

As described above, using the time chart of FIG.
Symbol timing generators 55a and 55c and selector 5
Although the symbol timing control operation in FIG. 7a has been described, in the CDMA transmitting and receiving circuit of FIG. 5, the symbol timing generators 55b and 55d and the selector 57b, the spread code generators 56a and 56c and the selector 57c, the spread code generator 56b and Similar control is performed for each set of 56d and the selection unit 57d.

That is, CDMA of a specific embodiment of the present invention
In the transmission / reception circuit, similarly to the CDMA transmission / reception circuit of FIG. 1, the frequency band is shifted by simultaneously switching the symbol timing and the spreading code of the transceiver at the timing of the setting change SFN. By the way, the CDMA transmission / reception circuit of FIG. 1 is provided with a setting holding unit for storing symbol timing data or spreading code data, and outputs the data stored in the setting holding unit when the frequency band shifts. The sign is switched. On the other hand, in the CDMA transmission / reception circuit of FIG. 5, two symbol timing generators or spreading code generators are prepared, and both output the symbol timing clock or the spreading code, and then output either one from the selector. The output of the selection unit is switched when the frequency band is shifted. That is, the former is a method in which control data after migration is stored and control based on this control data is started at the time of migration, and the latter is to perform control before migration and after migration in parallel, and to perform control after migration at the time of migration. It can be said that it is a method of switching to.

Further, the configuration and operation of the setting timing management section 53 will be described with reference to the drawings, focusing on differences from the setting timing management section of FIG. FIG. 7 shows the CDM of FIG.
5 is a configuration block diagram of a setting timing management unit 53 of the A transmitting / receiving circuit. FIG. The setting timing management unit of the CDMA transmission / reception circuit of the present invention includes an adding unit 71, an SFN holding unit 72, a comparing unit 73, a frame timing generating unit 74, an AND operation unit (and unit in the figure) 75, a flag Holder 76
, A selection unit 77, and a T-type FF (Flip Flop) 78. Note that, in the configuration block diagram of FIG. 7, a circuit portion that outputs migration destination information to the control unit 54 is not illustrated.

The configuration of the setting timing management section in FIG.
Except that the pattern FF 78 is provided, this is the same as the setting timing management unit in FIG. As for the operation, SFN data and change start SFN data are input,
Are completely the same until the output timing signal is output. In the setting timing management section of FIG.
Is output to the T-type FF 78. The T-type FF 78 is an element having a property of inverting an output value when a specific value is input. In the setting timing management unit of FIG. 7, if the output timing signal is 0, the T-type FF 78 continues to output the output value up to that time, and if the output timing signal is 1, that is, if the SFN starts to change SFN
At the point immediately before the data, the output value up to that point is inverted.

When the selection signal output from the setting timing management section of FIG. 7 is input to each selection section of the CDMA transmission / reception circuit of FIG. 5, the value is detected. Each selector determines which symbol timing clock or spreading code to output based on the detected value, thereby realizing the shift of the frequency band.

In the CDMA transmission / reception circuit of the specific embodiment of the present invention, the shift of the frequency band between the transmitter and the receiver is performed at the same timing, but may be performed at different timings.

[0100]

According to the present invention, in a CDMA transmitting / receiving circuit corresponding to a shift of a frequency band of a CDMA modulated signal,
The provision of the setting timing management unit that monitors the transition timing has the effect of reducing the load of the CDMA modulated signal transmission / reception processing.

[Brief description of the drawings]

FIG. 1 is a configuration block diagram of a CDMA transmission / reception circuit according to an embodiment of the present invention.

FIG. 2 is a time chart of a control operation of the CDMA transmission / reception circuit of FIG. 1 relating to a shift to a frequency band.

FIG. 3 is a block diagram illustrating a configuration of a setting timing management unit in the CDMA transmission / reception circuit of FIG. 1;

FIG. 4 is a time chart of operation control in each element of the setting timing management unit of FIG. 3;

FIG. 5 is a configuration block diagram of a CDMA transmission / reception circuit according to another embodiment of the present invention.

6 is a time chart of a control operation of the CDMA transmission / reception circuit of FIG. 5 relating to a shift of a frequency band.

7 is a configuration block diagram of a setting timing management unit in the CDMA transmission / reception circuit of FIG. 5;

FIG. 8 is a configuration block diagram of a conventional CDMA transmission / reception circuit.

FIG. 9 is a time chart of a control operation in shifting a frequency band of a conventional CDMA transmission / reception circuit.

[Explanation of symbols]

11, 51, 81 ... complex correlation section, 12, 52, 82 ...
Data demodulation unit, 13, 53 ... setting timing management unit,
14, 54, 83 ... control unit, 15, 55, 84 ... symbol timing generation unit, 16, 56, 85 ... spreading code generation unit, 17 ... setting holding unit, 18, 58, 86 ...
Data generation unit, 19, 59, 87 ... complex diffusion unit, 5
7 ... Selection section

Claims (6)

[Claims] 1. A correlation operation unit, a data demodulation unit, a control unit, a setting timing management unit, a first setting holding unit, a second setting holding unit, a receiving symbol timing generation unit, CDMA receiving circuit comprising: a spread code generation unit for use, wherein the correlation operation unit performs a correlation operation using the received CDMA modulated signal and the spread code output from the reception spread code generation unit; The data demodulation unit demodulates the correlation data based on the symbol timing output from the reception symbol timing generation unit, and outputs timing information for each frame from the demodulation result. A data demodulation unit for outputting certain SFN data, wherein the control unit includes a symbol timing data including an instruction to generate a specific symbol timing. Data, and spreading code data including an instruction to generate a specific spreading code,
A control unit that outputs change start SFN data that is information of the specific symbol timing and the timing of a frame that outputs the specific spread code, wherein the setting timing management unit transmits the SFN data and the change start SFN data to A setting timing management unit that monitors a timing of each frame based on the timing, and outputs an output timing signal when a timing of a specific frame is reached, wherein the first setting holding unit is configured to output the output timing signal from the control unit. A first setting holding unit that stores symbol timing data and outputs the stored symbol timing data when the output timing signal is input, wherein the second setting holding unit outputs an output from the control unit. Storing the spread code data, and storing when the output timing signal is input. A second setting holding unit that outputs the spread code data, wherein the receiving symbol timing generation unit generates a symbol timing based on the symbol timing data output from the first setting holding unit; A receiving symbol timing generator for outputting, the receiving spreading code generator, the spreading code data output from the second setting holding unit, and a symbol timing output from the receiving symbol timing generator. A CDMA transmission / reception circuit, which is a reception spread code generation unit for generating and outputting a spread code based on the CDMA transmission / reception code. 2. A data generation unit, a spreading unit, a third setting holding unit, a fourth setting holding unit, a transmission symbol timing generation unit, and a transmission spreading code generation unit, The generation unit is a data generation unit that generates and outputs transmission data based on the symbol timing output from the transmission symbol timing generation unit, and the spreading unit performs a spreading process using the transmission data and a spreading code. And a processing unit that outputs a processing result as a CDMA modulated signal. The third setting holding unit stores the symbol timing data output from the control unit, and outputs the output timing signal output from the setting timing management unit. Is a third setting holding unit that outputs the stored symbol timing data when is input, and wherein the fourth setting holding unit outputs an output from the control unit. A fourth setting holding unit that stores the spread code data obtained, and that outputs the stored spread code data when the output timing signal is input, wherein the transmission symbol timing generation unit includes: A symbol timing generator for transmission that generates and outputs a symbol timing based on the symbol timing data output from the setting holding unit of No. 3; 2. A transmission spread code generator for generating and outputting a spread code based on the output spread code data and the symbol timing output from the transmission symbol timing generator. CDMA
Transmission / reception circuit. 3. A setting timing management unit, comprising: an adding unit that adds a specified numerical value to the input SFN data; and an SF that holds and outputs the input change start SFN data.
An N holding unit, a comparing unit that compares the addition result of the adding unit and the change start SFN data held in the SFN holding unit, and outputs a comparison result. A frame timing generation unit, a logical product operation unit for performing a logical product operation of the comparison result of the comparison unit and the frame timing, and holding and outputting a setting flag signal indicating that new change start SFN data has been input A flag holding unit that performs the selection and selects a calculation result or 0 of the AND operation unit based on a value of the setting flag signal held by the setting flag signal, and outputs the result as an output timing signal; 3. The method according to claim 1, wherein when the unit selects the operation result of the AND operation unit, the flag holding unit deletes the held content. CDMA transceiver circuit of the mounting. 4. A correlation operation unit, a data demodulation unit, a control unit, a setting timing management unit, a first reception symbol timing generation unit, a second reception symbol timing generation unit, and a first reception symbol timing generation unit. A CDMA receiving circuit comprising a selection unit, a first reception spreading code generation unit, a second reception spreading code generation unit, and a second selection unit, wherein the correlation operation unit receives the received CDMA modulation signal. A correlation operation unit that performs a correlation operation using the signal and the spreading code output from the reception spreading code generation unit, and outputs a calculation result as correlation data, wherein the data demodulation unit is The correlation data is demodulated on the basis of the output symbol timing, and based on the demodulation result, S which is timing information for each frame is used.
A data demodulation unit that outputs FN data, wherein the control unit transmits the symbol timing data including an instruction to generate a specific symbol timing to the first or second reception symbol timing generation unit, The first or second receiving spreading code generator outputs spreading code data including an instruction to generate a specific spreading code to the one generating symbol timing not selected by the first selector. Out of the second selection unit, a change start SF that is output to a person generating a spread code not selected by the second selection unit and is information on the specific symbol timing and the timing of a frame for outputting the specific spread code.
A control unit that outputs N data to the setting timing management unit, wherein the setting timing management unit monitors a timing of each frame based on the SFN data and the change start SFN data, and determines a timing of a specific frame. A setting timing management unit that inverts and outputs the output value of the selection signal at the time when the first or second symbol timing generation unit for reception receives the symbol timing data based on the symbol timing data output from the control unit. , A reception symbol timing generation unit that generates and outputs a symbol timing, wherein the first or second reception spread code generation unit includes the spread code data output from the control unit and the first selection. A receiving spread code generation unit that generates and outputs a spread code based on the symbol timing output from the unit. The first selection unit selects and outputs one of the symbol timings output from the first and second reception symbol timing generation units, and outputs the selection timing output from the setting timing management unit. A first selector for switching the symbol timing and outputting the inverted signal when the signal is inverted, wherein the second selector is one of the spreading codes output from the first and second receiving spreading code generators; A CDMA transmission / reception circuit, wherein the CDMA transmission / reception circuit is a second selection unit that selects and outputs one of them and, when the selection signal is inverted, switches and outputs a spread code. 5. A data generation unit, a spreading unit, a third transmission symbol timing generation unit, a fourth transmission symbol timing generation unit, a third selection unit, and a third transmission spreading code. A generating unit; a fourth transmitting spread code generating unit;
The data generation unit is a data generation unit that generates and outputs transmission data based on the symbol timing output from the third selection unit. A spreading unit that performs a spreading process using the code and outputs a processing result as a CDMA modulated signal, wherein the third or fourth transmission symbol timing generation unit is based on the symbol timing data output from the control unit. A transmission symbol timing generation unit that generates and outputs a symbol timing, wherein the third or fourth transmission spreading code generation unit includes the spreading code data output from the control unit and the third A transmission spread code generation unit that generates and outputs a spread code based on the symbol timing output from the selection unit, wherein the third selection unit is And selecting and outputting one of the symbol timings output from the third and fourth transmission symbol timing generation units. When the selection signal output from the setting timing management unit is inverted, the symbol timing is switched and output. A third selecting unit, wherein the fourth selecting unit selects and outputs one of the spreading codes output from the third and fourth transmitting spreading code generating units, 5. The CDMA transmission / reception circuit according to claim 4, wherein the fourth selection unit switches and outputs a spreading code when the selection signal is inverted. 6. A setting timing management unit, comprising: an adding unit that adds a prescribed numerical value to the input SFN data; and an SF that holds and outputs the input change start SFN data.
An N holding unit, a comparing unit that compares the addition result of the adding unit and the change start SFN data held in the SFN holding unit, and outputs a comparison result. A frame timing generation unit, a logical product operation unit for performing a logical product operation of the comparison result of the comparison unit and the frame timing, and holding and outputting a setting flag signal indicating that new change start SFN data has been input A flag holding unit that performs the operation of the AND operation unit or 0 according to the value of the setting flag signal held by the setting flag signal, and outputs the selected result as an output timing signal; and the output timing signal. Outputs a selection signal based on
An inverting output unit that inverts and outputs a selection signal when the output timing signal has a specific value, wherein when the selection unit selects an operation result of the AND operation unit, the flag holding unit stores 6. The CDMA transmission / reception circuit according to claim 4, wherein the CDMA transmission / reception circuit is configured to delete the CDMA transmission and reception.