JP2002063225A - Method for verifying electronic circuit, design method, devices for these methods, and recording medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To automatically verify whether the dispose position of a noise coping part for reducing reflected noise is suitable or not. SOLUTION: Necessary data are extracted from the design data of an electronic circuit, and whether the data include a noise coping part or not is checked. When the data include the noise coping part (e.g. dumping resistor Rd), a maximum allowable distance Lmax to be a maximum signal line distance between the input position of a pulse signal and its reflecting position is calculated so that reflection delay time Tpd required when the pulse signal inputted to a signal line E1 at the time of operation is reflected by an impedance mismatching position (Rd terminal) and returned to the relevant pulse signal is less than the transition time τr of the voltage level of the pulse signal. Then whether a signal line distance D-Leng between the noise coping part Rd and the electronic part (driver Dv) is suitable or not is judged on the basis of the obtained maximum allowable distance Lmax and the judged result is outputted.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an IC which operates at high speed.
Optimizing the circuit by verifying that the noise suppression components used to suppress reflected noise such as damping resistance and unnecessary electromagnetic radiation noise connected to signal lines connecting electronic components such as The present invention relates to a method for verifying an electronic circuit capable of providing information useful for conversion, and a method for designing an electronic circuit for performing correction based on this information. The present invention also relates to an electronic circuit verification device and a design support device that execute the verification method or the design method, and a recording medium on which an electronic circuit verification program including a step of performing the verification method is recorded. .

[0002]

2. Description of the Related Art In a circuit board such as a printed board (hereinafter referred to as a circuit board), a signal line for connecting various electronic components mounted on the circuit, a power line for supplying a power supply voltage and a reference potential to the electronic components. Are formed in a predetermined pattern on the insulating substrate surface. The signal line forms a signal propagation path together with a mounting pattern of an electronic component, a bent portion of a pattern, a discontinuous portion of a via or the like. With the recent miniaturization, higher performance, and higher functionality of electronic devices,
The pattern density of a built-in circuit board is also increasing, and the design of the circuit board is becoming more complicated due to the introduction of a multilayer board and the like. The circuit board pattern design is performed by a design support device (C
AD device), and the pattern after design is verified by an operation simulator. If the verification result is good, the final pattern is determined. If the verification result shows insufficiency, the pattern is corrected. Design efficiency has been improved.

On the other hand, in the field of semiconductor integrated circuits,
Electronic components are collectively formed on a semiconductor substrate such as silicon, and signal lines and the like are formed on an insulating film thereon. Also in this circuit design, the design is made more efficient by CAD using process and operation simulation as appropriate.

In these circuit designs, the reflectance ρ when a signal flows from a characteristic impedance Z0 to a characteristic impedance Z1 on a certain line is generally expressed by the following equation (1).

Ρ = (Z1−Z0) / (Z1 + Z0) (1)

Here, the value of the reflectance ρ of the signal calculated by the equation (1) indicates how much reflection occurs with respect to the input. For example, when Z1 = Z0, the reflectance is ρ = 0, which means that all signals input from the impedance Z0 are transmitted to the impedance Z1 and no reflected wave is generated. That is, if the output impedance of the driver that sends out the signal to the signal path, the characteristic impedance of the signal line, and the input impedance of the receiver that receives the signal transmitted through the signal line have the same value, the signal output from the driver is: Reach the receiver without waveform deterioration due to reflection.

However, CMOS (C
output impedance of IC is 20Ω
The input impedance is several orders of magnitude higher than the output impedance. As for the signal line, the characteristic impedance of the signal line may be specified for the reasons of the configuration of the printed circuit board or by some semiconductor manufacturers. Therefore, the characteristic impedance of the signal line is 40Ω.
Approximately 100Ω is common. Therefore, in a current mainstream printed circuit board or the inside of a CMOS IC in which it is assumed that a CMOS IC is used as an IC to be mounted, a reflection phenomenon occurs in a signal line connecting between ICs or elements in many of them.

By the way, with respect to a low-speed digital signal, a clean signal is still transmitted from the driver to the receiver without using a noise suppression component such as a damping resistor. On the other hand, a high-speed digital signal contains many harmonic components. In particular, when the harmonic components are repeatedly reflected on the impedance mismatching surface, the waveform of the original signal deteriorates due to the influence. Further, this becomes a factor of increasing the radiation noise intensity. Therefore, as shown in FIG. 15, a damping resistor Rd for series termination or a resistor Rac for AC parallel termination is used.
It is common practice to use a noise suppression component such as p and a capacitor Cacp to suppress reflection and reduce signal line noise. It is generally said that it is better to arrange the damping resistor Rd as close to the driver Dv as possible (by shortening D-Leng in FIG. 15). It is said that it is better to arrange the AC parallel terminations Racp and Cacp as close as possible to the receiver Rv (by shortening RC-Leng in FIG. 15). When the waveforms are actually observed with a measuring instrument, it is known that the amount of reflected noise is smaller in the former case when the distances D-Leng and RC-Leng are shortened and when the distances are longer. It is known that the effect of the damping resistance decreases as the damping resistor Rd is separated from the driver Dv, and the effect of the AC parallel termination decreases as the AC parallel termination resistor Racp is separated from the receiver Rv.

[0008]

With the recent trend toward smaller, thinner, more sophisticated and higher-speed electronic devices, electronic components to be mounted on a substrate area (or semiconductor components to be formed in an IC). The percentage of numbers has increased. In addition, as the operating frequency has increased, the number of signal lines for which noise suppression components need to be arranged has also increased. This reduces the component mounting area and places noise suppression components such as damping resistors near high-speed drivers, or
It has become increasingly difficult to provide AC parallel termination near receivers that receive high-speed signals.

As a result, in many cases, noise suppression components have to be arranged at a place slightly away from a high-speed driver or a high-speed signal receiving receiver. In that case, in the conventional circuit design, it has not been possible to easily know how far the noise suppression component may be arranged away from the driver or the receiver. Further, in the conventional circuit design, when there is no space for the noise suppression component and there is a signal line to which the noise suppression component cannot be connected despite high-speed wiring, the length of the signal line is reduced to reduce the noise. Sometimes, it was not possible to easily know how far the signal line would be shortened so that the transmission signal waveform would not be distorted. Therefore, the current situation is that the circuit designer arranges the noise countermeasure components in positions that do not cause a problem empirically in order from the IC (or the circuit block) having the highest operating frequency. However, with this method, while noise suppression components are connected to places that are originally unnecessary in some places, inconsistencies and inefficiencies have arisen in that noise suppression components cannot be arranged in necessary places.

SUMMARY OF THE INVENTION An object of the present invention is to provide a position of a noise suppression component connected to a target signal line, that is, a distance between a noise suppression component and an electronic component and a necessary value without largely changing a conventional circuit board design process. An object of the present invention is to propose a method of verifying an electronic circuit that can verify the performance and thereby increase the design efficiency and reduce the design cost, and a method of designing an electronic circuit using the verification method. Further, another object of the present invention is to execute an electronic circuit verification device and a design support device for executing the verification method or the design method, and to record an electronic circuit verification program including a step of performing the verification method. Recording medium.

[0011]

A method for verifying a circuit board according to a first aspect of the present invention is a method for verifying an electronic circuit having a signal line to which a plurality of electronic components are connected. From the data, data of a specific signal line among the signal lines and data of an electronic component connected to the specific signal line are extracted, and based on the data of the electronic component, the noise suppression component Investigate whether or not the component is included in the electronic component.As a result of the investigation, when the noise suppression component is included in the plurality of electronic components, the impedance is determined after a pulse signal is input to the specific signal line during operation. This is the maximum signal line distance between the input point of the pulse signal and the reflection point such that the reflection delay time when returning to the pulse signal after being reflected at the mismatching point is within the transition time of the voltage level of the pulse signal. The maximum permissible distance is calculated based on the data of the specific signal line and the electronic component, and based on the maximum permissible distance, the noise suppression component and the electronic component to which the noise prevention component is to be arranged close to Is determined as to whether the signal line distance is appropriate, and the result of the above determination is output.

In calculating the maximum allowable distance, preferably,
A propagation delay time per unit distance of the signal line is calculated based on the data of the specific signal line, and a voltage level transition time of the pulse signal output from the electronic component to the specific signal line is calculated as the electronic component. A parameter is extracted from the data, the extracted voltage level transition time is divided by the propagation delay time to calculate a parameter, and a value obtained by multiplying the parameter by a predetermined coefficient is calculated as the maximum allowable distance. in this case,
Preferably, the output impedance of the electronic component that outputs the pulse signal is extracted from the electronic component data, the characteristic impedance of the signal line is calculated using the data of the specific signal line, and the maximum allowable distance is calculated. The value of the predetermined coefficient is changed according to the difference between the characteristic impedance and the output impedance. Also, preferably,
The calculation of the propagation delay time and the characteristic impedance is performed according to the wiring structure of the specific signal line.

In the present invention, preferably, the electronic components are classified into a driver that sends the pulse signal to the specific signal line and a receiver that receives the pulse signal transmitted through the specific signal line. With reference to the electronic component data, a high-speed driver that operates at a predetermined speed or higher and requires noise countermeasures is selected from the drivers. This high-speed driver is preferably a driver in which the voltage level transition time of the output pulse included in the electronic component data is equal to or less than a predetermined value. In the investigation of the noise suppression component, preferably, a resistance element connected to a high-speed signal line between the high-speed driver and the receiver is investigated, and the resistance element detected by the investigation is connected to the high-speed signal line. When connected in series, it is determined that the resistance element is the first noise suppression component that performs series termination of the high-speed driver,
When the resistance element detected by the above investigation is connected in parallel to the high-speed signal line, it is determined that the resistance element is a resistance element included in the second noise suppression component that performs the AC parallel termination of the receiver. In the determination of the appropriateness of the signal line distance, the signal line distance between the first noise suppression component and the high-speed driver or the signal line distance between the second noise suppression component and the receiver is determined. , Is determined to be less than or equal to the maximum allowable distance. Further, preferably,
The length of the high-speed signal line between the high-speed driver and the receiver is measured, and the length of the high-speed signal line is compared with the maximum allowable distance. When the noise suppression component is connected to the high-speed signal line within the maximum allowable distance or less, it is determined that the noise suppression component is unnecessary, and the appropriateness of the signal line distance for the noise suppression component is determined. The result and the result of the determination that the noise suppression component is unnecessary are output. When there are a plurality of pairs of the high-speed driver and the receiver,
Preferably, the calculation of the maximum allowable distance and the determination of the appropriateness of the signal line distance are repeatedly executed for each of the sets for each high-speed signal transmission path of the high-speed signal line. After performing the appropriateness determination of the signal line distance, preferably, change the specified signal line to another signal line, extract the signal line data and the electronic component data, calculate the maximum allowable distance, The verification of the connection position of the noise suppression component based on the determination of the appropriateness of the signal line distance is repeatedly executed until the verification of all the designed signal lines is completed.

A method for designing a circuit board according to a second aspect of the present invention is a method for designing an electronic circuit having a signal line to which a plurality of electronic components are connected. The data of the specific signal line among the signal lines and the data of the electronic component connected to the specific signal line are extracted, and based on the data of the electronic component, the noise suppression component is connected to the plurality of electronic components. If the noise suppression component is included in the plurality of electronic components as a result of the investigation, if a pulse signal is input to the specific signal line during operation, the impedance mismatch portion is determined. Is the maximum signal line distance between the input point and the reflection point of the pulse signal, and the reflection delay time when the light is reflected by the pulse signal and returns to the pulse signal is within the transition time of the voltage level of the pulse signal. The distance is calculated based on the data of the specific signal line and the electronic component, and based on the maximum allowable distance, the noise countermeasure component and the electronic component to which the noise countermeasure component should be arranged close to each other. Determine whether the signal line distance between them is appropriate, and according to the result of the above determination, change the connection position of the noise suppression component within the specific signal line so that the signal line distance is within an appropriate range. change. Preferably, it is determined whether or not the noise reduction performance of the noise reduction component whose connection position has been changed is appropriate. If the noise reduction performance is not appropriate, the noise reduction performance is adjusted so that the noise reduction performance becomes appropriate. Change the characteristic value of the part.

A circuit board verification apparatus according to a third aspect of the present invention is an electronic circuit verification apparatus having a signal line to which a plurality of electronic components are connected. Means for reading out the design data of the electronic circuit from the registration means, and extracting data of a specific signal line among the signal lines and data of an electronic component connected to the specific signal line from the design data. Extraction means, investigation means for examining whether or not the noise suppression component is included in the plurality of electronic components based on the data of the electronic component, and as a result of the examination, the noise suppression component is When a pulse signal is input into the specific signal line during operation, a reflection delay time when the pulse signal is reflected at an impedance mismatching point and returns to the pulse signal during the operation is returned to the pulse signal. The maximum allowable distance, which is the maximum signal line distance between the input point and the reflection point of the pulse signal within the transition time of the voltage level of the signal, is calculated based on the data of the specific signal line and the electronic component. Calculating means for determining, based on the maximum allowable distance, whether or not a signal line distance between the noise suppression component and an electronic component to which the noise suppression component is to be arranged in proximity is appropriate; Output means for outputting a result of the determination.

A circuit board design support apparatus according to a fourth aspect of the present invention is a design support apparatus for supporting the design of an electronic circuit having a signal line to which a plurality of electronic components are connected. A registration unit for registering circuit design data; a design support unit for supporting the design of the electronic circuit; and a verification unit for verifying connection positions of electronic components in the electronic circuit provisionally designed by the design support unit. The verification unit reads the design data from the registration unit, and extracts data of a specific signal line among the signal lines and data of an electronic component connected to the specific signal line from the design data. Extracting means for determining whether or not the noise suppression component is included in the plurality of electronic components based on the data of the electronic component. When included in the product, the reflection delay time when the pulse signal is input into the specific signal line during operation and then reflected at the impedance mismatching point and returns to the pulse signal during operation is determined by the voltage level of the pulse signal. Computing means for calculating a maximum allowable distance, which is a maximum signal line distance between an input point of the pulse signal and a reflection point, which is within the transition time, based on the data of the specific signal line and the electronic component; Determining, based on a maximum permissible distance, whether the signal line distance between the noise suppression component and an electronic component to which the noise suppression component is to be arranged in proximity is appropriate; The unit changes the connection position of the noise suppression component in the specific signal line so that the signal line distance is within an appropriate range according to the determination result of the determination unit.

The circuit board verification device and the design support device according to the third and fourth aspects of the present invention having the above-described configuration specifically implement the verification method or the design method according to the first and second aspects. It is implemented by any means. Since the verification device is included in the design support device as a registration unit and a verification unit, the operation (operation) of the design support device will be described here.

First, the design support section assists a designer, thereby temporarily designing an electronic circuit having a predetermined circuit function. The design data of the provisionally designed electronic circuit is temporarily registered in the registration unit. In addition, the registration unit stores various types of electrical data of electronic components in the electronic circuit (for example, input / output signals, clock signals, power supply voltage, operating frequency information, and electrical characteristics such as input / output characteristics and delay characteristics). Data) is registered.

At the time of verification of this provisionally designed electronic circuit,
First, a certain signal line is specified from all the signal lines. Further, the electronic components are classified into a driver and a receiver, and a high-speed driver that outputs a high-speed signal is selected from the drivers. Next, the design data of the specified signal lines and electronic components is read from the registration unit. Extraction means extracts necessary signal line data (wiring length, wiring width W, substrate permittivity ε, substrate thickness h, etc.) and electronic component data (output impedance, etc.) from these design data.
Investigation means investigates whether or not a noise suppression component is included in the electronic component based on the extracted electronic component data. As a result of this investigation, when the noise suppression component is included in the electronic component, the calculating means calculates a maximum allowable distance which is a criterion for determining whether or not the connection position of the noise suppression component to the signal line is appropriate. Here, the maximum allowable distance is a reflection delay time when a pulse signal is input into a specific signal line during operation and then reflected at an impedance mismatching point and returned to the pulse signal. Is the maximum distance between the input point of the pulse signal and the reflection point within the transition time. Then, based on the maximum allowable distance, the determination means determines whether or not the signal line distance between the noise suppression component and the electronic component to which the noise suppression component is to be located is appropriate.
For example, the signal line distance between the first noise suppression component for series termination such as a damping resistor and the high-speed driver, or the signal line distance between the second noise suppression component for AC parallel termination and the receiver is respectively It is determined whether the distance is equal to or less than the maximum allowable distance. When both the first and second noise suppression components are arranged within the maximum allowable distance, it is determined that no countermeasure is required. When the first or second noise suppression component is arranged outside the maximum allowable distance, Is output so as to fall within the range of the maximum allowable distance. On the other hand, when the distance between the driver and the receiver is within the maximum allowable distance and the first or second noise suppression component is present, it is determined that the noise suppression component is unnecessary, and the determination result is output.

Thereafter, the circuit is modified by the design support unit having received the result of this determination so as to satisfy the above instruction. As a result of the circuit modification, the distance between the input point of the pulse signal to the high-speed signal line (output end of the driver) and the reflection surface of the signal due to impedance mismatch (the end of the damping resistor or the input end of the receiver) is optimized. . When a pulse signal is input to the signal line after the optimization, when a harmonic component generated at the time of rising (or falling) of the pulse signal is reflected by the impedance mismatching surface and returned to the pulse signal, This pulse signal is still rising (or falling). Therefore, the influence of the reflection on the high-speed signal is limited, and the high-frequency noise is not superimposed on a high-voltage or low-level constant voltage portion of the pulse signal waveform.

A recording medium according to a fifth aspect of the present invention records a verification program for verifying a connection position of the electronic component in the signal line for an electronic circuit having a signal line to which a plurality of electronic components are connected. A recording medium included in data, wherein in a processing step in the verification program, data of a specific signal line among the signal lines and an electronic component connected to the specific signal line are obtained from design data of an electronic circuit. Extracting the data of the electronic component, and investigating whether or not the noise suppression component is included in the plurality of electronic components based on the data of the electronic component. When included in a plurality of electronic components, when a pulse signal is input into the specific signal line during operation, the pulse signal is reflected at an impedance mismatching point and returns to the pulse signal. The reflection delay time of the pulse signal is within the transition time of the voltage level of the pulse signal. The maximum allowable distance, which is the maximum signal line distance between the input point of the pulse signal and the reflection point, is determined by the specific signal line and the electronic component. And determining whether the signal line distance between the noise elimination component and the electronic component to which the noise elimination component is to be arranged in proximity is appropriate based on the maximum allowable distance. Performing the steps.

[0022]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention can be widely applied to electronic circuits such as semiconductor integrated circuits as well as circuit boards such as printed wiring boards. Here, an example in which a design support apparatus (CAD apparatus) and a design method according to an embodiment of the present invention are applied to the design of a circuit board such as a printed wiring board will be described with reference to the drawings. The embodiments of the verification apparatus and the verification method according to the present invention are included in the following embodiments of the CAD apparatus and the method of designing a circuit board using the same. Further, the recording medium according to the present invention is a recording medium such as a floppy (registered trademark) disk in which processing steps related to the verification of the following design method are described in a program language, and the description thereof will be omitted. Omitted.

FIG. 1 is a block diagram showing a schematic configuration of a CAD apparatus according to the embodiment. This CAD apparatus is roughly composed of a design support unit 1 having a computer as a core, a verification unit 2 for verifying a pattern of a circuit board designed by the design support unit 1, a registration unit 3 as an external storage device, and a An input unit 4 includes a keyboard, a mouse, and other input devices that accept operations, and an output unit 5 includes a display, a printer, a plotter, and other output devices.

The design support unit 1 temporarily outputs circuit board design data (data of wiring patterns of signal lines and power supply lines, component mounting patterns, via pads, boards, etc.) to the registration unit 3 and temporarily registers them. The design support unit 1 inputs the signal line data to the verification unit 2 via the registration unit 3. On the other hand, the verification result from the verification unit 2 may be similarly output to the design support unit 1 via the registration unit 3, but in the illustrated example, the verification result is directly input to the design support unit 1. It has a configuration. The registration unit 3 includes a board database including design data and board data of signal lines of a circuit board, and a database of IBIS information that is general-purpose IC electrical characteristic information. The input unit 4 is connected to the design support unit 1 and the verification unit 2 that output input data and instructions. The output unit 5 is connected to the design support unit 1 and the verification unit 2, and inputs the verification result of the verification unit 2, the information on the tentative design pattern and the corrected pattern of the design support unit 1, and outputs the information to the outside in a predetermined output format. Output or display.

The verification unit 2 includes a conversion unit 21, an extraction unit 22, an operation unit 23, an investigation determination unit 24, a storage unit 25, and a control unit 2.
6. Each of the components 21 to 25 in the verification unit 2 executes predetermined processing contents under the control of the control unit 26 according to a predetermined procedure. The conversion unit 21 converts the format of the data obtained from the various databases from the registration unit 3 and outputs the converted data to the storage unit 25 or the extraction unit 22. The extraction unit 22 extracts signal line data and substrate data from the substrate database in the storage unit 25. Further, from the IBIS information stored in the storage unit 25, the electrical data of an electronic component (IC) to which a specific signal line specified by the instruction of the control unit 26 is connected is extracted. The electronic components are classified into drivers and receivers based on the extracted data. Further, a high-speed driver is selected based on a predetermined criterion, and a combination list of the high-speed driver and a receiver receiving the output is created. This list is stored in the address specified in the storage unit 25. The extraction unit 22 and the storage unit 25, according to an instruction from the control unit 26,
For each signal line to be verified, data extraction and
Selection of electronic components, creation of a combination list of high-speed drivers and receivers, and storage of necessary data are repeated. The storage unit 25 in the present embodiment appropriately holds the results and input data processed by all the other components 21 to 24 and 26 in the verification unit 2. Therefore, the storage unit 25 is directly connected to other components in the verification unit 2. In addition, the storage unit 25 is connected to the input unit 4 so as to be able to hold an initial condition set and input from the input unit 4 as one of the input data. The command for taking in the initial condition is performed by, for example, the control unit 26.

The arithmetic unit 23 reads out the extracted design data and electrical data from the storage unit 25 for every signal line to be verified, and based on the read data, the connection position of the noise suppression component to the signal line. Calculate the maximum allowable distance Lmax as a criterion of the suitability of. Here, the maximum allowable distance Lmax is a reflection delay time when a pulse signal is input into a specific signal line during operation, reflected at an impedance mismatching point and returned to the pulse signal, and is a voltage of the pulse signal. This is the maximum distance between the input point of the pulse signal and the reflection point within the level transition time.

Hereinafter, a method of calculating the maximum allowable distance Lmax will be described using equations. First, based on the signal line data,
The characteristic impedance Z0 of the specified signal line and the propagation delay time Tpd per unit distance are calculated. This calculation is performed according to the wiring structure of the signal line.

FIG. 2A shows a microstrip line, and FIG. 2B shows a single strip line.
(C) shows each wiring structure of the double strip line.
A microstrip line E1 having a line width W [μm] and a thickness t [μm] shown in FIG.
[Μm] formed on a dielectric layer DiL1 such as a substrate,
A power supply plate P1 to which a constant voltage such as a reference voltage is applied is arranged on the back surface of the dielectric layer DiL1. The effective relative permittivity εreff between the microstrip line E1 and the power plate P1 depends on the line width W of the microstrip line E1 and the distance h between the microstrip line E1 and the power plate P1.

On the other hand, in the strip line structure,
A single wiring layer (single strip line,
2B) and a wiring having two layers (double strip line, FIG. 2C). A single strip line E2 having a line width W and a thickness t shown in FIG.
It is embedded in a dielectric layer DiL2 having a dielectric constant of εr.
The thickness of the dielectric layer DiL2 is d0 [μm], and power supply plates P2 and P3 to which a constant voltage such as a power supply voltage or a reference voltage is applied are arranged on the front and back surfaces, respectively. The line width W [μm] and the thickness t shown in FIG.
[Μm] double strip lines E3 and E4 are embedded in a dielectric layer DiL3 having a dielectric constant εr. A power supply plate P to which a constant voltage such as a power supply voltage or a reference voltage is applied to the front and back surfaces of the dielectric layer DiL2, respectively.
2, P3 are arranged. Distance between strip line E3 and power supply plate P2, and strip line E4
The distance between the power supply plate P3 and the power supply plate P3 is d1 [μm], and the distance between the strip lines E3 and E4 is d2 [μm].
m].

In the calculation of the characteristic impedance Z0 [Ω], the calculation formulas (2-1) and (2-2) are used when the signal line is the microstrip line E1, and the calculation is performed when the signal line is the single strip line E2. Equation (2-3) is used, and when the signal line is the double strip line E3, E4, the calculation equation (2-
Use 4). These equations (2-1) to (2-4) are all experimental equations obtained from the form of the wiring structure. Note that "Rt" in the equation represents a square root operation symbol.

(Equation 2)

Propagation delay time Tpd per unit signal line length
[S / m] indicates that the signal line is a microstrip line E1
In the case of (1), the calculation formula (3-1) is used, and the signal line is a single strip line E2 or a double strip line E3, E
In the case of 4, the calculation formula (3-2) is used. These equations (3-1) and (3-2) are also experimental equations obtained from the form of the wiring structure. Note that "Rt" in the equation represents a square root operation symbol.

(Equation 3)

The characteristic impedance Z0 [Ω] of the signal line and the propagation delay time Tpd [s /
m], the output impedance Rs [Ω] of the driver extracted by the extraction unit 22, and the rise time τ of the pulse signal.
The maximum allowable distance Lmax [m] is calculated using r (fall time τf) [s]. In this calculation,
Equation (4-1) is used when the output impedance Rs is equal to or greater than the characteristic impedance Z0. When the output impedance Rs is less than the characteristic impedance Z0, five cases are further divided according to the difference, and one of the equations (4-2) to (4-6) is used. Note that K1 to K5 in Expressions (4-2) to (4-6) are:
It is a predetermined coefficient that satisfies the relationship of K1>K2>K3>K4> K5. This coefficient value is set as an initial condition.

When Rs ≧ Z0: τr / 2 ≧ Tpd × Lmax (4-1) When Rs <Z0 and Z0−Rs ≦ 10Ω: Lmax = (τr / Tpd) × K1 ( 4-2) When 10Ω <Z0−Rs ≦ 20Ω: Lmax = (τr / Tpd) × K2 (4-3) When 20Ω <Z0−Rs ≦ 30Ω: Lmax = (τr / Tpd) × K3 ( 4-4) When 30Ω <Z0-Rs ≦ 40Ω: Lmax = (τr / Tpd) × K4 (4-5) When 40Ω <Z0-Rs: Lmax = (τr / Tpd) × K5 (4- 6)

Prior to the above-mentioned calculation, the investigation judging means 24 examines whether or not a noise suppression component is included in the electronic component based on the extracted electronic component data. Further, after the above calculation, the investigation determination means 24 determines whether or not the signal line distance between the noise countermeasure component and the electronic component where the noise countermeasure component is to be disposed is appropriate based on the obtained maximum allowable distance Lmax. Judge. Specifically, the damping resistance R shown in FIG.
d and the distance D-Leng between the drivers or the resistor Racp for AC parallel termination and the distance RC-Leng between the receivers are measured and compared with the maximum allowable distance Lmax to determine whether the connection positions of these noise suppression components are appropriate. Judge. Also, the necessity of noise suppression components is determined. The investigation determination means 24
This investigation and determination process is repeated for all signal lines.

The result of this determination is output from the output unit 5 as, for example, an error check list, for example, displayed on a screen. The result of the determination is input to the design support unit 1 as a list of signal line names and noise suppression components that need to be corrected. The designer looks at the list output from the output unit 5 and operates the design support unit 1 to determine the distance D-Leng or RC-Leng between electronic components where reflection is likely to be a problem.
Alternatively, in some cases, the total length T-Leng of the signal line is shortened and changed so as to be within the maximum allowable distance Lmax. The corrected circuit board data is fully registered in the registration unit 2,
Verification and correction of the circuit board are completed.

Next, a specific example of designing a circuit board having the structure shown in FIGS. 3 and 4 using the CAD apparatus having such a structure, and verifying and correcting the pattern will be described with reference to FIGS.
This will be described with reference to the flowchart of FIG.

FIG. 3 shows an example of an arrangement pattern of a driver, a receiver, and a signal line when a circuit board is mounted.
FIG. 4 is a diagram showing a wiring structure of a signal line. When the circuit board of this example is mounted, as shown in FIG. 3, a signal having a microstrip structure is provided between the first output pin of one driver Dv (IC100) and the first input pin of one receiver Rv (IC200). The line (microstrip line) E1 is connected. The signal line E1 has, for example, a total length T-Leng of 70 mm, a line width w of 100 μm, and a thickness t of 30 μm. For example, a dielectric layer DiL1 having a relative dielectric constant εr of 4.0 is formed on a power supply plate P1 held at a reference potential V _SS , and a signal line E1 is arranged on the dielectric layer DiL1. Also, the dielectric layer DiL1
, That is, the distance h between the power supply plate P1 and the signal line E1 is 100 μm. At this time, the above equation (2-2)
Signal line E1 and dielectric layer DiL1
Is between 3.0 and 3.0. A series terminating resistor (tamping resistor) Rd of the driver Dv is connected in the middle of the signal line E1. Tumbling resistance Rd
Is R101 and its resistance value is 47 [Ω]. The signal line distance D-Leng between the tumbling resistor Rd and the driver Dv is 50 [mm]. The output impedance Rs of the driver Dv is 20 [Ω], and the rise time τr of the pulse signal from the driver Dv is
Is 1 [ns].

FIG. 3 shows the simplest connection between the driver and the receiver and the signal lines. However, in an actual circuit board, a plurality of signal lines may exist between the driver Dv and the receiver Rv. . Further, there are various modes such as branching from the middle of a signal line and inputting to another receiver. Here, taking these forms into account, FIG.
Verification and correction of the circuit board shown in FIG. 4 will be described.

First, in step ST1 of FIG. 5, initial conditions are set. That is, the above equations (4-2) to (4)
-6) Coefficients K1 to K5 (K1>K2>K3> K4
> K5) is set. Here, K1, K2, K3,
The constants of K4 and K5 are set to 0.16, 0.11, 0.
09, 0.085, and 0.08 are set. These initial conditions are manually input by the designer from the input unit 4 of FIG. 1 and stored in a predetermined address of the storage unit 25.

In step ST2, all wiring names are extracted as data of the temporarily designed circuit board from the board database input from the design support apparatus 1 and registered in the registration unit 3. Specifically, after converting the board database information read from the registration unit 3 into a format by the conversion unit 21, the extraction unit 22 extracts a wiring name from the format, and a list of the extracted wiring names is stored in the storage unit 25. Write in a predetermined address. Further, the control unit 26 selects one wiring (signal line E1) from the extracted wiring name list.

In step ST3, the extraction unit 22 reads out and extracts the electronic components connected to the specific signal line E1 selected by the control unit 26 from the board database.
Further, the extracted electronic components are further classified into a driver Dv, a receiver Rv, and others, and are listed.

In step ST4, the extraction unit 22 extracts one driver (IC1) from the list of drivers Dv {Dv}.
00) to extract the high-speed evaluation data of the driver, for example, the rise time τr of the pulse signal, from the electronic component data. In step ST5, the investigation determination unit 2
4 checks whether or not the selected driver (IC 100) is high-speed based on the high-speed evaluation data, that is, whether or not the rise time τr is equal to or shorter than a predetermined value. As a result, if the speed is high, the driver (IC100)
Is specified as a high-speed driver (step ST6), and it is determined whether or not there is another unevaluated driver Dv in the driver list {Dv} (step ST7). The process of step ST7 is repeated. When the high-speed evaluation of all the drivers in the driver list {Dv} is completed, the processing flow proceeds to step ST8.

In step ST8, the extraction unit 22 creates a combination list {Dv, Rv} of the high-speed driver Dv and the receiver Rv connected to its output by a high-speed signal line. In the next step ST9, the investigation determination unit 24 selects one pair (IC100, IC200) from the combination list {Dv, Rv}, and sets the driver (IC
100) and the name of another electronic component connected to the signal line between the receiver (IC 200). The following step S
At T10, the purpose of use of the resistor is examined from the electronic components listed. Specifically, a method of connecting the resistor to the signal line is investigated. Based on the result, in step ST11, it is determined whether the resistance connected to the signal line between the driver (IC100) and the receiver (IC200) is a noise suppression component or a part thereof. If the result of this determination is that there is no noise suppression component, the process flow proceeds to step ST15c.

In step ST12, the checking and judging section 24 checks the termination type of the resistance of the noise countermeasure component identified by the judgment in step ST11 from the connection state of the resistance to the signal line. Specifically, step ST
At 12a, it is checked whether or not the resistor connected to the signal line is a series termination resistor. In this example, this step ST12a
Is determined as "YES", that is, "the series termination in which the resistor Rd is connected in series to the signal line E1". for that reason,
In step ST15a, the resistance Rd and the driver (I
C100) and a length 50 [m] of the signal line distance D-Leng.
m] is measured. Note that, other than the present example, for example, if the determination in step ST12a is “NO”,
Proceed to T12b. If "YES" is determined in step ST12b, that is, "the resistor is connected in parallel to the signal line and is the AC parallel termination for grounding the high frequency", the resistor and the receiver (IC20) are determined in step ST15b.
0) and the signal line distance RC-Leng is measured. In other cases, that is, when it is determined in step ST11 that there is no noise suppression component, the total length 70 [mm] of the signal line E1 between the driver (IC100) and the receiver (IC200) is measured in step ST15c. I do. In addition,
If both steps ST12a and ST12b are "NO", another set is searched from the list {Dv, Rv} (step ST13), and if there is another set, the process returns to step ST9 and repeats the same processing. Also, the list {Dv, Rv}
If there is no other set in the list, another wiring is searched from the wiring list (step ST14). If there is another wiring, the process returns to step ST3 and repeats the same processing. If there is no other wiring, the process is forcibly terminated.

In step ST16, the investigation judgment section 2
4 first stores the measured signal line length D-Leng (or RC-Leng, T-Leng) in the register of the measured value Leng. At this time, the measured value Leng is D-Leng,
Identification information indicating RC-Leng or T-Leng is also stored at the same time. Subsequently, the investigation determination unit 24 investigates the structure of the signal line whose length has been measured. Specifically, in this example, in step ST16a, it is determined whether the signal line is a microstrip line. As a result of this decision,
It is determined that “the signal line E1 is a microstrip line”, and in step ST17a, the arithmetic unit calculates the characteristic impedance Z0 [Ω] of the signal line E1 by using the equations (2-1) and (2-2). The signal line E is calculated by using the above equation (3-1).
Propagation delay time per unit signal line length Tpd [s /
m] is calculated. In this example, as a result, for the signal line E1, the characteristic impedance Z0 = 70Ω is calculated, and the propagation delay time Tpd = 1.27 × 10 ⁻⁸ s / m is calculated. In cases other than this example, “NO” in step ST16a
Then, in step ST16b, it is determined whether the signal line is a single strip line. This judgment is "YE
In the case of "S", in step ST17b,
By using the above equations (2-3) and (3-2), the characteristic impedance Z0 [Ω] of the signal line and the propagation delay time Tpd [s /
m] is calculated. If “NO” also in step ST16b, it is determined that the signal line is a double strip line, and
In step ST17c, the arithmetic unit 24 calculates the characteristic impedance Z of the signal line using the equations (2-4) and (3-2).
0 [Ω] and the propagation delay time Tpd [s / m] are calculated.

Next, the extraction unit 22 determines in step ST18
, The combination of the selected driver and receiver (IC
100, IC200) by IBI
Extract from S information. Thereby, the parameter of the signal output from the driver Dv, that is, the output impedance Rs is extracted. In this example, the output impedance Rs = 20 [Ω] of the signal line E1 is extracted.

In step ST19, the extracted output impedance Rs of the high-speed driver is compared with the characteristic impedance Z0 of the signal line E1. As a result of this comparison,
In this example, since the output impedance Rs is smaller than the characteristic impedance Z0, the processing flow is changed to step ST20.
a, where the arithmetic unit 23 calculates the above equation (4-
2) The maximum allowable distance Lmax is calculated using any one of the expressions (4-6). In this example, since the difference between the characteristic impedance Z0 and the output impedance Rs is as large as 50Ω, the equation (4-
6) is used to calculate the maximum allowable distance Lmax = 6.8 mm. If the characteristic impedance Z0 is equal to or less than the output impedance Rs, the processing flow proceeds to step ST.
20b, where the arithmetic unit 23 calculates
The maximum allowable distance Lmax is calculated using (4-1).

In step ST21, the investigation determination section 24
Translates the measured value Leng in the register into this maximum allowable distance L
Compare with max. If the measured value Leng in the register is larger than the maximum allowable distance Lmax, the investigation and determination unit 24
However, in step ST22a, it is determined from the identification information whether or not the measured value Leng in the register is obtained by measuring D-Leng. If the result is "YES",
Next, in step ST22d, the presence or absence of the AC parallel terminating resistor Racp is determined. This determination is for detecting unnecessary noise countermeasure components. If the determination result is "YES", as shown in FIG. 11, the countermeasure instruction DM11 saying "Racp is unnecessary. Please delete." It is determined. In this example, since there is no AC parallel termination resistor Racp, this countermeasure instruction DM11 is not performed, and the countermeasure instruction DM21, that is, the instruction of "shorten D-Leng so as to fall within an appropriate range" is determined. In the following step ST24a, D
−Leng within the appropriate range, and the damping resistance R
The suitability of d (Rd value) is determined, and if the Rd value is appropriate,
The countermeasure instruction process ends. If it is determined that the Rd value is inappropriate, in step ST25a, as shown in FIG. 11, a countermeasure instruction DM41 indicating that "the Rd value should not be changed to an appropriate value" is determined, and the countermeasure instruction step ends.

If "NO" is determined in the previous step ST22a, in step ST22b, the investigation determination unit 24 determines whether or not the measured value Leng in the register is a value obtained by measuring RC-Leng. Judge from. If the result of the determination is "YES", then step ST2
In FIG. 3c, as shown in FIG. 11, the countermeasure instruction DM of "shorten RC-Leng so that it falls within an appropriate range"
22 is determined. In a succeeding step ST24b, RC
With −Leng within the proper range, the suitability of the AC parallel termination resistance value Racp (Racp value) is determined, and if the Racp value is appropriate, the countermeasure instruction step ends. If it is determined that the Racp value is inappropriate, in step ST25b,
As shown in 1, "Do not change the Racp value to an appropriate value."
Is determined, and the countermeasure instruction step ends. If "NO" is determined in the step ST22b, in a step ST23d, as shown in FIG. 11, a countermeasure instruction DM23 for "shorten T-Leng so as to fall within an appropriate range", or a "serial or A"
Properly perform C parallel termination "is determined, and the countermeasure instruction step is completed.

If "YES" is determined in the previous step ST21, the check determining unit 2 proceeds to step ST22c.
4 judges from the identification information whether or not the measured value Leng in the register is a value obtained by measuring T-Leng. If the result of the determination is "YES", no countermeasure is instructed and "NO"
Then, in step ST23e, in FIG.
As shown in the figure, the countermeasure instruction DM12 of "Rd, Racp is unnecessary. Delete it." Is determined, and then the countermeasure instruction step is completed.

The signal line E1 and the driver D (IC1
00), the verification of the signal line E1 ends.

Next, in step ST26, the presence / absence of another driver-receiver pair (Dv, Rv) for transmitting / receiving a signal to / from the signal line E1 is checked. And else (D
v, Rv), if there is the step ST9 described above.
To ST26 in step ST26, "Other (Dv, R
v) Nothing is repeated until it is determined that there is none. Step ST2
If it is determined in step 6 that there is no other (Dv, Rv), the verification of the signal line E1 is completed, and the processing flow proceeds to step ST27.
Proceed to.

Thereafter, in step ST27, the presence or absence of another signal line is determined. If there is another unverified signal line, the above-described steps ST3 to ST27 are repeated in step ST27. Repeat until it is judged that there is not. If it is determined in step ST27 that there is no unverified signal line, finally, in step ST28, a countermeasure is displayed, for example, a signal line name of a portion requiring correction, a noise countermeasure component name, and a countermeasure instruction content are listed. When the output error check list is output from the output unit 5, all the verification steps are completed. Then, as described above, the design operator corrects the circuit while viewing the checklist. When the circuit correction is completed, the circuit board data after the correction is permanently registered in the registration unit 3, and the circuit board design is completed.

This circuit modification reduces the influence of the noise component when the harmonic component of the digital signal is reflected and superimposed on the original signal. FIG. 12A is a diagram illustrating reflection of high-frequency components when the distance D-Leng or RC-Leng between electronic components is larger than the maximum allowable distance Lmax. FIG. 12 (B) shows the result of the circuit modification.
FIG. 7 is a diagram illustrating reflection of high-frequency components when a distance D-Leng or RC-Leng between electronic components is smaller than a maximum allowable distance Lmax. Before the above circuit modification, the distance between the pulse signal input point (driver output end) to the high-speed signal line and the signal reflection surface F (damping resistor end or receiver input end) due to impedance mismatch is the maximum allowable distance. Longer than Lmax. For this reason, the high-frequency component s generated when the voltage level of the pulse signal rises from low level (L) to high level (H) (time: t1) is reflected by the reflection surface F, and returns to the original pulse signal. When returning (time: t2), the high-frequency component s deviates from the pulse rising point and is superimposed on, for example, a low level (L).
Therefore, the high frequency component s becomes noise and easily causes a malfunction.

On the other hand, as a result of the above-described circuit modification, the distance between the input portion (output end of the driver) of the pulse signal to the high-speed signal line and the reflection surface F of the signal due to the impedance mismatch is optimized. When the pulse signal is input to the signal line after the optimization, as shown in FIG. 12B, the harmonic component s generated at the time of rising (or falling) of the pulse signal (time: t1) has an impedance that is not equal to the impedance. When the pulse signal is reflected by the matching surface F and returns to the pulse signal (time: t3), the pulse signal is still rising (or falling). Therefore, high-frequency noise is not superimposed on a high-voltage or low-level constant voltage portion of the pulse signal waveform, and the influence of the noise on the high-speed signal is limited, and it is unlikely to cause a malfunction.

Further, by this circuit modification, the amount of ringing (overshoot) at the time of rising or falling of the waveform is reduced. FIGS. 13 and 14 show, as analysis results by the transmission line simulator, a signal waveform between a driver and a damping resistor (indicated as “driver side” and indicated by a broken line) when a predetermined clock signal is input, a damping resistor and a receiver. (Shown as "receiver side and shown by a solid line"), and the frequency of the clock signal is 10
At 0 MHz, the peak voltage value is 3.3 V, and the signal rise time τr (fall time τf) is 1 ns. The distance T-Leng between the driver and the receiver is 70 mm
The value of the damping resistance Rd is 47Ω. FIG.
Shows a case where D-Leng = 50 mm where the damping resistor Rd is inserted at a position 50 mm from the driver. FIG.
No. 4 is D-Leng = Lmax = 6.8 m due to circuit modification.
This shows the case where the value is modified to m.

As shown in FIG. 13, before circuit correction,
While the maximum voltage value of the 3.3 V digital pulse has reached about 4 V due to overshoot, it is suppressed to about 3.6 V after circuit correction. Similarly, undershoot has been reduced by circuit modifications. As a result, it can be seen that the ringing of the signal waveform can be effectively suppressed by reducing the reflection noise by properly arranging the noise suppression components. In addition, it has been experimentally found that the ringing of the signal waveform increases radiation noise from high-speed signal lines, and from this result, it is possible to reduce reflection noise and reduce radiation noise by properly arranging noise suppression components. Was confirmed to be effective.

The CAD apparatus and the circuit design method according to the present embodiment can be variously modified. For example, each of the components 21 to 26 of the verification unit 2 is a unit for extracting data and the like and performing a survey judgment.
It is also possible to use the components inside. In addition, most of the data exchange between the constituent units is performed via the storage unit 25.
The use of the storage means in the above is substantially the same. The verification method is not limited to FIGS. For example, the calculation formulas used in steps ST20a and ST20b are not limited to the equations (4-1) to (4-6), and the cases can be coarser or finer. Further, when searching for another wiring in step ST14 or step ST27, the search is started by searching for the wiring from the wiring list. For example, a high-speed signal line has already been verified and detected as a signal line requiring a countermeasure. First of all,
Another signal line connected to the same driver as this signal line may be checked, and then, a signal line connected to a high-speed driver may be checked.
As described above, since the speed (operating frequency) of the driver can be determined from the extracted electrical data, the priority of the signal line connected to the driver having the higher speed is set higher for the verification, and the priority is set in the verification order. Can also. Alternatively, a certain threshold value may be provided for the speed of the driver, and the wiring connected to the faster driver may be sequentially checked. In these methods, signal lines connected to a driver having a relatively low speed can be omitted from verification, and processing efficiency can be improved. Further, in the circuit correction, if it is not possible to take measures against all of the problematic signal lines due to restrictions on the arrangement of the electronic components, the correction may be performed in order from high-speed circuit components.

In the design of the circuit board according to the present embodiment, the necessity and effectiveness of the noise countermeasure are verified by a simple calculation and a survey judgment after the tentative design, so that it is not necessary to largely change the conventional design process. . In addition, the effectiveness of noise countermeasures is quantified and verified, so that more effective countermeasures against reflection noise and radiation noise can be taken, and priorities can be given to noise countermeasure components, and high-speed signals can be transmitted. Since the noise countermeasures can be verified only for the signal lines to be processed, the processing efficiency can be increased, and as a result, the design cost can be reduced.

[0059]

According to the method for verifying a circuit board, the method for designing the same, the apparatus and the recording medium according to the present invention, a signal to be processed can be obtained by using a simple calculation formula without greatly changing the conventional design process. The maximum allowable distance in the line is obtained, and based on this, the position of the noise suppression component is verified to determine whether the noise suppression component is effective or necessary. Then, it is easy to determine in which range the position of the noise suppression component should be corrected. Therefore, in a large-scale circuit with thousands of nets, it is possible to automatically know where to start the noise countermeasures and whether there is any useless noise countermeasures. Therefore, the circuit modification for suppressing the reflection noise and the radiation noise can be performed accurately and efficiently. As a result, a malfunction of the circuit can be effectively prevented without increasing or conversely reducing the circuit area, and radiation noise can be effectively suppressed. Such easy verification of the circuit board leads to a reduction in design cost.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic configuration of a CAD apparatus according to an embodiment.

FIG. 2A is a cross-sectional view illustrating a microstrip line as a first wiring structure assumed for a signal line according to an embodiment. (B) is a sectional view showing a single strip line as a second wiring structure. (C) is the third
FIG. 3 is a cross-sectional view showing a double strip line as the wiring structure of FIG.

FIG. 3A is a diagram illustrating an arrangement pattern of a driver, a receiver, and a signal line when the circuit board according to the embodiment is mounted. FIG. 2B is a diagram describing dimension data, electrical data, and the like relating to the signal line in FIG.

FIG. 4A is a structural diagram of a microstrip line in a circuit board according to the embodiment. (B) is (A)
FIG. 3 is a diagram describing dimension data, electrical data, and the like relating to the wiring structure of FIG.

FIG. 5 is a flowchart showing a procedure from a first step to a high-speed driver selection step in a procedure of pattern verification in designing a circuit board according to the embodiment.

FIG. 6 is a flowchart showing steps from a step of creating a combination list of a driver and a receiver to a step of a termination check in a procedure of pattern verification in designing a circuit board according to the embodiment.

FIG. 7 is a flowchart showing a specific procedure of termination inspection to a wiring structure investigation step in a procedure of verifying noise suppression components in designing a circuit board according to the embodiment.

FIG. 8 is a flowchart showing a procedure from a specific step of wiring structure investigation to a step of calculating a maximum allowable distance in a procedure of verifying a noise suppression component in designing a circuit board according to the embodiment.

FIG. 9 is a flowchart showing a procedure from a signal line distance comparison step to a countermeasure instruction step in a procedure of verifying a noise countermeasure component in designing a circuit board according to the embodiment.

FIG. 10 is a flowchart showing a procedure from a search step of another set to a final step in a procedure of verifying noise suppression components in designing a circuit board according to the embodiment.

FIG. 11 is a list of countermeasure instruction contents after noise countermeasure component verification in circuit board design according to the embodiment.

FIG. 12A is a diagram for explaining an influence of a reflected wave before the circuit board according to the embodiment is modified.
(B) is a figure for explaining that the influence of a reflected wave is reduced after the circuit board concerning an embodiment is corrected.

FIG. 13 shows a state before the circuit board according to the embodiment is modified.
FIG. 4 is a signal waveform diagram obtained by analysis by a transmission line simulator.

FIG. 14 shows a state after the circuit board according to the embodiment is modified.
FIG. 4 is a signal waveform diagram obtained by analysis by a transmission line simulator.

FIG. 15 is an explanatory diagram of a noise countermeasure component used when pointing out a problem of the related art.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Design support part, 2 ... Verification part, 3 ... Registration part (registration means), 4 ... Input part, 5 ... Output part (output means), 21 ... Conversion part, 22 ... Extraction part (extraction means), 23 ... Arithmetic unit (arithmetic means), 24 ... Investigation and determination unit (investigation means, determination means), 2
Reference numeral 5: storage unit, 26: control unit, Dv: driver (electronic component), Rv: receiver (electronic component), E1, E2, E3
... signal lines, DiL1, DiL2, DiL3 ... dielectric layers,
P1, P2, P3: power supply plate, Rd: damping resistance (series termination resistance), Racp: AC parallel termination resistance, Cac
p ... AC parallel termination capacitor.

Claims (15)

[Claims] 1. A method for verifying an electronic circuit having a signal line to which a plurality of electronic components are connected, comprising: data of a specific signal line among the signal lines; The data of the electronic component connected to the line is extracted, and based on the data of the electronic component, it is checked whether the noise suppression component is included in the plurality of electronic components. When a component is included in the plurality of electronic components, a reflection delay time when a pulse signal is input to the specific signal line during operation and then reflected at an impedance mismatching location and returned to the pulse signal during the operation is set to The maximum allowable distance, which is the maximum signal line distance between the input point and the reflection point of the pulse signal within the transition time of the voltage level of the pulse signal, is determined by the data of the specific signal line and the electronic component. Based calculated, based on the maximum allowable distance, and the anti-noise component,
A method for verifying an electronic circuit, comprising: judging whether a signal line distance between an electronic component to be disposed close to the noise suppression component is appropriate and outputting a result of the judgment. 2. A method for calculating a maximum allowable distance, comprising calculating a propagation delay time per unit distance of the signal line based on data of the specific signal line, and outputting the propagation delay time per unit distance to the specific signal line from the electronic component. Extracting the voltage level transition time of the pulse signal from the electronic component data, calculating the parameter by dividing the extracted voltage level transition time by the propagation delay time, and multiplying the parameter by a predetermined coefficient. The electronic circuit verification method according to claim 1, wherein the maximum allowable distance is calculated. 3. Extracting an output impedance of an electronic component outputting the pulse signal from the electronic component data, calculating a characteristic impedance of the signal line using data of the specific signal line, and calculating a characteristic impedance of the maximum allowable distance. 3. The electronic circuit verification method according to claim 2, wherein the value of the predetermined coefficient is changed according to a difference between the characteristic impedance and the output impedance. 4. The method according to claim 3, wherein the calculation of the propagation delay time and the characteristic impedance is performed in accordance with a wiring structure of the specific signal line. 5. The electronic component is classified into a driver that sends the pulse signal to the specific signal line and a receiver that receives the pulse signal transmitted through the specific signal line, and refers to the electronic component data. 2. The electronic circuit verification method according to claim 1, wherein a high-speed driver that operates at a predetermined speed or higher and requires noise suppression is selected from the drivers. 6. The method according to claim 5, wherein the high-speed driver is a driver in which a voltage level transition time of an output pulse included in the electronic component data is equal to or less than a predetermined value. 7. Investigating the noise countermeasure component, investigate a resistance element connected to a high-speed signal line between the high-speed driver and the receiver, and connect the resistance element detected by the investigation to the high-speed signal line. When connected in series, it is determined that the resistance element is a first noise suppression component for performing a series termination of the high-speed driver, and the resistance element detected in the investigation is connected in parallel to the high-speed signal line. When connected, it is determined that the resistance element is a resistance element included in the second noise suppression component that performs the AC parallel termination of the receiver. In the appropriateness determination of the signal line distance, the first noise suppression is determined. Signal line distance between the component and the high-speed driver, or
The electronic circuit verification method according to claim 5, wherein it is determined that a signal line distance between the second noise suppression component and the receiver is equal to or less than the maximum allowable distance. 8. The high-speed signal line length between the high-speed driver and the receiver is measured, and the length of the high-speed signal line is compared with the maximum allowable distance. When the length of the line is equal to or less than the maximum allowable distance and the noise suppression component is connected to the high-speed signal line, it is determined that the noise suppression component is unnecessary, and the signal line distance for the noise suppression component is determined. 6. The electronic circuit verification method according to claim 5, wherein a result of the appropriateness determination and a result of the determination that the noise suppression component is unnecessary are output. 9. When there are a plurality of pairs of the high-speed driver and the receiver, calculation of the maximum allowable distance for each of the high-speed signal line high-speed signal transmission paths, 6. The method for verifying an electronic circuit according to claim 5, wherein the appropriateness determination is repeatedly performed. 10. After the appropriateness of the signal line distance is determined, the specified signal line is changed to another signal line, the signal line data and the electronic component data are extracted, and the maximum allowable distance is determined. 6. The electronic circuit verification method according to claim 5, wherein the calculation and the verification of the connection position of the noise suppression component based on the determination of the appropriateness of the signal line distance are repeatedly performed until the verification of all the designed signal lines is completed. . 11. A method for designing an electronic circuit having a signal line to which a plurality of electronic components are connected, wherein data of a specific signal line among the signal lines is obtained from design data of the electronic circuit at the time of tentative design. The electronic component data connected to the specific signal line is extracted, and based on the data of the electronic component, it is determined whether the noise suppression component is included in the plurality of electronic components. When the noise suppression component is included in the plurality of electronic components, a reflection delay when a pulse signal is input into the specific signal line during operation and then reflected at an impedance mismatching point and returned to the pulse signal during operation. The maximum allowable distance, which is the maximum signal line distance between the input point and the reflection point of the pulse signal, whose time is within the transition time of the voltage level of the pulse signal, is determined by the specific signal line and the electron. Calculated on the basis of goods data, based on the maximum allowable distance, and the anti-noise component,
Determine whether the signal line distance between the noise suppression component and the electronic component to be arranged close to each other is appropriate, and in accordance with the result of the determination, the connection position of the noise suppression component within the specific signal line Is changed so that the signal line distance is within an appropriate range. 12. A determination is made as to whether the noise reduction performance of the noise suppression component whose connection position has been changed is appropriate. If the noise reduction performance is not appropriate, the noise reduction component is adjusted so that the noise reduction performance is appropriate. The method of designing an electronic circuit according to claim 11, wherein the characteristic value of the noise suppression component is changed. 13. A verification apparatus for an electronic circuit having a signal line to which a plurality of electronic components are connected, a registration unit in which design data of the electronic circuit is registered, and a registration unit for registering the design data of the electronic circuit from the registration unit. Reading means for extracting data of a specific signal line among the signal lines and data of an electronic component connected to the specific signal line from the design data, and noise based on the data of the electronic component. Investigation means for investigating whether the countermeasure component is included in the plurality of electronic components, and, as a result of the inspection, when the noise countermeasure component is included in the plurality of electronic components, when the noise suppression component is included in the plurality of electronic components, The reflection delay time when the pulse signal is input and reflected at the impedance mismatch point and returns to the pulse signal is within the transition time of the voltage level of the pulse signal. A calculating unit that calculates the maximum allowable distance that is the maximum signal line distance between the input point of the pulse signal and the reflection point based on the data of the specific signal line and the electronic component, based on the maximum allowable distance, The above noise suppression parts,
A verification apparatus for an electronic circuit, comprising: a determination unit that determines whether a signal line distance between an electronic component to be disposed close to the noise suppression component is appropriate; and an output unit that outputs a result of the determination. 14. A design support apparatus for supporting the design of an electronic circuit having a signal line to which a plurality of electronic components are connected, comprising: a registration unit for registering design data of an electronic circuit at the time of provisional design; A design support unit for supporting design; and a verification unit for verifying connection positions of electronic components in the electronic circuit provisionally designed by the design support unit. The verification unit transmits the design data from the registration unit. Reading means for extracting data of a specific signal line among the signal lines and data of an electronic component connected to the specific signal line from the design data, and noise based on the data of the electronic component. Investigation means for investigating whether the countermeasure component is included in the plurality of electronic components, and, as a result of the inspection, when the noise countermeasure component is included in the plurality of electronic components, the specific signal during operation The input delay point of the pulse signal is reflected within the transition time of the voltage level of the pulse signal when the reflection delay time when returning to the pulse signal after being reflected at the impedance mismatching point after the pulse signal is input into the A calculating means for calculating a maximum allowable distance, which is a maximum signal line distance between points, based on the data of the specific signal line and the electronic component; and, based on the maximum allowable distance, the noise suppression component,
Determining means for determining whether a signal line distance between the noise suppression component and an electronic component to be disposed in close proximity is appropriate, and the design support unit, in accordance with a determination result of the determination means,
An electronic circuit design support device for changing a connection position of the noise suppression component in the specific signal line so that the signal line distance is within an appropriate range. 15. A recording medium comprising, in recording data, a verification program for verifying a connection position of the electronic component in the signal line for an electronic circuit having a signal line to which a plurality of electronic components are connected, Extracting, from the design data of the electronic circuit, data of a specific signal line among the signal lines and data of an electronic component connected to the specific signal line, in the processing step in the verification program; Investigating whether or not the noise suppression component is included in the plurality of electronic components based on the component data; and, as a result of the investigation, when the noise suppression component is included in the plurality of electronic components, an operation is performed. Sometimes, a pulse delay time when a pulse signal is input into the specific signal line and then reflected at an impedance mismatching point and returns to the pulse signal is returned to the pulse signal. Calculating the maximum allowable distance, which is the maximum signal line distance between the input point and the reflection point of the pulse signal, which is within the transition time of the voltage level, based on the data of the specific signal line and the electronic component; The noise suppression component based on the maximum allowable distance,
Determining whether the signal line distance between the noise suppression component and the electronic component to be arranged close to each other is appropriate.