JP2002043940A - Semiconductor device and analog/digital converter evaluation method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain an analog/digital converter that can easily be evaluated with high accuracy. SOLUTION: The semiconductor device 1 of this invention having the analog/ digital converter 2 is provided with an analog signal output section 3 so as to easily evaluate the analog/digital converter 2 with high accuracy. Furthermore, the semiconductor device 1 is furthermore provided with an output monitor 5 and a comparison section 6 to evaluate the analog/digital converter 2 depending on its output so as to automate the adjustment of a DC offset.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a built-in analog-to-digital converter and capable of evaluating the analog-to-digital converter with high accuracy, and a method for evaluating an analog-to-digital converter formed in the semiconductor device. It is.

[0002]

2. Description of the Related Art Conventionally, when an analog-to-digital converter formed in a semiconductor device is evaluated, an analog signal is input from outside the semiconductor device.

FIG. 5 is a diagram showing a system configuration for evaluating an analog-to-digital converter formed in a conventional semiconductor device. The system shown in FIG. 5 is a system for evaluating the linearity of an analog-to-digital converter, and the analog-to-digital converter 2 is formed on a semiconductor device 51. The evaluation signal holding unit 54 stores a test pattern of an analog signal input to the analog-to-digital converter 2 and an expected output value corresponding to the test pattern. Tester 5
3 inputs an analog signal to the analog-to-digital converter 2 according to the input test pattern stored in the evaluation signal holding unit 54. The analog-to-digital converter 2 converts an input analog signal into a digital signal. The tester 53 reads the digital signal output from the analog-to-digital converter 2. The digital signal read by the tester 53 is input to the comparison unit 55. The comparing section 55 reads the expected output value held in the evaluation signal holding section 54 and compares it with the digital signal input to the tester 53.

Further, the potential of a signal input to the analog-to-digital converter 2 is sequentially changed in accordance with a test pattern, and the output from the analog-to-digital converter 2 is sequentially compared with an expected output value. The linearity of No. 2 can be evaluated.

[0005]

However, in the above-described system for evaluating the analog-to-digital converter, the potential of the analog signal input to the analog-to-digital converter 2 is supplied from a DC voltage source (not shown) of the tester 53. Therefore, there is a problem that the accuracy of the characteristic evaluation for the analog-to-digital converter 2 is limited by the limit of the accuracy of the DC voltage source of the tester 53.

Further, since the adjustment of the DC offset which differs for each sample is performed by adjusting the expected output value, it takes a lot of time and effort to create the expected output value in consideration of the DC offset. there were.

SUMMARY OF THE INVENTION The present invention has been made in view of the above, and removes the limitations on the accuracy of the characteristic evaluation depending on the tester, automates the adjustment of the DC offset, and makes the characteristic evaluation of the analog-to-digital converter easy and highly accurate. It is an object of the present invention to obtain a semiconductor device and an analog-to-digital converter evaluation method which can be performed in a timely manner.

[0008]

In order to achieve the above object, a semiconductor device according to the present invention is a semiconductor device having an analog-to-digital converter for converting an analog signal to a digital signal. An analog signal output means for generating an analog evaluation signal used for characteristic evaluation and inputting the analog evaluation signal to the analog-to-digital converter is provided.

According to the present invention, the semiconductor device includes the analog signal output means used for evaluating the characteristics of the analog-to-digital converter, and inputs the analog signal to the analog-to-digital converter.

The semiconductor device according to the next invention is the semiconductor device according to the above invention, wherein output monitoring means for monitoring the output of the analog-to-digital converter, and the monitoring result of the output monitoring means and the analog-to-digital converter stored in advance. And comparing means for comparing with the expected output value.

According to the present invention, the semiconductor device inputs an analog signal to the analog-to-digital converter, monitors the output of the analog-to-digital converter, and compares the output of the analog-to-digital converter with the expected output value held in advance. Compare.

A semiconductor device according to the next invention is characterized in that, in the above invention, the analog signal output means outputs two or more analog signals having different potentials.

According to the present invention, the semiconductor device inputs two or more analog signals having different potentials to the analog-to-digital converter.

[0014] In the semiconductor device according to the next invention, in the above-mentioned invention, the analog signal output means has two or more resistors connected in series, and outputs analog signals having different potentials depending on voltage division between the resistors. It is characterized by outputting.

According to the present invention, the semiconductor device inputs two or more analog signals having different potentials to the analog-to-digital converter using the resistance voltage division of two or more resistors connected in series.

A semiconductor device according to the next invention is characterized in that, in the above invention, the two or more resistors have the same resistance value.

According to the present invention, the semiconductor device transmits two or more analog signals having different potentials to the analog-to-digital converter by using the resistance voltage division of two or more resistors connected in series and having the same resistance value. input.

A semiconductor device according to the next invention is characterized in that, in the above invention, the analog signal output means generates a sine wave.

According to the invention, the semiconductor device includes the analog signal output means used for evaluating the characteristics of the analog-to-digital converter, the analog signal output means generating a sine wave,
Input to the analog-to-digital converter.

An analog-to-digital converter evaluation method according to the next invention is an analog-to-digital converter evaluation step of converting an analog signal into a digital signal, and an analog signal output step of outputting an analog signal having an arbitrary potential. An analog-to-digital conversion step of converting an analog signal output in the analog signal output step into a digital signal; and determining whether the digital signal has a predetermined value. Starting a process, if not a predetermined value, changing the potential of the analog signal output by the analog signal output process according to a predetermined procedure and returning to the analog-to-digital conversion process; The potential of the analog signal to be changed is sequentially changed according to a predetermined procedure, and the analog-to-digital conversion is performed. A comparison step of comparing the output expected value 憶, characterized in that it has a.

According to the present invention, the analog-to-digital converter evaluation method outputs an analog signal having an arbitrary potential, performs analog-to-digital conversion, determines whether or not the result of the conversion is a predetermined value, and If the value is not the value, the potential of the analog signal output by the analog signal output step is changed according to a predetermined procedure, and the change of the potential of the analog signal and the analog-to-digital conversion are repeated until the result of the analog-to-digital conversion becomes a predetermined value. . If the result of the analog-to-digital conversion is a predetermined value, the potential of the analog signal is sequentially changed according to a predetermined procedure, and the analog-to-digital conversion is performed.
The output is compared with an output expected value stored in advance.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a semiconductor device and an analog-to-digital converter evaluation method according to the present invention will be described below in detail with reference to the accompanying drawings.

Embodiment 1 FIG. 1 is a diagram showing a configuration of a semiconductor device according to a first embodiment of the present invention. 1, the semiconductor device 1 includes an analog-to-digital converter 2, an analog signal output unit 3, an output monitor 5, and a comparison unit 6, and has a function of evaluating the linearity of the analog-to-digital converter 2.

The analog signal output section 3 has resistors R (1) to R (n) and an output control section 4 connected in series. Both ends of each of the resistors R (1) to R (n) have terminals, and each terminal is connected to the analog-to-digital converter 2 via switches SW (1) to SW (n + 1). The output control unit 4 outputs an analog signal having a desired potential to the analog-to-digital converter 2 by switching each of the switches SW (1) to SW (n + 1). The analog-to-digital converter 2 converts the analog signal output from the analog signal output unit 3 into a digital signal and sends the digital signal to the output monitor 5.
The output monitor 5 inputs the digital signal input from the analog-to-digital converter 2 to the comparison unit 6. The comparison unit 6
An output expected value holding unit 7 is provided. The output expected value holding unit 7
The normal input / output conversion relation output by the analog-to-digital converter 2 is stored in advance as an expected output value. The comparing unit 6 compares the value of the digital signal sent from the output monitor 5 with the expected output value held by the expected output value holding unit 7 and outputs the result of the comparison to the outside of the semiconductor device 1.

Here, with reference to the flow chart shown in FIG. 2, a procedure for evaluating the linearity of the analog-to-digital converter 2 according to the first embodiment will be described. In FIG. 2, first, the analog signal output unit 3, which has received an instruction to start evaluation from the outside, switches the switch SW by the output control unit 4.
(1) to SW (n + 1) are controlled, and the analog signal having the lowest potential among the analog signals that can be output by the analog signal output unit 3 is output to the analog-to-digital converter 2 as an initial signal (step S201).

Next, the analog-to-digital converter 2 converts the analog signal output from the analog signal output unit 3 into a digital signal (Step S202). The output monitor 5 monitors the converted digital signal and outputs it to the comparison unit 6 (Step S203). If the result of this monitoring is the minimum value output by the analog-to-digital converter 2 (step S204, Yes), the comparing unit 6 proceeds to step S204.
Move to 205. On the other hand, when the monitoring result is a value larger than the minimum value output from the analog-to-digital converter 2 (step S204, No), the process proceeds to step S206.

Thereafter, the analog signal output unit 3 raises the potential of the analog signal to be output to the analog-to-digital converter 2 by one, outputs it to the analog-to-digital converter 2 (step S205), and proceeds to step S202.

On the other hand, when the monitor result is larger than the minimum value output from the analog-to-digital converter 2 (step S204, No), the monitor result is compared with the expected output value (step S206). For the expected output value, an output order based on the input / output relationship of the analog-to-digital converter 2 is determined. The comparison unit 6 includes an expected output value holding unit 7
Uses the first of the expected output values held by. Thereafter, the comparing unit 6 determines whether or not all comparisons have been completed (step S207), and when all of the comparisons have been completed (step S207, Yes), ends the evaluation. If all comparisons have not been completed (step S207, No), the process moves to step S205.
Whether or not all the comparisons have been completed can be arbitrarily determined by combining the case where the output of the analog-to-digital converter 2 is maximized and the case where the output of the analog signal output unit 3 is maximized. .

By performing the above-described evaluation processing procedure, the DC offset can be automatically adjusted. About adjustment of this DC offset, using FIG.
This will be described in detail. Here, the analog-to-digital converter 2
Shall convert an analog signal from 0.5 V to 1.5 V into a 6-bit digital signal in an input range of 1 V. The analog signal output unit 3 can control the potential of the analog signal output in units of 10 mV.

Since the analog-to-digital converter 2 converts 1V into 6 bits, the potential of the analog signal is calculated from 1 ÷ (2 × 2 × 2 × 2 × 2 × 2) = 0.015625 to 15.625 mV Will be increased by one. That is, in an ideal situation with no DC offset, the output of the analog-to-digital converter 2 outputs the digital value “00” when the potential of the analog signal is 0.510 V or less.
0000 ”, the potential of the analog signal is 0.520 to 0.5
If the voltage is 30 V, the digital value is “000001”. If the potential of the analog signal is 0.540 V, the digital value is “00001”.
0 ", the potential of the analog signal is 0.550 to 0.560V
Then, it can be expected that the digital value is "0000011".

However, the actual analog-to-digital converter 2
Has a DC offset and does not always take the expected value. For this reason, in the related art, the output expected value is created in consideration of the DC offset, but when the above method is used, the comparison can be performed without considering the DC offset.

Next, a description will be given of an evaluation processing procedure in the case where a DC offset of 0.3 V exists using the analog-to-digital converter 2 exemplified above. First, the analog signal output unit 3 outputs an analog signal of 0.500 V as an initial signal. The analog-to-digital converter 2
For a 0.500V analog signal, the digital value "0"
00000 "is output. Since this digital value is the minimum output of the analog-to-digital converter 2, no comparison is performed, and the analog signal output unit 3 raises the output potential by one,
An analog signal of 0.510 V is output.

The analog-to-digital converter 2 has 0.510
For a V analog signal, the digital value “00000”
"0" is output. Since this digital value is the minimum output of the analog-to-digital converter 2, it cannot be compared, and the analog signal output unit 3 increases the potential of the output by one.
An analog signal of 0.520 V is output.

The analog-to-digital converter 2 has an output of 0.
If there is no DC offset with respect to the 520 V analog signal, it is expected that a digital value “000001” will be output. However, here, since a 0.3 V DC offset occurs, the digital value “000000” is output. Is output. This digital value is converted by the analog-to-digital converter 2
, The comparison cannot be performed, and the analog signal output unit 3 raises the output potential by one, and
Outputs a 0V analog signal.

Further, the analog-to-digital converter 2
If there is no DC offset with respect to the analog signal of 0.530 V, it is expected that a digital value “000001” will be output. However, here, since a DC offset of 0.3 V occurs, the digital value “000000” is output. Is output. Since this value is the minimum output of the analog-to-digital converter 2, comparison cannot be performed, and the analog signal output unit 3 increases the potential of the output by one and outputs an analog signal of 0.540V.

The analog-to-digital converter 2 has an output of 0.
If there is no DC offset for a 540 V analog signal, it is expected that a digital value “000010” will be output. However, here, a 0.3 V DC offset occurs, so that a digital value “000000” is output. I do. Since this value is the minimum output of the analog-to-digital converter 2, comparison cannot be performed, and the analog signal output unit 3 increases the potential of the output by one and outputs an analog signal of 0.550V.

The analog-to-digital converter 2 has a capacity of 0.550
If there is no DC offset for a V analog signal, it is expected that a digital value “0000011” will be output. However, in this case, a digital value “000001” is output because a 0.3 V DC offset occurs. I do. Since this value is larger than the minimum output of the analog-to-digital converter 2, the comparison unit 6 starts comparison, and compares the expected output value “000001” with the output of the analog-to-digital converter 2. Further, the analog signal output unit 3 increases the potential of the output by one, and outputs an analog signal of 0.560V.

The analog-to-digital converter 2 has 0.560
If there is no DC offset for a V analog signal, it is expected that a digital value “0000011” will be output. However, in this case, a digital value “000001” is output because a 0.3 V DC offset occurs. I do. Since this value is larger than the minimum output of the analog-to-digital converter 2, the comparing unit 6 outputs the expected output value “00000”.
1 ”and the output of the analog-to-digital converter 2 are compared. Further, the analog signal output unit 3 raises the output potential by one,
Outputs an analog signal of 0.570V.

The analog-to-digital converter 2 has 0.570
If there is no DC offset for a V analog signal, a digital value “000100” is expected to be output. In this case, however, a digital value “000010” is output because a 0.3 V DC offset occurs. I do. Since this value is larger than the minimum output of the analog-to-digital converter 2, the comparison unit 6 outputs the expected output value “00001”.
"0" and the output of the analog-to-digital converter 2. Further, the analog signal output unit 3 raises the output potential by one,
An analog signal of 0.580 V is output.

The analog-to-digital converter 2 has a capacity of 0.580
If there is no DC offset for a V analog signal, it is expected that a digital value “000101” will be output. However, here, a 0.3 V DC offset is applied, so that a digital value “000011” is output. I do. Since this value is larger than the minimum output of the analog-to-digital converter 2, the comparison unit 6 outputs the expected output value “00001”.
1 ”and the output of the analog-to-digital converter 2 are compared. Further, the analog signal output unit 3 raises the output potential by one,
An analog signal of 0.590 V is output.

In this manner, the change and comparison of the analog signal are repeated, and the linearity of the analog-to-digital converter 2 is evaluated. If this method is used, the comparison with the expected output value is started when the output of the analog-to-digital converter 2 becomes larger than the minimum value “000000”, so that the evaluation is performed regardless of the DC offset. Can be.

In the first embodiment, an analog signal used for evaluating the analog-to-digital
Since the voltage is supplied from the internal analog signal output unit 3, a tester is not required for evaluation, and the input voltage of the analog-to-digital converter 2 can be changed with high accuracy.

Further, an output monitor 5 and a comparison unit 6 are provided, the comparison unit 6 is caused to hold an expected output value of the analog-to-digital converter 2, and comparison is started based on the monitoring result of the output of the analog-to-digital converter 2. Thus, the DC offset can be automatically adjusted. Further, by providing the output monitor 5 and the comparison unit 6 inside the semiconductor device 1, the evaluation can be easily performed without the need for the output monitor and the comparison unit outside the semiconductor device.

Further, as an application of this embodiment, a circuit having an arbitrary function is provided on the semiconductor device 1, connected to the analog / digital converter 2, and further provided with a mechanism for switching the input / output of the analog / digital converter 2. You may. In this manner, a semiconductor device having an arbitrary function and capable of evaluating the built-in analog-to-digital converter as needed can be realized.

Embodiment 2 Next, a second embodiment of the present invention will be described with reference to FIG. The second embodiment is configured to evaluate the S / N ratio of an analog-to-digital converter.
And a sine wave generator 43.

The sine wave generator 43 generates a sine wave and inputs the sine wave to the analog-to-digital converter 2. The analog-to-digital converter 2 converts the input sine wave from analog to digital, and inputs the converted sine wave to the arithmetic unit 44. The operation unit 44 performs a fast Fourier transform on the input digital signal. Since the basic signal level Es of the digital output and the noise level En of the digital output can be known by the Fourier transform, S /
The N ratio can be calculated by the following equation. That is, the S / N ratio can be calculated by the following equation: S / N ratio = 20 log (Es / En). This S /
The effective bit number B can be calculated by the following equation using the N ratio. That is, the effective bit number B can be obtained by B = (S / N ratio-1.76) /6.02.

In the second embodiment, by providing the sine wave generator 43 in the semiconductor device 41, there is no need to prepare an external sine wave generator for evaluating the S / N ratio, and the sine wave is generated. The distance from the place to the input of the analog-to-digital converter is shortened, and a highly accurate sine wave can be input. Therefore, the S / N ratio of the analog-to-digital converter 2 can be easily and accurately evaluated.

In this configuration, the arithmetic unit 44 is provided outside the semiconductor device 41.
1 does not require an external operation unit,
A semiconductor device whose SN ratio can be easily evaluated can be realized.

Further, as an application of this embodiment, a circuit having an arbitrary function is provided on the semiconductor device 1, connected to the analog / digital converter 2, and further provided with a mechanism for switching the input / output of the analog / digital converter 2. You may. In this manner, a semiconductor device having an arbitrary function and capable of evaluating the built-in analog-to-digital converter as needed can be realized.

[0050]

As described above, according to the present invention, the semiconductor device includes the analog signal output means used for evaluating the characteristics of the analog-to-digital converter, and inputs the analog signal to the analog-to-digital converter. Therefore, there is an effect that highly accurate evaluation can be easily performed without depending on the accuracy of the tester.

According to the next invention, the semiconductor device inputs an analog signal to the analog-to-digital converter, monitors the output of the analog-to-digital converter, and compares the output of the analog-to-digital converter with the expected output value held in advance. Compare with For this reason, there is an effect that high-precision evaluation can be easily performed without requiring a tester.

According to the next invention, the semiconductor device inputs two or more analog signals having different potentials to the analog-to-digital converter. For this reason, there is an effect that the linearity of the analog-digital converter can be evaluated with high accuracy and easily.

According to the next invention, the semiconductor device inputs two or more analog signals having different potentials to the analog-to-digital converter using the resistance voltage division of two or more resistors connected in series. For this reason, there is an effect that the evaluation of the analog-to-digital converter can be easily performed with high accuracy and with a simple configuration.

According to the next invention, the semiconductor device has the same resistance value, and uses the resistance voltage division of two or more resistors connected in series, and outputs the two potentials different from each other to the analog-digital converter.
The above analog signal is input. For this reason, there is an effect that the evaluation of the analog-to-digital converter can be easily performed with high accuracy and with a simple configuration.

According to the next invention, the semiconductor device includes analog signal output means used for evaluating the characteristics of the analog-to-digital converter. The analog signal output means generates a sine wave and inputs the sine wave to the analog-to-digital converter. For this reason, there is an effect that the SN ratio of the analog-to-digital converter can be evaluated with high accuracy and easily.

According to the next invention, the analog-to-digital converter evaluation method outputs an analog signal having an arbitrary potential, performs analog-to-digital conversion, and determines whether or not the result of the conversion is a predetermined value. If the value is not the predetermined value, the potential of the analog signal output by the analog signal output step is changed according to a predetermined procedure, and the change of the potential of the analog signal and the analog-to-digital conversion are performed until the result of the analog-to-digital conversion reaches the predetermined value. repeat. If the result of the analog-to-digital conversion is a predetermined value, the potential of the analog signal is sequentially changed according to a predetermined procedure, the analog-to-digital conversion is performed, and the output is compared with an expected output value stored in advance. Therefore, there is an effect that the adjustment of the DC offset can be automated, and the linearity of the analog-to-digital converter can be evaluated with high accuracy and easily.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a configuration of a semiconductor device according to a first embodiment of the present invention;

FIG. 2 is a diagram illustrating a procedure for evaluating the linearity of the analog-to-digital converter according to the first embodiment;

FIG. 3 is an explanatory diagram illustrating an evaluation processing procedure illustrated in FIG. 2;

FIG. 4 is a diagram illustrating a configuration of a semiconductor device according to a second embodiment of the present invention;

FIG. 5 is a diagram illustrating a system configuration for evaluating an analog-to-digital converter formed in a conventional semiconductor device.

[Explanation of symbols]

1, 41, 51 semiconductor device, 2 analog-to-digital converter, 3 analog signal output unit, 4 output control unit, 5
Output monitor, 6 comparison unit, 7 expected output value holding unit, 43
Sine wave generator, 44 calculator, 53 tester, 54
Evaluation signal holding unit, 55 comparison unit

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Nobuhiro Miyoshi Inventor F-term (reference) 2-6-2 Otemachi 2-chome, Chiyoda-ku, Tokyo 2G032 AA09 AB01 AG01 AK11 AL18 5F038 DF03 DT03 DT15 EZ20 5J022 AA01 AC04 BA01 CB02 CD02 CF01 CF09 CG01

Claims (7)

[Claims] 1. A semiconductor device having an analog-to-digital converter for converting an analog signal to a digital signal, comprising: generating an analog evaluation signal used for evaluating characteristics of the analog-to-digital converter; A semiconductor device comprising analog signal output means for inputting to a converter. 2. An output monitoring means for monitoring an output of the analog-to-digital converter, and a comparing means for comparing a monitoring result by the output monitoring means with an output expected value of the analog-to-digital converter stored in advance. The semiconductor device according to claim 1, further comprising: 3. The semiconductor device according to claim 1, wherein said analog signal output means outputs two or more analog signals having different potentials. 4. The analog signal output means according to claim 3, wherein said analog signal output means has two or more resistors connected in series, and outputs analog signals having different potentials by dividing a voltage between the resistors. Semiconductor device. 5. The semiconductor device according to claim 4, wherein said two or more resistors have the same resistance value. 6. The semiconductor device according to claim 1, wherein said analog signal output means generates a sine wave. 7. An analog-to-digital converter evaluation method for evaluating an analog-to-digital converter that converts an analog signal to a digital signal, comprising: an analog signal output step of outputting an analog signal having an arbitrary potential; An analog-to-digital conversion step of converting the analog signal output in the step into a digital signal, and determining whether the digital signal has a predetermined value.
When the value is a predetermined value, a comparison process described later is started, and when the value is not a predetermined value, the potential of the analog signal output by the analog signal output process is changed according to a predetermined procedure to perform the analog-to-digital conversion. Step, the potential of the analog signal output by the analog signal output step is sequentially changed according to a predetermined procedure, the analog signal is subjected to analog-to-digital conversion, the analog-digital converted value and the output expected value stored in advance A comparison step of comparing, and a method for evaluating an analog-to-digital converter.