JP2002034048A - Imaging device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an imaging device for realizing pixel addition drive where such color representation as color balance does not change even when a board bias voltage is variable, with no, especially, quality degradation. SOLUTION: There are provided a board bias voltage VSUB setting part 202 for changing a value of board bias voltage of a CCD imaging element 5, and a white balance setting and color correcting part 203 for color-correcting the imaging signal outputted from the CCD imaging element 5 according to the value of board bias voltage set by the board bias voltage VSUB setting part 202.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup apparatus using a solid-state image pickup device such as a CCD, and more particularly to an image pickup device that changes a substrate voltage of the image pickup device.

[0002]

2. Description of the Related Art In recent years, various electronic cameras using a solid-state imaging device such as a CCD have been developed. In this type of electronic camera, a captured image signal is obtained by photoelectrically converting a subject image by a CCD image sensor. In addition, a drive method for individually reading out each pixel charge for each line is used for reading pixel charges from the CCD image pickup device, but various other special drive methods are known.

As an example of a typical special driving method, a so-called “n-times speed vertical addition driving (n addition driving) method” which is a driving method for high-speed and high-sensitivity reading is known. In this n-addition driving method, the number of pixels (the number of transfer clocks) to be transferred from the vertical (V) transfer path to the horizontal transfer path in each horizontal (H) blanking period is not "1" but "2" or more. By setting the integer value n, charges of n pixels (for n lines) are sequentially transferred to the horizontal transfer path, and charges for n pixels (for n lines) added in the horizontal transfer path are transferred to one pixel (1 line). Line).

As a result, the number of vertical lines corresponding to one screen is reduced to 1 / n. As a result, the reading time for one screen is reduced to 1 / n, and high-speed reading is enabled. Further, since the charge amount is increased n times by the charge addition at the time of transfer, there is a characteristic that the sensitivity increasing effect corresponding thereto can be obtained.

However, when the above-mentioned "n addition driving" is performed, the effect of increasing the sensitivity can be obtained. However, when a high-luminance subject is imaged, a pseudo white-striped pseudo signal ( In some cases, a new image quality deterioration such as occurrence of fogging noise such as blooming or smear is caused.
This phenomenon will be described below.

There is no problem if the saturation level (maximum transferable charge amount) of the horizontal transfer path to which charges are added is infinite. However, this saturation level is actually finite. Therefore, the saturation level SatH is designed so as to correspond to the saturation level of the photoelectric conversion unit in the normal driving state in which the non-n addition driving is performed in the normal case. The saturation level of the photoelectric conversion unit is, in other words, the overflow level of the charge storage unit. Even if a photoelectric charge exceeding this level is generated, it is discharged to the overflow drain and is not accumulated. The overflow level OFL can be varied by a set value of a substrate bias voltage VSUB described later. However, if the overflow level OFL is too high, blooming is likely to occur. It is set as follows.

That is, the saturation level S of the horizontal transfer path
The value of atH is generally a value that allows for some design margin or adjustment margin with respect to the standard setting of the overflow level OFL of the charge storage unit. It is rare. This is symbolically expressed as SatH = k × OFL (k = approximately 1.1-1.5, but the theoretical lower limit is 1).

Therefore, if "n addition driving" is performed, the pixel signal becomes n times as large as the addition and the saturation level S
Charges exceeding atH are input to the horizontal transfer path.
Specifically, it occurs when the amount of charge per pixel before addition exceeds SatH / n (<OFL).

Even if such an excessive charge is input, if the horizontal transfer path is provided with a sufficient countermeasure against excess charge, for example, setting of an overflow drain, it is only a matter of clipping at the saturation level SatH. However, in actual CCD imaging devices, there are some which do not have sufficient measures against the excess charge in the horizontal transfer path. In the case of using this kind of CCD image pickup device, the excess charge is adjacent to the horizontal transfer path. There is a possibility that a fogging phenomenon similar to blooming may occur along a horizontal line because the area overflows in the area.

[0010] In order to solve this problem, the present applicant uses the substrate bias voltage V of the solid-state imaging device when using the n-addition mode.
By variably controlling the set value of SUB, a technique for lowering the overflow level of the corresponding charge storage section so as not to input excessive charge to the horizontal transfer path and prevent this fogging phenomenon has been proposed. I have. (Japanese Patent Application 200
0-0691154)

[0011]

The invention of Japanese Patent Application No. 2000-061154 by the applicant of the present invention prevents the occurrence of the fogging phenomenon by preventing excessive charges from being input to the horizontal transfer path as described above. Although this is a very useful invention, a problem arises in that the color balance changes in the n-addition mode compared to the non-addition mode. This is because the setting of the substrate bias voltage VSUB is greatly changed. That is, the sensitivity characteristic of the photoelectric conversion storage unit has a dependency on the substrate bias voltage VSUB, and since the dependency is greater on the long wavelength side, the spectral characteristic also has the VSUB dependency. This means that the relative sensitivity of RGB of the image sensor changes.

As shown in FIG. 6 (the numerical value on the horizontal axis is wavelength: unit nm), if the spectral characteristic of the camera in a normal state is represented by a solid line, the relative spectral characteristic is obtained when pixels are added (substrate bias voltage VSUB).
When B is increased), B increases and R decreases with respect to G.

Conventionally, although the substrate bias voltage VSUB has been finely adjusted during the adjustment of the camera manufacturing process, it is often used almost fixedly thereafter. Changes were negligible or absorbable at the time of the basic adjustment. However, as in the above-mentioned prior application filed by the present applicant, a large substrate bias voltage VS
This poses a problem when the UB setting is changed when the camera is used.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems. Even when the substrate bias voltage is varied, color reproduction such as color balance does not change, and in particular, image pickup that realizes pixel addition driving without image quality deterioration. It is intended to provide a device.

[0015]

According to a first aspect of the present invention, there is provided a solid-state imaging device, a driving unit for driving the solid-state imaging device, and a substrate bias of the solid-state imaging device. Substrate bias voltage setting means for variably setting a voltage value, and color correction means for performing color correction on an image signal output from the solid-state imaging device according to the substrate bias voltage value set by the substrate bias voltage setting means,
It is characterized by having.

In order to achieve the above object, the second aspect of the present invention
In the imaging device of the first aspect, the color correction is for correcting white balance adjustment for the imaging signal.

In order to achieve the above object, the third aspect of the present invention
The image pickup apparatus according to the first or second image pickup apparatus, wherein when the solid-state image pickup device is driven by the driving unit to read out pixel charges as an output signal, the normal drive for individually reading out each pixel charge of the solid-state image pickup device A pixel charge readout control means for enabling reading in an n-addition drive mode in which the pixel charges of the same solid-state imaging device are added by a predetermined number n in the vertical direction, and the substrate bias voltage setting means Is characterized in that the substrate bias voltage is controlled to a different set value depending on whether the readout by the pixel charge readout control unit is the normal drive mode or the n-addition drive mode.

In order to achieve the above object, a fourth aspect of the present invention is provided.
In the first or second imaging apparatus, when the driving means drives the solid-state imaging device to read out pixel charges as an output signal, each pixel charge of the solid-state imaging device is read out by a predetermined number in the vertical direction. a pixel charge readout control unit that enables reading in an n-addition drive mode in which n is added and read out, and the substrate bias voltage setting unit includes:
The invention is characterized in that the substrate bias voltage is controlled to a different set value according to the value of n in reading by the pixel charge reading control means.

[0019]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing a schematic configuration of an image pickup apparatus according to an embodiment of the present invention. Here, a case where the present invention is implemented as a digital camera will be described as an example.

As shown in FIG. 1, a digital camera 100 according to this embodiment has a lens system 101 composed of various lenses.
A lens driving mechanism 102 for driving the lens system 101, an exposure control mechanism 103 for controlling the aperture of the lens system 101, an optical filter 104 for low-pass and infrared cut, and a CCD with a color filter. A color image sensor 105, a CCD driver 106 for driving the image sensor 105, a pre-processing circuit 107 including an A / D converter and the like, and a color signal generation process, a matrix conversion process, and various other digital processes. A digital process circuit 108, a card interface 109 for detachably attaching an external memory card 110,
A D image display system 111.

Further, the digital camera 100 has a system controller (CP) for integrally controlling each unit.
U) 112, and further, an operation switch system 113 composed of various operation buttons, an operation display system 114 for displaying an operation state, a mode state, and the like, a strobe light 115 as a light emitting unit, and a control unit for controlling the lens driving mechanism 102. An exposure control driver 117 for controlling the lens driver 116, the strobe 115, and the exposure control mechanism 103,
Non-volatile memory (EE) for storing various setting information
PROM) 118.

In the digital camera 100 of this embodiment, the system controller 112 performs overall control, and the CCD driver 106
Exposure (charge accumulation) and signal reading are performed by controlling the driving of the pre-processing circuit 10.
The digital signal is taken into the digital process circuit 108 via the PC 7 and subjected to various signal processings, and then the card interface 109
Through a memory card 110 which is removable.

When the strobe 115 is used for the above exposure, the exposure control driver 117 is controlled by the system controller 112 to control the strobe 11.
By sending control signals for starting and stopping light emission to the flash unit 5, the flash unit 115 emits light.

The drive control of the CCD image sensor 105 is performed using various drive signals (charge transfer pulse TG, vertical drive pulse, horizontal drive pulse, substrate bias voltage VSUB, etc.) output from the CCD driver 106. Will be

In this embodiment, as the CCD color image pickup device 105, for example, an interline type using a vertical overflow drain structure is adopted. That is,
It has a charge storage section arranged in a matrix and charge transfer sections (vertical charge transfer path, horizontal charge transfer path) arranged horizontally and vertically, respectively.

When the charge transfer pulse TG is output, a transfer gate provided between each charge storage section and the vertical charge transfer path opens, and charges are transferred from each charge storage section to the corresponding vertical charge transfer path. You. At this time, the substrate bias voltage VSUB
The exposure time is substantially controlled by the relative relationship between the output timing of the charge discharge pulse and the charge discharge pulse TG superimposed on the exposure time. The vertical charge transfer path is driven by a vertical drive pulse. The substrate bias voltage VSUB is used to define the overflow level of the charge storage section. Excess charge above the overflow level is drained to the overflow drain.

In the digital camera 100 of the present embodiment, the same operations and controls as those of a normal digital camera are performed except for the variable setting control of the substrate bias voltage VSUB and the operation relating to the color correction corresponding thereto, which will be described in detail below. It is done, and for such known parts,
The description here is omitted.

The system controller 112 includes a drive mode control unit 201 as a function for performing variable setting control of the substrate bias voltage VSUB, which is a feature of this embodiment.
And VSUB setting unit 202, white balance (W
B) A setting and color correction unit (hereinafter, white balance setting unit) 203 is provided.

The drive mode control unit 201 controls reading of pixel charges from the CCD image pickup device 105, and controls the digital camera 100 in a normal drive mode and an n-addition drive mode. Here, the normal drive mode is a drive control mode for individually reading out each pixel charge of the CCD image sensor 105, and the n-addition drive mode is to transfer each pixel charge of the CCD image sensor 105 by a predetermined number n in the vertical direction. This is a drive control mode in which addition and reading are performed. FIG. 2 shows the state of drive control in the normal drive mode and the n-addition drive mode.

FIG. 2A shows the drive timing in the normal drive mode. As shown in the figure, one transfer drive using the vertical drive pulse φV is performed every horizontal blanking period (HBLK), and one line of charge is transferred from the vertical transfer path to the horizontal transfer path (vertical charge). 1 for each transfer path
Pixel). For the transfer on the vertical transfer path, for example, a well-known four-phase driving method or the like can be used.

FIG. 2B shows the drive timing in the n-addition drive mode (here, n = 4).
Four transfer drives using the vertical drive pulse φV are performed every horizontal blanking period (HBLK), and four lines of charges are transferred from the vertical transfer path to the horizontal transfer path (the vertical direction of each vertical transfer path). 4 pixels).

The driving of the horizontal transfer path is executed in the n-addition driving mode in the same manner as in the normal driving mode.
Thus, in the n-addition driving mode, an image compressed 1 / n in the vertical direction is read at high speed. In the present embodiment, the readout control in the n-addition drive mode is performed prior to the shooting, for example, AF (automatic focusing)
And AE (automatic exposure correction) processing. Of course, it can also be used for moving image display (EVF) of a captured image on the LCD image display system 111.

As an extension of the n-addition drive mode,
In order to consider the color coating pattern in the CCD image sensor 105 and appropriately adjust the sensitivity, when transferring the charge from the charge storage unit to the vertical transfer path prior to the vertical transfer, the charge is transferred from the vertical transfer path to the horizontal transfer path. "M / n addition drive" for selectively transferring only a specific m (≤n) line out of n lines added at the time of transfer ("n addition drive" is a special case, m =
n is included in “n / n addition drive”), but in the present embodiment, the number of pixel charge additions when these drives are used has an essential meaning.
Therefore, for simplicity of description, the following description will focus on the case where m = n, that is, only the n-addition drive. Therefore,
When the present invention is applied to the m / n addition drive, m is replaced with n.

The VSUB setting section 202 is for variably setting the overflow level OFL of the charge storage section determined by the above-described substrate bias voltage VSUB. The VSUB setting section 202 sets the substrate bias voltage between the normal drive mode and the n-addition drive mode. Control is performed to set VSUB to a different value.
Further, in the n-addition drive mode, the set value of the substrate bias voltage VSUB is variably set according to the value of n.

FIG. 3 is an explanatory diagram showing a cross-sectional structure of an interline CCD having a vertical overflow drain structure, which is used as the CCD image pickup device 105 in the digital camera of the present embodiment.

As shown in FIG. 3, an N-type semiconductor substrate 400
Is a first region 401 of a P-well having a shallow junction and a P-region having a deep junction.
The second region 402 of the well is formed. A portion of the first region 401 where the junction N-type region is formed is a photodiode, a so-called photoelectric conversion region (charge storage portion) 403.
Act as

In the second region 402, a vertical shift register including a buried channel 404, that is, a transfer electrode 405 is formed. The transfer electrode 405 is arranged on the main surface via the insulating layer 406. The photoelectric conversion region 403 and the buried channel 404 are separated by a channel stop region 407 made of a high P-type impurity layer.

The buried channel 404 corresponding to the photoelectric conversion region 403 is provided between the transfer gate region 408 and the transfer gate region 408.
Is arranged. Further, the area other than the photoelectric conversion region 403 is shielded from light by the metal layer 409. Blooming suppression is N
A substrate bias voltage VSUB411, which is a reverse bias voltage, is applied to the junction between the type semiconductor substrate 400 and the first region 401 and the second region 402 of the P well, and the photoelectric conversion region 40
This is realized by completely depleting (depletion layer) the first region 401 of the P well immediately below 3.

FIG. 4 is a diagram showing a change characteristic of the saturation signal amount (overflow level OFL) of the charge storage section with respect to the substrate bias voltage VSUB in the digital camera of the present embodiment.

As shown in the figure, the substrate bias voltage VSU
The overflow level OFL can be reduced by increasing the absolute value of B.

Next, referring to Table 1, the pixel addition number (n)
The specific relationship between the substrate bias voltage VSUB and the set value will be described.

[0043]

[Table 1] Now, at the time of non-addition, that is, in the normal drive mode of n = 1, the default substrate bias voltage VSUB value is set to “9”.
V ", and the overflow level OFL corresponding to this VSUB value is" 740 mV ", which is used as a reference value.

Table 1 shows the digital camera 10 of this embodiment.
0, stored in advance as preset data, n
At the time of addition driving mode (for example, addition of 2 pixels and addition of 4 pixels)
Shows the set value of the substrate bias voltage VSUB in FIG.

In the normal drive mode (substrate bias voltage VSUB = 9 V, overflow level OFL = 740)
mV), first, when n = 2, that is, when two pixels are added, the value of the substrate bias voltage VSUB (12. 2V) is calculated from the characteristics of FIG. 4, and in the present embodiment, this value is referred to as the substrate bias voltage VSU.
Used as the set value of B. Similarly, the value of the substrate bias voltage VSUB (14.5 V) is set so that n = 4, that is, when adding four pixels, the overflow level of the charge storage unit becomes １ ／ of the value (185 mV) at the time of non-addition. Use as a value.

The digital camera 100 according to the present embodiment uses the substrate bias voltage VSU at the time of adding each of the obtained pixels.
The set value of B, that is, the contents of Table 1 above, is preset as preset data in a predetermined memory (for example, an EEPROM 118).
Is to be remembered.

It is to be noted that the saturation level of the horizontal transfer path is generally at least equal to or higher than the standard setting value (740 mV) of the overflow level OFL of the charge storage section.
As described above, the overflow level OFL (7
Even if the set value of the substrate bias voltage VSUB is determined based only on the ratio of the number of pixel additions at the time of non-addition and at the time of addition based on 40 mV), the occurrence of horizontal fog noise can be reliably prevented.

The white balance setting section 203 has a normal white balance function including an automatic white balance, and also has an n-addition drive mode (in this embodiment, 2 white balance functions).
It has a function of performing color correction according to the value of the substrate bias voltage VSUB set in pixel addition and pixel addition.

Here, the white balance setting section 20
As a third function, the operation principle of the white balance circuit employed in the present embodiment (the normal white balance function described above) will be briefly described.

That is, the white balance setting unit 2
Reference numeral 03 denotes a light source type (for example, “daylight”, “incandescent lamp”, or “fluorescent lamp”) according to color temperature information of a subject or other information (including, for example, user setting and “flash use” information).
"Strobe" or the like is detected, and preset in a predetermined memory (for example, an EEPROM 11) in accordance with the detection result.
The white balance is obtained by multiplying each of the R and B signals by the predetermined gain value stored in the storage unit 8). Therefore, there are as many preset R and B gain value sets (white balance preset data) as the number of assumed light source types. (At this time, it is needless to say that the same incandescent lamp is treated as a different light source if necessary when the color temperature is different.) And, when the light source type is automatically detected, it functions as a so-called auto white balance. When the type of light source is designated as "daylight" by manual setting, for example, this functions as a so-called manual (preset selection) white balance. The illustration of the value of the white balance preset data is omitted.

Now, let us consider a case where the white balance function is executed based on only one type of preset data for each light source type without considering the change in the spectral sensitivity of the image sensor. In this case, when the spectral sensitivity of the image sensor changes, the R, G, B balance is lost due to the change. That is, each preset data is normally (non-added)
Since the optimal value is set for the signal output in the drive mode, when the substrate bias voltage VSUB is changed between the normal drive mode and the n-addition drive mode as in the digital camera 100 of the present embodiment, Since the spectral sensitivity changes when adding n pixels (during the n-addition driving mode) compared to when adding (during the normal driving mode), the white balance function is executed without any countermeasure and with the preset data at the time of non-addition. Then, the color changes as it is.

Therefore, the digital camera 10 of the present embodiment
In order to cope with such a situation, the white balance setting unit 203 sets the n-pixel addition (n) for changing the substrate bias voltage VSUB with respect to the non-addition (normal drive mode).
In the addition drive mode), the substrate bias voltage VSU
It is configured to perform color correction (B correction, R correction) corresponding to B.

Table 2 shows that at the time of non-addition (normal driving mode),
At the time of adding two pixels, at the time of adding four pixels (in the n-addition driving mode), the substrate bias voltage VSUB value, the R, G, B characteristics and the color correction amount (preset data of R, B) by the changing substrate bias voltage VSUB R and B, which are the respective numerical values of R and B to be multiplied.

[0054]

[Table 2] That is, the B / G / R shown in the middle row of Table 2 is the relative intensity of each RGB color signal output corresponding to the change in the spectral characteristic of the camera of the present embodiment illustrated in FIG. 6 (each curve in FIG. 6). (Corresponding to the area of the portion surrounded by the horizontal axis) with G = 100. In the non-addition state, B: G: R = 92: 100: 96, reflecting that RGB outputs before white balance adjustment are generally not always equal.

As described above, since the preset data is optimized with respect to this non-addition state (for each assumed light source), it is needless to say that no correction is necessary in this non-addition state. , R, and B are all one. On the other hand, for example, when two pixels are added, the output of B becomes 100/92 times, so that the B correction amount to be multiplied to cancel the output becomes 92/100 = 0.92, and the output of R becomes 92/96 times. Therefore, the R correction amount to be multiplied to cancel this is 96/92 = 1.0
It becomes 4. The same applies when adding four pixels.

FIG. 5 is a flowchart showing a routine for performing color correction on the set value of the substrate bias voltage VSUB in the digital camera 100 of the present embodiment.

As shown in the flowchart of FIG. 5, the system controller 112 first inputs color temperature information of a subject and other information (step S1). Based on this information, preset data at the time of non-addition stored in a predetermined memory is selected (step S2), and whether or not the substrate bias voltage VSUB is changed, that is, whether or not n pixels are added, is detected. (Step S3). Here, in the case of non-addition in which the substrate bias voltage VSUB is not changed, the white balance is set by directly using the selected preset data (step S).
5). That is, normal white balance setting is performed. (Note that since the correction amounts of R and B are 1, the correction is not performed in FIG. 5. However, when the processing is shared by avoiding the branch in step S3, the correction amount is multiplied by 1. It is self-evident.) On the other hand, in the case of n addition in which the substrate bias voltage VSUB is varied, the selected preset data is added to the selected preset data. The correction amount is set to 3 when adding 4 pixels.
After performing the color correction by multiplying the correction amount of the stage (step S4), the white balance is set (step S4).
5). That is, the white balance is executed by performing the B correction and the R correction on the normal white balance setting.

In the above description, white balance correction corresponding to the substrate bias value is realized by multiplying the preset data at the time of non-addition by the respective correction amounts of R and B. It is needless to say that the present invention can be equally realized by a method of storing data as preset data in advance and selecting these as necessary.

As described above, according to the digital camera of the present embodiment, color reproduction such as color balance does not change even when the substrate bias voltage VSUB is varied. Therefore, it is possible to realize the pixel addition driving without the image quality deterioration.

In this embodiment, the white balance is adjusted as the color correction. However, the present invention is not limited to this. For example, focusing on the fact that a change in spectral sensitivity may cause a change in color reproduction, Can be corrected so that this change in color reproduction does not occur. In this case, unlike white balance deviation, correction may not be performed for all colors in some cases. However, correction can be performed for at least a specific color focused on, for example, skin color and green.

The technical idea of the present invention can be applied to a camera that uses only pixel addition (that is, does not have a non-addition mode).

Further, the color correction data (the above-described color correction amount) corresponding to the substrate bias voltage VSUB may have different required setting values due to performance variations among devices. In this case, At the time of adjustment in the manufacturing process, etc., the correction data for the individually required set values is EEPRO
More desirably, writing to M118 is performed.
In other words, the color correction corresponding to the substrate bias voltage VSUB, which is a main part of the present invention, performs so-called electronic adjustment (adapting different setting data for each device so as not to cause a variation in the result). It can be realized in a form that includes it.

[0063]

As described above, according to the present invention, even when the substrate bias voltage is varied, the color reproduction such as color balance does not change, and it is possible to realize the pixel addition driving without particularly deteriorating the image quality. .

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a schematic configuration of an imaging apparatus according to an embodiment of the present invention.

FIG. 2 is a diagram showing drive timing in a normal drive mode in the embodiment.

FIG. 3 is a diagram showing drive timings in an n-addition drive mode (here, n = 4) in the embodiment.

FIG. 4 shows a substrate bias voltage VS in the embodiment.
FIG. 9 is a diagram illustrating a change characteristic of a saturation signal amount (overflow level OFL) of a charge storage unit with respect to UB.

FIG. 5 shows a substrate bias voltage VS in the embodiment.
9 is a flowchart illustrating a routine for performing color correction on a set value of UB.

FIG. 6 is a diagram showing spectral characteristics of a camera in a normal state (solid line).
FIG. 4 is a diagram showing relative spectral characteristics (broken lines) at the time of pixel addition.

[Explanation of symbols]

 105: CCD imaging device 112: System controller 118: EEPROM 201: Drive mode control unit 202: Substrate bias voltage VSUB setting unit 203: White balance setting and color correction unit

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (reference) // H04N 101: 00 H01L 27/14 BF term (reference) 4M118 AA10 AB01 BA08 BA13 CA03 CA18 CA19 DA03 DA18 DA32 FA06 FA13 FA26 FA33 GB03 GB07 GB11 5C024 AX01 BX01 CX41 CY15 DX07 EX51 GY01 GZ25 HX18 5C065 AA03 BB01 BB02 CC01 DD02 EE03 FF02 GG15 GG44 5C066 AA01 AA11 CA05 CA17 EA13 EA14 GA01 GB01 KM03 HA03

Claims (4)

[Claims] 1. A solid-state imaging device, driving means for driving the solid-state imaging device, substrate bias voltage setting means for variably setting a value of a substrate bias voltage of the solid-state imaging device, and setting the substrate bias voltage setting means And a color correction unit that performs color correction on an imaging signal output from the solid-state imaging device in accordance with the value of the substrate bias voltage. 2. The imaging apparatus according to claim 1, wherein the color correction is for correcting white balance adjustment for the imaging signal. 3. A normal driving mode for individually reading out each pixel charge of the solid-state imaging device when the solid-state imaging device is driven by the driving means to read out pixel charges as an output signal; Pixel charge readout control means for enabling readout in an n-addition drive mode in which charges are added by a predetermined number n in the vertical direction, and wherein the substrate bias voltage setting means reads out by the pixel charge readout control means. The imaging apparatus according to claim 1, wherein the substrate bias voltage is controlled to a different set value between the case of the normal drive mode and the case of the n addition drive mode. 4. An n-addition drive mode in which when the solid-state imaging device is driven by the driving means and pixel charges are read out as an output signal, each pixel charge of the solid-state imaging device is added by a predetermined number n in a vertical direction and read out. The substrate bias voltage setting means controls the substrate bias voltage to a different set value according to the value of n in reading by the pixel charge read control means. The imaging device according to claim 1, wherein: