JP2002024077A - Write controller of semiconductor memory and its method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the shortening of life of the entire memory even when data write frequency to a specific logical block (logical address) is high. SOLUTION: Physical blocks are specified so that the specification of the physical bocks in which data are written becomes even, the propriety of data write to the physical block regarding the specification is detected when the write of the data is instructed, the data are written in the specified physical block when the write is possible, on the other hand, the data of the specified physical block is transferred to an erased free physical block, the data regarding the writing instruction are written in a physical block emptied due to transfer when the write is impossible and addresses of logical blocks and physical blocks are associated with each other according to a writing operation.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a write control apparatus and method for a semiconductor memory having a plurality of physical blocks for storing data and writing data by designating a logical block from an upper system. .

[0002]

2. Description of the Related Art In a conventional semiconductor memory such as a flash memory, it is prevented that the life of the entire storage device is shortened due to deterioration of a partial area of the memory due to high frequency of rewriting data in a specific area. Therefore, there is known an apparatus which counts the number of erasures of a physical block, and copies the data of the physical block to another physical block when the number of erasures becomes constant (for example, Japanese Patent Application Laid-Open No. 2000-20252). reference).

According to the above conventional example, it is necessary to count the number of erasures in each physical block, which is troublesome.

[0004]

SUMMARY OF THE INVENTION The present invention has been made in order to solve the above-mentioned problems in the conventional semiconductor memory, and has as its object to specify the number of erasures without counting the number of times in each physical block. An object of the present invention is to provide a semiconductor memory write control device and method capable of preventing the life of the entire memory from being shortened even when the frequency of writing data to a logical block (logical address) is high.

[0005]

According to the present invention, there is provided a write control apparatus for a semiconductor memory having a plurality of physical blocks for storing data, wherein a data write is performed by designating a logical block from an upper system. In a write control device, a designation unit for designating a physical block so that designation of a physical block to which data is to be written becomes uniform, and whether or not data can be written to the physical block designated by the designation unit when there is a data write instruction Detection means for detecting the data, and when the detection means determines that writing is possible, writes the data to the physical block specified by the instruction means. The data of the physical block to be moved to the empty physical block from which data has been A write control means for writing data according to the write instruction, in response to said write operation by the write control means, characterized by comprising an address control means for associating the address of the logical block and a physical block. As a result, the physical blocks related to the writing are automatically and equally specified and the writing is performed.
The life of the semiconductor memory can be extended.

Further, according to the present invention, there is provided a write control apparatus for a semiconductor memory, wherein a free block monitoring means for monitoring a free block of a physical block, and an operation of the write control means according to a monitoring result by the free block monitoring means. And an operation control means for controlling the operation. This allows
In accordance with the free state of the physical block, the adoption of the operation of automatically specifying the physical blocks related to the writing and performing the writing is determined.

Further, the write control device for a semiconductor memory according to the present invention adds attribute information for controlling the operation of the write control means to each physical block and each logical block, and writes the attribute information in accordance with the attribute information. Operation control means for controlling the operation of the load control means. by this,
The write control method can be changed depending on the physical block and the logical block.

Further, a write control device for a semiconductor memory according to the present invention comprises an operation control means for controlling the operation of the write control means based on whether or not the area is a predetermined area. I do. This makes it possible to change the write control method depending on whether the area is a predetermined area.

Further, a write control device for a semiconductor memory according to the present invention comprises an operation control means for controlling the operation of the write control means based on an instruction from a host system. As a result, the write control method can be changed according to an instruction from the host system.

The writing control apparatus for a semiconductor memory according to the present invention is characterized in that it comprises a setting means for setting a range of a physical block specified by the specifying means. This makes it possible to set the range of the physical block specified by the specifying means.

Further, a write control method for a semiconductor memory according to the present invention has a plurality of physical blocks for storing data,
In a write control method in a semiconductor memory in which data writing is performed by designating a logical block from a host system, a first step of designating a physical block so that the designation of a physical block to which data is to be written becomes uniform;
When there is a data write instruction, a second step of detecting whether or not data can be written to the physical block specified in the first step, and if it is determined that the data can be written by the second step, While writing data to the physical block specified in the first step, if it is determined that writing is not possible, the data of the physical block specified in the first step is written to the erased free physical block. A third step of writing data according to the write instruction to the physical block instructed in the first step, and an address of a logical block and a physical block in response to a write operation in the third step; And a fourth step of associating As a result, the physical blocks to be written are automatically and evenly designated, and writing is performed.

[0012]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a write control apparatus for a semiconductor memory according to an embodiment of the present invention; FIG. 1 shows a data processing system configured using the apparatus of the present invention. This system includes a host computer 100 as a host system and a semiconductor nonvolatile memory card 101.

The semiconductor nonvolatile memory card 101 includes:
An interface circuit 102, a memory control circuit 103, and a flash memory 104 are included, and the interface circuit 102 is connected to the host computer 1 via a bus 105.
00 is connected. In the above, the interface circuit 102 receives commands and data with the host computer 100 and returns responses and data. The memory control circuit 103 is a write and read control device that reads and writes data from and to the flash memory 104.

The flash memory 104 uses the physical block shown in FIG. 2 as a write and erase access unit. The physical block has a data section in which data is stored and an attribute section in which attribute information is stored. And
The flash memory 104 includes a plurality of physical blocks as shown in FIG.

In the present embodiment, the memory control circuit 103 is provided with a block number conversion table for logical blocks / physical blocks as shown in FIG. Is used to access the flash memory 104, and if necessary, the contents of the conversion table are updated.

Next, the basic operation of the memory card 101 will be described. When commands such as read and write are issued from the host computer 100 to the memory card 101, these commands are notified to the interface circuit 102 through the system bus 105. When these commands are related to access to the flash memory 104, the interface circuit 102 notifies the commands to the memory control circuit 103. The memory control circuit 103 accesses the flash memory 104 according to the notified command, and returns the result to the interface circuit 102. The interface circuit 102 transmits the result from the memory control circuit 103 to the host computer 1
Return to 00.

The address of a read or write command issued from the host computer 100 to the memory card 101 is indicated by a logical address or a logical block. The memory control circuit 103 converts the logical address into a logical block, and converts the logical block into a physical block. Conversion to a block is performed. The conversion from the logical block to the physical block is performed by referring to a conversion table as shown in FIG. 4, and the flash memory 104 accesses the converted physical block.

Upon receiving a data write command from the host computer 100, the memory control circuit 103 performs processing according to the flowchart shown in FIG. 5 and operates so that write accesses do not concentrate on one physical block. To perform this operation, the memory control circuit 103 includes, as shown in FIG. 6, a write pointer WP (designating means) for designating a physical block to which data is to be written so that the designation of the physical block is equal. Here, the write pointer WP is sequentially advanced from the smaller physical block number to the larger physical block number (or vice versa) so that the designation of the physical block in which the data is to be written becomes uniform, and again when reaching the end. Proceed to specify the beginning.

The write operation performed by the memory control circuit 103 will be described below with reference to FIGS. Here, an example is shown in which a write command is continuously issued from the host computer 100 to the logical block (N-2).
The left side of FIG. 6 is a conversion table from logical blocks to physical blocks, and the right side is the flash memory 104.

In the first state, as shown in step 1 of FIG. 6, data D [0] to D [N-2] are assigned to physical block numbers 0 to N-2 corresponding to logical block numbers 0 to N-2.
Is stored, the write pointer WP indicates the physical block number (N-1). Here, when writing is continuously performed on the logical block number (N−2), the memory control circuit 103 that has received the write command from the host 100 at that time uses the conversion table to make the logical block number number (N The rewrite data (stored data) for the physical block number (N-2) corresponding to (-2) is erased (S1).

Next, it is detected whether or not data is stored in the block of the physical block number (N-1) indicated by the write pointer WP (S2 (detection means)). Here, as shown in Step 1 of FIG. 6, since no data is stored in the block at the physical block number (N-1), the write pointer WP points to the data D [N-2] from the host 100. (S5 (write control means)). Next, the write pointer WP is incremented (S
6). In this example, since the write pointer WP is located at the end, the process branches to YES in step S7, and returns to the position indicating the first physical block number (0) in step S8 (see step 2 in FIG. 6).

In the initial state, as shown in step 1 of FIG. 6, the logical table number (N-
2) is associated with the physical block number (N-2), and the logical block number (N-1) is associated with the physical block number (N
-1), the logical block number (N-2) corresponds to the physical block number (N-1) and the logical block number (N-1)
Corresponds to the physical block number (N-2), the content of the conversion table is updated (S9 (address control means)). As a result, the conversion table is as shown in step 2 of FIG.

Further, the memory control circuit 103, which has received a write command of the same data D [N-2] to the logical block number (N-2) from the host 100, stores the conversion table shown in step 2 in FIG. The rewrite data (stored data) is erased for the physical block number (N-1) corresponding to the logical block number (N-2) (S1). As a result, at the physical block number (N-1), the stored data is erased as shown in step 3 of FIG.

Next, it is detected whether data is stored in the block of the physical block number (0) indicated by the write pointer WP (S2). Here, as shown in step 2 of FIG. 6, since the data D [0] is stored in the block at the physical block number (0), the physical block which erased this data D [0] first Number (N-
It moves to the block of 2) (S3 (write control means)).

Next, the data of the block of the physical block number (0) indicated by the write pointer WP is erased (S4), and the data D [N-2] is deleted by the physical block number (0) indicated by the write pointer WP. (Step S5). Further, the write pointer WP is incremented (S6). In this example, since the write pointer WP is located at the physical block number (0), the process branches to NO in step S7, and the write pointer WP is located at the next physical block number (1) (step in FIG. 6). 3).

In the previous state, as shown in step 2 of FIG. 6, the logical table number (N-
2) is associated with the physical block number (N-1), and the logical block number (N-1) is associated with the physical block number (N
-2), the logical block number (0) is changed to the physical block number (N
-2), and the contents of the conversion table are updated so that the logical block number (N-2) corresponds to the physical block number (0) (S9). As a result, the conversion table is as shown in step 3 of FIG.

Further, when the same data is also received from the host 100 to the logical block number (N-2) for the write command of [N-2], the same processing as described above is performed, and finally the conversion table and The contents of the flash memory 104 are as shown in step 4 of FIG.

Even when the write to the logical block (N-2) is concentrated in this way, the write to the same physical block is not performed, and the physical blocks to be sequentially written are changed, and all the write to the physical block are changed. Writing is performed uniformly on the physical block. Moreover, there is an advantage that the update of the conversion table does not change the logical address or the logical block seen from the host computer side, and the update control of the conversion table of the present apparatus does not affect the outside. Since the write is evenly distributed to all the physical blocks, the number of erasures of the normal flash memory is limited to hundreds of thousands or more. Therefore, the problem of the life of the memory card 101 can be almost eliminated. It is possible.

In the above embodiment, the processing for distributing the physical blocks to be written is performed for all write commands. When the ratio of the physical blocks is equal to or more than a predetermined value, the above-described distribution processing may not be performed (operation control unit). That is, data is written to an empty physical block and the conversion table is updated without performing data movement when data is stored in the physical block indicated by the write pointer. This can avoid the overhead caused by read / write and erasure at the time of data movement in the above-described embodiment, and can use empty physical blocks sequentially and write almost all physical blocks uniformly.

Also, a flag indicating whether or not to perform the processing of the above-described embodiment is provided as attribute information to be added to a physical block or a conversion table, so that writing to the same logical block is likely to occur. (Operation control means). In this way, the processing is limited to only the necessary parts, and the overhead caused by read / write and erase during data movement can be avoided. In a block in which this process is not performed, writing to the same logical block is writing to the same physical block. However, if the frequency is low, the life is not affected.

Further, it may be set so that the processing is performed based on whether or not the area is a predetermined area (operation control means). As a result, the processing is limited to only a predetermined area,
In other areas, overhead caused by read / write and erase during data movement can be avoided. Further, it may be set so that the processing is performed based on an instruction from the host computer 100 which is a host system (operation control means). Thereby, the host computer 1
From 00, it is possible to flexibly control the execution of the process.

Although the write pointer WP is incremented sequentially for each write, physical blocks may be randomly arranged so as not to concentrate on a specific physical block. In the above-described embodiment, an example has been shown in which the write pointer WP is incremented so that all physical block numbers appear in order to uniformly access all physical blocks. Done only in the second half of
The first half may be set so that the light pointer WP does not point. The setting is performed in advance, or the host computer 1
Start from 00. In this way, the area pointed to by the write pointer WP is restricted, and important data that is not rewritten is stored in the first half, and data that is frequently rewritten is stored in the second half. It is also possible to shorten the life of the physical block portion in the latter half where frequently-rewritten data is stored.

[0033]

As described above, according to the semiconductor memory write control apparatus of the present invention, a physical block is specified so that the specification of a physical block to which data is to be written is equal, and a data write instruction is issued. If there is, whether the data writing to the specified physical block is possible or not is detected. If the writing is not possible, the data of the specified physical block is moved to the erased free physical block, and the data is vacated by the movement. Since the data according to the write instruction is written to the physical block and the addresses of the logical block and the physical block are associated with each other in accordance with the write operation, the physical block related to the write is automatically and equally designated to perform the write. As a result, it is possible to prevent the life from being shortened due to the concentration of writing of the semiconductor memory in a specific physical block.

[Brief description of the drawings]

FIG. 1 is a block diagram of a data processing system including a semiconductor memory write control device according to the present invention.

FIG. 2 is a diagram showing a configuration of a physical block of the flash memory.

FIG. 3 is a diagram showing a configuration of a flash memory.

FIG. 4 is a diagram showing a logical block / physical block conversion table used in the semiconductor memory write control device according to the present invention;

FIG. 5 is a flowchart for explaining the operation of the semiconductor memory write control device according to the present invention;

FIG. 6 is a diagram for explaining transition of contents of the flash memory and the conversion table by a write operation by the write control device of the semiconductor memory according to the present invention;

[Explanation of symbols]

REFERENCE SIGNS LIST 100 host computer 101 semiconductor nonvolatile memory 102 interface circuit 103 memory control circuit 104 flash memory 105 bus

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Claims (7)

[Claims] In a semiconductor memory write control device having a plurality of physical blocks for storing data and performing data writing by designating a logical block from an upper system, the specification of physical blocks to which data is to be written is equal. Designation means for designating a physical block so as to be read; detection means for detecting whether data can be written to a physical block designated by the designation means when there is a data write instruction; and determination of writability by the detection means In the case, while writing data to the physical block specified by the instruction means, if it is determined that writing is not possible, the data of the physical block specified by the instruction means is moved to the erased free physical block, Write control means for writing data according to the write instruction to a physical block designated by the instruction means; According to the write operation by the write control unit, the writing control apparatus of a semiconductor memory characterized by comprising an address control means for associating the address of the logical block and a physical block. 2. An apparatus according to claim 1, further comprising: an empty block monitoring unit that monitors an empty block of the physical block; and an operation control unit that controls an operation of the write control unit in accordance with a monitoring result of the empty block monitoring unit. 2. The write control device for a semiconductor memory according to claim 1, wherein: 3. An operation control unit that adds attribute information for controlling the operation of the write control unit to each physical block and each logical block, and controls the operation of the write control unit according to the attribute information. 2. The method according to claim 1, further comprising:
3. The write control device for a semiconductor memory according to claim 1. 4. The semiconductor memory according to claim 1, further comprising operation control means for controlling the operation of said write control means based on whether or not the area is a predetermined area. Control device. 5. The write control device for a semiconductor memory according to claim 1, further comprising an operation control means for controlling the operation of said write control means based on an instruction from a host system. 6. The write control device for a semiconductor memory according to claim 1, further comprising setting means for setting a range of the physical block specified by the specifying means. 7. A write control method in a semiconductor memory having a plurality of physical blocks for storing data and performing data writing by designating a logical block from an upper system, wherein a physical block to which data is to be written is equally specified. A first step of designating a physical block so as to become, a second step of detecting whether data can be written to the physical block designated in the first step when a data write instruction is issued, If it is determined in step 2 that writing is possible, data is written to the physical block specified in the first step. If it is determined that writing is not possible, the data is written in the first step. The data of the erased physical block is moved to the erased free physical block, and the physical block designated in the first step is moved. A semiconductor device comprising: a third step of writing data according to the write instruction to a lock; and a fourth step of associating a logical block with an address of a physical block in accordance with the write operation in the third step. Memory write control method.