JP4149640B2 - Semiconductor memory writing control apparatus and method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a write control apparatus and method in a semiconductor memory having a plurality of physical blocks for storing data and performing data writing in which a logical block is designated from a host system.
[0002]
[Prior art]
In a conventional semiconductor memory such as a flash memory, in order to prevent the life of the entire storage device from being shortened due to deterioration of a part of the memory due to high frequency of rewriting data in a specific area, An apparatus is known that counts the number of erasures and copies the data of the physical block to another physical block when the number of erasures becomes constant (see, for example, Japanese Patent Laid-Open No. 2000-20252).
[0003]
According to the above conventional example, it is necessary to count the number of times of erasing in each physical block, which is troublesome.
[0004]
[Problems to be solved by the invention]
The present invention has been made in order to solve the above-described problems in the conventional semiconductor memory. The purpose of the present invention is to perform data transfer to a specific logical block (logical address) without counting the number of times of erasure in each physical block. It is an object to provide a semiconductor memory write control apparatus and method capable of preventing the life of the entire memory from being shortened even when the write frequency is high.
[0005]
[Means for Solving the Problems]
A semiconductor memory write control device according to the present invention has a plurality of physical blocks for storing data, and writes data in a semiconductor memory write control device in which data is written by designating a logical block from a host system. Designating means for designating the plurality of physical blocks in a predetermined order so that the designation of the physical block to be equalized, and erasure for erasing the data stored in the physical block so that new data can be written to the physical block Means for detecting whether data can be written to the physical block according to whether data has already been written to the physical block designated by the designation means, and if there is a data write request, the erasing means to perform the erasing by, when it is determined that the writable by the detecting means, said specifying means specifies While writing data to physical blocks, when it is determined that the write disable moves the data stored in the physical block the specifying means specifies, to a writable another physical block caused by erasing by said erasing means And a write control means for writing the data related to the data write request to the erased physical block after the data stored in the physical block designated by the designation means is erased by the erase means, and the write control means And an address control means for associating the address of the logical block with the address of the physical block according to the write operation. As a result, the physical blocks related to the writing are automatically and equally designated and the writing is performed.
[0006]
According to another aspect of the present invention, there is provided a write control device for a semiconductor memory, an empty block monitoring unit that monitors an empty block of a physical block, and an operation that controls the operation of the write control unit according to a monitoring result by the empty block monitoring unit. And a control means. Accordingly, it is determined to adopt an operation in which the physical blocks related to writing are automatically and equally designated according to the free state of the physical blocks.
[0007]
The semiconductor memory write control apparatus according to the present invention adds attribute information for controlling the operation of the write control means to each physical block and each logical block, and the write control means according to the attribute information. And an operation control means for controlling the operation of the apparatus. As a result, the write control method can be changed depending on the physical block and the logical block.
[0008]
According to another aspect of the present invention, there is provided a semiconductor memory write control device comprising operation control means for controlling operation of the write control means based on whether or not the area is a predetermined area. Thus, the writing control method can be changed depending on whether or not the area is a predetermined area.
[0009]
According to another aspect of the present invention, there is provided a semiconductor memory write control device comprising operation control means for controlling operation of the write control means based on an instruction from a host system. As a result, the writing control method can be changed according to an instruction from the host system.
[0010]
According to another aspect of the present invention, there is provided a semiconductor memory write control device comprising setting means for setting a physical block range designated by a designation means . Thereby, it is possible to set a range of physical blocks designated by the designation means .
[0011]
Furthermore, a semiconductor memory write control method according to the present invention includes a plurality of physical blocks for storing data, and the semiconductor memory write control method in which data write is performed by designating a logical block from a host system. Data is already written in the first step of designating the plurality of physical blocks in a predetermined order so that the designation of the physical blocks to be written is uniform, and the physical block designated in the first step The second step of detecting whether or not data can be written to the physical block according to whether or not the data is written, and if there is a data write request, erases the data stored in the physical block so that new data can be written to the physical block. to a third step, if it is determined that writing is not permitted the second step, the first While moving to a writable another physical block caused by the data stored in the specified physical block said third step by step, the first written data to the specified physical block in step and a fourth step of erasing the writable newly data, said the physical block specified in the first step, a fifth step of writing data according to the data write request, the fifth And a sixth step of associating the addresses of the logical block and the physical block in accordance with the write operation by the step. As a result, the physical blocks related to the writing are automatically and equally designated and the writing is performed.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
A semiconductor memory write control apparatus and method according to embodiments of the present invention will be described below with reference to the accompanying drawings. FIG. 1 shows a data processing system configured using the apparatus of the present invention. This system includes a host computer 100, which is a host system, and a semiconductor nonvolatile memory card 101.
[0013]
The semiconductor nonvolatile memory card 101 includes an interface circuit 102, a memory control circuit 103, and a flash memory 104, and the interface circuit 102 is connected to the host computer 100 via the bus 105. In the above description, the interface circuit 102 receives commands and data from the host computer 100 and returns responses and data. The memory control circuit 103 is a writing / reading control device, and reads / writes data from / to the flash memory 104.
[0014]
The flash memory 104 uses the physical block shown in FIG. 2 as a write / erase access unit. The physical block has a data part for storing data and an attribute part for storing attribute information. The flash memory 104 is provided with a plurality of physical blocks as shown in FIG.
[0015]
In this embodiment, the memory control circuit 103 is provided with a conversion table of block numbers relating to logical blocks / physical blocks as shown in FIG. 4, and the memory control circuit 103 uses this conversion table. The flash memory 104 is accessed, and the contents of this conversion table are updated when necessary.
[0016]
Next, the basic operation of the memory card 101 will be described. When commands such as read and write are issued from the host computer 100 to the memory card 101, these commands are notified to the interface circuit 102 through the system bus 105. When these commands relate to access to the flash memory 104, the interface circuit 102 notifies the memory control circuit 103 of the commands. The memory control circuit 103 accesses the flash memory 104 according to the notified command, and returns the result to the interface circuit 102. The interface circuit 102 returns the result from the memory control circuit 103 to the host computer 100.
[0017]
The address of a read or write command issued from the host computer 100 to the memory card 101 is specified by a logical address or a logical block, and the memory control circuit 103 converts the logical address to the logical block, and converts the logical block to the physical block. Conversion is performed. Conversion from the logical block to the physical block is performed by referring to the conversion table as shown in FIG. 4, and the flash memory 104 is accessed to the converted physical block.
[0018]
When the memory control circuit 103 receives a data write command from the host computer 100, the memory control circuit 103 performs a process according to the flowchart shown in FIG. 5 so that the write access is not concentrated on one physical block. In order to perform this operation, the memory control circuit 103 includes a write pointer WP (designating means) that designates physical blocks so that designation of physical blocks to which data is to be written is uniform, as shown in FIG. Here, the write pointer WP is sequentially advanced from the smallest physical block number to the largest (or vice versa) so that the designation of the physical block to which data is to be written is equal, and again when the end is reached. Proceed to specify the beginning.
[0019]
Hereinafter, the write operation performed by the memory control circuit 103 will be described with reference to FIGS. Here, an example in which a write command is continuously issued from the host computer 100 to the logical block (N-2) is shown. Note that the left side of FIG. 6 is a conversion table from logical blocks to physical blocks, and the right side is the flash memory 104.
[0020]
In the initial state, data D [0] to D [N-2] are stored in physical block numbers 0 to N-2 corresponding to logical block numbers 0 to N-2 as shown in step 1 of FIG. In this state, the write pointer WP indicates the physical block number (N-1). Here, when the write is continuously performed on the logical block number (N−2), the memory control circuit 103 that has received the write command from the host 100 at that time uses the conversion table to determine the logical block number (N -2), the rewrite data (stored data) is erased for the physical block number (N-2) corresponding to (-2).
[0021]
Next, it is detected whether or not data is stored in the block of the physical block number (N-1) indicated by the write pointer WP (S2 (detection means)). Here, as shown in step 1 of FIG. 6, since no data is stored in the physical block number (N−1), the write pointer WP indicates the data D [N−2] from the host 100. To the block of the physical block number (N-1) to be executed (S5 (write control means)). Next, the write pointer WP is incremented (S6). In this example, since the write pointer WP is located at the end, the process branches to YES in step S7, and is returned to the position indicating the head physical block number (0) in step S8 (see step 2 in FIG. 6).
[0022]
In the initial state, as shown in Step 1 of FIG. 6, in the conversion table, the logical block number (N-2) is associated with the physical block number (N-2), and the logical block number (N-1) is The logical block number (N-1) corresponds to the physical block number (N-1), but the logical block number (N-2) corresponds to the physical block number (N-1) and the logical block number (N-). The contents of the conversion table are updated so that 1) corresponds to the physical block number (N-2) (S9 (address control means)). As a result, the conversion table is as shown in step 2 of FIG.
[0023]
Further, the memory control circuit 103 that has received the write command of the same data D [N-2] from the host 100 to the logical block number (N-2) uses the conversion table shown in step 2 of FIG. Rewrite data (stored data) is erased for the physical block number (N-1) corresponding to the block number (N-2) (S1). As a result, at the physical block number (N-1), the stored data is erased as shown in step 3 of FIG.
[0024]
Next, it is detected whether data is stored in the block having the physical block number (0) indicated by the write pointer WP (S2). Here, as shown in step 2 of FIG. 6, since data D [0] is stored in the physical block number (0) in the block, the physical block from which this data D [0] has been erased first is stored. Move to the block of number (N-2) (S3 (write control means)).
[0025]
Next, the data of the block with the physical block number (0) indicated by the write pointer WP is erased (S4), and the data D [N-2] is changed to the block with the physical block number (0) indicated by the write pointer WP. Write (step S5). Further, the write pointer WP is incremented (S6). In this example, since the write pointer WP is located at the physical block number (0), the process branches to NO in step S7, and the write pointer WP is located at the next physical block number (1) (step in FIG. 6). 3).
[0026]
In the previous state, as shown in Step 2 of FIG. 6, in the conversion table, the logical block number (N-2) is associated with the physical block number (N-1), and the logical block number (N-1) is The logical block number (N-2) is associated with the physical block number (N-2), but the logical block number (0) corresponds to the physical block number (N-2) and the logical block number (N-2) is written. The contents of the conversion table are updated so that corresponds to the physical block number (0) (S9). As a result, the conversion table is as shown in step 3 of FIG.
[0027]
Further, when the same data as the logical block number (N-2) is received from the host 100, the same processing as described above is performed, and finally the conversion table and the flash memory 104 are processed. The contents of are as shown in step 4 of FIG.
[0028]
Even when writing to the logical block (N-2) is concentrated in this way, the physical blocks to be sequentially written are changed without writing to the same physical block, and all physical blocks are changed. Light is evenly performed. In addition, there is an advantage that there is no change in the logical address or logical block visible from the host computer side due to the update of the conversion table, and the update control of the conversion table of this apparatus has no external influence. Since the write is uniformly distributed to all the physical blocks, the limit of the number of times the normal flash memory can be erased is several hundred thousand times or more, so the problem of the lifetime of the memory card 101 can be almost solved. Is possible.
[0029]
In the above embodiment, the process of distributing the physical blocks to be written is performed for all the write commands. However, the vacancy information of the physical blocks is obtained (empty / vacuum monitoring means), and the physical blocks in the empty state are obtained. When the ratio is greater than or equal to a predetermined value, the above dispersion process may not be performed (operation control means). That is, data is written to an empty physical block and the conversion table is updated without performing data movement when data is stored in the physical block indicated by the write pointer. As a result, the overhead caused by read / write and erasure during data movement in the above embodiment can be avoided, and free physical blocks are sequentially used, and almost all physical blocks are written uniformly.
[0030]
In addition, as attribute information to be added to the physical block or conversion table, a flag indicating whether or not to perform the processing of the above embodiment is provided, for example, for the block that is likely to be written to the same logical block. (Operation control means). In this way, processing is limited to only necessary portions, and overhead caused by read / write and erasure during data movement can be avoided. In a block that is set not to perform this process, a write to the same logical block is a write to the same physical block, but if the frequency is low, there is no effect on the lifetime.
[0031]
Furthermore, it may be set to perform the processing based on whether or not the area is a predetermined area (operation control means). As a result, processing is limited to a predetermined area, and in other areas, overhead caused by read / write and erasure during data movement can be avoided. Further, the processing may be set to be performed based on an instruction from the host computer 100 which is a host system (operation control means). Thereby, the host computer 100 can flexibly control the execution of the process.
[0032]
In addition, the write pointer WP is incremented in order for each write, but the physical block may be randomly arranged so as not to concentrate on a specific physical block. In the above embodiment, in order to make all physical blocks uniformly accessed, the example in which the write pointer WP is incremented so that all physical block numbers appear is shown. However, the increment range of the write pointer WP is set to all physical blocks. The first half may be set so that the write pointer WP does not point. The setting is performed in advance or is performed from the host computer 100 later. In this way, the area pointed to by the write pointer WP is limited, important non-rewritten data is stored in the first half, and frequently rewritten data is stored in the second half, thereby protecting important data in the first half and It is also possible to shorten the lifetime of the physical block portion in which data with high rewrite frequency in the latter half is stored.
[0033]
【The invention's effect】
As described above, according to the present invention, a physical block to which data is to be written in the write control in a semiconductor memory having a plurality of physical blocks for storing data and in which data is written by specifying a logical block from the host system. Specify multiple physical blocks in the order specified so that the designations are equal, and detect whether data can be written to physical blocks according to whether data has already been written for the specified physical blocks If there is a data write request , the data stored in the physical block is erased so that new data can be written to the physical block . If it is determined that writing is not possible , the data stored in the specified physical block while moving to a writable another physical block caused by erasing, the specified physical block To the written data, erased so writable new data, to a specified physical block, since write data according to the data write request, the physical block according to write automatically equally designated by the write Made.
[Brief description of the drawings]
FIG. 1 is a block diagram of a data processing system including a semiconductor memory write control device according to the present invention.
FIG. 2 is a diagram showing a configuration of a physical block of a flash memory.
FIG. 3 is a diagram showing a configuration of a flash memory.
FIG. 4 is a view showing a logical block / physical block conversion table used in the semiconductor memory write control apparatus according to the present invention;
FIG. 5 is a flowchart for explaining the operation of the semiconductor memory write control device according to the present invention;
FIG. 6 is a diagram for explaining the content transition of the flash memory and the conversion table by the write operation by the semiconductor memory write control device according to the present invention;
[Explanation of symbols]
100 Host Computer 101 Semiconductor Nonvolatile Memory 102 Interface Circuit 103 Memory Control Circuit 104 Flash Memory 105 Bus

Claims (7)

In a semiconductor memory write control device that has a plurality of physical blocks for storing data and performs data writing in which a logical block is designated from a host system,
Designating means for designating the plurality of physical blocks in a predetermined order so that the designation of physical blocks to which data is to be written is even;
Erasing means for erasing the data stored in the physical block so that new data can be written to the physical block ;
Detecting means for detecting whether data can be written to the physical block according to whether data has already been written for the physical block specified by the specifying means;
When there is a data write request, the erasure unit performs erasure, and when the detection unit determines that writing is possible, the data is written to the physical block designated by the designation unit, while it is determined that writing is impossible. In this case, the data stored in the physical block specified by the specifying unit is moved to another writable physical block generated by erasing by the erasing unit , and the data stored in the physical block specified by the specifying unit Write control means for writing data related to the data write request to the erased physical block after erasing by the erasing means,
A write control device for a semiconductor memory, comprising: address control means for associating addresses of logical blocks and physical blocks in accordance with a write operation by the write control means. Air block monitoring means for monitoring physical block air block,
2. The semiconductor memory write control device according to claim 1, further comprising: an operation control unit that controls an operation of the write control unit in accordance with a monitoring result of the air-blocking monitoring unit. Add attribute information for controlling the operation of the write control means to each physical block and each logical block,
The semiconductor memory write control device according to claim 1, further comprising: an operation control unit that controls an operation of the write control unit according to the attribute information. 2. The semiconductor memory write control device according to claim 1, further comprising: an operation control unit configured to control the operation of the write control unit based on whether or not the area is a predetermined region. 3. 2. The semiconductor memory write control device according to claim 1, further comprising: an operation control unit configured to control an operation of the write control unit based on an instruction from a host system. 3. 2. The semiconductor memory write control device according to claim 1, further comprising setting means for setting a physical block range designated by the designation means. In a writing control method in a semiconductor memory having a plurality of physical blocks for storing data and performing data writing in which a logical block is designated from a host system,
A first step of designating the plurality of physical blocks in a predetermined order so that the designation of physical blocks into which data is to be written is uniform;
A second step of detecting whether or not data can be written to the physical block according to whether or not data has already been written for the physical block designated in the first step;
A third step of erasing the data stored in the physical block so that new data can be written to the physical block when there is a data write request;
If it is determined in the second step that writing is impossible, the data stored in the physical block designated in the first step is moved to another writable physical block generated in the third step. And a fourth step of erasing data already written in the physical block designated in the first step so that data can be newly written ,
A fifth step of writing data relating to the data write request to the physical block designated in the first step;
A write control method for a semiconductor memory, comprising: a sixth step of associating a logical block and a physical block address in accordance with a write operation in the fifth step.

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