JP2002010107A - Noise reduction circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that a proper luminance signal constituent is also suppressed for providing an unnecessarily unclear image when a reception state and the S/N ratio of a luminance signal are excellent, and the amount of the suppression of noise is insufficient for providing the image where the noise is highlighted when the reception state and the S/N ratio of the luminance signal are poor, since a signal level that is generally extracted as noise is fixed in a noise reduction circuit for suppressing a noise constituent that is contained in the luminance signal of a television receiver. SOLUTION: By an RF-AGC signal S13 that controls a high-frequency amplifier for automatically controlling gain by the receiver, or an IF-AGC signal that controls an intermediate-wave signal amplifier, the signal level that is extracted as noise in the noise reduction circuit is varied, and the amount of suppression of noise is varied according to electric-field strength for continuously suppressing noise optimally.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a noise reduction circuit for a video signal in a video device such as a color television receiver, and more particularly to a noise reduction circuit for suppressing a noise component contained in a luminance signal.

[0002]

2. Description of the Related Art FIG. 10 shows a conventional noise reduction circuit 50 for suppressing a noise component contained in a luminance signal.
FIG. 2 is a circuit block diagram showing the configuration of FIG. In the figure, a signal input section 51 is connected to one input section of each of a first adder 54 and a second adder 52, and an output section of the adder 52 is connected to one horizontal period delay circuit (hereinafter 1HDL). ) 53 and a signal output unit 57.

The output of the 1HDL 53 is provided by a first adder 5
4, and the output of the adder 54 is connected to the input of a limiter circuit 55. The input of the coefficient unit 56 is connected to the output of the limiter circuit 55, and the output is connected to the other input of the second adder 52.

The noise reduction circuit 50 having the above configuration
, The luminance signal s51 input to the input unit 51 is an inverted signal of a signal delayed by one horizontal period of the output luminance signal s42 output from the signal output unit 57, as described later.
The first adder 54 adds the delayed luminance signal s43 delayed and inverted by the 1HDL 53 to the delayed luminance signal s43. Therefore, the output signal of the first adder 54 is a difference signal s44 indicating the difference between the luminance signal s41 and the delayed luminance signal s43.

[0005] The limiter circuit 55 receives the difference signal s44 and outputs a signal having a predetermined noise extraction level or less to a coefficient unit 56 as a noise signal s45. The coefficient unit 56 is
The noise signal s45 is multiplied by a predetermined coefficient value, and the inverted correction signal s46 is output to the second adder 52 and added to the luminance signal s41.

The output luminance signal s42 in which the noise component is suppressed by adding the correction signal s46 fed back as described above.
Is output from the output unit 57, enters the 1HDL 53, is delayed by one horizontal period, and the signal processing of returning to the newly input luminance signal s41 through the above processing is repeated.

[0007]

Originally, in the noise reduction circuit having the above-described configuration, for example, if the noise extraction level of the limiter circuit 55 is set high and the signal level to be extracted as noise is increased, the original luminance signal component Is also suppressed as noise.
Even when the newly input luminance signal is significantly different from the luminance signal one horizontal period earlier, a part of the luminance signal is suppressed as noise, and when these are viewed as a final image, they are unnecessarily blurred. Video.

Conversely, if the noise extraction level of the limiter circuit 55 is set low and the signal level extracted as noise is reduced, the noise is hardly suppressed for an image with a poor reception condition and a lot of noise, and the image noise is reduced. Is noticeable.

On the other hand, in the above-described conventional noise reduction circuit 50, since the noise extraction level of the noise limiter circuit 55 and the coefficient value of the coefficient unit 56 are constant, the noise reduction circuit 50 receives a signal like a television image signal received by a tuner. The signal level extracted as noise is constant with respect to the luminance signal s41 in which the noise level of the signal demodulated greatly changes depending on the state.

Therefore, the conventional noise reduction circuit 5
In the case of 0, an image luminance signal having a good reception state and a small amount of noise is suppressed more than necessary to degrade the image quality. Was insufficiently suppressed, resulting in an image with noticeable noise.

An object of the present invention is to provide an image luminance signal whose S / N ratio changes greatly depending on the state of the electric field strength and the like.
An object of the present invention is to provide a noise reduction circuit that suppresses noise so that the best image that can be always reproduced is obtained.

[0012]

An RF-AGC signal for controlling the gain of a high-frequency amplifier and an IF-AGC signal for controlling the gain of an intermediate-frequency amplifier are generated, and a video detection output level is obtained irrespective of the strength of a received radio wave. A noise reduction circuit that outputs an output luminance signal in which a noise component is suppressed from a luminance signal generated by a receiver having an auto gain control circuit that keeps the output luminance signal substantially constant, wherein the output luminance signal is delayed by one horizontal period. A delay circuit that outputs a delayed luminance signal, first addition / subtraction means that outputs a difference signal between the luminance signal and the delayed luminance signal, and a control signal that includes a noise component extracted from the difference signal and that is input to the control signal. Correction signal output means for outputting a correction signal having a variable level according to the output signal; and outputting the output luminance signal corresponding to a difference between the luminance signal and the correction signal. And second adder / subtractor means, said RF-A
A microprocessor having a built-in level conversion table having a predetermined change characteristic with respect to a detection level of the GC signal or the IF-AGC signal and reading out data corresponding to the detection level from the level conversion table; Control signal generating means for outputting the control signal at a corresponding level, wherein a correction amount of the luminance signal by the correction signal is changed according to the intensity of the received radio wave.

Further, another invention generates an RF-AGC signal for controlling the gain of a high-frequency amplifier and an IF-AGC signal for controlling the gain of an intermediate-frequency amplifier, and outputs an image detection output signal regardless of the strength of a received radio wave. A noise reduction circuit that outputs an output luminance signal in which a noise component is suppressed from a luminance signal generated by a receiver having an auto gain control circuit that keeps a level substantially constant, wherein the output luminance signal is delayed by one horizontal period. A delay circuit that outputs a delayed luminance signal, first addition / subtraction means that outputs a difference signal between the luminance signal and the delayed luminance signal, and a control signal that includes a noise component extracted from the difference signal, Correction signal output means for outputting a correction signal having a variable level according to the output signal; and outputting the output luminance signal corresponding to a difference between the luminance signal and the correction signal. And second adder / subtractor means, said RF-A
A microprocessor having a built-in level conversion table having a predetermined change characteristic with respect to a detection level obtained by adding the GC signal and the IF-AGC signal, and reading data corresponding to the detection level from the level conversion table; Control signal generating means for outputting the control signal at a level corresponding to the data, wherein a correction amount of the luminance signal by the correction signal is changed according to the intensity of the received radio wave.

The correction signal output means includes a limiter circuit for outputting a noise signal of a predetermined noise extraction level or less, and a coefficient unit for changing the level of the noise signal. You may comprise so that a level may be changed. Further, the correction signal output means includes a limiter circuit for outputting a noise signal of a predetermined noise extraction level or less and a coefficient unit for changing a level by multiplying the noise signal by a predetermined coefficient, and the limiter circuit is provided by the control signal. And the coefficient of the coefficient unit may be varied with predetermined characteristics. Further, the correction signal output means includes a limiter circuit for outputting a noise signal of a predetermined noise extraction level or less and a coefficient unit for changing the level of the noise signal. And an image contour emphasizing circuit capable of varying the degree of emphasis, wherein the control signal is used to vary the noise extraction level of the limiter circuit and the degree of emphasis of the image contour emphasizing circuit with predetermined characteristics. May be.

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a circuit block diagram illustrating a main configuration of a television signal receiving circuit including a noise reduction circuit according to Embodiment 1 of the present invention.

In FIG. 1, the output of the tuner 11 is connected to the input of a video intermediate frequency amplifier (hereinafter referred to as VIF) 12, and the output of the VIF 12 is connected to the input of a video detection circuit 13. . The output of the video detection circuit 13 is connected to the input of the signal processing circuit 14 and to the input of the AGC detection and amplification circuit 15. One output of the AGC detection and amplification circuit 15 is connected to the AGC signal input 12a of the VIF circuit, and the other output is connected to the input of the RF AGC circuit 16.

The output of the RFAGC circuit is connected to the AGC signal input 11a of the tuner 11 and the input of the A / D converter 10. The output of the A / D converter 10 is connected to the input 9a of the microprocessor 9, and the output 9b of the microprocessor 9 is connected via the first converter 8 to the control signal input 5a of the limiter circuit 5. It is connected to the.
The A / D converter 10, the microprocessor 9, and the first converter 8 constitute a control signal generation unit.

On the other hand, the output of the signal processing circuit 14 is connected to one input of each of the first adder 4 and the second adder 2 via the input 1 of the noise reduction circuit 17, The output section of the adder 2 is connected to the input section of the 1HDL 3 and the signal output section 7, respectively. 1HDL
The output of the adder 3 is connected to the other input of the first adder 4, and the output of the adder 4 is connected to the input of the limiter circuit 5. The input section of the coefficient unit 6 is connected to the output section of the limiter circuit 5, and the output section is connected to the other input section of the second adder 2.

In the above configuration, the operation of each circuit and the overall signal flow will be described. The VIF 12 receives the video intermediate frequency signal s1 obtained from the RF signal by the tuner 11, and outputs a video intermediate frequency signal s2 amplified to a predetermined level to the video detection circuit 13. Further, as described later, the gain of the built-in intermediate frequency amplifier is controlled based on the input IF-AGC signal s12.

The video detection circuit 13 converts the input video intermediate frequency signal s2 into a video composite signal s
Then, the signal processing circuit 14 inputs the video composite signal s3 and performs signal processing such as color / luminance signal separation.
The separated luminance signal s4 is output to the noise reduction circuit 17.

The AGC detection / amplification circuit 15 outputs an IF-AGC signal s12 for controlling the gain of the intermediate frequency of the VIF 12 from the video composite signal s3.
Outputs an RF-AGC signal s13 for controlling the gain of the high-frequency amplifier inside the tuner 11.

FIG. 2 shows the AGC detection and amplification circuit 15 and the RFA.
The IF-AGC signal s12 and the RF-AGC signal when the automatic gain control by the GC circuit 16 is operating.
FIG. 14 is a characteristic diagram illustrating a relationship between each voltage of a signal s13 and an electric field intensity FI. On the other hand, the gain of the intermediate frequency amplifier of the VIF 12 and the gain of the high frequency amplifier inside the tuner 11 are controlled by controlling the collector current of the transistor constituting each amplifier, and the forward AGC is used to reduce the gain by increasing the collector current. It is configured.

Therefore, as is apparent from the characteristic diagrams of FIGS. 2A and 2B, in the region where the electric field intensity is weak, the RF-A
The high frequency amplifier of the tuner 11 is operated at the maximum gain so that the voltage of the GC signal s13 is kept low and the S / N ratio does not decrease, so that the electric field strength is increased and the IF-AGC signal s1 is increased.
2, the gain of the intermediate frequency amplifier of the VIF 12 is reduced to keep the level of the luminance signal s4 constant.

When the electric field intensity becomes further intense and cannot be controlled only by the gain of the intermediate frequency amplifier of the VIF 12, the voltage of the IF-AGC signal s12 is maintained at a high level, the intermediate frequency amplifier is operated with a small gain, and the electric field intensity is reduced. At the same time, the voltage of the RF-AGC signal s13 is increased, and the gain of the high-frequency amplifier of the tuner 11 is reduced to reduce the luminance signal s13.
Keep level 4 constant.

On the other hand, the luminance signal s4 enters the signal input section 1 of the noise reduction circuit 17, and the output luminance signal s5 output from the signal output section 7 of the noise reduction circuit 17 is supplied to a predetermined luminance signal processing circuit (not shown). After the signal processing is performed, the image is formed by a picture tube (not shown).

In the noise reduction circuit 17, the luminance signal s4 is first supplied to the signal output section 7 as described later.
Is an inverted signal of the output luminance signal s5 delayed by one horizontal period of the output luminance signal s5, and is added by the first adder 4 to the delayed luminance signal s6 delayed and inverted by 1HDL3. Therefore, the output signal of the first adder 4 is
A difference signal s indicating a difference between the luminance signal s4 and the delayed luminance signal s6.
It becomes 7.

The limiter circuit 5 receives the difference signal s7 and converts a signal having a predetermined noise extraction level or less into a noise signal s7.
8 and output to the coefficient unit 6. This noise extraction level corresponds to a control signal s to be described later input to the control signal input unit 5a.
It is configured to be variable so that the level becomes approximately proportional to the fifteen levels. The coefficient unit 6 multiplies the noise signal s8 by a predetermined coefficient value and further converts the inverted correction signal s9 into a second signal.
And adds it to the luminance signal s4.

The output luminance signal s5, in which the noise component is suppressed by adding the correction signal s9 fed back as described above, is output from the output unit 7, enters the 1HDL3, is delayed by one frame horizontal period, and is processed as described above. The signal processing of returning to the newly input luminance signal s4 through the process is repeated.

On the other hand, the microprocessor 9 inputs the RF-AGC signal s13 digitized by the A / D converter 10, and responds to the level of the RF-AGC signal s13 according to a built-in predetermined level conversion table 9c. The control signal s14 for changing the level and determining the noise extraction level of the limiter circuit 5 is transmitted to the limiter circuit 5 via the first converter 8.
Output to The first converter 8 outputs the control signal s14
To an analog control signal s capable of controlling the limiter circuit 5
D / A conversion is performed.

FIG. 3 is a characteristic diagram showing conversion characteristics of the level conversion table 9c. As is clear from the figure, the control signal s15 whose level has been converted by the level conversion table 9c having this characteristic has a level substantially inversely proportional to the voltage level of the RF-AGC signal s13.

With the above-described configuration, when the electric field strength FI increases and the reception state improves, the luminance signal s
4 is reduced, the noise reduction circuit 17 determines at this time the RF level according to the electric field strength FI.
-Since the level of the AGC signal s13 increases, the level of the control signal s15 decreases to lower the noise extraction level of the limiter circuit 5, thereby preventing the normal luminance signal component from being suppressed as noise.

Conversely, when the electric field strength FI is weakened and the receiving state is deteriorated, the noise level included in the luminance signal s4 is increased. At this time, the noise reduction circuit 17 makes the RF-AGC signal s13 Is lowered, the level of the control signal s15 rises, and the noise extraction level of the limiter circuit 5 is raised, and the increased noise is sufficiently suppressed.

As described above, according to the noise reduction circuit of the first embodiment, the noise extraction level of the limiter circuit 5 is varied according to the strength of the electric field,
Further, since this variable control is performed using a microprocessor having a built-in level conversion table, the actual video can be verified and the conversion table can be set according to the effect, so that the optimum noise suppression amount is always obtained regardless of the reception state. Can be set.

Embodiment 2 FIG. 4 is a circuit block diagram illustrating a main configuration of a television signal receiving circuit including a noise reduction circuit according to Embodiment 2 of the present invention. In the circuit blocks of FIG. 7, the same components as those of the circuit block of the first embodiment shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The noise reduction circuit 2 of the second embodiment
The main difference between the noise reduction circuit 17 and the noise reduction circuit 17 of the first embodiment is that the microprocessor 9 further includes a conversion table 9d and the coefficient unit 21 can change the coefficient.

The microprocessor 9 has a conversion table 9
The control signal s20 that changes in accordance with the level of the RF-AGC signal s13 in accordance with the level of the RF-AGC signal s13 and determines the coefficient value to be multiplied by the coefficient unit 21 is output from the output unit 9e via the second converter 22 to the coefficient unit 21. To the control signal input unit 21a.
The second converter 22 performs D / A conversion of the control signal s20 into an analog control signal s21 capable of controlling the coefficient unit. The coefficient unit 21 is configured to multiply the noise signal s8 by a coefficient value substantially proportional to the level of the control signal s21. Note that the A / D converter 10, the microprocessor 9, the first converter 8, and the second converter 22 constitute a control signal generation unit.

When the level of the control signal s21 converted by the conversion table 9d is configured to be inversely proportional to the voltage level of the RF-AGC signal s13, for example, as in the case of the control signal s15, depending on the state of the electric field strength The noise extraction level of the limiter circuit 5 can be changed, and the coefficient value of the coefficient unit 21 can be changed at the same time.

As described above, according to the noise reduction circuit of the second embodiment, as compared with the noise reduction circuit of the first embodiment, the level of the correction signal s9 can be varied by combining the noise extraction level and the coefficient value. The noise removal control range can be expanded.

Embodiment 3 FIG. 5 is a circuit block diagram illustrating a main configuration of a television signal receiving circuit including a noise reduction circuit according to Embodiment 3 of the present invention. In the circuit blocks shown in FIG. 7, the same components as those in the circuit block of the first embodiment shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The noise reduction circuit 2 of the third embodiment
The main difference between the noise reduction circuit 17 and the noise reduction circuit 17 of the first embodiment is that the microprocessor 9 further incorporates a conversion table 9f and has a variable enhancement ratio.
5 is provided on the output path of the output luminance signal s5.

The microprocessor 9 has a conversion table 9
f, the level changes in accordance with the level of the RF-AGC signal s13, and the control signal s25 for determining the degree of edge enhancement of the image edge enhancement circuit 25 is transmitted from the output unit 9e via the second converter 22 to the image edge. Control signal input unit 2 of emphasis circuit 25
Output to 5a. The second converter 22 outputs the control signal s
25 is D / A-converted into an analog control signal s26 capable of controlling the video edge enhancement circuit 25.

The video edge enhancement circuit 25 outputs the output luminance signal s
5 is a circuit for extracting a contour signal from the picture signal 5 and adding the contour signal to the original signal, thereby enhancing the contour of the final image output from the picture tube (not shown).
It is configured to change substantially in proportion to the sixth level.

FIG. 6 is a characteristic diagram showing conversion characteristics between the level conversion table 9c and the level conversion table 9f. As is clear from the figure, the control signals s15 and s26 whose levels have been converted by the conversion tables 9c and 9f are RF signals, respectively.
-Has a level substantially inversely proportional to the voltage level of the AGC signal s13.

With the above configuration, when the electric field intensity FI increases and the receiving state improves, the luminance signal s
4, the noise reduction circuit 26 reduces the noise extraction level of the limiter circuit 5 by lowering the level of the control signal s15 because the level of the RF-AGC signal s13 increases. The noise reduction effect is suppressed, and the edge enhancement is also suppressed to prevent the image from deteriorating.

Conversely, when the electric field intensity FI becomes weak and the receiving state deteriorates, the noise level included in the luminance signal s4 becomes high. At this time, the noise reduction circuit 26
Since the level of the F-AGC signal s13 decreases, the level of the control signal s15 increases to increase the noise extraction level of the limiter circuit 5, thereby increasing the noise reduction effect and increasing the contour enhancement by the contour enhancement circuit.

Therefore, according to the noise reduction circuit of the third embodiment, the amount of noise suppression is increased for a luminance signal having a poor reception state and a lot of noise, and the final image is slightly blurred but less grainy. Becomes a video,
By emphasizing the outline of the image by the outline emphasis circuit, blurring of the image can be improved. In addition, since these controls are performed using a microprocessor with a built-in level conversion table, the actual video can be verified and the conversion table can be set according to the effect. Edge emphasis can be set.

Embodiment 4 FIG. 7 is a circuit block diagram illustrating a main configuration of a television signal receiving circuit including a noise reduction circuit according to Embodiment 4 of the present invention. In the circuit blocks of FIG. 7, the same components as those of the circuit block of the first embodiment shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The circuit configuration of the fourth embodiment is different from that of the first embodiment in that the microprocessor 9 of the noise reduction circuit 17 is connected to the I / O converter 10 via the A / D converter 10.
This is a point connected so as to input the F-AGC signal s12.

Therefore, according to the noise reduction circuit of the fourth embodiment, the same effect as that of the first embodiment can be obtained, but here, as shown in FIG.
Since the signal s12 is effective in a region where the electric field strength is weak, a noise reduction circuit particularly suitable for use in a weak electric field can be provided.

Embodiment 5 FIG. 8 is a circuit block diagram showing a main configuration of a television signal receiving circuit including a noise reduction circuit according to the fifth embodiment of the present invention. In the circuit blocks of FIG. 7, the same components as those of the circuit block of the first embodiment shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted.

The difference between the circuit configuration of the fifth embodiment and the circuit configuration of the first embodiment is that the microprocessor 9 of the noise reduction circuit 28 uses the A / D converter 10 to
While inputting the F-AGC signal s13 to the input unit 9a,
The difference is that the IF-AGC signal s12 is input to the input unit 9g via the A / D converter 27. A /
D converters 10, 27, microprocessor 9, and first
Constitutes a control signal generating means.

In the above-described configuration, the microprocessor 9 includes the digitized RF-AGC signal s13 and the I-AGC signal s13.
The F-AGC signal s12 is added. Then, according to the built-in level conversion table 9c, the level changes according to the added level SUM, and the control signal s27 for determining the noise extraction level of the limiter circuit 5 is sent to the limiter circuit 5 via the first converter 8. Output. First converter 8
Converts the control signal s27 into an analog control signal s28 capable of controlling the limiter circuit 5 by D / A conversion. Other configurations and operations are the same as those of the circuit block of FIG. 1 including the noise reduction circuit of the first embodiment.

Therefore, according to the noise reduction circuit 28 of the fifth embodiment, the same effect as that of the first embodiment can be obtained, but here, as shown in FIG.
In both the region where the electric field intensity FI is weak and the region where the electric field intensity FI is strong, the electric field intensity changes almost in proportion to the electric field intensity FI. it can.

Although the characteristics of the level conversion table in the above-described embodiment are characteristics in accordance with the inversely proportional function, the characteristics are not limited to this. To set the conversion table.

In the above-described embodiment, the first and second adders are used. However, a subtractor may be used. However, in this case, the polarity of the delayed luminance signal s6 and the correction signal s9 is not inverted. To be configured.

In the fourth and fifth embodiments, only the limiter circuit is controlled. However, the present invention is not limited to this. As in the second or third embodiment, a coefficient unit or an image edge enhancement is used. You may comprise so that a circuit may be controlled simultaneously. Further, in the above-described embodiment, the noise reduction circuit is configured by an analog cyclic noise reduction circuit. However, the present invention is not limited to this, and may take various forms such as a digital circuit. .

[0057]

According to the noise reduction circuit of the first or third aspect of the present invention, since the level of the correction signal to be extracted as noise is varied in accordance with the strength of the electric field, the reception state is reduced. Regardless of the above, it is possible to always provide the final image set to the optimum noise suppression amount. In addition, since this variable control is performed using a microprocessor having a built-in level conversion table, an actual video can be verified and a conversion table can be set according to the effect, thereby providing the best possible noise suppression characteristics in the possible range. be able to.

According to the noise reduction circuit according to the second or third aspect of the present invention, in addition to the effect of the noise reduction circuit according to the first aspect, the noise reduction circuit can be used in a wider range of electric field strength. The amount of noise suppression can be made variable.

According to the noise reduction circuit of the fourth aspect of the present invention, the level of the correction signal extracted as noise by combining the noise extraction level and the coefficient value is variable as compared with the noise reduction circuit of the third aspect. Therefore, the noise removal control range can be expanded.

According to the noise reduction circuit of the fifth aspect of the present invention, the amount of noise suppression is increased for a luminance signal having a poor reception state and a lot of noise, and the final image is slightly blurred but has a rough image. The image becomes less blurred, and the outline of the image is emphasized by the outline emphasis circuit, thereby making it possible to improve the blur of the image. In addition, since these controls are performed using a microprocessor having a built-in level conversion table, an actual image can be verified and a conversion table can be set according to the effect, so that the best possible noise suppression and contour enhancement can be achieved. Can be set.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram illustrating a main configuration of a television signal receiving circuit including a noise reduction circuit according to a first embodiment of the present invention.

FIG. 2 shows an AGC detection amplification circuit 15 and an RFAGC circuit 1
6 when the automatic gain control by the IF-AGC 6 is operating, the IF-AGC signal s12 and the RF-AGC signal s1.
3 is a characteristic diagram showing a relationship between each voltage and electric field strength FI.

FIG. 3 is a characteristic diagram showing conversion characteristics of a level conversion table 9c.

FIG. 4 is a circuit block diagram illustrating a main configuration of a television signal receiving circuit including a noise reduction circuit according to a second embodiment of the present invention.

FIG. 5 is a circuit block diagram illustrating a main configuration of a television signal receiving circuit including a noise reduction circuit according to a third embodiment of the present invention.

FIG. 6 is a characteristic diagram showing conversion characteristics between a level conversion table 9c and a level conversion table 9f.

FIG. 7 is a circuit block diagram illustrating a main configuration of a television signal receiving circuit including a noise reduction circuit according to a fourth embodiment of the present invention.

FIG. 8 is a circuit block diagram illustrating a main configuration of a television signal receiving circuit including a noise reduction circuit according to a fifth embodiment of the present invention.

FIG. 9 is a characteristic diagram of a signal level SUM obtained by adding an IF-AGC signal s12 and an RF-AGC signal s13.

FIG. 10 is a circuit block diagram showing a configuration of a conventional noise reduction circuit 50.

[Explanation of symbols]

1 signal input section, 2 second adder, 3 1HD
L, 4 first adder, 5 limiter circuit, 6
Coefficient unit, 7 signal output unit, 8 first converter, 9
Microprocessor, 9c, 9d level conversion table, 10, 27 A / D converter, 11 tuner, 12 video intermediate frequency amplifier, 13 video detection circuit, 14 signal processing circuit, 15 AGC detection amplification circuit, 16 RFAGC circuit, 17, 23 , 26,28
Noise reduction circuit, 21 coefficient unit, 22 second converter, 25 image edge enhancement circuit.

Claims (5)

[Claims] An RF amplifier for controlling a gain of a high-frequency amplifier.
IF- for controlling the AGC signal and the gain of the intermediate frequency amplifier
Generates an AGC signal and outputs an output luminance signal with noise components suppressed from a luminance signal generated by a receiver having an auto gain control circuit that keeps the video detection output level substantially constant regardless of the strength of the received radio wave. A delay circuit that outputs a delayed luminance signal obtained by delaying the output luminance signal by one horizontal period, and a first addition / subtraction unit that outputs a difference signal between the luminance signal and the delayed luminance signal. A correction signal output unit that outputs a correction signal that includes a noise component extracted from the difference signal and has a level that varies according to an input control signal; and the output corresponding to a difference between the luminance signal and the correction signal. Second adding / subtracting means for outputting a luminance signal; and a level having a predetermined change characteristic with respect to a detection level of the RF-AGC signal or the IF-AGC signal. A control signal generating means for incorporating a conversion table, reading data corresponding to the detection level from the level conversion table, and outputting the control signal at a level corresponding to the data; A noise reduction circuit that changes the correction amount of the luminance signal by the correction signal according to the strength of the noise reduction signal. 2. An RF amplifier for controlling a gain of a high-frequency amplifier.
IF- for controlling the AGC signal and the gain of the intermediate frequency amplifier
Generates an AGC signal and outputs an output luminance signal with noise components suppressed from a luminance signal generated by a receiver having an auto gain control circuit that keeps the video detection output level substantially constant regardless of the strength of the received radio wave. A delay circuit that outputs a delayed luminance signal obtained by delaying the output luminance signal by one horizontal period, and a first addition / subtraction unit that outputs a difference signal between the luminance signal and the delayed luminance signal. A correction signal output unit that outputs a correction signal that includes a noise component extracted from the difference signal and has a level that varies according to an input control signal; and the output corresponding to a difference between the luminance signal and the correction signal. A second addition / subtraction means for outputting a luminance signal; and a predetermined change characteristic with respect to a detection level obtained by adding the RF-AGC signal and the IF-AGC signal. Control signal generating means for incorporating a level conversion table for reading the data corresponding to the detection level from the level conversion table, and outputting the control signal at a level corresponding to the data; A noise reduction circuit comprising: control signal generation means for outputting the control signal having a level corresponding to a characteristic; and changing a correction amount of the luminance signal by the correction signal according to the intensity of a received radio wave. 3. The noise reduction circuit according to claim 1, wherein said correction signal output means includes a limiter circuit for outputting a noise signal having a predetermined noise extraction level or less and a coefficient unit for changing the level of said noise signal. 2. The apparatus according to claim 1, wherein the level is variable.
Or a noise reduction circuit according to claim 2. 4. The correction signal output means comprises a limiter circuit for outputting a noise signal of a predetermined noise extraction level or less and a coefficient unit for changing a level by multiplying the noise signal by a predetermined coefficient. 3. The noise reduction circuit according to claim 1, wherein the noise extraction level of the limiter circuit and the coefficient of the coefficient unit are configured to be variable with predetermined characteristics. 5. The correction signal output means comprises: a limiter circuit for outputting a noise signal of a predetermined noise extraction level or less, and a coefficient unit for changing the level of the noise signal. An image outline emphasis circuit that emphasizes the outline of the image and that can change the degree of emphasis is provided,
3. The noise according to claim 1, wherein a noise extraction level of the limiter circuit and a degree of enhancement of the video edge enhancement circuit are varied with predetermined characteristics according to the control signal. Reduction circuit.