JP2002009300A - Transistor model for circuit simulator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To accurately simulate a voltage and frequency dependences of a gate insulation film capacitance which appear in a long-channel transistor and simultaneously to obtain a correct simulation result in a transient analysis, in the transistor model for the circuit simulator. SOLUTION: When a model which represents one transistor as a single transistor is defined as a mono-transistor mode, and a model which represents one transistor as a structure that multiple sub transistors are connected in series and the gate insulation film capacitor is connected to each sub transistor is defined as a multi-transistor mode, the mono-transistor model or the multi- transistor model is chosen to simulate each transistor. In the mono-transistor model, the gate insulation film capacitor is connected between a gate electrode and a source electrode. The mono-transistor model is used for a short-channel transistor in which the kink effect exists, and the multi-transistor model is used for a long-channel transistor in which the kink effect does not exist.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a transistor model for a circuit simulator, and more particularly to a practical and accurate transistor model for a circuit simulator used in a thin film transistor circuit simulator.

[0002]

2. Description of the Related Art A circuit simulator is an important tool in research and development of transistor processes, devices and circuits. Its purpose is to improve development efficiency, achieve optimal design,
Presentation of research guidelines. A transistor circuit simulator requires a practical and accurate transistor model.

[0003] On the other hand, thin film transistors, which are one type of transistors, are widely and widely used in display devices, sensors, and the like, and their use is expected to expand in the future. In particular, according to the polycrystalline silicon thin film transistor, not only a pixel but also a driving circuit can be configured. The above-described circuit simulator is indispensable for the design of the drive circuit.

[0004] As a transistor model for a circuit simulator for a thin film transistor, a model which is considered to be currently the most excellent is a model using both a multi-transistor model and an effective conductance model (multi-transistor effective conductance model). For multi-transistor models, see MJ Quinn, IDRC '94, 402 (1
994), MJ Quinn, AMLCD '94, 160 (1994), MJ Qu
See inn, EuroDisplay '96 WORKSHOP, 49 (1996). The characteristics of the thin film transistor are a relatively high channel resistance even in the ON state and a large gate insulating film capacitance due to a long channel length. For this reason, the transistor must be treated as a transmission line. In a circuit simulator, the effect of the transmission line is modeled as a multi-transistor model. FIG. 1 shows a multi-transistor model. In the multi-transistor model, one transistor is connected to a plurality of sub-transistors 18 in series,
This is represented by a structure in which a gate insulating film capacitor 19 is connected to each sub-transistor 18. Here, the number of the sub-transistors 18 is set to five, but the following discussion does not change even if the number is two or more. With the multi-transistor model, the voltage dependency and the frequency dependency of the gate insulating film capacitance of the thin film transistor can be accurately reproduced. In particular, a long-channel thin-film transistor has a relatively high channel resistance and a relatively large gate insulating film capacity.
Voltage dependency and frequency dependency increase, and the use of a multi-transistor model is significant.

[0005] For the effective conductance model, see M.
J. Izzard, Jpn. J. Appl. Phys. 30, L170 (1991), M.
J. Quinn, IDRC '94, 402 (1994), MJ Quinn, AMLC
D '94, 160 (1994), MJ Quinn, EuroDisplay '96 WO
RKSHOP, 49 (1996), M. Kimura, AMLCD 98, 181-184 (1
998). There are a wide variety of device structures and manufacturing processes for thin film transistors, and the characteristics greatly differ depending on each device structure and manufacturing process. Further, there are many unknown points about carrier conduction in amorphous silicon / polycrystalline silicon used for thin film transistors. For this reason, at present, there is no unified basic equation or physical equation representing characteristics. Therefore, one of the practical models is the effective conductance model. Since the effective conductance model uses actual transistor characteristics as they are, any characteristics can be correctly expressed. It can be said that it is a practical model.

FIG. 2 shows the operation of a multi-transistor effective conductance model for a long channel transistor. The graph corresponds to each Vgs, the horizontal axis is Vds, and the vertical axis is
Represents Ids. First, transistor characteristics are prepared. In the sub-transistor, the channel width (W) is the same as that of the original transistor, but the channel length (L) is 1/5 that of the original transistor. Therefore, the characteristics of the sub-transistor shown in this graph are five times those of the original transistor. The characteristic of the k-th sub-transistor is a function represented by the following equation. Ik = Ids (Vgs, Vk) -Ids (Vgs, Vk-1) where Vgs is the gate-source voltage of the original transistor, Vk is the potential of the k-th internal node, and V0 is the potential of the original transistor. Equal to the source potential and V5 equal to the drain potential of the original transistor. This will be described below with reference to FIG. First, Ids-Vds corresponding to Vgs
Pick out a graph. Then, a current value Ids (Vgs, Vk) corresponding to the internal node voltage Vk and a current value Ids (Vgs, Vk-1) corresponding to the internal node voltage Vk-1 are read. These differences, Ik
It becomes. In the steady state, I1 = I2 = I3 = I4 = I5.
V1, V2, V3, V4, V5 giving this condition are internal node potentials in a steady state.

FIG. 3 shows an internal node potential for a long channel transistor. FIG. 2 and FIG. 3 are in a mirror relationship. The distribution of the internal node potential is very similar to the channel potential obtained by device simulation (eg, Silvaco International's Atlas) and analytical considerations (eg, submicron device 2, Shoji Tanaka, Maruzen Co., Ltd.).

FIG. 4 shows the voltage dependence of the gate insulating film capacitance according to the multi-transistor effective conductance model.
An example of frequency dependence is shown. In FIG. 4, Vds = 10V
Where Cox is the gate insulating film capacitance calculated geometrically.
This result agrees well with the actually measured value.

[0009]

The multi-transistor model does not operate properly for short channel transistors. Here, a short-channel transistor refers to a transistor having a kink effect. In addition, the kink effect refers to a phenomenon in which Ids does not saturate even in the original saturation region, and Ids increases rapidly as Vds increases. FIG. 5 shows the operation of the multi-transistor effective conductance model for a short-channel transistor.
FIG. 6 shows the internal node potential for the short channel transistor. The distribution of the internal node potential is obtained by the same consideration as the case where the internal node potential for the normal transistor is obtained. According to the above-described device simulation and analytical considerations, the channel potential should have a distribution similar to that of the long-channel transistor even for the short-channel transistor. The internal node potential of the short channel transistor based on the multi-transistor effective conductance model is completely different from the channel potential based on device simulation or analytical consideration and is incorrect.

As described above, the incorrect distribution of the internal node potential makes it impossible to correctly simulate the charge / discharge charge to the gate electrode required for operating the transistor. Therefore, the evaluation results in the transient analysis (such as the ring oscillator oscillation frequency and the shift register maximum operating frequency) become incorrect. In particular, the short-channel thin-film transistor has a relatively large kink effect, so that the validity of the multi-transistor model is easily lost.

FIG. 7 shows a comparison between a simulation result of the oscillation frequency of the ring oscillator using a multi-transistor effective conductance model and an actually measured value. In the multi-transistor model, the oscillation frequency of the ring oscillator is higher than the actually measured value because the charge / discharge charge cannot be simulated correctly.

Accordingly, an object of the present invention is to accurately reproduce the voltage dependence and frequency dependence of the gate insulating film capacitance which appear in a long channel transistor in a transistor model for a circuit simulator, and at the same time, appear in a short channel transistor. It is an object of the present invention to correctly simulate the distribution of the internal node potential to obtain a correct simulation result even in a transient analysis.

[0013]

According to the first aspect of the present invention, a model in which one transistor is directly represented by one transistor is defined as a monotransistor model, and one transistor is formed by connecting a plurality of sub-transistors in series. When a model represented by a structure in which the gate insulating film capacitance is connected to each sub-transistor is defined as a multi-transistor model, a mono-transistor model and a multi-transistor model are selected for each transistor. This is a transistor model for a circuit simulator, characterized in that the transistor model is used.

According to this configuration, a mono-transistor model is used for a transistor that can be correctly simulated by a mono-transistor model, and a multi-transistor model is used for a transistor that can be correctly simulated by a multi-transistor model. It is possible to correctly simulate the transistor.

According to a second aspect of the present invention, in the transistor model for a circuit simulator according to the first aspect, in the monotransistor model, the gate insulating film capacitance is connected between the gate electrode and the source electrode. This is a transistor model for a circuit simulator.

According to this configuration, in the mono-transistor model, the capacity of the gate insulating film is not underestimated, and the design is safe.

According to a third aspect of the present invention, in the transistor model for a circuit simulator according to the first aspect, a monotransistor model is used for a transistor having a kink effect, and a transistor having no kink effect is used for a transistor having a kink effect. Is a transistor model for a circuit simulator characterized by using a multi-transistor model.

According to this configuration, a mono-transistor model is used for a transistor having a kink effect which can be correctly simulated by a mono-transistor model, and a transistor having no kink effect which can be correctly simulated by a multi-transistor model. By using a multi-transistor model, it is possible to correctly simulate all transistors.

According to a fourth aspect of the present invention, in the transistor model for a circuit simulator according to the first aspect, a mono-transistor model is used for a short-channel transistor, and a multi-transistor model is used for a long-channel transistor. It is a transistor model for a circuit simulator characterized by using.

Here, a short-channel transistor has a high electric field at the drain end under the operating conditions used,
The transistor is defined as a transistor in which impact ionization occurs, and a kink effect easily occurs. On the other hand, a long-channel transistor is defined as a transistor in which the electric field at the drain end is low and collision ionization does not occur under the operating conditions used, and the kink effect is less likely to occur.

According to this configuration, a mono-transistor model is used for a short-channel transistor that can be correctly simulated by a mono-transistor model, and a multi-transistor model is used for a long-channel transistor that can be correctly simulated by a multi-transistor model. This makes it possible to correctly simulate all the transistors.

According to a fifth aspect of the present invention, there is provided a transistor model for a circuit simulator according to the first aspect, wherein the transistor model is applied to a thin film transistor.

According to this configuration, all the transistors can be correctly simulated for a thin film transistor in which a transistor that can be correctly simulated by the monotransistor model and a transistor that can be correctly simulated by the multi-transistor model are often mixed. Becomes possible.

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below. In this embodiment, the technology described in claim 1, claim 2, claim 3, claim 4, or claim 5 is used. Although the present embodiment assumes a thin film transistor, the idea of the present invention is also effective for a bulk transistor, an SOI (Silicon On Insulator) transistor, and the like.

FIG. 8 shows a circuit for performing a circuit simulation in this embodiment. This circuit relates to a display with a built-in driver, and assumes that a circuit simulation of a driver portion and a pixel portion are performed simultaneously. The shift register 21, the buffer 22, and the analog switch 23 are built-in drivers arranged around a display portion. The pixel transistor 24 is arranged in each pixel inside the display portion.

With respect to the thin film transistors existing in the built-in drivers such as the shift register 21, the buffer 22, the analog switch 23, etc., it is important to have a large on-current. Therefore, a thin film transistor having a relatively short channel (about 4 microns or less) is used. Often. In this case, since a kink effect exists, it is necessary to use a monotransistor model. Since the voltage dependency and the frequency dependency of the gate insulating film capacitance are not large, it is not necessary to use a multi-transistor model. Therefore, a monotransistor model is used. FIG. 9 shows a monotransistor model. The gate insulating film capacitance is connected between the gate electrode and the source electrode. In these circuits, the potential of the source electrode is fixed or the amount of change is small, while the potential of the drain electrode fluctuates following the potential of the gate electrode. Therefore, when the same gate insulating film capacitance is connected, the charge and discharge charge to the gate electrode and the source electrode is larger than the charge and discharge charge between the gate electrode and the drain electrode. Therefore, since the gate insulating film capacitance is connected between the gate electrode and the source electrode as in the present embodiment, the charge / discharge current is not underestimated, and the design is safe. Note that the gate insulating film capacitor is not connected between the gate electrode and the source electrode but is connected between the gate electrode and the drain electrode, or between the gate electrode and the source electrode and between the gate electrode and the drain electrode. Part of the idea of the present invention is also effective when the electrodes are connected to each other by half.

Regarding the pixel transistor 24, since it is important that the off-state current is small, a relatively long channel (4
In many cases, a thin film transistor having a thickness of about a micron or more is used. In this case, the voltage dependence of the gate insulating film capacitance
Since the frequency dependency increases, it is necessary to use a multi-transistor model. Since there is no kink effect, there is no need to use a monotransistor model. Therefore, a multi-transistor model is used. The multi-transistor model is as described above (FIG. 1).

FIG. 10 shows a comparison between a simulation result of the oscillation frequency of the ring oscillator using a monotransistor effective conductance model and an actually measured value. Although this circuit is different from the circuit shown in FIG. 8, it is enough to explain the effect of using the monotransistor model. In the monotransistor model, the oscillation frequency of the ring oscillator and the operation limit frequency of the shift register are lower than the actually measured values. Although it cannot be said that the simulation is completely correct, it is possible to design on the safe side by designing using a monotransistor model.

[Brief description of the drawings]

FIG. 1 is a diagram showing a multi-transistor model.

FIG. 2 is a diagram showing an operation of a multi-transistor effective conductance model for a long-channel transistor.

FIG. 3 is a diagram showing an internal node potential for a long channel transistor.

FIG. 4 is a diagram showing an example of voltage dependence and frequency dependence of gate insulating film capacitance based on a multi-transistor effective conductance model.

FIG. 5 is a diagram showing an operation of a multi-transistor effective conductance model for a short-channel transistor.

FIG. 6 is a diagram showing an internal node potential for a short-channel transistor.

FIG. 7 is a comparison between a simulation result of a ring transistor oscillation frequency by a multi-transistor effective conductance model and an actually measured value.

FIG. 8 is a diagram showing a circuit for performing a circuit simulation.

FIG. 9 illustrates a monotransistor model.

FIG. 10 shows a comparison between a simulation result of an oscillation frequency of a ring oscillator using a monotransistor effective conductance model and an actually measured value.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 11 Gate electrode 12 Gate insulating film 13 Source electrode 14 Source region 15 Drain electrode 16 Drain region 17 Channel region 18 Subtransistor 19 Gate insulating film capacitance T1 First subtransistor T2 Second subtransistor T3 Third subtransistor T4 Fourth subtransistor T5 5th subtransistor V0 0th internal node potential V1 1st internal node potential V2 2nd internal node potential V3 3rd internal node potential V4 4th internal node potential V5 5th internal node potential I1 1st subtransistor current I2 2nd Subtransistor current I3 Third subtransistor current I4 Fourth subtransistor current I5 Fifth subtransistor current 21 Shift register 22 Buffer 23 Analog switch 24 Pixel transistor

Continued on the front page F term (reference) 5F003 AP00 AZ03 5F064 BB31 CC09 CC23 CC30 DD39 HH09 5F110 AA25 BB02 CC02 GG02 GG13

Claims (5)

[Claims] 1. A model in which one transistor is directly represented by one transistor is defined as a monotransistor model. One transistor is formed by connecting a plurality of sub-transistors in series, and each of the sub-transistors has a gate insulating film. When a model represented by a structure in which capacitors are connected is defined as a multi-transistor model, the mono-transistor model and the multi-transistor model are selectively used for each transistor. Transistor model for simulator. 2. The transistor model for a circuit simulator according to claim 1, wherein in the mono-transistor model, a gate insulating film capacitance is connected between a gate electrode and a source electrode. Transistor model. 3. The transistor model for a circuit simulator according to claim 1, wherein the mono-transistor model is used for a transistor having a kink effect, and the multi-transistor model is used for a transistor having no kink effect. A transistor model for a circuit simulator, comprising: 4. The transistor model for a circuit simulator according to claim 1, wherein said mono-transistor model is used for a short channel transistor, and said multi-transistor model is used for a long channel transistor. A transistor model for a circuit simulator. 5. The transistor model for a circuit simulator according to claim 1, wherein the transistor model is applied to a thin film transistor.