JP2002003295A - Substrate for semi-conductor device and method of production of the substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a substrate for a semiconductor device in which the COP on the surface is removed by heat treatment and haze does not exist on the surface or even when it does, it is uniform and a production method thereof. SOLUTION: The substrate for a semiconductor device is a silicon single crystal substrate having its main surface close to the (001) plane. The main surface of the substrate is inclined at an angle in the range of (0.04 deg.)2<=X2+Y2<=(0.03 deg.)2, whereas the main surface angle to the direction to the [110] plane is X and to the [1-10] plane is Y. The oxygen concentration at the depth of 1 μm from the surface of the substrate is less than 10% of oxygen concentration in the central part of the substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the improvement of the quality of a substrate for a semiconductor device, and more particularly to the improvement of the appearance defect rate by reducing the average haze value of the surface of a heat-treated substrate and improving the unevenness of the haze in the substrate surface. The present invention relates to a substrate for a semiconductor device and a method for manufacturing the same, which reduces the yield and improves the production yield for each heat treatment batch. Furthermore, the present invention relates to a semiconductor device substrate and a method of manufacturing the same, which improve the yield of devices manufactured on the substrate by removing defects on the substrate surface.

[0002]

2. Description of the Related Art When fabricating a semiconductor device using a silicon single crystal substrate, it is known that crystal defects in the substrate cause device malfunction, and that the manufacturing yield of the device changes depending on the crystal defect density in the substrate. Have been. In recent years, COP (Crystal Originated) has been used as a crystal defect causing this device operation failure.
A defect called “Particle” has attracted attention.
This is because when a silicon single crystal substrate is etched with a mixed solution of ammonia and hydrogen peroxide, pits are generated on the substrate surface due to lattice defects in the crystal, and the pits are formed by an inspection device that counts particles on the substrate surface. It is so called because it is measured. The COP is a name indicating all the defects detected by such a measurement method. However, in a silicon single crystal grown by a normal Czochralski (CZ) method or a magnetic field application CZ method, the substance of the defect is referred to as “COP”. They are thought to be octahedral-like voids in the crystal, which are presumed to cause structural destruction of the device.

As a technique for reducing the COP, a technique of eliminating a COP on a substrate surface by subjecting a silicon single crystal to a substrate and then performing a heat treatment has attracted attention. In particular, those performed in a hydrogen atmosphere have been attracting attention, and recently, a crystal to which nitrogen has been added is subjected to a heat treatment in an argon (Ar) atmosphere to greatly reduce defects at and near the surface. (Japanese Patent Application Laid-Open No. 2000-26196).

A characteristic of the heat treatment for reducing these surface defects is that the temperature is relatively high (about 1100 to 1200).
° C), and the atmosphere is a non-oxidizing atmosphere such as hydrogen or Ar. The surface of the substrate during the heat treatment is not protected by the oxide film, and the silicon atoms of the substrate are directly exposed to the atmosphere. Yes, these are indispensable technical elements for significant defect reduction. However, since the silicon atoms on the surface are directly exposed to the atmosphere, sublimation or dissolution of the silicon atoms occurs, which causes a change in the surface shape at the atomic level and changes the manner of light reflection on the substrate surface. . Therefore, when the substrate after such heat treatment is visually observed, the surface has a cloudy cloudy surface, and this cloudy cloudy cloud is called haze. When haze occurs, for example, a problem occurs in that a high-sensitivity measurement of a particle counter that measures particles attached to the surface cannot be performed. Therefore, techniques for reducing the haze have been studied.

The cause of the haze is considered to be impurities in the atmosphere. As a technique for reducing this impurity, Japanese Patent Application Laid-Open No. Hei 6-20896 discloses a technique of reducing the amount of water to 5%.
A heat treatment method characterized by using a hydrogen gas having a volume of not more than ppm is disclosed. Further, Japanese Patent Laid-Open No. 5-12
No. 1387 discloses a method of performing heat treatment in a gas atmosphere having a water content of 50 vol. Ppb or less and 900 ° C. or more.

The above-mentioned method is a technique for removing the cause of the haze itself, but it may be difficult to satisfy all the stages of the heat treatment process and all the substrates of the same heat treatment batch. In some cases, the degree of haze varies depending on the position in the furnace, or uneven haze may be observed in the plane of the substrate. For this reason, there is a demand for a substrate that is less likely to exhibit haze even under the same haze condition. Such a technique is disclosed in Japanese Patent Application Laid-Open No.
On the substrate of the 0) plane, 0.05 to
0.08 °, 0.02-0.06 in [0-1-1] direction
Disclosed is a method of reducing color haze and ordinary haze, which is recognized as color haze by inclining. Here, the color haze refers to a rainbow-colored portion whose wavelength is in the visible region. However, it is difficult to cut out a substrate in this range with a high yield with normal processing accuracy, and there is an industrial problem. Further, in the range of the inclination, when the cause of the haze described above is not sufficiently removed, there are a place where haze does not appear due to the effect of the inclination and a place where haze appears despite the effect of the inclination. There was a problem that the difference in haze was so large that the haze became uneven in the plane and the appearance was rejected.

[0007]

SUMMARY OF THE INVENTION In view of the above problems, the present invention is directed to a semiconductor device substrate in which COP on the substrate surface has been removed by heat treatment, and wherein no haze has occurred or haze has occurred. It is an object of the present invention to provide a semiconductor device substrate free from haze unevenness and a method for manufacturing the same.

[0008]

Means for Solving the Problems The present invention provides: (1) a silicon single crystal substrate having a main surface close to the (001) plane, wherein the main surface has an angle in the [110] direction of X, When the angle in the [1-10] direction is Y,

[0009]

(Equation 7)

The semiconductor device substrate is characterized in that the oxygen concentration at a depth of 1 μm from the surface of the substrate is 10% or less of the oxygen concentration at the center of the substrate.

(2) A silicon single crystal substrate having a main surface close to the (001) plane, wherein the main surface of the substrate is [1]
When the angle in the [10] direction is X and the angle in the [1-10] direction is Y,

[0012]

(Equation 8)

Or

[0014]

(Equation 9)

A substrate for a semiconductor device, wherein the oxygen concentration at a depth of 1 μm from the substrate surface is 10% or less of the oxygen concentration at the center of the substrate.

(3) The nitrogen content at the center of the thickness of the substrate is 1 × 10 ¹³ atoms / cm ³ to 2 × 10 ¹⁶ a.
The substrate for a semiconductor device according to the invention of (1) or (2), wherein the substrate is toms / cm ³ .

(4) The nitrogen content of the substrate is 2 × 10
It has a local concentration portion due to nitrogen segregation of ¹⁶ atoms / cm ³ or less and a nitrogen concentration in the substrate measured by secondary ion mass spectrometry showing a signal intensity of twice or more the average signal intensity ( A semiconductor device substrate according to the invention of 1) or 2).

(5) From the substrate thickness center to the surface
It has a density distribution that reduces crystal defects,
The area density of crystal defects of 0.1 μm or more in terms of diameter is 1 piece /
cm ^TwoBelow and at a depth of 0.1 μm from the substrate surface
Density of crystal defects of 0.1μm or more in diameter conversion
Is 1% or less of the center of the substrate thickness.
Nitrogen content at the center is 1 × 10¹³atoms / c
m^Three~ 2 × 10¹⁶atoms / cm^ThreeOr substrate
Element content is 2 × 10¹⁶atoms / cm^ThreeIs the following,
And nitrogen concentration measured by secondary ion mass spectrometry in the substrate.
Nitrogen segregation with a signal intensity of more than twice the average signal intensity
(1) or (2) having a locally thickened portion due to
It is a substrate for a conductor device.

(6) The semiconductor device substrate according to any one of (1) to (5), wherein the substrate has no color haze.

(7) The area of a region exceeding twice the average haze value of the entire surface of the substrate measured by the surface foreign matter inspection device is within 15% of the entire area of the substrate.
(6) The substrate for a semiconductor device according to any one of (6).

(8) Cutting a silicon single crystal grown by the Czochralski (CZ) method or the CZ method applying a magnetic field,
A method for manufacturing a silicon single crystal substrate having a main surface close to a (001) plane by polishing, wherein the main surface of the substrate is
The angle in the [110] direction or the [-1-10] direction is X,
When the angle in the [1-10] direction or the [-110] direction is Y,

[0022]

(Equation 10)

Wherein the substrate is heat-treated at a temperature of 1000 ° C. to 1300 ° C. in a non-oxidizing gas atmosphere for 1 hour or more. is there.

(9) The silicon single crystal grown by the CZ method or the magnetic field applying CZ method is cut and polished to obtain (001)
A method for manufacturing a silicon single crystal substrate having a main surface close to a plane, wherein the main surface of the substrate has X in the [110] direction and Y in the [1-10] direction.

[0025]

(Equation 11)

Or

[0027]

(Equation 12)

A method of manufacturing a substrate for a semiconductor device, wherein the substrate is heat-treated at a temperature of 1000 ° C. to 1300 ° C. in a non-oxidizing gas atmosphere for 1 hour or more. .

(10) The silicon single crystal is 1 × 1
^{0 16 atoms / cm 3 ~3 ×} 10 1 9 atoms / cm 3
The method according to (8) or (9), wherein the substrate is grown from a nitrogen-containing silicon melt.

(11) The method of manufacturing a semiconductor device substrate according to any one of (8) to (10), wherein the non-oxidizing gas atmosphere is an argon gas atmosphere having a purity of 99.995% by volume or more. It is.

[0031]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail.

The contents of the present invention include, first, a semiconductor device substrate in which the average haze of the substrate after the heat treatment of (1) and (8) is improved and a method of manufacturing the same, and secondly, (2) And (9) a semiconductor device substrate having improved haze unevenness in a substrate surface after the heat treatment and a method of manufacturing the same, and thirdly, a crystal on the surface while having the effect of (1) or (2). The invention is roughly classified into three aspects of a semiconductor device substrate with reduced defects and a method of manufacturing the same.

The increase in the haze value due to the heat treatment of the silicon single crystal substrate is caused by the fact that the rearrangement of silicon atoms on the silicon surface is promoted during the heat treatment and a step structure is formed. The height of the terrace portion and the stairs of the formed step is affected by the inclination angle formed in advance on the substrate. Theoretically, the smaller the inclination angle, the wider the terrace to be formed and the higher the height of the staircase. Height decreases. That is, theoretically, if no inclination angle is given, the entire surface becomes a terrace, and light is not randomly scattered, and the haze value is 0.
It becomes. However, actually, due to the problem of processing accuracy, when the substrate surface is viewed from a microscopic viewpoint, the substrate is locally inclined, which has a regular step structure, and the steps act as a diffraction grating, and the visible region The portion where the wavelength is matched with the wavelength looks like rainbow color, is recognized as color haze, and may have poor appearance. When heat treatment is performed using this as a starting material, the atomic rearrangement of silicon is promoted, and steps are easily formed. Even if the substrate has no color haze before the heat treatment, the color haze does not occur after the heat treatment. May occur partially. However, the density of the step structure causing haze is low, and the average haze value as a whole is very small.

On the other hand, the impurities contained in the gas atmosphere during the heat treatment are likely to be caught in the kink (square point) as indicated by the symbol の in FIG. 1 among the steps of the steps formed by the heat treatment. It was found to be a source of bunching and to reduce the width of the terrace and increase the height of the steps. As a result, the haze tends to increase when there are many impurities in the gas atmosphere during the heat treatment. However, on the other hand, in the case of a long step-like kink as shown in FIG. 2, impurities in the gas atmosphere during the heat treatment are:
Even if attached to the long stepped corner of <110>, <110>
It was also found that regular steps having a long terrace width and a low step height were easily formed. Therefore, in this case, the haze value is reduced as a whole, and is less likely to be affected by impurities contained in the gas.

The above is the above (1) in the present invention.
And (2) provide a guideline for realizing the invention, and it is inferred that the above effects are weakened when exceeding a certain range. Therefore, as a result of making and examining substrates having various inclination angles, a silicon single crystal substrate having a main surface close to the (001) plane, the angle of the main surface of the substrate in the [110] direction is set to be [110]. When X and the angle in the [1-10] direction are Y, if X ² + Y ² <(0.04 °) ² ,
Since it has been found that color haze is likely to occur in a part of the substrate surface, the inclination angle needs to be larger than this range. On the other hand, if (0.3 °) ² <X ² + Y ² ,
Since the inclination angle is large, the density of the steps increases, and the haze value increases. Therefore, the tilt angle of a silicon single crystal substrate having a main surface close to the (001) plane is:

[0036]

(Equation 13)

It is necessary that

Further, the inclination angle

[0039]

[Equation 14]

Or

[0041]

[Equation 15]

By setting the tilt direction to one direction of <110>, it is possible to reduce haze unevenness in the appearance inspection. At this time, an inclination in one direction is desirable for improving haze unevenness, but in actuality, in a processing step after slicing, a slight inclination is applied even in a direction that is not inclined. Processing accuracy in the direction without this inclination is 0.02 °
The haze value was particularly good in results of less than.

However, improving the haze alone is not enough to improve the device yield. In other words, although the haze improvement reduces the concentration of the electric field on the surface,
Unless the generation of leakage current due to crystal defects existing near the surface layer (the generation of an electric field concentration portion generated in the concave portion due to the COP or the like) is suppressed, the device yield is also reduced.

Therefore, in order to suppress oxide film destruction and leakage current due to local electric field concentration caused by surface defects, and ultimately to improve the device yield, not only the haze is improved but also the depth of 1 μm from the substrate surface. By reducing the oxygen concentration to 10% or less of the oxygen concentration at the center of the substrate, C
It is necessary to eliminate crystal defects such as OP.

As a technique for reducing the COP during the heat treatment, it is effective to add nitrogen to the substrate as disclosed in JP-A-2000-26196. That is,
At the center of the substrate thickness, nitrogen is supplied at 1 × 10 ¹³ atoms /
cm ^{3 to} 2 × 10 ¹⁶ atoms / cm ³ , more preferably 5 × 10 ¹³ atoms / cm ³ to 1 × 10 ¹⁶ atoms
/ Cm ³ , more preferably 5 × 10 ¹⁴ atoms / c
m ³ -1 × 10 ¹⁶ atoms / cm ³ . Here, the center of the substrate thickness specifically refers to a portion that is at least 50 μm deep from the substrate surface. By introducing nitrogen into a silicon single crystal, the concentration of point defects and the aggregation behavior of point defects during crystal growth change, transforming the vacancy defects in the single crystal, and increasing the density to 10 ⁷ / cm ³ or more. Oxygen precipitates are generated. Depending on the pulling conditions, transformed vacancy defects may be generated at 5% or less of the density of oxygen precipitates. In this way, the addition of nitrogen transforms the vacancy defects and reduces the size, which makes them more susceptible to disappearance. The required heat treatment time can be reduced. In other words, a substrate with a good device yield can be manufactured,
This has the effect of improving productivity. However, if the nitrogen content in the substrate is less than 1 × 10 ¹³ atoms / cm ³ , it is difficult to transform vacancy defects, and 2 × 10 ¹⁶ atoms / cm ³ is difficult.
If it exceeds / cm ³ , dislocations are likely to be formed during the growth of a single crystal, and nitrogen forms a compound defect with oxygen to change the resistance of the substrate, and further, heat treatment tends to cause stacking faults. The nitrogen content in the substrate was determined by SIMS
(Secondary Ion Mass Spect
roscopy (secondary ion mass spectrometry).

Further, the semiconductor device substrate contains nitrogen.
The quantity is 2 × 10¹⁶atoms / cm ^ThreeBelow, especially preferred
H, 1 × 10¹³atoms / cm^Three~ 2 × 10¹⁶at
oms / cm^ThreeAnd a secondary ionic substance in the substrate.
The nitrogen concentration measured by mass spectrometry is more than twice the average signal intensity
With local concentration due to nitrogen segregation showing above signal strength
Preferably, it is Introduced during single crystal growth
Nitrogen is not always distributed uniformly in a single crystal
Absent. Depending on the growth conditions of the single crystal, the local bias of nitrogen
2 times the average nitrogen concentration or lower limit of measurement due to precipitation and concentration
With the above strength, if a local increase in signal strength is observed
There is a case. This is the average of the SIMS measurements
Nitrogen concentration is 2 × 10¹⁶atoms / cm^ThreeLess than or
May be observed even when the value is below the lower limit of measurement. This
In such cases, the suppression of aggregation of point defects during single crystal growth
The generation of elementary precipitates is sufficient, and
Defects can be easily eliminated.

When the nitrogen content at the center of the substrate thickness is 1
× 10 ¹³ atoms / cm ³ to 2 × 10 ¹⁶ atoms / cm
cm ³ , or the nitrogen content of the substrate is 2 × 10 ^{16 at}
ms / cm ³ or less, and the nitrogen concentration measured in the substrate by secondary ion mass spectrometry has a signal intensity of twice or more the average signal intensity. Oxygen precipitates generated by the addition can be eliminated near the substrate surface by providing a density distribution in which the oxygen concentration decreases from the center of the substrate thickness toward the surface. Then, a density distribution in which crystal defects decrease from the substrate thickness center toward the surface is created, and the volume density of crystal defects of 0.1 μm or more in terms of diameter at a depth of 0.1 μm from the substrate surface is compared with the substrate thickness center. It is necessary to reduce the value by two digits or more to 1% or less. Further, the areal density of crystal defects having a diameter of 0.1 μm or more at the outermost surface of the substrate can be reduced to 1 / cm ² or less by heat treatment in a non-oxidizing atmosphere or surface polishing.
If the density of these crystal defects (mainly oxygen precipitates) is exceeded, structural destruction of the device is likely to occur, and the yield of the device formed on the substrate will deteriorate.

In order to prevent the occurrence of color haze which is a cause of rejection in appearance inspection,

[0049]

(Equation 16)

Or

[0051]

[Equation 17]

Alternatively,

[0053]

(Equation 18)

It is necessary that

Further, when a region exceeding twice the value of the average haze value of the entire substrate exceeds 15% of the substrate area, the haze unevenness is visually inspected by the surface foreign matter inspection apparatus. As a cause of rejection, the oxide film breakdown voltage characteristic (high C mode pass rate) also tends to deteriorate. However, when the tilt angle of the substrate is changed to [1]
10], the angle is tilted by X and the [1-10] direction is tilted by Y.

[0056]

[Equation 19]

Or

[0058]

(Equation 20)

Or

[0060]

(Equation 21)

By doing so, it is possible to prevent the haze unevenness from being generated in the entire region in the heat treatment furnace.

In order to manufacture the semiconductor device substrate as described above, a general CZ method or a magnetic field application CZ method is used.
What is necessary is just to use the produced silicon single crystal. First, an ingot having a crystal orientation of <110> is prepared according to a standard single crystal growing method. There are various procedures for processing from the ingot to the substrate, but an example is given here. That is, the ingot is subjected to external grinding according to the target substrate size to obtain a cylindrical single crystal block having a notch or an orientation flat indicating a crystal orientation. A substrate is cut out of the single crystal block using a slicer or a wire saw. At this time, the block is tilted, and the tilt angle of the substrate becomes

[0063]

(Equation 22)

To be entered. Also,

[0065]

(Equation 23)

Or

[0067]

[Equation 24]

By doing so, it is also possible to simultaneously reduce haze and visually reduce uneven haze. At this time, as the silicon single crystal substrate is sequentially cut from the block, the angle of the block may shift. In this case, it is possible to fit the cut-out substrate within the above-described range by checking the range of the shift in advance and setting the inclination angle at the start of cutting to a range that allows for the degree of the shift from the above-described range. Since the above range is sufficiently wide compared with the processing accuracy of a normal slicer or wire saw, it is industrially sufficiently possible to cut out almost all substrates within the above range with such a simple correction. is there. The cut substrate can be made into a mirror-finished silicon single crystal substrate by standard substrate processing steps such as beveling, lapping, etching, and mirror polishing.

This substrate is subjected to heat treatment for one hour or more in order to eliminate surface defects. Regarding the heat treatment temperature, 1000 ° C. to 1300 ° C., preferably 1100 ° C.
1200 ° C. is suitable. When the temperature is lower than 1000 ° C., a large amount of time is required for the outward diffusion of oxygen. On the other hand, when the temperature exceeds 1300 ° C., the thermal equilibrium oxygen solid solubility in the crystal increases and oxygen outward diffusion occurs. Disappears. In general, when the heat treatment furnace is operated at a high temperature, the heat treatment temperature is low because unexpected contamination of the furnace body is likely to occur or the quartz member used for the furnace tube or the like becomes severely deformed. Is more desirable. Therefore, it is desirable to perform the heat treatment at the lowest possible temperature in the indicated temperature range, taking into account the required depth of the DZ layer and the allowable time of the heat treatment time from an economic viewpoint.

Further, according to the present invention, with good productivity and efficiency,
In order to manufacture a substrate for a semiconductor device, 1 × 10¹⁶at
oms / cm^Three~ 3 × 10¹⁹atoms / cm^ThreeNitrogen
CZ method or magnetic field application C
Silicon single crystal obtained from silicon single crystal grown by Z method
The crystal substrate is kept at a temperature of 1000 ° C. to 1300 ° C. for 1 hour or less.
It is desirable to perform upper heat treatment. The segregation coefficient of nitrogen is 7 × 1
0^-FourAnd 1 × 10 ¹⁶atoms / cm^Three~ 3 × 10
¹⁹atoms / cm^ThreeOf nitrogen-containing silicon melt
If used, 1 × 10¹³atoms / cm^Three~ 2 × 10¹⁶
atoms / cm^ThreeTo grow single crystal containing nitrogen
You.

When growing a silicon single crystal by the CZ method or the CZ method applying a magnetic field, the pulling speed is set to V (mm / mi).
n), and the average value of the temperature gradient in the crystal in the pulling axis direction in the temperature range from the silicon melting point to 1300 ° C. is G
(° C./mm), the V / G value is 0.2 (mm ² /
° C. min) or more conditions under nitrogen for 1 × 10 ¹⁶ at
oms / cm ^{3 to} 1.5 × 10 ¹⁹ atoms / cm ^{3 and} grown from a silicon melt (in a normal pulling furnace,
This is because the pulling speed is about 1.5 mm / min or more and the nitrogen concentration in the single crystal is 1 × 10 ¹³ atoms / cm ³ to 1 × 10
¹⁶ corresponding to the atoms / cm ^3), by using a silicon single crystal substrate prepared from the single crystal, the depth of the surface defect-free region (DZ layer) can be deeper than than 1 [mu] m.

In the silicon single crystal containing nitrogen in the single crystal as described above, since oxygen precipitates are generated, defects can be almost completely eliminated only by outwardly diffusing oxygen on the substrate surface. Can be. In addition, the transformed vacancy defects
It has an unstable form and easily disappears by heat treatment. On the other hand, a silicon single crystal that does not contain nitrogen must eliminate vacancy defects, which include absorption and release of silicon point defects, and precipitation and oxygen of single crystals.
Since the release is complicated, the heat treatment pattern becomes complicated, the heat treatment temperature needs to be as high as about 1200 ° C., and it is more completely eliminated if a dangerous gas such as hydrogen is not used as the atmosphere. Can not. Regarding the heat treatment temperature of the present invention, 1000 ° C. to 1300 ° C., preferably 1100 ° C. to 1200 ° C. is appropriate. Temperature 1
When the temperature is lower than 000 ° C., a large amount of time is required for the outward diffusion of oxygen. When the temperature exceeds 1300 ° C., the thermal equilibrium oxygen solid solubility in the crystal increases, and the outward diffusion of oxygen does not occur.
In general, when operating a heat treatment furnace at a high temperature,
In order to reduce the risk of unexpected contamination of the furnace body, it is desirable to be able to lower the heat treatment temperature. Therefore, it is desirable to perform the heat treatment at the lowest possible temperature in the above temperature range, taking into account the required depth of the DZ layer and the allowable time of the heat treatment time from an economic viewpoint.

The heat treatment atmosphere is preferably a non-oxidizing atmosphere in which the oxygen concentration on the substrate surface can be effectively reduced, and as a result, plate-like precipitates generated by the addition of nitrogen can be easily eliminated. As the non-oxidizing gas, an argon gas is desirable from the viewpoint of economy. At this time, the purity of the argon gas is 99.995% by volume or more.
If the content is less than 995% by volume, an increase in the haze value and the occurrence of uneven haze occur, which further affects the oxide film breakdown voltage as a secondary defect, which is not preferable. Although the use of helium gas has the advantage of reducing the purity of the contained impurities, particularly the amount of impurity oxygen in the gas, it is economical and difficult to handle the heat treatment furnace due to the large thermal conductivity of helium gas. There are problems such as. Nitrogen gas is inappropriate because it forms nitride on the substrate surface. A reducing atmosphere such as hydrogen, or a mixed atmosphere of hydrogen and an inert gas,
Since it has the same effect as argon gas, it can be used. However, it is not always suitable because of the difficulty in handling, especially the danger of explosion.

In order to suppress the generation of haze, it is necessary to reduce impurities in the gas by passing the gas through a purifier or the like before introducing the gas into the furnace. It is also necessary to prevent metal contamination in the furnace as much as possible. However, when the present invention is used, haze can be prevented and haze unevenness can be eliminated even if some impurities in the gas remain.

It should be further noted that Japanese Patent Laid-Open No. 11-135
As pointed out in No. 511, by reducing impurities mixed into the atmosphere during the heat treatment, the crystallinity of the surface layer can be further improved. That is,
By reducing impurities, COP pits existing on the crystal surface before heat treatment can be smoothed,
It is possible to further promote the disappearance of P.

Further, in the substrate to which nitrogen is added according to the present invention, since the oxygen precipitate inside grows by heat treatment, the semiconductor device substrate can have a high density gettering layer inside. Usually, a so-called IG wafer having a DZ layer on such a surface and a high-density gettering layer inside has a three-stage heat treatment (outward diffusion of oxygen + formation of oxygen precipitation nuclei + formation of oxygen precipitates). ), But by using the manufacturing method of the present invention, a DZ layer having a higher integrity than a normal IG wafer can be obtained.
In addition, a substrate having a high-density gettering layer inside can be formed by one heat treatment.

[0077]

EXAMPLES Example 1 A silicon single crystal pulled up by the Czochralski method was machined with an inclination in the <100> direction. As shown in Table 1, levels 2 to 5 where the inclination angle was changed, and levels 1 where the processing was performed without any inclination
Was added to prepare a total of five levels of silicon single crystal substrates.
Then, argon was directly introduced from the cold evaporator into the heat treatment furnace, and the five-level silicon single crystal substrate was inserted into the furnace at 600 ° C. in an argon atmosphere, heated to 1200 ° C., and then heat-treated for 1 hour. . Table 1 shows the average haze value, the presence / absence of haze unevenness by appearance inspection, and the oxide film breakdown voltage characteristic (high C mode pass rate) of each position depending on the position of the furnace from the gas introduction portion at that time.

[0078]

[Table 1]

All the semiconductor device substrates processed and heat-treated without inclining, regardless of the position from the gas introduction part,
Average haze value is low and haze unevenness does not occur at all,
As in the prior art, iridescent haze occurs. On the other hand, Level 2, in which the inclination angle is within the range of the present invention,
In No. 3, the average haze value is lower as a whole as compared with Levels 4 and 5 outside the range of the present invention. Further, as the upper portion is closer to the gas introduction portion, the introduced impurities are more likely to be adsorbed to the kink on the substrate, have a high average haze value, and generate haze unevenness. At levels 2 and 3, the unevenness of the haze was remarkable from the gas inlet to about 1/5 (upper 1/5) in the furnace, and the appearance inspection failed. On the other hand, outside the range of the present invention (levels 4 and 5), the haze value was high in all portions from the upper part in the furnace, and the appearance was rejected in all regions due to the occurrence of uneven haze.

The withstand voltage of the oxide film on the surface of the semiconductor device substrate in the area where the visual inspection has passed (high C mode pass rate)
The measurement result shows that the pass rate is almost 100%. However, in the semiconductor device substrate in the region having the haze unevenness, the withstand voltage is deteriorated in the portion where the haze value is high, and within the range of the present invention (level 2, 3). In the inclination angle of (1), a pass rate of 85% or more can be ensured even in the upper 1/5 in the furnace, whereas outside the range of the present invention (levels 4 and 5), the pass rate of the high C mode is 50 to 60%. It has dropped to. The oxide film in this example and in the evaluation of the oxide film breakdown voltage (high C mode pass rate) in the present example and the subsequent examples uses a polysilicon electrode having a thickness of 25 nm and an electrode of 20 mm ² .

The results of the oxygen concentration measurement by SIMS of the samples of Levels 2 and 3 show that the oxygen concentration at the center of the substrate is 8.
In contrast to 2 × 10 ¹⁷ atoms / cm ³ , the oxygen concentration at a depth of 1 μm in the surface layer is 6 × 10 ¹⁶ atoms / cm ³ , and a junction leak of 1 × 10 ⁻⁹ A or more in a junction area of 20 mm ^2. The defective rate was as good as 3 to 5%.

That is, when the angle in the [110] direction of the main surface of the substrate is X and the angle in the [1-10] direction is Y,

[0083]

(Equation 25)

It was found that when the film was inclined in the range described above, no color haze was generated, and the effect of improving the haze was particularly remarkable.

(Example 2) A silicon single crystal pulled up by the Czochralski method was machined with an inclination in the <110> direction. Depending on the inclination angle, the levels 1 to 5 in Table 2
Was prepared. These were directly introduced into a heat treatment furnace from a cold evaporator of argon, and the silicon substrate was placed in this argon atmosphere for 6 hours.
After inserting into the furnace at 00 ° C and raising the temperature to 1200 ° C,
Heat treatment was performed for a time. Table 2 shows the average haze value, the presence / absence of haze unevenness by appearance inspection, and the oxide film breakdown voltage characteristic (high C mode pass rate) of the surface according to the position from the gas introduction portion at that time.

[0086]

[Table 2]

With respect to these five levels, the average haze value is generally lower at levels 1 to 4 where the inclination angle is within the range of the present invention, as compared with level 5 outside the range of the present invention. However,
The tendency that the introduced impurities tend to be adsorbed on the kink on the substrate and the average haze value and haze unevenness tend to occur easily in the upper portion closer to the gas introduction portion can be seen as in Example 1, but the degree is low. The area rejected by the inspection is about 1/10 of the inside of the furnace from the gas inlet, and in the area of claim 1 shown in Example 1, up to the upper 1/5 of the furnace, the appearance inspection failed due to uneven haze. Compared to that,
By setting the inclination direction to one direction of [110] or one direction of [1-10], uneven haze was less likely to occur.

Also, the oxide film withstand voltage (high C mode pass rate) on the surface of the semiconductor device substrate in the appearance inspection pass area.
The measurement result is a pass rate of almost 100%, and is 85% or more even when a region having uneven haze is included.

The results of the oxygen concentration measurement by SIMS of the samples of levels 1 to 4 indicate that the oxygen concentration at the center of the substrate is 8 to 10%.
In contrast to 9 × 10 ¹⁷ atoms / cm ³ , the oxygen concentration at a depth of 1 μm in the surface layer is approximately 6 × 10 ¹⁶ atoms / cm 3.
³ , and the joint leak failure rate of 1 × 10 ⁻⁹ A or more in these joint areas of 20 mm ² was as good as 3 to 5%.

That is, the area

[0091]

(Equation 26)

Or

[0093]

[Equation 27]

Then, as shown in the embodiment, by making the direction of inclination one direction, it is possible to suppress the occurrence of haze unevenness,
In the furnace region where haze unevenness did not occur, the result of the oxide film breakdown voltage (high C mode pass rate) test was as good as 90% or more.

As shown in this embodiment, by making the direction of the inclination one direction, the occurrence of haze unevenness can be suppressed, and the oxide film breakdown voltage (high C mode Pass rate) The result of the test was as good as 90% or more.

(Example 3) A silicon single crystal pulled up by the Czochralski method was machined with an inclination in the <100> direction. As shown in Table 3, levels 2 to 5 in which the tilt angle was changed and level 1 processed without any tilt were added to prepare a total of 5 levels of silicon single crystal substrates. Then, an argon gas having a purity of 99.995 vol% or more is introduced into the heat treatment furnace through a purifier from the cold evaporator, and 60 g of the argon gas is introduced into the furnace in the argon atmosphere.
After inserting the substrate at 0 ° C., the temperature was raised to 1200 ° C., and then heat treatment was performed for 1 hour. Table 3 shows the average haze value, the presence / absence of haze unevenness by appearance inspection, and the surface oxide film breakdown voltage characteristic (high C mode pass ratio) according to the position from the gas introduction portion at the top of the furnace at that time.

[0097]

[Table 3]

All of the semiconductor device substrates processed without inclination have a low average haze value and no haze unevenness irrespective of the position from the gas introduction portion. Color haze has occurred. On the other hand, the average haze value of the four levels processed with the inclination was lower at levels 2 and 3 where the inclination angle was within the range of the present invention than at levels 4 and 5 outside the range of the present invention. Low. In the present embodiment, since the used argon has few impurities, the haze value is reduced to about 1/4 as compared with the result of the embodiment 1 using the argon gas without using the purifier, and the haze unevenness is generated. Was very minor. However, the deterioration of haze when impurities are contained in the gas is not completely eliminated. That is, when comparing the levels 2 and 3, when the absolute value of the inclination angle becomes large, haze unevenness is observed in about 1/10 of the inside of the furnace from the gas inlet, and the appearance inspection has failed.

Also, the withstand voltage of the oxide film on the surface of the semiconductor device substrate in the area where the visual inspection has passed (high C mode pass rate)
All the measurement results are almost 100%. In the semiconductor device substrate in the appearance inspection rejection area having uneven haze, the withstand voltage is deteriorated at a portion where the haze value is high, but the high C mode pass rate is 85 to 85%. It dropped to 95%.

The results of the oxygen concentration measurement by SIMS and the PN junction leak characteristics of the samples of Levels 2 and 3 were almost the same as those in Example 1, and the oxygen concentration at the center of the substrate was 8.5.
In contrast to × 10 ¹⁷ atoms / cm ³ , the oxygen concentration at a depth of 1 μm in the surface layer is 6 × 10 ¹⁶ atoms / cm ³ , and a junction leak failure of 1 × 10 ⁻⁹ A or more in a junction area of 20 mm ^2. The rate was as good as 3-5%.

(Example 4) A silicon single crystal pulled up by the Czochralski method was machined with an inclination in only one direction of the <110> direction. As shown in Table 4, silicon single crystal substrates of levels 1 to 5 with different inclination angles were prepared.
And, through the purifier from the cold evaporator, 9
Argon having a purity of 9.995 vol% or more is introduced into the heat treatment furnace. In this argon atmosphere, a silicon single crystal substrate processed in the <110> direction is inserted into the furnace at 600 ° C., and the temperature is raised to 1200 ° C. Then, heat treatment was performed for one hour.

Table 4 shows the average haze value, the presence / absence of haze unevenness by the appearance inspection, and the oxide film breakdown voltage characteristic (high C mode pass rate) of the surface, depending on the position from the gas introduction portion at the top of the furnace at that time. Was.

[0103]

[Table 4]

Of the five levels, levels 1 to 4 where the inclination angle is within the range of the present invention are levels 5 outside the range of the present invention.
, The average haze value is lower overall. However, as the upper part nearer to the gas introduction part, the introduced impurities are more likely to be adsorbed on the kink on the substrate, and the tendency that the average haze value increases is slightly seen as the absolute value of the inclination angle increases, but claim 1. As compared with the range (Example 3), uneven haze was less likely to occur, and no rejection by appearance inspection did not occur in the entire region in the furnace.

In addition, the oxide film withstand voltage (high C mode pass rate) on the surface of the semiconductor device substrate in the appearance inspection pass area.
All the measurement results were almost 100% pass rate.

The results of the oxygen concentration measurement by SIMS and the PN junction leak of the samples of levels 1 to 4 were almost the same as those in Example 2, and the oxygen concentration at the center of the substrate was 8 to 9 × 1.
Against 0 ¹⁷ atoms / cm ^3, the oxygen concentration of the surface layer 1μm depth is approximately ^{6 × 10 1 6 atoms / cm} 3, these 1 × 10 ^-9 A or more junction leakage junction area 20 mm ² The defective rate was as good as 3 to 5%.

(Embodiment 5) Nitrogen at center of thickness of substrate
The content is 4.5 to 4.8 × 10 by SIMS measurement. ¹⁴at
oms / cm^ThreeWith a tilt angle of level 2 in Table 4.
A recon single crystal substrate was prepared. And cold evaporator
Through the purifier from the rotator, 99.995 vol% or more
The purified argon gas is introduced into the heat treatment furnace,
The above silicon single crystal substrate is heated in a
And heat it to 1200 ° C for 10 minutes.
Processing was performed. The semiconductor device substrate after the heat treatment
A group having an average haze value of 0.66 to 0.52 ppm;
Select a board and withstand oxide film after polishing 1μm without polishing
Measurement (high C mode pass rate) without polishing
Is 98% pass rate for high C mode and 93% after 1μm polishing
Met.

Further, the PN junction leak characteristics at this tilt angle level were good, with a junction leak failure rate of 1 × 10 ⁻⁹ A or more at a junction area of 20 mm ² being 4%. The results of the oxygen concentration measurement by SIMS show that the oxygen concentration at the center of the substrate is 9.2 × 10 ¹⁷ atoms / cm ³ and the oxygen concentration at a depth of 1 μm in the surface layer is 8.5 × 10 ^16. atom
s / cm ³ .

(Example 6) The following four silicon single crystals were pulled up by the CZ method. Oxygen concentration is about 6.5-
8.5 × 10 ¹⁷ atoms / cm ³ (measured by infrared absorption method using a conversion coefficient of JEIDA). Each single crystal dissolves about 40 kg of raw material and has a diameter of 155 mm.
Was prepared to obtain a silicon single crystal of p-type 10 Ωcm. Nitrogen was added by dissolving a wafer in which a nitride film was formed on a non-doped silicon wafer by a CVD method at the same time as dissolving the raw materials.

1) Nitrogen was added to the raw material melt at 5 × 10 ¹⁶
Atoms / cm ^{3 was} added, and a silicon single crystal was grown at a pulling rate of 1 mm / min. The nitrogen concentration of the silicon single crystal was measured by SIMS, but no nitrogen was detected (1 × 10
¹⁴ atoms / cm ³ or less), when calculating the concentration of nitrogen from the equilibrium segregation coefficient of about 4 × in the silicon single crystal 10 ¹³ a
toms / cm ³ .

2) 3 × 10 ¹⁷ nitrogen was added to the melt of the raw material.
Atoms / cm ^{3 was} added, and a silicon single crystal was grown at a pulling rate of 1 mm / min. When the nitrogen concentration was calculated from the equilibrium segregation coefficient, about 2 × 10 ¹⁴ at
oms / cm ³ . When the nitrogen concentration of the silicon single crystal was measured by SIMS, nitrogen could not be quantified, but a local increase in the nitrogen signal was observed at an intensity twice or more the background level of nitrogen.

3) Nitrogen was added to the raw material melt at 5 × 10 ¹⁸
Atoms / cm ^{3 was} added, and a silicon single crystal was grown at a pulling rate of 1 mm / min. V / G at this time is 0.
15 (mm ² / ° C min). As a result of measuring the nitrogen concentration of the silicon single crystal by SIMS, the nitrogen concentration in the silicon single crystal was about 5 × 10 ¹⁵ atoms / cm ³ . In addition, at the time of this SIMS measurement, an increase in the nitrogen concentration, which locally increased twice or more with respect to the average nitrogen signal, was observed.

4) 1.5 × 1 nitrogen was added to the melt of the raw material.
0 ¹⁹ atoms / cm ³ added, pulling speed 1 mm / mi
n was used to grow a silicon single crystal. On the way, the crystal was polycrystallized, but a dislocation-free silicon single crystal was obtained from the upper part of the ingot. As a result of measuring the nitrogen concentration of the silicon single crystal by SIMS, the nitrogen concentration in the silicon single crystal was about 1.5 ×
It was 10 ¹⁶ atoms / cm ³ . Also, this SIM
At the time of the S measurement, an increase in the nitrogen concentration which was locally increased twice or more with respect to the average nitrogen signal was observed.

From the above four silicon single crystals, silicon single crystal substrates having two different inclination angles were prepared.
One was machined with an inclination in the <100> direction. The other was inclined in the <110> direction. When the tilt angles of the respective substrates were measured after processing, the values shown in Table 5 were obtained.

[0115]

[Table 5]

The substrates were heat-treated. After inserting into a furnace at 800 ° C. and holding at 1100 ° C. for 8 hours,
The substrate was taken out at 00 ° C. As a gas used for the heat treatment, an argon gas supplied by a cold evaporator and a gas generated by a purifier at a use point were used. The impurity concentration in the gas was 5 ppm or less. This gas was used as an atmosphere throughout the heat treatment. At the time of inserting the substrate, purging was performed by a purge box provided in front of the furnace, and after confirming that the atmosphere in front of the furnace in which the sample was on standby became an argon atmosphere with impurities of 5 ppm or less, the furnace port was closed. It was opened and the substrate was inserted. Each wafer was heat-treated in the range of 1/10 to 1/5 of the upper part in the furnace. The average haze value after heat treatment, the presence / absence of haze unevenness, and the presence / absence of color haze were measured, and the results are as shown in Table 6. All the substrates had low haze values as in Examples 3 and 4, and haze unevenness was observed. I couldn't.

Further, the oxide film breakdown voltage (high C mode), the surface defect density, the volume density of crystal defects at a depth of 0.1 μm from the surface, and the nitrogen concentration at the center of the substrate of the heat-treated semiconductor device substrate are described. Table 6 shows the measurement results. The withstand voltage of the oxide film (high C mode) is 1
An oxide film having a thickness of 25 nm was formed in a dry oxygen atmosphere at 000 ° C. and measured. The electrode used for the withstand voltage measurement was a 20 mm ² polysilicon electrode, and the determination current was 100 mA / cm.
^The sample which showed a withstand voltage of 11 MV / cm or more in ² was regarded as a non-defective product. Surface defect density, ammonia-hydrogen peroxide cleaning was repeated, the surface was etched 0.1 μm in total,
The defect density was calculated from the increased number of COPs having a diameter of 0.1 μm or more at this time. To measure the density of defects inside the substrate, the infrared tomograph, was measured density of more defect 0.2μm in diameter in terms of substrate thickness center, none of the crystal 1 × 10 ⁷ / cm ³ or more And
The defect density of 0.1 μm or more is further increased. From these results, it was found that the defect density on the substrate surface was 1% or less as compared with the inside of the substrate in any semiconductor device substrate.

[0118]

[Table 6]

(Embodiment 7) For a semiconductor device substrate of Levels 3 and 5 (Table 3) of Example 3 and Levels 2 and 5 (Table 4) of Example 4, a surface foreign matter inspection device (TENCOR S)
rfscan 6200), the range width of a haze range satisfying a haze value exceeding twice the average haze value, the area ratio (%) of the region to the entire surface of the substrate, and the haze unevenness determination result based on the standard. ,
It is shown in Table 7.

[0120]

[Table 7]

The results of the occurrence of uneven haze by the appearance inspection of the semiconductor device substrates of Levels 3 and 5 of Example 3 and Levels 2 and 5 of Example 4 and the results of "2 of the average haze value" The occurrence of haze unevenness, which can be determined based on a criterion that the area of the region exceeding twice exceeds 15% of the total area, was consistent. Further, in the substrate used for the main measurement, the measurement result of the oxide film breakdown voltage (high C mode pass rate) was 90.8%.
And 95.8%, the upper 1 of level 5 in Table 3
/ 5 and the upper 1/5 sample of level 5 in Table 4 showed that the area exceeding twice the average haze value was 45% of the total and 1%.
8%.

[0122]

The substrate for a semiconductor device according to the present invention has an effect that haze and uneven haze do not occur even if heat treatment for reducing defects on the substrate surface is performed, and device characteristics such as oxide film breakdown voltage are obtained. Therefore, it has the effect of contributing to improvement in productivity and cost reduction in the device creation process.

Further, in the semiconductor device substrate of the present invention, by adding nitrogen to the crystal, not only the above-described effects of reducing surface defects and haze, but also significantly reducing crystal defects immediately below the surface. Therefore, the yield of the device creation process can be significantly improved.

[Brief description of the drawings]

FIG. 1 is a schematic view of steps formed on the surface of a silicon single crystal substrate.

FIG. 2 is a schematic view of steps formed on the surface of a silicon single crystal substrate.

[Explanation of symbols]

A: A kink corner that easily traps impurities, B: A kink where impurities easily migrate (migrate).

 ──────────────────────────────────────────────────の Continuing from the front page (72) Inventor Hiroyuki Deai 20-1 Shintomi, Futtsu-shi, Chiba Nippon Steel Corporation Technology Development Division (72) Inventor Kazuki Ishizaka 20-1 Shintomi, Futtsu-shi, Chiba Made in New Japan (72) Inventor Wataru Ohashi 20-1 Shintomi, Futtsu-shi, Chiba F-term (reference) in Nippon Steel Corporation Technology Development Division 4G077 AA02 AB01 AB02 BA04 CF10 EB01 EJ02 FE11

Claims (11)

[Claims] 1. A silicon single crystal semiconductor device substrate having a main surface close to the (001) plane, wherein the main surface has an angle in the [110] direction of X and an angle in the [1-10] direction. When the angle is Y, 1 μm from the surface of the substrate.
The oxygen concentration at a depth of 10% or less of the oxygen concentration at the center of the substrate. 2. A silicon single crystal semiconductor device substrate having a main surface close to the (001) plane, wherein the main surface of the substrate has an angle in the [110] direction of X and an angle in the [1-10] direction of X. When the angle is Y, Or 1 μm from the surface of the substrate.
The oxygen concentration at a depth of 10% or less of the oxygen concentration at the center of the substrate. 3. The method according to claim 1, wherein the nitrogen content at the center of the thickness of the substrate is 1 × 10 ¹³ atoms / cm ³ to 2 × 10 ¹⁶ atoms.
^{3. The} substrate for a semiconductor device according to claim 1, wherein the substrate is s / cm ³ . 4. The method according to claim 1, wherein the nitrogen content of said substrate is 2 × 10 ¹⁶ at.
oms / cm ³ or less, and the nitrogen concentration measured in the substrate by secondary ion mass spectrometry is 2% of the average signal intensity.
The substrate for a semiconductor device according to claim 1, further comprising a locally concentrated portion due to nitrogen segregation showing a signal intensity twice or more. 5. A density distribution in which crystal defects decrease from the center of the substrate thickness toward the surface, and the surface density of crystal defects of 0.1 μm or more on the substrate surface is 1 / cm ^2.
And the volume density of crystal defects having a diameter of 0.1 μm or more at a depth of 0.1 μm from the substrate surface is 1% or less of the substrate thickness center, and the nitrogen content at the substrate thickness center is 1% or less. × 10 ¹³ atoms / cm ³ ~
2 × 10 ¹⁶ atoms / cm ³ , or the nitrogen content of the substrate is 2 × 10 ¹⁶ atoms / cm ³ or less, and the nitrogen concentration in the substrate measured by secondary ion mass spectrometry is the average signal intensity. The substrate for a semiconductor device according to claim 1, further comprising a locally concentrated portion due to nitrogen segregation showing a signal intensity of twice or more. 6. The substrate for a semiconductor device according to claim 1, wherein the substrate does not have color haze. 7. The substrate according to claim 1, wherein the area of a region exceeding twice the average haze value of the entire surface of the substrate measured by a surface foreign matter inspection apparatus is within 15% of the entire area of the substrate. 4. The substrate for a semiconductor device according to item 1. 8. A method for producing a silicon single crystal substrate having a main surface close to the (001) plane by cutting and polishing a silicon single crystal grown by the Czochralski method or the Czochralski method applying a magnetic field. The main surface of the substrate is
The angle in the [110] direction or the [-1-10] direction is X,
When the angle in the [1-10] direction or the [−110] direction is Y, And the substrate is kept at 1000 ° C.
A method for manufacturing a substrate for a semiconductor device, comprising performing heat treatment at a temperature of 1300 ° C. in a non-oxidizing gas atmosphere for 1 hour or more. 9. A method for manufacturing a silicon single crystal substrate having a main surface close to a (001) plane by cutting and polishing a silicon single crystal grown by the Czochralski method or the Czochralski method applying a magnetic field. , The main surface of the substrate is [1
Assuming that the angle in the [10] direction is X and the angle in the [1-10] direction is Y, Or And the substrate is kept at 1000 ° C.
A method for producing a substrate for a semiconductor device, comprising performing heat treatment at a temperature of 1300 ° C. in a non-oxidizing gas atmosphere for one hour or more. 10. The silicon single crystal is 1 × 10 ¹⁶ a
10. Growing from a silicon melt containing nitrogen of toms / cm ^{3 to} 3 × 10 ¹⁹ atoms / cm ^3.
The method described in. 11. The non-oxidizing gas atmosphere has a purity of 9%.
The method according to any one of claims 8 to 10, wherein the atmosphere is an argon gas atmosphere of 9.995% by volume or more.