JP2001359059A - Program multiplex system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve a problem of a conventional program multiplex system where coded program signals are multiplexed in compliance with the MPEG-2 TS system that has required a long switching time in the case of switching the coded program signal demultiplexed from a streaming signal. SOLUTION: The program multipex system of this invention is provided with a synchronization device 1 in addition to each of program generators 2, each of program coders (program converters) 3, and a multiplexer 4 that multiplexes signals from the program coders 3. The device 1 gives a synchronizing signal of a prescribed frequency to each program generator 2, and each program coder outputs a conversion program resulting from adding a reproduction reference signal to each program signal synchronously with the synchronizing signal to the multiplexer 4. Thus, even in the case that a conversion program signal demultiplexed from the multiplexed signal is switches, a time signal generated on the basis of the reproduction reference signal may be that of lasting for a short time that corresponds only to the elimination period of the phase difference between the reproduction reference signals before and after the switching so as to reduce the switching time.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to an MPEG2-TS
The present invention relates to a program multiplexing system that generates a multiplexed signal such as a (moving picture expert group 2—transport stream) type streaming signal, and in particular, reduces a switching time when switching an encoded program signal to be separated from the multiplexed signal. It is related to the improvement to make. The MPEG2-TS system is a coding system standardized by the Moving Picture Experts Group, and is mainly used for real-time transmission in broadcasting or communication.

[0002]

2. Description of the Related Art FIG. 14 is a system configuration diagram showing a configuration of a conventional program multiplexing system for generating a streaming signal of the MPEG2-TS system disclosed in Japanese Patent Application Laid-Open No. 10-51750. In the figure, reference numeral 26 denotes a plurality of program encoders each of which receives a program signal composed of a video signal and an audio signal, and compresses and encodes them to generate an encoded program signal of the MPEG2-TS system; This is a multiplexing device that multiplexes the coded program signal to generate an MPEG2-TS streaming signal.

In each program encoding device 26, 2
8 is a system clock generator that outputs a synchronous count value counted in synchronization with the video signal, 29 is a video encoder that compresses and encodes the video signal, 30 is an audio encoder that compresses and encodes the audio signal, Reference numeral 31 denotes a media multiplexing unit that multiplexes the compression-encoded video signal and audio signal to generate an encoded program signal.

In the multiplexing device 27, 32 is an encoded program signal input section for buffering each encoded program signal, and 33 is a plurality of encoded program signal input sections 32,. A program multiplexing apparatus for generating an MPEG2-TS streaming signal including a plurality of programs by time-division multiplexing an encoded program signal; 34, a system clock generator; 35, a PCR based on the system clock;
(Program clock reference: time reference reference value information) is a PCR adding unit for adding to the streaming signal.

Next, the operation will be described. When a program signal including a video signal and an audio signal is input to each program encoding device 26, a system clock generation unit 28
Outputs a synchronous count value counted in synchronization with the video signal, the video encoding unit 29 compression-encodes the video signal,
The audio encoding unit 30 compression-encodes the audio signal. The media multiplexing unit 31 multiplexes the compression-encoded video signal and audio signal to generate an MPEG2-TS encoding program signal.

In the multiplexer 27, an encoded program signal input section 32 buffers encoded program signals output from each program encoding apparatus 26, and the program multiplexer 33 includes a plurality of encoded program signal input sections. 32,..., M, including a plurality of programs by time-division multiplexing the encoded program signals buffered in
Generate a streaming signal of the PEG2-TS system,
The CR adding unit 35 adds the time reference value information to the streaming signal. The operations of these units are performed in synchronization with the system clock output from the system clock generator 34.

[0007] The streaming signal thus generated is input to a separation decoder (not shown), where one encoded program signal is separated and decoded, and each program can be reproduced. Also, MP
In the EG2-TS (transport stream) system,
A synchronization count value of a system clock generation unit (not shown) of the separation decoder is set by the time reference value, and then, while counting the synchronization count value, for example, a time stamp attached to each frame is added to the video signal. Reproduction and decoding are performed at a timing that matches the synchronization count value.

FIG. 15 is a timing chart for explaining a normal process of generating a streaming signal of the MPEG2-TS system based on a plurality of encoding program signals. In the figure, (a) is the first encoded program signal, (b) is the n-th encoded program signal, and (c) is the encoded program signal input unit 32 based on the first encoded program signal. (D) is a reproduction system clock reproduced at the encoding program signal input unit 32 based on the n-th encoding program signal, and (e) is an MPEG including a plurality of programs.
This is a 2-TS streaming signal. Also, 36
Is a time reference reference packet individually for each encoded program signal, and 37 is a time reference reference packet after multiplexing in the streaming signal.
It should be noted that the reproduction STC value is shown in a simplified manner in the number of bits as compared with the actual reproduction STC value.

Then, as shown in FIGS. 1C and 1D, the system clock is reproduced by the encoding program signal input section 32, and each individual time reference packet is transmitted to the system at the respective multiplexing timing. It is changed to the clock synchronization count value and multiplexed as the multiplexed time reference value packet into the streaming signal shown in FIG.

By changing the time reference value in each encoded program signal to the value of the multiplexing timing, another encoded program signal is multiplexed into the streaming signal as shown in FIG. 16, for example. Therefore, even if an individual time reference packet is multiplexed due to extra buffering in the encoding program signal input unit 32 and a shift in timing, the value of the time reference reference packet after multiplexing is not changed. The clock can be synchronized with the system clock, and the separation decoder can reproduce the clock synchronized with the system clock based on the value of the multiplexed time reference value packet. In the figure, (a) is a first encoded program signal, (b) is an n-th encoded program signal,
(C) is an MPEG2-TS streaming signal including a plurality of programs.

[0011]

SUMMARY OF THE INVENTION Conventional MPEG2-T
Since the program multiplexing system that generates the S-system streaming signal is configured as described above, there is a problem that when switching the coded program signal to be separated from the streaming signal, it takes time to switch. Was.

A specific description will be given. As shown in FIG. 15E, the time reference value on the streaming signal has no relationship between the encoding programs. It is disjointed. Therefore, a separation decoder that separates and decodes an encoded program signal reproduces a system clock signal that is synchronized only with the encoded program signal that is separated and decoded, and uses this system clock signal as a reference time for each code. For example, a video frame of the converted program signal is reproduced.

Therefore, when switching the encoding program signal to be separated from the streaming signal, the system clock signal is first resynchronized by using the time reference value of the new encoding program signal, and then the resynchronized system signal is used. It is necessary to separate and decode the new encoded program signal using the clock signal, and the switching time is reduced by the resynchronization processing time of the system clock signal and the time until the start of the separation and decoding processing based on the system clock signal. There was a problem that it would take.

In particular, as described above, in the prior art, since no relationship is established between the time reference values of the encoded program signal before and after the switching, the system clock signal is resynchronized with the new encoded program signal. In some cases, it takes a long time to perform the switching, and in such a case, the switching time is particularly long.

The above publication discloses a circuit for preventing a deviation of the reference time as shown in FIG.
In the figure, reference numeral 36 denotes a station time code generator for outputting a reference time to the system clock generators 28,..., 28, 34. Each of the system clock generators 28,..., 28, 34 generates a respective synchronous count value based on the reference time. However, the synchronization count values in the system clock generators 28,..., Which should be generated in synchronism with the program signals such as video signals and audio signals which are originally input, are not associated with the station. Time code generator 36
If the control is performed based on the output time, the synchronization count value cannot be synchronized with the program signal. Therefore, it is not possible to add an accurate time reference value to this program signal.
-TS system violation.

In the above description, an example is described in which an encoded program signal to be separated from a streaming signal of the MPEG2-TS system is switched. However, in general, a plurality of program signals based on a predetermined program format are converted. A similar problem arises when switching an encoded program signal to be separated from one multiplexed signal to which a reproduction reference signal for receiving and reproducing each converted program signal is added while multiplexing the signals.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and provides a program multiplexing system capable of reducing a switching time when switching an encoded program signal to be separated from the multiplexed signal. The purpose is to:

[0018]

SUMMARY OF THE INVENTION A program multiplexing system according to the present invention converts and multiplexes a plurality of program signals based on a predetermined program format, and a reproduction reference signal for receiving and reproducing each converted program signal. In a program multiplexing system for generating one multiplexed signal, a synchronizing device for outputting a synchronizing signal at a predetermined frequency, the synchronizing signal being input, and synchronizing the synchronizing signal with each of the program signals And a plurality of program conversion devices connected to the program generation device for converting the program signals and adding the reproduction reference signal to generate a conversion program signal; and Multiplexing multiple conversion program signals output from the program conversion device It is intended and a multiplexer for generating a redundant signal.

A program multiplexing system according to the present invention encodes and multiplexes a plurality of program signals based on a predetermined program format to generate an MPEG2-TS streaming signal including a plurality of programs. A synchronization device that outputs a synchronization signal at a predetermined frequency, the synchronization signal is input, a plurality of program generation devices that output the respective program signals in synchronization with the synchronization signal, and the program generation device A plurality of program encoders connected to each other for encoding each of the program signals and adding time reference value information to generate an encoded program signal; and a plurality of MPEG2s output from the plurality of program encoders. -After multiplexing the TS program Including multiple program MPEG2-
And a multiplexing device for generating a streaming signal of the TS system.

In the program multiplexing system according to the present invention, each program encoding device performs a counting operation with a system clock synchronized with a video signal of a program signal,
A synchronous count value generating unit that outputs the count value as a synchronous count value, a video encoding unit that encodes the video signal, an audio encoding unit that encodes an audio signal of the program signal, A media multiplexing unit that multiplexes the video signal and the audio signal and adds time reference reference value information based on the synchronization count value to generate an encoded program signal; and A count value setting device for setting the same value to the synchronous count value generation unit is provided.

[0021] In the program multiplexing system according to the present invention, the count value setting device may be configured to execute all the program codes before the synchronization device starts outputting the synchronization signal and / or in synchronization with the synchronization signal of the synchronization device. The same value is set to the synchronization count value generator of the conversion device.

In the program multiplexing system according to the present invention, the multiplexing device is connected to a system clock generating unit that receives a synchronization signal and generates a system clock synchronized with the synchronization signal, and a program coding device, and the A plurality of encoded program signal input units for buffering the program signal and generating a synchronous count value counted in synchronization with the system clock with the time reference value information as an initial value; and the plurality of encoded program signals Time-division multiplexing of the encoded program signal buffered in the input unit to form a plurality of program MPEG2-TS
And a program multiplexing unit that generates a streaming signal of the system, wherein each of the encoded program signal input units converts the value of the time reference reference value information from the program multiplexing unit using the synchronization count value generated by the program multiplexing unit. This is to change to the value of the output timing.

In the program multiplexing system according to the present invention, the multiplexing device receives a synchronization signal and generates a system clock synchronized with the synchronization signal, and performs a counting operation using the generated system clock.
A common synchronization count value generation unit that outputs the count value as a common synchronization count value; a plurality of encoding program signal input units connected to the program encoding device, which buffer each encoding program signal; A program multiplexing unit for time-division multiplexing the coded program signal buffered in the coded program signal input unit to generate an MPEG2-TS streaming signal including a plurality of programs; Uses the common synchronization count value to change the value of the time reference value information to the value of the timing at which it is output from the program multiplexing unit.

In the program multiplexing system according to the present invention, the same value may be assigned to the common synchronization counter of the multiplexer before the synchronization device starts outputting the synchronization signal and / or in synchronization with the synchronization signal of the synchronization device. It is provided with a count value setting device to be set in the value generation unit.

In the program multiplexing system according to the present invention, each program encoding device adds reproduction and display timing information to the encoded video signal and audio signal for each reproduction unit, and The program signal input unit uses the respective synchronous count value or the common synchronous count value to change the value of the reproduction and display timing information of each video signal and audio signal to the value of the timing to output each from the program multiplexing unit. It is.

[0026]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below. Embodiment 1 FIG. FIG. 1 shows M according to Embodiment 1 of the present invention.
1 is a system configuration diagram showing a program multiplexing system according to the PEG2-TS system. In the figure, reference numeral 1 denotes a synchronizing device for outputting a synchronizing signal at a predetermined frequency, and 2 denotes a synchronizing signal input thereto. The synchronizing signal is frequency-synchronized with the synchronizing signal. A program generator for outputting a program signal including a moving image signal and an audio signal in a signal format such as a (phase alternation bi-line color television) system; A plurality of program encoders (program converters) for generating an encoded program signal of the MPEG2-TS system by adding time reference reference value information and multiplexing a plurality of encoded program signals to generate a plurality of programs MPEG2-TS format stream containing A multiplexer for generating a timing signal. In FIG. 1, the program generator 2 and the multiplexer 3 are directly connected in a one-to-one correspondence. However, for example, a plurality of program generators 2,... And the selector may select any one of the program generators 2 and connect it to the multiplexer 3.

In each of the program encoders 3, a video signal 5 is input and counts with a system clock synchronized with, for example, a frame pulse of the video signal.
A system clock generator (synchronous count value generator) that outputs the count value as a synchronous count value, 6 is a video encoder that compresses and encodes a video signal, 7 is an audio encoder that compresses and encodes an audio signal, Reference numeral 8 denotes a media multiplexing unit that multiplexes a compression-coded video signal and an audio signal to generate an MPEG2-TS coding program signal.

In the MPEG2-TS compression encoding process, the media multiplexing unit 8 decodes each compression encoded video signal and audio signal in units of reproduction (for example, frame units) based on the synchronization count value. A time stamp (display reproduction timing information) called a PTS (presentation time stamp) and / or a DTS (decoding time stamp) is added as a time management tag for the reproduction processing, and a decoding / reproducing device (not shown) is added based on the time stamp. In order to be able to reproduce and decode each video signal and audio signal at appropriate time intervals from an arbitrary timing, a PCR is performed on the encoded program signal based on the synchronization count value.
A time reference value called (program clock reference) is added. The media multiplexing unit 8 also multiplexes program management information such as PSI (program specific information).

The decoding / reproducing device sets a counter value to the value (time) indicated by the PCR at the timing of arrival of the last bit of the last byte of the bit string of the PCR, and at the timing when the counter value matches the time stamp. Each video signal and audio signal are reproduced and decoded or displayed and output. FIG. 2 is a block diagram showing a recommended configuration example of a system clock generation unit that counts the counter value in a decoder / reproducer that decodes / reproduces a predetermined encoded program signal from an MPEG2-TS streaming signal. In the figure, reference numeral 9 denotes an STC (system clock) counter to which a PCR is input and which is set to the PCR value at the last bit arrival timing.
Is a subtractor that calculates the difference between the count value of the STC counter and the PCR value, 11 is a D / A converter that outputs an analog level value corresponding to the digital value difference, and 12 is a D / A
A low-pass filter 13 for low-frequency filtering the output of the converter 11 is a voltage-controlled oscillator that oscillates at a frequency corresponding to the output voltage level of the low-pass filter 12. The clock signal output from the voltage controlled oscillator 13 is used as a system clock and is input to the STC counter 9, and the STC counter 9 performs a counting operation based on the clock signal.

In the multiplexing device 4, reference numeral 14 is connected to the program coding device 3, and a coded program signal input unit for buffering each coded program signal, and 15 is a plurality of coded program signal input units 3,.・
A program multiplexing unit that generates a plurality of MPEG2-TS streaming signals by time-division multiplexing the coded program signals buffered in 3; Then, each of the encoded program signal input units 3 according to the first embodiment reproduces the synchronization count value based on the buffered time reference value information, and outputs the time reference value information from the program multiplexer 15. In this case, the time reference value is changed and output using the synchronization count value at that time.

Next, the operation will be described. Synchronization device 1
Starts output of a synchronization signal at a predetermined frequency, each program generator 2 outputs a program signal including a moving image signal and an audio signal in a predetermined signal format in frequency synchronization with the synchronization signal. Each video encoding unit 6 compresses and encodes the moving image signal of the predetermined signal format and outputs an encoded video signal. Each audio encoding unit 7 compresses and encodes the audio signal of the predetermined signal format and encodes the encoded audio signal. Output a signal. In addition, while such an operation is performed,
For example, each system clock generating unit 5 performs a counting operation with a system clock synchronized with a frame pulse of a video signal or the like, outputs the count value as a synchronous count value, and each media multiplexing unit 8 performs the operation based on the synchronous count value. A time stamp is added to each encoded video signal or each encoded audio signal.

Each media multiplexing unit 8 time-division-multiplexes the coded video signal and the coded audio signal based on each program signal, and adds time reference value information at each predetermined timing. Each time reference value may be, for example, the above-mentioned synchronization count value at the last bit arrival timing of the last byte of the bit string.

When the plurality of program encoding devices 3,..., 3 generate encoded program signals including encoded video signals, encoded audio signals, and the like, each encoded program signal The data is buffered in the encoding program signal input unit 14. Further, each of the encoded program signal input units 14 reproduces the synchronous count value based on the buffered time reference value information. Specifically, the count value is set at the timing when the time reference value information is buffered. The program multiplexing device 15 performs time-division multiplexing on each of the encoded program signals stored in the plurality of encoded program signal input units 14,.
A streaming signal of the TS system is generated. At this time,
When outputting the time reference value information from the program multiplexing device 15, each encoded program signal input unit 14 changes the time reference value to the synchronous count value at that time and outputs it. Therefore, the time reference value of each coded program signal on the streaming signal is based on the synchronization count value reproduced by each coded program signal input unit 14, and the time reference reference value of each coded program signal is
Since the value at the timing output from the program signal, even if the multiplexing timing of each time reference value information to the streaming signal fluctuates according to the data amount of other encoded program signals, the frequency with the program signal The values will be optimally changed to maintain synchronization.

Accordingly, a decoding / reproducing device (not shown) sets the respective time reference values at the final bit arrival timing of the last byte of the time reference value information, and reproduces and counts the system clock based on the reference values. In addition, the synchronous count value whose frequency matches the synchronous count value generated by the system clock generating unit 5 can be reproduced.

Further, since the frequencies of all the encoded program signals are all the same frequency synchronized with the frequency of the synchronizing signal, the time reference reference value can be set between all the encoded program signals input to the decoding / reproducing device. If the period is the same frequency and the decoding / reproducing apparatus switches the encoding program signal to be separated / decoded, the decoding / reproducing apparatus operates to eliminate the phase difference between the time reference value information before and after the switching. Only need.

As described above, according to the first embodiment, a plurality of program signals based on a predetermined program format are encoded and further multiplexed, whereby MPEG2
In a program multiplexing system that generates a streaming signal of the TS system, a synchronization device 1 that outputs a synchronization signal at a predetermined frequency, the synchronization signal is input, and the program signals are synchronized with the synchronization signal to convert the program signals. A plurality of program generators 2,..., 2 to be output are connected to the program generator 2, and each of the program signals is encoded, and time-based reference value information is added to generate an encoded program signal. A plurality of program encoding devices 3,..., And a plurality of encoded program signals output from the plurality of program encoding devices 3,.
Since it has a multiplexing device 4 that generates a 2-TS streaming signal, each program signal is input to each program encoding device 3 in a state where their frequencies are synchronized with each other. The time reference reference values generated in step 3 also have the same frequency.

Therefore, in the streaming signal, the frequency of the time reference value of each coded program signal coincides with each other. Therefore, when switching the coded program signal to be separated from the streaming signal, based on the time reference value. The generated time signal only needs to fluctuate for a period during which only the phase difference between the time reference values before and after switching is eliminated, and the fluctuation period is shorter than when the time reference values before and after switching are not frequency synchronized. can do. As a result, there is an effect that the switching time when switching the encoded program signal to be separated from the streaming signal can be reduced.

Embodiment 2 FIG. 3 is a system configuration diagram showing a program multiplexing system according to the MPEG2-TS system according to a second embodiment of the present invention. In the figure,
Reference numeral 16 denotes a synchronizing device (count value setting device) which outputs a synchronization signal at a predetermined frequency and outputs STC initial value information prior to the start of output of the synchronization signal. A system clock generation unit (synchronization count value generation unit) that sets initial value information, performs a count operation with a system clock synchronized with, for example, a frame pulse of a video signal, and outputs the count value as a synchronization count value. The other configuration is the same as that of the first embodiment, and the description is omitted.

Next, the operation will be described. Synchronization device 1
6, the STC initial value information is output from all the system clock generators 17,.
7 is set as the count initial value. In this state, when the synchronization device 16 starts outputting a synchronization signal at a predetermined frequency, a program signal is output from each program generation device 2 in synchronization with the frequency, and each system clock generation unit 17 outputs the count initial value. Start counting from.
Other operations are the same as those in the first embodiment, and a description thereof will be omitted.

As described above, according to the second embodiment, all system clock generators 17,.
Is provided, a synchronization device for initializing the same value is provided, so that the count values of the system clock generators can be made substantially the same value. As a result, the time of each encoded program signal in the streaming signal can be reduced. The frequencies and values of the reference reference values can be substantially the same. Therefore, a large phase difference does not occur between the time reference values before and after the switching, and as a result, the phase difference can be eliminated earlier than in the first embodiment. There is an effect that the switching time when switching the program signal can be further reduced. In particular, the synchronizer 16 outputs the common value to all the system clock generators 17, before outputting the synchronization signal.
., 17 so that the values can be matched without increasing the circuit scale.

FIG. 4 is a timing chart for explaining a streaming signal and its separation / decoding processing according to the second embodiment of the present invention. In the figure, (a) is a streaming signal in which a plurality of encoded program signals are multiplexed, (b) is a PCR of an encoded program signal decoded by the demultiplexer before switching, and (c) is a demultiplexer. This is a PCR of an encoded program signal to be decoded after switching. In addition,
In the figure, for the sake of simplicity of explanation, a 42-bit PCR
Are represented as 6 bits. As shown in the figure, since the PCRs of the encoded program signal before and after the switching are synchronized in frequency, for example, even if the switching occurs in the separating decoder at the timing of T1 in FIG. Then, the next PCR is received with a delay corresponding to the phase difference between the PCRs (delayed in the figure), and in the second embodiment, the values of these PCRs are almost the same. In the system clock generator shown in FIG. 2, the system clock and the synchronous count value fluctuate only for a very short time to eliminate the extremely small phase difference. That is, since the initial value of the difference between the values generated in the subtractor 10 is small, the system clock and the synchronous count value can be stabilized earlier.

Embodiment 3 FIG. 5 is a system configuration diagram showing a program multiplexing system according to the MPEG2-TS system according to a third embodiment of the present invention. In the figure,
Reference numeral 18 denotes a synchronizing device (count value setting device) which outputs a synchronizing signal at a predetermined frequency and outputs a predetermined value of STC setting value information in synchronization with the synchronizing signal. The STC setting value information is set, and a count operation is performed with a system clock synchronized with, for example, a frame pulse of a video signal, and a system clock generating unit (synchronous count value generating unit) that outputs the count value as a synchronous count value. is there. The other configuration is the same as that of the first embodiment, and the description is omitted.

Next, the operation will be described. Synchronization device 1
When the STC setting value information is output from 8, the STC setting value is set in all the system clock generators 19,..., 19 as the count value at that time. On the other hand, when the synchronizing device 18 starts outputting a synchronizing signal at a predetermined frequency, each program generating device 2
Outputs a program signal, and each system clock generator 19 starts counting from the count setting value. Other operations are the same as those in the first embodiment, and a description thereof will be omitted.

As described above, according to the third embodiment, all system clock generators 19,.
Is provided, the count value between the system clock generators 19 can be set to the same value each time, and as a result, each code in the streaming signal can be set to the same value. The frequency and the value between the time reference values of the structured program signal can be substantially the same. Therefore, a large phase difference does not occur between the time reference values before and after the switching, and as a result, this phase difference can be eliminated quickly. Therefore, when switching the encoded program signal to be separated from the streaming signal, Has the effect of further reducing the switching time. In particular, since the synchronization device 18 sets the same value in synchronization with the synchronization signal, a configuration such as a counter for the synchronization signal is required, but a new program signal is added while another program signal is continuously output. It is also possible to add it to one streaming signal, thereby providing effects such as greater flexibility than in the second embodiment.

Embodiment 4 FIG. 6 is a system configuration diagram showing a program multiplexing system according to the MPEG2-TS system according to a fourth embodiment of the present invention. In the figure,
Reference numeral 20 denotes a system clock generating unit which receives a synchronization signal and generates a system clock synchronized with the synchronization signal. Reference numeral 21 denotes a system clock generator which is connected to the program encoder 3 to buffer each encoded program signal and to store time reference reference value information. Is an encoded program signal input unit that generates a synchronous count value counted in synchronization with the system clock with the initial value as an initial value. Then, when each encoded program signal input unit 21 outputs the buffered time reference value information from the program multiplexing device 15, the encoded program signal input unit 21 changes the time reference value using the synchronization count value at that time. And output. The other configuration is the same as that of the first embodiment, and the description is omitted.

Next, the operation will be described. Each of the encoded program signal input units 21 reproduces the synchronous count value based on the buffered time reference value information and the system clock from the system clock generation unit 20. The program multiplexing device 15 time-division multiplexes each of the encoded program signals stored in the plurality of encoded program signal input units 21,. Generate. At this time, each encoded program signal input unit 2
When the time reference value information is output from the program multiplexing device 15, the time reference value is changed and output using the synchronization count value at that time.

Therefore, the time reference reference value of each encoded program signal on the streaming signal is output from the program multiplexing device 15 while referring to the synchronous count value reproduced at each encoded program signal input section 21. Even if the multiplexing timing of each time reference value information to the streaming signal fluctuates according to the data amount of another encoded program signal, the frequency synchronization with the program signal is performed because The value will be changed to keep it. Other operations are the same as those in the first embodiment, and a description thereof will be omitted.

As described above, according to the fourth embodiment, the system clock generating section 20 generates a system clock synchronized with the synchronization signal, and each of the encoding program signal input sections 21 uses this system clock to synchronize. Since the count value is generated, each encoded program signal input unit 21
In this case, there is no need to individually reproduce the system clock, and the circuit scale can be reduced accordingly.

In the fourth embodiment, the first embodiment is used.
Although the system clock signal of the program multiplexing device 15 is made common on the premise of the above, the same effect can be obtained by performing the same processing on the premise of another embodiment. FIG. 7 is a system configuration diagram of a program multiplexing system based on the second embodiment, and FIG. 8 is a system configuration diagram of a program multiplexing system based on the third embodiment. In these drawings, each part is the same as the corresponding component of the second to fourth embodiments, and the same reference numerals are given and the description is omitted.

Embodiment 5 FIG. 9 is a system configuration diagram showing a program multiplexing system according to the MPEG2-TS system according to a fifth embodiment of the present invention. In the figure,
Reference numeral 22 denotes a common synchronization count value generating unit for receiving a synchronization signal, performing a count operation using a system clock synchronized with the synchronization signal, and outputting the count value as a common synchronization count value. And a plurality of encoded program signal input units for buffering each encoded program signal. Each of the encoded program signal input units 23 receives the buffered encoded program signal from the program multiplexing device 1.
When outputting from 5, the above-mentioned synchronization count value at that time is used as a time reference value, and the time stamp is changed using this value and output. The other configuration is the same as that of the first embodiment, and the description is omitted.

Next, the operation will be described. When a synchronization signal is output from the synchronization device, the common synchronization count value generation unit 22 performs a counting operation using a system clock synchronized with the synchronization signal, and outputs the count value as a common synchronization count value. Further, each encoded program signal input unit 2
3 uses this synchronous count value as a common time reference value, and uses this value to change the time stamp to convert each encoded program signal into the program multiplexing device 1.
Output to 5

Therefore, the time stamp and the time reference reference value of each coded program signal on the streaming signal are based on the synchronization count value received at each coded program signal input unit 23, and each of them is a program multiplexer. 15 is the value at the timing output from the program signal 15, even if the multiplexing timing of each time reference value information to the streaming signal fluctuates according to the data amount of another encoded program signal, etc. The value will be changed to maintain frequency synchronization. Other operations are the same as those in the first embodiment, and a description thereof will be omitted.

As described above, according to the fifth embodiment, the common synchronization count value generator 24 outputs the common synchronization count value synchronized with the synchronization signal, and each encoded program signal input unit 23 outputs the common synchronization count value. Since the respective encoded program signals are output through the program multiplexing device 15 with the values as common time reference value information, there is no need to individually reproduce the system clock in each encoded program signal input unit 23. Since the circuit scale can be reduced, and the difference between the time reference values before and after separation is eliminated, the system clock fluctuation at the time of program switching in the separation decoder is eliminated.

At the same time, since each time stamp is also changed using the common synchronization count value, all time stamps and all time reference values can be arranged in chronological order on the streaming signal. Along with the stabilization of the system clock, normal reproduction can be immediately and immediately performed in order from the new encoded program signal immediately after the switching, and the time lag due to the switching time can be eliminated.

Embodiment 6 FIG. FIG. 10 is a system configuration diagram showing a program multiplexing system according to the MPEG2-TS system according to a sixth embodiment of the present invention. In the figure, reference numeral 24 denotes a common synchronization circuit which receives a synchronization signal and STC initial value information, performs a counting operation using a system clock synchronized with the synchronization signal using the STC initial value as an initial value, and outputs the count value as a common synchronization count value. It is a count value generator. Other configurations are the same as those in FIG. 3 and FIG.

Next, the operation will be described. Synchronization device 1
6 outputs the STC initial value information, the STC initial value is output to all the system clock generators 17,.
7 and the common synchronization count value generation unit 24. Further, when the synchronization signal is output from the synchronization device 16, all the program generation devices 2,.
, 2 output the respective program signals in synchronization with the frequency of the synchronization signal, and the common synchronization count value generation unit 24 starts counting from the STC initial value. Further, each program encoding device 3 starts counting the synchronous count value based on the program signal input thereto, and adds a timestamp and a time reference value to each encoded program signal based on this.

Therefore, each encoded program signal input unit 2
Reference numeral 3 indicates a delay time of a signal in a signal path from each of the program generators 2 based on a difference between a time stamp or a time reference value in the coded program signal input thereto and the common synchronization count value. For example, if there is no difference between the delay times in a plurality of coded program signal input sections, a simple delay such that only the multiplex processing delay time difference to the streaming signal is eliminated for all timestamps. By only adding / subtracting the time difference, all time stamps and time reference values can be arranged in a precise time-series order on the streaming signal.

FIG. 11 is a timing chart for explaining the replacement processing of the encoded program signal input section 23 in the sixth embodiment. In the figure, (a) is an encoded program signal input to one encoded program signal input unit 23, (b) is another encoded program signal input to another encoded program signal input unit 23,
(C) is a streaming signal. Then, as shown in the figure, when the multiplexing timing of the second time reference value of another encoded program signal is shifted from the multiplex timing of the other time reference value due to the multiplexing delay. Can be set as an accurate time reference value simply by adding a time corresponding to the shifted period to the second time reference value. Note that this shifted period can be measured using a system clock signal or the like. Other operations are the same as those in the second and fifth embodiments, and a description thereof will be omitted.

As described above, according to the sixth embodiment, the same value as that of the system clock generation unit 17 is set in the common synchronization count value generation unit 24 before the synchronizer 16 starts outputting the synchronization signal. Therefore, the process of replacing the time stamp or the time reference value in the encoding program signal input unit 23 can be a simple addition / subtraction process, and the values can be matched without increasing the circuit scale.

Further, by configuring the multiplexing device 4 such that the STC value can be set from the outside such as the synchronizer 16 as in the sixth embodiment, for example, the output of a plurality of multiplexing devices can be set. Even if it is a case where some multiplexing devices are started to operate later between a plurality of multiplexing devices having a redundant configuration, as in the case of generating one streaming signal by further multiplexing, It is also possible to obtain an effect that the common synchronization count value of the subsequent multiplexing device can completely match the common synchronization count value of the preceding multiplexing device.

Embodiment 7 FIG. FIG. 12 is a system configuration diagram showing a program multiplexing system according to the MPEG2-TS system according to the seventh embodiment of the present invention. In the figure, reference numeral 25 denotes a common synchronization count value generation unit which receives a synchronization signal and STC setting value information, performs a counting operation in synchronization with the synchronization signal from the STC setting value, and outputs the count value as a common synchronization count value. . Other configurations are the same as those in FIGS. 5 and 9 and description thereof is omitted.

Next, the operation will be described. Synchronization device 1
8 outputs the STC set value information, the STC set value is output to all the system clock generators 19,.
9 and the common synchronization count value generation unit 25. Further, when the synchronization signal is output from the synchronization device 18, all the program generation devices 2,.
, 2 output the respective program signals in frequency synchronization with the synchronization signal, and the common synchronization count value generation unit 25 starts counting from the STC set value. Further, each program encoding device 3 starts counting the synchronous count value based on the program signal input thereto, and adds a timestamp and a time reference value to each encoded program signal based on this.

Therefore, each encoded program signal input unit 2
Reference numeral 3 indicates a delay time of a signal in a signal path from each of the program generators 2 based on a difference between a time stamp or a time reference value in the coded program signal input thereto and the common synchronization count value. For example, if there is no difference between the delay times in a plurality of coded program signal input sections, a simple delay such that only the multiplex processing delay time difference to the streaming signal is eliminated for all timestamps. By only adding / subtracting the time difference, all time stamps and time reference values can be arranged in a precise time-series order on the streaming signal. Other operations are the same as those in the second and fifth embodiments, and a description thereof will be omitted.

As described above, according to the seventh embodiment, the synchronizer 18 sets the same value in the common synchronization count value generator 25 in synchronization with the synchronization signal. Although a configuration such as a counter for a synchronization signal is necessary, even when a new program signal is added while another program signal is continuously output, all the time stamps and time reference values are stored in one. It is also possible to generate a streaming signal in a time series, which has an effect of effectively shortening the switching time while being rich in flexibility.

Further, by configuring the multiplexer 4 so that the STC value can be set from the outside such as the synchronizer 18 as in the seventh embodiment, for example, the output of a plurality of multiplexers can be set. Even if it is a case where some multiplexing devices are started to operate later between a plurality of multiplexing devices having a redundant configuration, as in the case of generating one streaming signal by further multiplexing, It is also possible to obtain an effect that the common synchronization count value of the subsequent multiplexing device can completely match the common synchronization count value of the preceding multiplexing device.

The effect of shortening the program switching time can be obtained by appropriately combining the components described in the above embodiments. An example is shown in FIG. In the figure, each component is the same as that given the same reference numeral in the above embodiment.

In the above embodiment, a program multiplexing system for generating a streaming signal of the MPEG2-TS system by encoding and multiplexing a plurality of program signals based on a predetermined program format has been described as an example. The effects shown in these embodiments are not limited to those of the MPEG2-TS system, and a plurality of program signals based on a predetermined program format are converted and multiplexed, and each converted program signal is received. A similar effect can be expected with a program multiplexing system that generates one multiplexed signal to which a reproduction reference signal for reproduction is added.

In this case, the program multiplexing system basically includes a synchronizing device for outputting a synchronizing signal at a predetermined frequency, the synchronizing signal being input, and synchronizing the synchronizing signal with each of the program signals. And a plurality of program conversion devices connected to the program generation device for converting the program signals and adding the reproduction reference signal to generate a conversion program signal; and A multiplexing device may be configured to multiplex a plurality of conversion program signals output from the program conversion device and generate the multiplexed signal.

[0069]

As described above, according to the present invention, a plurality of program signals based on a predetermined program format are converted and multiplexed, and a reproduction reference signal for receiving and reproducing each converted program signal is added. In a program multiplexing system that generates one multiplexed signal, a synchronizer that outputs a synchronization signal at a predetermined frequency, the synchronization signal is input, and the program signals are output in synchronization with the synchronization signal. A plurality of program generators, a plurality of program converters connected to the program generator to convert each of the program signals and add the reproduction reference signal to generate a conversion program signal, and the plurality of program converters Multiplexing a plurality of conversion program signals output from the multiplexed signal to generate the multiplexed signal Device, each program signal is input to each program conversion device in a state where their frequencies are synchronized, and as a result, the reproduction reference signal generated by each program conversion device also has a frequency synchronized with each other. Become.

Therefore, the frequency of the reproduction reference signal of each conversion program signal is also synchronized with each other in the multiplexed signal. Therefore, when the conversion program signal to be separated from the multiplexed signal is switched, the frequency is generated based on the reproduction reference signal. The time signal changes only during a period in which only the phase difference between the reproduction reference signals before and after the switching is eliminated, and the fluctuation period can be shorter than when the reproduction reference signals before and after the switching are not frequency-synchronized. As a result, there is an effect that the switching time when switching the conversion program signal to be separated from the multiplexed signal can be reduced.

According to the present invention, a plurality of program signals based on a predetermined program format are encoded and multiplexed, so that MPEG2-T including a plurality of programs is encoded.
In a program multiplexing system that generates an S-system streaming signal, a synchronization device that outputs a synchronization signal at a predetermined frequency, the synchronization signal is input, and the program signals are output in synchronization with the synchronization signal. A plurality of program generators, a plurality of program encoders connected to the program generator, each of which encodes the program signal and generates an encoded program signal by adding time reference value information; and MPEG2-T output from the program encoding device of
Multiplexing the S-system coded program signal to the MPE
Since a multiplexing device that generates a G2-TS streaming signal is provided, each program signal is input to each program conversion device in a state where their frequencies are synchronized, and as a result, each program signal is generated by each program conversion device. The time reference value also has the same frequency.

Therefore, since the frequency of the time reference value of each coded program signal also coincides with that of the streaming signal, when switching the coded program signal to be separated from the streaming signal, it is determined based on the time reference value. The generated time signal fluctuates only during the period in which only the phase difference between the time reference reference values before and after the switching is eliminated, and the fluctuation period is shortened compared to the case where the time reference reference values before and after the switching are not frequency synchronized. be able to. As a result, there is an effect that the switching time when switching the encoded program signal to be separated from the streaming signal can be reduced.

According to the present invention, each of the program encoding devices performs a count operation with a system clock synchronized with the video signal of the program signal, and outputs the count value as a synchronous count value. A video encoding unit that encodes a video signal; an audio encoding unit that encodes an audio signal of the program signal; and a time that multiplexes the encoded video signal and the audio signal and that is based on the synchronization count value. A media multiplexing unit that generates an encoded program signal by adding reference reference value information, and a count value setting device that sets the same value to a synchronous count value generating unit of all program encoding devices , The count value of each synchronous count value generation unit can be the same value, and each encoding The frequency and the value of each other clock reference grams signals can be substantially the same.

Accordingly, there is no large phase difference between the time reference values before and after the switching, and as a result, this phase difference can be eliminated quickly, so that the switching time for switching the coded program signal to be separated from the streaming signal is reduced. Is further reduced.

The count value setting device may, for example, execute the synchronization count value of all the program encoding devices before the synchronization device starts outputting the synchronization signal and / or in synchronization with the synchronization signal of the synchronization device. What is necessary is just to set the same value to the generation unit. If the former can be preset, means for setting the value may be provided, so that the values can be matched without increasing the circuit scale. When the latter is to be sequentially synchronized, Although a configuration such as a counter for a synchronizing signal is required, it is possible to generate one streaming signal by adding a new program signal while continuously outputting another program signal, which is very flexible. And so on.

According to the present invention, the multiplexing device is connected to the system clock generating unit that receives the synchronization signal and generates a system clock synchronized with the synchronization signal, and the program encoding device, and buffers each encoded program signal. A plurality of encoded program signal input units that generate a synchronous count value which is counted in synchronization with the system clock with the time reference reference value information as an initial value,
A program multiplexing unit for generating an MPEG2-TS streaming signal including a plurality of programs by time-division multiplexing the coded program signals buffered in the plurality of coded program signal input units; The program signal input unit changes the value of the time reference value information to the value of the timing to output it from the program multiplexing unit using the synchronization count value generated by each of them. Therefore, there is no need to regenerate the system clock, and the circuit scale can be reduced accordingly.

According to the present invention, the multiplexer receives a synchronization signal, and generates a system clock synchronized with the synchronization signal. The multiplexer performs a counting operation using the generated system clock, and counts the count value. A common synchronization count value generation unit that outputs a common synchronization count value; a plurality of encoding program signal input units connected to the program encoding device, which buffer each encoding program signal; and the plurality of encoding program signal inputs And a program multiplexing unit for generating an MPEG2-TS streaming signal including a plurality of programs by time-division multiplexing the coded program signals buffered in the unit. Using the count value, program-multiplex the value of the time reference value information. Since change of the value of the output timing of the parts, it is not necessary to reproduce a system clock individually in each encoded program signal input section, there is an effect that it is possible to reduce the circuit scale. In addition, since the values are common, there is an effect that switching is further accelerated.

According to the present invention, before the synchronization device starts outputting the synchronization signal and / or in synchronization with the synchronization signal of the synchronization device, the same value is sent to the common synchronization count value generation section of the multiplexer. Since the count value setting device for setting is provided, if the former preset is possible, means for setting the value may be provided, so that the values can be matched without increasing the circuit scale, In order to achieve the latter sequential synchronization, a configuration such as a counter for a synchronization signal is necessary, but it is also possible to generate one streaming signal by adding a new program signal while continuing to output another program signal. It is possible and has effects such as high flexibility.

According to the present invention, each program encoding device adds reproduction and display timing information to the encoded video signal and audio signal for each reproduction unit, and outputs each encoded program signal input section. Changes the value of the reproduction and display timing information of each video signal and audio signal to the value of the timing output from the program multiplexing unit using the respective synchronization count value or the common synchronization count value. , The values of all the time reference value information and the values of all the reproduction timing information can be arranged in chronological order.

Accordingly, there is no large phase difference between the time reference values before and after the switching, and a new coded program signal can be separated immediately based on the time reference value immediately switched. There is an effect that the switching time at the time of switching can be further reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram of an MPEG-2 according to a first embodiment of the present invention.
FIG. 1 is a system configuration diagram showing a program multiplexing system based on the TS system.

FIG. 2 is a block diagram showing an example of a recommended configuration of a system clock generator for counting the counter value in a decoder / reproducer that decodes / reproduces a predetermined encoded program signal from an MPEG2-TS streaming signal.

FIG. 3 is a diagram showing an MPEG2-based embodiment 2 of the present invention.
FIG. 1 is a system configuration diagram showing a program multiplexing system based on the TS system.

FIG. 4 is a timing chart for explaining a streaming signal and a separation / decoding process thereof according to the second embodiment of the present invention;

FIG. 5 is a diagram illustrating an MPEG2-based embodiment 3 of the present invention.
FIG. 1 is a system configuration diagram showing a program multiplexing system based on the TS system.

FIG. 6 is a diagram showing an MPEG2-based embodiment 4 of the present invention.
FIG. 1 is a system configuration diagram showing a program multiplexing system based on the TS system.

FIG. 7 is a system configuration diagram showing a modified example (1) of the program multiplexing system according to the fourth embodiment of the present invention.

FIG. 8 is a system configuration diagram showing a modification (part 2) of the program multiplexing system according to the fourth embodiment of the present invention.

FIG. 9 is a diagram illustrating an example of an MPEG2-type embodiment 5 according to the present invention.
FIG. 1 is a system configuration diagram showing a program multiplexing system based on the TS system.

FIG. 10 shows MPEG2 according to Embodiment 6 of the present invention.
FIG. 1 is a system configuration diagram showing a program multiplexing system according to a -TS system.

FIG. 11 is a timing chart illustrating a process of replacing an encoded program signal input unit according to the sixth embodiment.

FIG. 12 shows MPEG2 according to a seventh embodiment of the present invention.
FIG. 1 is a system configuration diagram showing a program multiplexing system according to a -TS system.

FIG. 13 is a system configuration diagram showing a modification of the program multiplexing system according to the seventh embodiment of the present invention.

FIG. 14 is a system configuration diagram showing a configuration of a conventional program multiplexing system that generates a streaming signal of the MPEG2-TS system.

FIG. 15 is a diagram showing an example of M based on a plurality of encoded program signals.
6 is a timing chart for explaining a normal process of generating a streaming signal of the PEG2-TS system (part 1).

FIG. 16 is a diagram showing a case where M is determined based on a plurality of encoded program signals.
5 is a timing chart for explaining a normal process of generating a streaming signal of the PEG2-TS system (part 2).

FIG. 17 is a system configuration diagram showing a configuration of another program multiplexing system for generating a conventional MPEG2-TS streaming signal.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 synchronization device, 2 program generation device, 3 program encoding device (program conversion device), 4 multiplexing device, 5 system clock generation unit (synchronous count value generation unit), 6 video encoding unit, 7 audio encoding unit , 8 media multiplexing section, 9 STC counter, 10 subtractor, 1
1 D / A converter, 12 low-pass filter, 13
Voltage-controlled oscillator, 14 coded program signal input unit, 15 program multiplexing device, 16 synchronizer (count value setting device), 17 system clock generator (synchronous count value generator), 18 synchronizer (count value setting) Device), 19 system clock generator (synchronous count value generator), 20 system clock generator, 2
1 coded program signal input unit, 22 common synchronization count value generation unit, 23 coded program signal input unit, 2
4 Common synchronization count value generator, 25 Common synchronization count value generator.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Kunio Shibata, Inventor F-term (reference), 2-3-2 Marunouchi 2-chome, Chiyoda-ku, Tokyo 5C059 MA00 MA01 RC02 RC03 RC04 RC24 RC31 UA02 UA05 UA12 5C063 AB03 AB07 CA11 CA14 5K028 KK01 LL12 MM08 MM12 MM16 RR02

Claims (8)

[Claims] 1. Program multiplexing for converting and multiplexing a plurality of program signals based on a predetermined program format and generating one multiplexed signal to which a reproduction reference signal for receiving and reproducing each converted program signal is added. In the system, a synchronization device that outputs a synchronization signal at a predetermined frequency, a plurality of program generation devices that receive the synchronization signal and output the respective program signals in synchronization with the synchronization signal, and the program generation device A plurality of program conversion devices that are connected to each other and convert the respective program signals and add the reproduction reference signal to generate a conversion program signal; and multiplex a plurality of conversion program signals output from the plurality of program conversion devices. Multiplexing device for generating the multiplexed signal by multiplexing System. 2. A program multiplexing system that generates an MPEG2-TS streaming signal including a plurality of programs by encoding and multiplexing a plurality of program signals based on a predetermined program format, wherein the synchronization is performed at a predetermined frequency. A synchronizing device that outputs a signal; a plurality of program generating devices that receive the synchronizing signal, output the program signals in synchronization with the synchronizing signal; and are connected to the program generating device, and A plurality of program encoding devices for encoding and adding time-base reference value information to generate an encoded program signal, and MPEs output from the plurality of program encoding devices
A multiplexing system comprising: a multiplexing device that multiplexes a plurality of G2-TS coded program signals to generate an MPEG2-TS streaming signal including the plurality of programs. 3. A program counting device, comprising: a count operation unit that counts with a system clock synchronized with a video signal of a program signal, and outputs a count value as a sync count value; A video encoding unit for encoding, an audio encoding unit for encoding the audio signal of the program signal, and time reference reference value information based on the synchronization count value while multiplexing the encoded video signal and audio signal. And a count value setting device for setting the same value to the synchronous count value generation units of all the program coding devices. 3. The program multiplexing system according to claim 2, wherein: 4. The count value setting device, wherein before the synchronizer starts outputting the synchronization signal and / or in synchronization with the synchronization signal of the synchronizer, the synchronous count value generators of all the program encoders are provided. 4. The program multiplexing system according to claim 3, wherein the same value is set for the program. 5. A multiplexing device, to which a synchronizing signal is input and which generates a system clock synchronized with the synchronizing signal, is connected to a program coding device, buffers each of the coded program signals, and A plurality of encoded program signal input units for generating a synchronous count value counted in synchronization with the system clock with the time reference value information as an initial value; and a code buffered in the plurality of encoded program signal input units. Including a plurality of programs by time-division multiplexing of
A program multiplexing unit that generates a PEG2-TS streaming signal, wherein each of the encoded program signal input units program-multiplexes the value of the time reference value information using the synchronization count value generated by the program multiplexing unit. 3. The program multiplexing system according to claim 2, wherein the value is changed to a timing value output from the multiplexing unit. 6. A multiplexing device, to which a synchronization signal is inputted, a system clock generation unit for generating a system clock synchronized with the synchronization signal, a counting operation with the generated system clock, and the counting value being a common synchronization count value. A plurality of encoded program signal input units connected to the program encoding device for buffering each encoded program signal, and buffering the plurality of encoded program signal input units. And a program multiplexing unit for generating an MPEG2-TS streaming signal including a plurality of programs by time-division multiplexing the coded program signals. To output the value of the time reference reference value information from the program multiplexing unit. 3. The program multiplexing system according to claim 2, wherein the value is changed to an imming value. 7. A count value for setting the same value to a common synchronization count value generator of a multiplexer before the synchronization device starts outputting a synchronization signal and / or in synchronization with the synchronization signal of the synchronization device. 7. The program multiplexing system according to claim 6, further comprising a setting device. 8. Each program encoding device adds reproduction and display timing information to the encoded video signal and audio signal for each reproduction unit, and each encoded program signal input section 7. The method according to claim 6, wherein the value of the reproduction and display timing information of each video signal and audio signal is changed to the value of the timing output from the program multiplexing unit using the synchronization count value or the common synchronization count value. The program multiplexing system according to claim 7.