JP2001345996A - Image reader - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an image reader which can reduce its size and current consumption by suppressing increase of the number of read signal processing means that is caused by increase of the number of image reading means. SOLUTION: A read signal processing circuit 120 is provided for two CCD sensors, CCD1 and CCD2. An SW circuit 121 included in the circuit 120 switches and outputs the output signals of CCD1 and CCD2 in sequence and at a prescribed time interval. The switching output from the circuit 121 performs the sample holding processing and amplification processing by an S/H circuit 122 and an amplifier circuit 123 respectively and then is outputted from an output circuit 124. Thus, the read signals from CCD1 and CCD2 can be processed by a single read signal processing path by multiplexing the two output signals of CCD1 and CCD2 in terms of time and processing them with the same signal processing path.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image reading apparatus used in a facsimile apparatus, a copying machine, a handy scanner, and the like, and more particularly, to an improvement in the structure of a read signal processing circuit when a plurality of image reading means are provided.

[0002]

2. Description of the Related Art In an image reading apparatus, a CCD (Charge) is used as image reading means for reading characters or images on a document.
Coupled device (charge coupled device) sensors are known.

A CCD sensor is an image sensor that receives reflected light of light applied to a document to be read and outputs an electric signal at a voltage level corresponding to the amount of light received. In this photoelectric conversion process, the CCD sensor outputs a signal corresponding to a difference from a preset reference level as the electric signal. This output signal reflects the density of characters or images on the document, and processing of this signal makes it possible to read the document.

As a general form of the read signal processing, C
The signal output from the CD sensor (the difference signal) is amplified by an analog amplifier, then converted from an analog signal to a digital signal by an A / D converter, and then processed as digital data.

That is, an analog amplifier is indispensable for a read signal processing circuit of a CCD sensor. In the case of a handy scanner or the like, an amplified signal is sent to an A / D converter in an external device at a stage subsequent to the analog amplifier. An output circuit for outputting is also required.

By the way, the CCD sensor is usually smaller than the size of the original, and when reading an image on the original, a method of arranging a plurality of CCD sensors in a line is adopted.

Under these conditions, a conventional image reading apparatus employs a configuration in which an analog amplifier, an output circuit, and the like are provided for each CCD sensor. In the configuration of this conventional apparatus, for example, if an attempt is made to increase the number of CCD sensors to enable reading of a document of a larger size, an analog amplifier and an output circuit must be provided for each CCD sensor, and the size of the CCD sensor becomes large. And the current consumption has increased.

[0008]

As described above, in the conventional image reading apparatus, when a plurality of image reading means such as CCD sensors are used, an amplifier for amplifying an output signal of the image reading means and a signal after the amplification are used. Since the read signal processing means including an output circuit for outputting to the outside is provided for each image reading means, when the number of image reading means is increased for the purpose of, for example, enabling reading of a document of a larger size, this increase is required. The number of read signal processing means must be increased by the number of image reading means, which causes a problem that the size is increased and the current consumption is increased.

The present invention eliminates the above-mentioned problems, suppresses an increase in the number of read signal processing means due to an increase in the number of image reading means, and can maintain a reduction in size and current consumption. It is an object of the present invention to provide an image reading apparatus capable of reducing the cost of the image reading apparatus.

[0010]

According to one aspect of the present invention, there is provided an image reading means for optically reading a character or image on a document and converting the character or image into an electric signal;
An image reading apparatus comprising: a read signal processing unit including at least an amplification unit that amplifies an output signal of the image reading unit; and an output unit that outputs a signal processed by the read signal processing unit to the outside. And a signal switching means for sequentially switching output signals of the plurality of image reading means at predetermined time intervals and sending the signals to the reading signal processing means, and outputting the output signals of the plurality of image reading means. It is characterized in that it is temporally multiplexed and processed by the same read signal processing means.

According to a second aspect of the present invention, in the first aspect of the present invention, a plurality of sets of read signal processing means and signal switching means corresponding to the read signal processing means are provided, and Are connected to two or more image reading means.

According to a third aspect of the present invention, in the second aspect of the present invention, there is provided a signal processing device comprising:
The above image reading means are image reading means adjacent to each other.

According to a fourth aspect of the present invention, in the second aspect of the present invention, there is provided a signal processing device comprising:
The above image reading means are image reading means which are not adjacent to each other.

According to a fifth aspect of the present invention, in the first aspect, the image reading means is a CCD image sensor using a charge-coupled device (CCD).

[0015]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram showing a circuit configuration of an image reading apparatus according to one embodiment of the present invention.

In FIG. 1, an image reading apparatus 10 includes two CCD sensors 110-1 (hereinafter, referred to as image reading means) serving as image reading means.
CCD1) and 110-2 (also abbreviated as CCD2), one read signal processing circuit 120 shared by the CCD1 and CCD2, and
And a timing control unit 130 that performs timing control relating to the image reading operation of the CD2.

In this image reading apparatus 10, the CCD 1
And the read signal processing circuit 120 shared by the CCD 2
A signal switching circuit (hereinafter referred to as a SW circuit) 121 for sequentially switching signals (reading signals) separately output from the CCD 1 and the CCD 2 at predetermined time intervals corresponding to the CCD 1 and the CCD 2, respectively, and the SW circuit 121
A sample-and-hold (S / H) circuit 122 for holding a read signal switched and output by the amplifier, an amplifier circuit 123 for amplifying the read signal sampled and held by the S / H circuit 122, and an amplified output of the amplifier circuit 123. An output circuit 124 for outputting to the outside (in this example, the image processing apparatus main body 20) is provided.

On the other hand, the image processing apparatus main unit 20 is connected to an output circuit 124 in the image reading apparatus 10 and converts an analog signal into a digital signal from an analog signal to a digital signal sent from the output circuit 124. 211, a memory unit 212 for storing digital signals output from the A / D conversion circuit 211, an image signal processing unit 213 for processing the digital signals stored in the memory unit 212 as image signals, and the like. .

As can be seen from the configuration shown in FIG. 1, the image reading apparatus 10 according to the present embodiment can read an original by moving to an arbitrary position distant from the image processing apparatus main unit 20 in particular. It is used as a handy scanner. When reading a document by the handy scanner, optical reading scanning is performed while moving the CCD 1 and CCD 2 in a predetermined direction while abutting the reading target surface on the document.

In accordance with the reading scan, the image reading device 1
0, the timing control unit 130 controls the CCD 1 and the CCD 2
For the clock signals CLK1 and CLK2, respectively.
And supply. The clock signals CLK1 and CLK2 are signals whose phases are shifted from each other by 180 degrees, as described later.

The CCD 1 converts a signal (electrical signal obtained by photoelectric conversion) accumulated by the above-described scanning into a clock signal CL.
K1 outputs the signal to the SW circuit 121, while the CCD2 outputs the signal accumulated by the above-described scanning to the clock signal CL.
The signal is output to the SW circuit 121 by K2.

FIG. 2 shows a CCD at the time of the above reading scan.
1 is an image diagram showing a form of an output signal of a CCD 2. As shown in the figure, the signals output by the CCD1 and CCD2 are represented by a difference from a reference voltage. That is,
A signal whose difference from the reference voltage has changed according to the density (black and white) of the character or image on the original is a CCD1,
Each is output from the CCD 2. In the present embodiment, it is assumed that the reference voltages of the CCD 1 and the CCD 2 have the same value.

The read signals output from the CCD 1 and the CCD 2 correspond to the above-mentioned clock signals CLK1 and CLK, respectively.
2 to the SW circuit 121. SW circuit 121
Outputs the output signal of the CCD 1 and the output signal of the CCD 2 alternately to the S / H circuit 122 in accordance with the clock signals CLK1 and CLK2 supplied from the timing control unit 130.

The S / H circuit 122 samples and holds the switching output signal from the SW circuit 121. Amplifier circuit 12
3 amplifies the signal sampled and held by the S / H circuit 122. The output circuit 124 outputs the signal amplified by the amplifier circuit 123 to the image processing device main unit 20.

On the other hand, the image processing apparatus main unit 20 converts the signal output from the output circuit 124 of the image reading apparatus 10 into an A signal.
After the analog signal is converted into a digital signal by the / D conversion circuit 211, the digital signal is stored in the memory unit 212. The image signal processing unit 213 performs predetermined signal processing on the digital signal stored in the memory unit 212 and supplies the digital signal to each unit.

For example, if the image processing apparatus main body 20 is a facsimile machine, the image processing apparatus performs processing such as transferring the signal stored in the memory section 212 to the transmission section as an image signal of a transmission original. Processing such as supplying the signal to the electrophotographic process as a read image signal of the original is performed.

FIG. 3 is a timing chart showing signal waveforms of various parts during the reading operation in the image reading apparatus 10.

FIG. 3A shows a clock signal CLK1 supplied from the timing control unit 130 to the CCD1.
FIG. 3B shows a clock signal CLK2 supplied from the timing control unit 130 to the CCD2. The clock signals CLK1 and CLK2 are signals whose phases are shifted from each other by 180 degrees.

The CCD 1 outputs a read signal stored in its own device in synchronization with the above-mentioned CLK1 in accordance with the operation principle described with reference to FIG. Then, the read signal stored in the own device is output in synchronization with the above CLK2.

The output signal of the CCD 1 at this time is shown in FIG.
The output signal of the CCD 2 is shown in FIG.
The form shown in FIG. Specifically, in CCD1, FIG.
As shown in FIG. 3C, a read signal having a voltage level of, for example, V11, V12,... Is sequentially output at each rising timing of the clock signal CLK1, and the CCD 2 outputs the clock signal CLK2 as shown in FIG. A read signal having a voltage level such as V21, V22,... Is sequentially output at each rising timing.

Next, the SW circuit 121 sequentially switches and outputs one of the output signal of the CCD 1 and the output signal of the CCD 2. In this example, the SW circuit 121
As shown in FIG. 3 (e), the period from time T1 to T2 is a CCD.
1 to output a read signal of the voltage level V11. Thereafter, during a period of time T2 to T3, the output signal of the CCD 2 is selected to output a read signal of the voltage level V21. And the output signal of the CCD 2 are alternately selected and output at timings synchronized with the clock signals CLK1 and CLK2, respectively.

The output signal of the SW circuit 121 is sampled and held by the S / H circuit 122, further amplified by the amplifier circuit 123, and then output to the image processing apparatus main unit 20 via the output circuit 124.

FIG. 3F shows an output signal of the output circuit 124. This output signal is a signal (see FIG. 3 (e)) selected and output by the SW circuit 121, which is amplified in the same order by α times by the gain α of the amplifier circuit 123, respectively (αV11, αV21). , ΑV
12, αV22,...).

By sequentially repeating the above-described signal processing until the end of the reading scan, an image reading apparatus 10 containing two CCDs 1 and 2 can be realized.

As described above, in the present embodiment, the amplifier circuit 1
23, an output circuit 124, and the like, the two CCDs 1 and 2
The output signals of D2 are sequentially switched and output at predetermined time intervals, and the output signals of these two CCD1 and CCD2 are temporally multiplexed and processed by the same read signal processing path. One read signal processing path can cope with the processing of the read signal from the CCD 2.

Here, the number of CCD sensors that can be handled by one read signal processing path is not limited to two, and may be larger. Thus, in the present embodiment, as the number of CCD sensors corresponding to one read signal processing path increases, the effects of miniaturization and lower current consumption can be expected.

Example: Next, a specific example of the present invention will be described.

FIG. 4 is a block diagram showing a circuit configuration of the image reading apparatus 11 according to the first embodiment of the present invention.

This image reading device 11 is realized by mounting four sets of the basic configuration of the image reading device 10 shown in FIG. 1, that is, a configuration in which one CCD has one read signal processing circuit. is there.

The first set includes a CCD sensor 110-1 (CC
D1) and 110-2 (CCD2) and a read signal processing circuit 120-1. Hereinafter, a second set includes CCD sensors 110-3 (CCD3) and 110-4 (CCD2).
4) and the read signal processing circuit 120-2, the third set
CCD sensors 110-5 (CCD5) and 110-6
(CCD 6) and the read signal processing circuit 120-3
The set includes CCD sensors 110-7 (CCD7) and 11
0-8 (CCD 8) and a read signal processing circuit 120-4.

In this embodiment, four sets of eight CCDs 1 to 8 are arranged in a line in a direction (readout line direction) perpendicular to the original scanning direction, and two adjacent CCDs are arranged. Sensors (CCD1, CCD
2), (CCD3, CCD4), (CCD5, CCD
6) One read signal processing circuit 120-1, 120-2, 120-3, 120-
4, SW circuits 120-1, 120-2, 120-3,
120-4.

The read signal processing circuits 120-1 and 120-12
The internal configurations of 0-2, 120-3, and 120-4 are the same as those of the read signal processing circuit 120 in FIG.
SW circuits (121-1, 121-2, 121-3, 12
1-4), S / H circuits (122-1, 122-2, 12)
2-3, 122-4), amplifier circuits (123-1, 123-3)
-2, 123-3, 123-4), and the output circuit (124-
1, 124-2, 124-3, and 124-4).

Each of the read signal processing circuits 120-1 and 120-
2, 120-3, and 120-4 corresponding to the two CCD sensors (CCD1, CCD2), (CCD
3, CCD4), (CCD5, CCD6), (CCD
7, CCD 8), the timing of selecting these output signals is also controlled by the clock signals CLK1, CLK2, CLK3, CLK4, and CL provided from the timing control unit 130 to the respective CCD sensors.
Except for K5, CLK6, CLK7, and CLK8, it is basically the same as the read signal processing circuit 120 in FIG. Here, each of the clock signals CLK1 to CLK8
Are signals whose phases are shifted from each other by 45 degrees.

Thus, the read signal processing circuit 120-1
, The read signal from the CCD 1 [see FIG. 3 (c)]
And the read signal from the CCD 2 (see FIG. 3D) are alternately switched and output by the SW circuit 121-1 according to the clock signals CLK1 and CLK2, respectively [FIG.
(E)], after the sample and hold processing by the S / H circuit 122-1 and the amplification processing by the amplifier circuit 123-1.
It is output from the output circuit 124-1 [see FIG. 3 (f)].

Similarly, in the read signal processing circuit 120-2, the read signal from the CCD 3 and the read signal from the CCD 4 are alternately switched and output by the SW circuit 121-2 in accordance with the clock signals CLK3 and CLK4, respectively. After the sample and hold processing by the H circuit 122-2 and the amplification processing by the amplifier circuit 123-2, the signal is output from the output circuit 124-1.

In the read signal processing circuit 120-3, the read signal from the CCD 5 and the read signal from the CCD 6 are alternately switched and output by the SW circuit 121-3 according to clock signals CLK5 and CLK6, respectively.
After the sample / hold processing by the S / H circuit 122-3 and the amplification processing by the amplifier circuit 123-3, the output circuit 124
-3.

In the read signal processing circuit 120-4, the read signal from the CCD 7 and the read signal from the CCD 8 are alternately switched and output by the SW circuit 121-4 according to the clock signals CLK7 and CLK8, respectively.
After the sample / hold processing by the S / H circuit 122-4 and the amplification processing by the amplifier circuit 123-4, the output circuit 124
-4.

According to this embodiment, a read signal processing circuit 1 for processing output signals of these CCD sensors for eight CCD sensors covering the read line width of a document.
20 is sufficient, and the configuration of the circuit portion can be simplified as compared with a conventional device in which a read signal processing circuit is prepared for each CCD sensor.

This is very useful when considering the case of configuring a handy scanner which is a premise of the present embodiment, in terms of miniaturizing the external shape, reducing current consumption and improving portability.

FIG. 5 is a block diagram showing a circuit configuration of the image reading apparatus 12 according to the second embodiment of the present invention.

The components of the image reading apparatus 12 are the same as those of the image reading apparatus 11 according to the first embodiment (see FIG. 4). That is, the image reading device 12 also
This is realized by mounting four sets of the basic configuration of the image reading apparatus 10 shown in FIG. 1, that is, a configuration in which one read signal processing circuit is shared by two CCD sensors.

The configuration of this image reading device 12 is different from that of the image reading device 11 according to the first embodiment.
~ CCD 8 and read signal processing circuits 120-1, 120-
2, 120-3, and 120-4.

In the image reading apparatus 11 according to the first embodiment, the read signal processing circuits 120-1, 120-2, 120
-3, 120-4, SW circuits 120-1, 120-
2, 120-3 and 120-4 are connected to two adjacent CCD sensors in the arrangement in the reading line direction of the original.
In this regard, the image reading device 12 according to the second embodiment employs two non-adjacent CCD sensors.

More specifically, as shown in FIG.
A set of (CCD2, CCD3) is connected to the SW circuit 121-1 in the read signal processing circuit 120-1.
4) is the SW circuit 1 in the read signal processing circuit 120-2.
21-2, the set (CCD5, CCD7) is connected to the SW circuit 121-3 in the read signal processing circuit 120-3, and the set (CCD6, CCD8) is connected in the read signal processing circuit 120-4. It is connected to the SW circuit 121-4.

These read signal processing circuits 120-1 and 120-1
The switching selection operation of the output signals from the corresponding two CCD sensors in 20-2, 120-3, and 120-4 is the same for each of the circuits in FIG. Therefore, the specific operation is as follows.

That is, in the read signal processing circuit 120-1 in the image reading apparatus 12 according to the second embodiment, the read signal from the CCD 1 and the read signal from the CCD 3 are converted into SW circuits in accordance with clock signals CLK1 and CLK3, respectively. 121-1 is alternately switched and output by
After the sample / hold processing by the S / H circuit 122-1 and the amplification processing by the amplification circuit 123-1, the output circuit 124
It is output from -1.

Similarly, in the read signal processing circuit 120-2, the read signal from the CCD 2 and the read signal from the CCD 4 are alternately switched and output by the SW circuit 121-2 according to the clock signals CLK2 and CLK4, respectively. After the sample and hold processing by the H circuit 122-2 and the amplification processing by the amplifier circuit 123-2, the signal is output from the output circuit 124-1.

In the read signal processing circuit 120-3, the read signal from the CCD 5 and the read signal from the CCD 7 are alternately switched and output by the SW circuit 121-3 according to clock signals CLK5 and CLK7, respectively.
After the sample / hold processing by the S / H circuit 122-3 and the amplification processing by the amplifier circuit 123-3, the output circuit 124
-3.

In the read signal processing circuit 120-4, the read signal from the CCD 6 and the read signal from the CCD 8 are alternately switched and output by the SW circuit 121-4 according to the clock signals CLK6 and CLK8, respectively.
After the sample / hold processing by the S / H circuit 122-4 and the amplification processing by the amplifier circuit 123-4, the output circuit 124
-4.

Also in the second embodiment, four read signal processing circuits 120 for processing the output signals of these CCD sensors are sufficient for eight CCD sensors covering the read line width of the original. The configuration of the part can be greatly simplified as compared with the conventional device.

The configurations of the first and second embodiments have unique operating characteristics from the viewpoints described below. Therefore, it is desirable to determine which of the first and second embodiments is selected in consideration of the operation characteristics.

Here, in the first embodiment apparatus 11 (see FIG. 4) and the second embodiment apparatus 12 (see FIG. 5), image information on a straight line perpendicular to the scanning direction on the original is referred to as the straight line. For reading by eight CCDs 1 to 8 arranged in a line in the same direction, consider a case where the original has a uniform density.

In this case, the output signals of the respective CCDs 1 to 8 are ideally all at the voltage level of, for example, V3, and the read signal processing circuits 120-1, 120-2, 12
In the final output stage from 0-3 and 120-4, the signal has a voltage level of αV3. Here, α is the read signal processing circuits 120-1, 120-2, 120-3, and 120-.
4 amplifier circuits 123-1, 123-2, 123-3, and 1
23-4 is the amplification gain.

In each of the above embodiments, the amplification gain α
For example, "1" can be set as a specific value of. Of course, the amplification gain α is not limited to this, and may be a value smaller than “1”.

However, in actual operation, each of the read signal processing circuits 120-1, 120-2, 120-3, 12
Each of the read signal processing circuits 120-1, 120-2, 120-3, 12
The amplification gain of 0-4 is α in the read signal processing circuit 120-1.
1, α2 in the read signal processing circuit 120-2, α3 in the read signal processing circuit 120-3, and α4 in the read signal processing circuit 120-4.

Under such circumstances, each read signal processing circuit 12
The signal levels finally output from 0-1, 120-2, 120-3, and 120-4 are α1V3,
There is a level difference such as α2V3, α3V3, α4V3. When these output signals are reproduced and output, a difference in shading occurs in the output image, and a black line is generated along the boundary of shading.

FIG. 6 is a schematic diagram for explaining the reproduction output abnormality between the first embodiment apparatus 11 and the second embodiment apparatus 12, and FIG. 6 (a) shows the first embodiment. The reproduction output image of the example apparatus 11 is shown, and FIG. 7B is the reproduction output image of the second example apparatus 12.

The device 11 of the first embodiment has the CC shown in FIG.
Depending on the connection mode between the D sensor and the read signal processing circuit 120, the boundary is a set of (CCD1, CCD2), (CCD1,
3, CCD4), (CCD5, CCD6),
(CCD7, CCD8), three black lines are conveniently generated along these boundaries.

On the other hand, in the device 12 of the second embodiment, the CCD sensor and the read signal processing circuit 120 shown in FIG.
Depending on the connection mode between the above, the boundary is CCD1, CCD
2, CCD3, CCD4, CCD5, CCD6, CCD
7 and the CCD 8, so that seven black lines are conveniently generated along these boundaries.

Therefore, from the viewpoint of reducing the black line generated on such a boundary, it is more advantageous to use the device 11 of the first embodiment.

The characteristics of the CCD sensor are as follows.

A CCD sensor for converting (photoelectrically converting) an image or the like on a document into an electric signal by an optical method is adjacent to the CC sensor.
It is easily affected by the D sensor. That is, in a handy scanner or the like, since the CCD sensor is arranged at a close distance, when a certain CCD sensor irradiates light necessary for reading and scanning, a part of this light becomes a document to be read by an adjacent CCD sensor. Will leak to the surface. This means that the document information (light) of the reading area of the adjacent CCD sensor enters the CCD sensor.

When such a situation is considered in light of the above embodiments, for example, a part of the information on the document surface with which the CCD 1 comes into contact leaks to the adjacent CCD 2. Considering the process of processing the information of the leaked portion, in the first embodiment 11, the read signals of the CCD 1 and the CCD 2 are both taken in the same read signal processing circuit 120-1 (each read signal processing circuit sends the read signal to each read signal processing circuit 120-1). Since adjacent CCD sensors are connected), amplification is performed with the same gain α1, so that no problem occurs even when data is reproduced.

On the other hand, in the device 12 of the second embodiment, the read signals of the CCD 1 and the CCD 2 are separately taken into the read signal processing circuit 120-1 and the read signal processing circuit 120-2 (each read signal). By connecting a CCD sensor that is not adjacent to the processing circuit), completely different gains α1, α
2 are amplified to different values.

This difference causes deterioration of the output image when the read signal is reproduced, and the more the multiplexing proceeds, the greater the influence on the image quality deterioration.

Therefore, from this point of view, it is advantageous to use the device 11 of the first embodiment, and by using the device 11, the read signal processing circuits 120-1 and 120-1 described above are used.
It is possible to realize a high-quality image reading apparatus in which the influence of the internal characteristic errors of 0-2, 120-3, and 120-4 is reduced.

On the other hand, the second embodiment apparatus 12
The following advantages can be expected when operating the CD1 to the CCD8 at different timings.

As an example, consider the case where the second embodiment apparatus 12 is operated by supplying clock signals CLK1 to CLK8 whose phases are shifted by 45 degrees to CCD1 to CCD8.

FIG. 7 is a timing chart showing signal waveforms at various parts of the device 12 of the second embodiment operated under the same conditions. In the figure, (a), (b), (c),
(D) shows clock signals CL each having the above phase difference.
CCD1 by K1, CLK2, CLK3, CLK4,
It is an output signal waveform of CCD2, CCD3, CCD4.

In the device 12 of the second embodiment, the output signal of the CCD 1 and the output signal of the CCD 3 are read out by the read signal processing circuit 120-
1, the output signal of the CCD 2 and the output signal of the CCD 4 are input to the SW circuit 121-1 in the read signal processing circuit 120-1.
2 is input to the SW circuit 121-2.

As shown in FIG. 7 (e), the SW circuit 121-1 changes the state of the output signal of the CCD 1 at the timing T1 and holds it until the timing T3, and changes the state of the output signal of the CCD 3 at the timing T3. Hold until T5. That is, from the timing T1 to the timing T
During the period of 3, the output signal of the CCD 1 is selected and the timing T
During the period from 3 to timing T5, the output signal of the CCD 3 is selected, and thereafter, this selection operation is alternately repeated.

In the SW circuit 121-2, the state of the output signal of the CCD 2 is changed at the timing T2 to change the state at the timing T4.
By changing the state of the output signal of the CCD 4 at the timing T4 and holding it until the timing T6,
During the period from timing T2 to timing T4, the output signal of the CCD 2 is selected, and from timing T4 to timing T6.
During this period, the output signal of the CCD 4 is selected, and thereafter, this selection operation is alternately repeated.

Although not shown, the output signal of the CCD 5 and the output signal of the CCD 7, the output signal of the CCD 6 and the CCD 8
Of the SW circuit 121-
3. The same processing is performed in the SW circuit 121-4.

Here, paying attention to the operation of the SW circuit 121-1, in the device 12 of the second embodiment, the SW circuit 1
The signals input to 21-1 are the output signals of CCD1 and CCD3, and have no relationship with the adjacent CCDs. In addition, in this case, it is assumed that the operation timings of the CCD1 to CCD8 are not the same, so that the SW circuit 121
A value of -1 does not require a very high-speed switching operation when selecting the output signals of both the CCD1 and the CCD3. In other words, there is a large time margin in the switching operation of the output signals from the CCD1 and the CCD3.

In the meaning of comparison, the first embodiment device 11 will be verified. SW circuit 1 of first embodiment device 11
In 21-1, the signals input to the SW circuit 121-1 are the output signals of the CCD1 and CCD2, and have a relationship between the adjacent CCDs. For this reason, even if CD1-CCD
8 is not the same,
From the point of view of the device 12 of the first embodiment, when the SW circuit 121-1 selects each output signal from both the CCD1 and CCD2, it is necessary to cope with the operation at a higher speed.

Therefore, it is advantageous to use the device 12 of the second embodiment from the viewpoint of increasing the margin of switching timing when the operation timings of the CD1 to CCD8 are not the same.

Further, by using the device 12 of the second embodiment, it is possible to provide a timing margin to the SW circuit 121 and the S / H circuit 122.
The operation after 21 can be speeded up.

In each of the above embodiments, the apparatus configuration including four read signal processing circuits accommodating eight CCD sensors has been described. However, the number of CCD sensors accommodated in one read signal processing circuit and multiplexing are described. The number of circuits (reading signal processing circuits) or the connection mode between the CCD sensor and the reading signal processing circuit is not limited to this, but may be configured in any number and any connection mode.

In the above-described embodiment, an example in which the image reading apparatus according to the present invention is applied to a handy scanner has been described. In addition to this, the present invention can be applied to all image processing apparatuses such as a facsimile apparatus and a copying machine. It is.

In addition, the present invention can be variously modified or applied without departing from the above-mentioned gist.

[0092]

As described above, according to the present invention,
Signal switching means for sequentially switching the output signals of the plurality of image reading means at predetermined time intervals and sending the output signals to the reading signal processing means; and multiplexing the output signals of the respective image reading means with time and using the same reading signal processing means. Processing.
Even when the number of image reading means increases, the number of read signal processing means can be suppressed from increasing, so that downsizing and low current consumption can be maintained, and the cost of the entire apparatus can be reduced.

Further, according to the present invention, a plurality of sets of read signal processing means and signal switching means corresponding to the read signal processing means are provided,
It can also be realized by a configuration in which two or more image reading means are connected to each signal switching means. According to this configuration, for example, it is possible to easily cope with a case where the number of image reading units is increased so that a document of a larger size can be read.

In the above arrangement, when two or more image reading means connected to each signal switching means are image reading means adjacent to each other, variations in the characteristics of the internal circuit elements of each reading signal processing means, etc. Can reduce the adverse effect on image quality, and can improve reading accuracy.

In the above arrangement, when two or more image reading means connected to each signal switching means are image reading means which are not adjacent to each other, when driving each image reading means at a different operation timing, A timing margin can be secured when switching the output signals of two or more image reading units in each signal switching unit, and the speed of signal processing after the signal switching unit can be increased.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a circuit configuration of an image reading apparatus according to an embodiment of the present invention.

FIG. 2 is an image diagram showing a form of an output signal of a CCD sensor.

FIG. 3 is a timing chart showing signal waveforms at various parts of the image reading apparatus in FIG. 1;

FIG. 4 is a block diagram illustrating a circuit configuration of the image reading apparatus according to the first embodiment.

FIG. 5 is a block diagram illustrating a circuit configuration of an image reading apparatus according to a second embodiment.

FIG. 6 is a schematic diagram for explaining a reproduction output abnormality between the first embodiment device and the second embodiment device.

FIG. 7 is a timing chart showing signal waveforms of respective parts when the device of the second embodiment is operated under the condition that the operation timings of the CCD1 to CCD8 are different.

[Explanation of symbols]

10, 11, 12 Image reading device 110-1, 110-2, 110-3, 110-4, 1
10-5, 110-6, 110-7, 110-8 CC
D image sensor 120, 120-1, 120-2, 120-3, 120
-4 Read signal processing circuit 121, 121-1, 121-2, 121-3, 121
-4 Signal changeover switch (SW) circuit 122,122-1,122-2,122-3,122
-4 Sample hold (S / H) circuit 123, 123-1, 123-2, 123-3, 123
-4 amplifying circuit 124, 124-1, 124-2, 124-3, 124
-4 Output circuit 130 Timing control unit 20 Image processing device main unit 211 A / D conversion unit 212 Memory unit 213 Image signal processing unit

Claims (5)

[Claims] 1. An image reading means for optically reading a character or an image on a document and converting it into an electric signal, a read signal processing means including at least an amplifying means for amplifying an output signal of the image reading means, and the read signal An output unit for outputting a signal processed by the processing unit to the outside, wherein the plurality of image reading units are arranged in a row and output signals of the plurality of image reading units are sequentially arranged at predetermined time intervals. An image reading apparatus, comprising: signal switching means for switching and sending the read signal processing means to the read signal processing means, wherein output signals of the plurality of image reading means are multiplexed temporally and processed by the same read signal processing means. 2. A read signal processing means and a plurality of signal switching means corresponding to the read signal processing means are provided, and two or more image reading means are connected to each of the signal switching means. The image reading device according to claim 1. 3. The image reading apparatus according to claim 2, wherein the two or more image reading units connected to each signal switching unit are image reading units adjacent to each other. 4. The image reading apparatus according to claim 2, wherein the two or more image reading units connected to each signal switching unit are image reading units that are not adjacent to each other. 5. An image reading means, comprising: a charge-coupled device (CC)
2. The image reading device according to claim 1, wherein the image reading device is a CCD image sensor using D).