JP2001345872A - Circuit and method for quadrature demodulation, and circuit and method for quadrature modulation - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a qurdrature demodulation circuit, capable of reducing the amplitude error of I signal and Q signal outputs by detecting the error, using a simple configuration. SOLUTION: A carrier wave added to a quadrature modulated wave signal by an adder 11 is converted into a DC value by a quadrature demodulator 2, passed through gain control circuits 3 and 4 and amplifiers 6 and 7 and afterwards extracted from I and Q signals by DC pass filters 8 and 9. Then, a DC component extracted from the I signal is compared with a DC component extracted from the Q signal by a DC comparator 10, a difference voltage thereof is supplied to a control voltage converter 5, and the gains of the gain control circuits 3 and 4 are controlled so as to reduce the unbalance of the DC components. Without having to detect the I/Q signal after being subjected to quadrature demodulation, the amplitude errors of the I/Q signal can be reduced, using a in comparatively simple configuration.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital mobile communication system such as a mobile telephone communication system, and more particularly to an apparatus for demodulating or modulating a digital signal.

[0002]

2. Description of the Related Art In a quadrature demodulation circuit for demodulating a modulated wave of a digital signal, it is necessary to minimize an error in amplitude and phase between an I signal and a Q signal as output signals in order to reduce a bit error rate. is there. In particular, since an amplitude error is generated due to variations among elements constituting a quadrature demodulator and a subsequent amplifier, it is necessary to reduce the amplitude error by using a correction unit.

Further, in a quadrature modulation circuit for modulating a digital signal, it is necessary to minimize an error in amplitude and phase between an I signal and a Q signal input to the quadrature modulator in order to increase the modulation accuracy. In particular, since an amplitude error is generated due to variations among elements constituting a baseband signal amplifier or the like of the quadrature modulation circuit, it is desirable to reduce the amplitude error by using a correction unit.

FIG. 4 is a block diagram showing an example of a conventional quadrature demodulation circuit. This quadrature demodulation circuit receives a quadrature modulation wave signal input from a modulation wave signal input terminal 12 and an output of a carrier wave oscillator 16 and demodulates the I signal and the Q signal. Gain control circuits 3 and 4 for controlling the gains of the obtained I signal and Q signal, amplifiers 6 and 7 for amplifying the I signal and Q signal gain-controlled by the gain control circuits 3 and 4 respectively, and amplifier 6 An I signal output terminal 13 for outputting the amplified I signal, a Q signal output terminal 14 for outputting the Q signal amplified by the amplifier 7, and a detection of the I signal amplified by the amplifier 6 to extract its DC component. Detector
17 and the Q signal amplified by the amplifier 7 is detected and its DC
A detector 18 for extracting the components, and I extracted by the detector 17
DC component of the signal and DC of the Q signal extracted by the detector 18
The DC comparator 10 compares the components with each other and generates a DC voltage corresponding to the difference, and the I signal and the Q signal output from the amplifiers 6 and 7 based on the DC voltage generated by the DC comparator 10. And a control voltage converter 5 for controlling the gains of the gain control circuits 3 and 4 so that the amplitudes of the control signals become equal.

[0005] According to the quadrature demodulation circuit configured as described above, the I signal and the Q signal are demodulated from the quadrature modulated wave signal.
Further, I signal and I signal are adjusted so that DC components of the signals become equal.
By feedback controlling the gain of the signal and Q signal,
The amplitude error between the I signal and the Q signal can be reduced, and the bit error rate can be reduced.

FIG. 5 is a block diagram showing an example of a conventional quadrature modulation circuit. This quadrature modulation circuit has an I signal input terminal
A gain control circuit 3 for controlling the gain of the I signal input from 21; a gain control circuit 4 for controlling the gain of the Q signal input from the Q signal input terminal 22; Amplifiers 6 and 7 for amplifying the I signal and the Q signal respectively, a detector 17 for detecting the I signal amplified by the amplifier 6 and extracting a DC component thereof, and a Q signal amplified by the amplifier 7 for detection. A detector 18 for extracting the DC component,
A DC comparator 10 that compares the DC component of the I signal extracted by the detector 17 with the DC component of the Q signal extracted by the detector 18 and generates a DC voltage corresponding to the difference;
A control voltage converter 5 for controlling the gains of the gain control circuits 3 and 4 based on the DC voltage generated at 10 so that the amplitudes of the I and Q signals output from the amplifiers 6 and 7 are equal;
A quadrature modulator 19 for quadrature modulating the output of the carrier oscillator 16 with the I and Q signals output from the amplifiers 6 and 7; a modulated wave signal output terminal 20 for outputting a quadrature modulated wave generated by the quadrature modulator 19; It is composed of

According to the quadrature modulation circuit configured as described above, the I signal and the Q signal have the same DC component so that the DC components are equal.
By feedback controlling the gain of the signal and Q signal,
The amplitude error between the I signal and the Q signal input to the quadrature modulator can be reduced, and the modulation accuracy can be increased.

[0008]

In recent years, there has been a strong demand for a mobile device of a mobile communication system to be reduced in size and weight as well as reduced in cost and power consumption.

However, in a mobile station of a mobile communication system using the quadrature demodulation circuit or the quadrature modulation circuit having the above configuration, the I
A means for detecting the output amplitude level of the signal and the Q signal is required. If a detection circuit is used for this means, the circuit configuration becomes complicated, and there is a problem that the current consumption increases and the cost increases. .

An object of the present invention is to solve such a conventional problem and to provide a simple structure suitable for integration.
An object of the present invention is to provide a quadrature demodulation circuit and a quadrature modulation circuit capable of detecting an amplitude error of a signal and a Q signal output and reducing the error.

[0011]

A quadrature demodulation circuit according to the present invention comprises: an adder for adding a carrier having an arbitrary amplitude to a quadrature modulated wave signal; And a quadrature demodulator for converting into an I signal and a Q signal, and the I signal according to an output voltage of a DC comparator.
A gain control circuit for controlling the gain of the Q signal; an amplifier for amplifying an output signal of the gain control circuit; a DC pass filter for extracting a DC component of each of the I signal and the Q signal from the output signal of the amplifier; Comparing the extracted DC components and outputting a voltage corresponding to the difference.
And a C comparator. With this configuration, the carrier added to the quadrature modulated wave signal is converted into a DC value by a quadrature demodulator, passed through a gain control circuit and an amplifier, and then extracted from the I and Q signals by a DC pass filter and extracted from the I signal. DC component and DC extracted from Q signal
By comparing the components with each other and controlling the gain of the gain control circuit so as to reduce the imbalance, the amplitude error of the I signal and the Q signal output from the amplifier can be suppressed.

Further, the quadrature modulation circuit of the present invention comprises a gain control circuit for controlling the gains of the I signal and the Q signal according to the output voltage of the DC comparator, and an amplifier for amplifying the output signal of the gain control circuit. A quadrature modulator that quadrature modulates a carrier with an I / Q signal to output a quadrature modulated wave signal, a DC pass filter that extracts a DC component of each of an I signal and a Q signal from an output signal of the amplifier, The DC which compares each DC component and outputs a voltage corresponding to the difference;
And a comparator. With this configuration,
When a minute DC offset input from the baseband signal processing unit passes through the gain control circuit and the amplifier, an imbalance generated on the I signal side and the Q signal side is extracted by a DC pass filter and a DC comparator, and the imbalance is obtained. By controlling the gain of the gain control circuit so as to reduce the amplitude, it is possible to suppress the amplitude error of the I signal and the Q signal input to the quadrature modulator.

[0013]

Embodiments of the present invention will be described below in detail with reference to the drawings.

(First Embodiment) The first embodiment of the present invention relates to a quadrature demodulation circuit. FIG. 1 is a block diagram showing a quadrature demodulation circuit according to a first embodiment of the present invention. In this figure, the same or corresponding components as those in FIG. 4 are denoted by the same reference numerals as those used in FIG.

The quadrature demodulation circuit includes an amplifier 11 for amplifying the output of the carrier wave oscillator 16 to an arbitrary level, and a quadrature modulation wave signal input from a modulation wave signal input terminal 12 having an arbitrary amplitude output from the amplifier 11. An adder 1 for adding a carrier wave; an orthogonal demodulator 2 to which an output of the adder 1 and an output of the carrier wave oscillator 16 are input and demodulating an I signal and a Q signal including a DC component of an arbitrary value; 2, gain control circuits 3 and 4 for controlling the gains of the I and Q signals demodulated in 2, respectively, and amplifiers 6 and 7 for amplifying the I and Q signals gain-controlled by the gain control circuits 3 and 4, respectively. I amplified by the amplifier 6
An I signal output terminal 13 for outputting a signal; a Q signal output terminal 14 for outputting a Q signal amplified by the amplifier 7; a DC pass filter 8 for extracting a DC component from the I signal amplified by the amplifier 6; From the Q signal amplified in step 7
A DC pass filter 9 for extracting the C component, a DC component of the I signal extracted by the DC pass filter 8 and a DC component of the Q signal extracted by the DC pass filter 9 are compared, and a DC voltage corresponding to the difference is calculated. The DC comparator 10 to generate
Based on the DC voltage generated by the C comparator 10, the amplifier 6,
The control voltage converter 5 controls the gains of the gain control circuits 3 and 4 so that the amplitudes of the I signal and the Q signal output from 7 are equal.

In the quadrature demodulation circuit configured as described above, the quadrature modulated wave signal input to the modulated wave signal input terminal 12 is output from the carrier oscillator 16 and passes through the amplifier 11 to set the carrier wave to an arbitrary amplitude. Is added by the adder 1.
Since the modulated wave signal and the carrier wave are input to the quadrature demodulator 2 at the same time, the output signal I (t) on the Ich side and the output signal Q (t) on the Qch side are expressed by the following equations [1] and [2]. Given. I (t) = Ai (cosω m t + ΔVdc) ... (1) Q (t) = Aq (sinω m t + ΔVdc) ... (2)

Although the image components of the modulated wave and the carrier wave are actually output, since the frequency is relatively high and the filter can be easily suppressed by a filter connected to the subsequent stage of the quadrature demodulation circuit,
It is omitted here.

In the equations [1] and [2], ΔVdc is a DC component corresponding to the amplitude of the carrier wave added to the quadrature modulated wave by the adder 1. Then, usually, a coefficient Ai for determining the amplitude due to the variation between the elements constituting the quadrature demodulator 2,
Aq is not equal.

Further, I (t) and Q (t) pass through gain control circuits 3 and 4 and are converted to arbitrary levels. Also in this case, the gains of the gain control circuits 3 and 4 are different due to variations between the elements constituting the gain control circuits 3 and 4 on the Ich side and the Qch side. Assuming that the gain of the gain control circuit 3 on the Ich side is Ggi and the gain of the gain control circuit 4 on the Qch side is Ggq,
Are given by the following equations [3] and [4], respectively. I (t) = Ai × Ggi (cosω m t + ΔVdc) ... [3] Q (t) = Aq × Ggq (sinω m t + ΔVdc) ... (4)

Further, I (t) and Q (t) are the values of amplifier 6,
7, the gain is unbalanced for the same reason, and the respective gains become Gai and Gaq.
The signals output to the I signal output terminal 13 and the Q signal output terminal 14 are given by the following equations [5] and [6]. I (t) = Ai × Ggi × Gai (cosω m t + ΔVdc) ... [5] Q (t) = Aq × Ggq × Gaq (sinω m t + ΔVdc) ... (6)

These signals are output to the I signal output terminal 13 and the Q signal
By passing through the DC pass filters 8 and 9 at the same time as being output to the signal output terminal 14, only the DC component is output.
That is, since the AC component is suppressed by the DC pass filter, the output signals of the Ich DC pass filter 8 and the Qch DC pass filter 9 are given by the following equations [7] and [8], respectively. ΔIdc = Ai × Ggi × Gai × ΔVdc [7] ΔQdc = Aq × Ggq × Gaq × ΔVdc [8]

These DC signals are input to a DC comparator 10, and a difference voltage is output. This difference voltage is converted by the control voltage converter 5 to change at least one of the gains of the gain control circuit 3 or the gain control circuit 4 so that the output difference voltage of the DC comparator 10 becomes zero. That is, at least the gain control circuit 3 or the gain control circuit 4 of the quadrature demodulator 2 is designed so that the gain from the Ich side to the I signal output terminal 13 is equal to the gain from the Qch side to the Q signal output terminal 14 of the quadrature demodulator 2. One gain changes. Therefore, the gain relationship in the steady state is

Given in [9]. Ai × Ggi × Gai = Aq × Ggq × Gaq ...

[9]

This means that the I signal output to the I signal output terminal 13 and the Q signal output to the Q signal output terminal 14 have the same amplitude.

According to the above principle, according to the first embodiment of the present invention, it is possible to correct the amplitude error between the I signal and the Q signal output from the quadrature demodulation circuit, and to reduce the bit error rate due to the amplitude error. Can be reduced.

(Second Embodiment) In a second embodiment of the present invention, a quadrature demodulation circuit is provided by expanding the control width of a gain control circuit and enabling gain control by an external control voltage. This makes it possible to correct the amplitude error between the output I signal and the Q signal and to keep the amplitude constant irrespective of the quadrature modulation wave input level.

FIG. 2 is a block diagram showing a quadrature modulation circuit according to a second embodiment of the present invention. In this figure, the same or corresponding components as those in FIG. 1 are denoted by the same reference numerals as those used in FIG.

Conventionally, a gain control circuit configured to keep the amplitude of an I / Q signal input to a baseband signal processing unit constant has been configured in an RF unit or an IF unit to control the gain of the RF signal or the IF signal. By doing so, control is performed to keep the amplitude of the I / Q signal output from the quadrature demodulation circuit constant irrespective of the input electric field strength. However, the gain control in the RF section and the IF section has to deal with a relatively high frequency, which is a factor of increasing power consumption. 2. Description of the Related Art In recent years, there has been a strong demand for lower power consumption in mobile devices of mobile communication systems. To achieve this, it is effective to perform gain control at a relatively low frequency after quadrature demodulation.

Therefore, in a second embodiment of the present invention,
The control width of the gain control circuits 3 and 4 is increased, and the amplitude of the I / Q signal output from the output terminals 13 and 14 of the quadrature demodulation circuit is changed by the control voltage input from the external control voltage input terminal 15 to a quadrature modulated wave. It is configured to have a function to keep it constant regardless of the input level.

The basic operation principle of the quadrature demodulation circuit of the present embodiment configured as described above is the same as that of the first embodiment. Further, in the quadrature demodulation circuit according to the present embodiment, the control voltage input from the external control voltage input terminal 15 is mixed with the output voltage from the DC comparator 10 by the control voltage conversion circuit 5 and transmitted to the gain control circuits 3 and 4. Supplied. As a result, I /
It is possible to simultaneously realize the function of the gain control circuit for reducing the amplitude error of the Q signal and keeping the I / Q signal output from the quadrature demodulation circuit constant.

As described above, according to the second embodiment of the present invention, it is possible to correct the amplitude error between the I signal and the Q signal output from the quadrature demodulation circuit, and at the same time, to reduce the amplitude of the I / Q signal. Gain control to keep the gain constant is possible at a low frequency after quadrature demodulation. Therefore, it is possible to reduce the deterioration of the bit error rate due to the amplitude error and reduce the power consumption.

(Third Embodiment) In a third embodiment of the present invention, the amplitude error suppressing method of the first embodiment of the present invention is applied to a quadrature modulation circuit.

FIG. 3 is a block diagram showing a quadrature modulation circuit according to a third embodiment of the present invention. In this figure, components that are the same as or correspond to those in FIGS. 1 and 5 are denoted by the same reference numerals as those used in FIGS. 1 and 5.

The quadrature modulation circuit comprises a gain control circuit 3 for controlling the gain of the I signal input from the I signal input terminal 21;
A gain control circuit 4 for controlling the gain of the Q signal input from the Q signal input terminal 22; and amplifiers 6 and 7 for amplifying the I signal and the Q signal, the gains of which are controlled by the gain control circuits 3 and 4, respectively.
A DC pass filter 8 for extracting the DC component from the I signal amplified by the amplifier 6;
DC pass filter 9 for extracting the DC component from the signal
Is compared with the DC component of the I signal extracted by the DC pass filter 8 and the DC component of the Q signal extracted by the DC pass filter 9 to generate a DC voltage corresponding to the difference.
Based on the DC voltage generated by the C comparator 10 and the DC comparator 10, the gains of the gain control circuits 3 and 4 are adjusted so that the amplitudes of the I and Q signals output from the amplifiers 6 and 7 become equal. A control voltage converter 5 for controlling, an orthogonal modulator 19 for orthogonally modulating the output of the carrier oscillator 16 with the I and Q signals output from the amplifiers 6 and 7, and a quadrature modulated wave generated by the quadrature modulator 19. And a modulated wave signal output terminal 20 to be output.

In the quadrature modulation circuit configured as described above, the I signal I (t) and the Q signal Q (t) input from the I signal input terminal 21 and the Q signal input terminal 22 are transmitted from the baseband signal processing unit. Are included in the following equations [10] and [11], respectively. I (t) = Ba (cosω m t + ΔVdci) ... [10] Q (t) = Ba (sinω m t + ΔVdcq) ... (11)

Further, I (t) and Q (t) pass through gain control circuits 3 and 4 and are converted to arbitrary levels. Where I
The gains of the gain control circuits 3 and 4 are different due to variations between elements constituting the gain control circuits 3 and 4 on the ch and Qch sides. I
Assuming that the gain of the gain control circuit 3 on the ch side is Ggi and the gain of the gain control circuit 4 on the Qch side is Ggq, the output signals of the gain control circuits 3 and 4 are given by the following equations [12] and [13], respectively. I (t) = Ba × Ggi (cosω m t + ΔVdci) ... (12) Q (t) = Ba × Ggq (sinω m t + ΔVdcq) ... (13)

Further, I (t) and Q (t) correspond to the amplifier 6,
7, the gain is unbalanced for the same reason, and the respective gains become Gai and Gaq.
The I / Q signal input to the quadrature modulator is expressed by the following equation [14].
[15]. I (t) = Ba × Ggi × Gai (cosω m t + ΔVdci) ... [14] Q (t) = Ba × Ggq × Gaq (sinω m t + ΔVdcq) ... [15]

These signals are input to the quadrature modulator 19, and at the same time, pass through the DC pass filters
Only the C component is extracted. That is, since the AC components are suppressed by the DC pass filters 8 and 9, the output signals of the Ich DC pass filter 8 and the Qch DC pass filter 9 are given by the following equations [16] and [17], respectively. ΔIdc = Ba × Ggi × Gai × ΔVdci (16) ΔQdc = Ba × Ggq × Gaq × ΔVdcq (17)

These DC signals are input to the DC comparator 10, and the difference voltage is output. This difference voltage is converted by the control voltage converter 5 to change at least one of the gains of the gain control circuit 3 or the gain control circuit 4 so that the output difference voltage of the DC comparator 10 becomes zero. That is, the gains of the gain control circuits 3 and 4 are set so that the gain from the I signal input terminal 21 to the Ich side of the quadrature modulator 19 is equal to the gain from the Q signal input terminal 22 to the Qch side of the quadrature modulator 19. Changes.

The DC offsets ΔVdci and ΔVdcq of the I / Q signal from the baseband signal processing unit are very small and
Assuming that VdciΔ0 and ΔVdcq 利得 0, the gain relationship in the steady state is given by the following equation [18]. Ggi x Gai = Ggq x Gaq ... [18]

This means that the I signal and the Q signal input to the quadrature modulator have the same amplitude.

As described above, according to the third embodiment of the present invention, according to the above principle, the I
The amplitude error between the signal and the Q signal can be corrected, and the image component included in the modulated wave signal output from the quadrature modulator due to the amplitude error can be reduced.

[0042]

According to the present invention as described above,
The amplitude error of the I / Q signal output from the quadrature demodulation circuit can be reduced with a relatively simple configuration without detecting the I / Q signal after the quadrature demodulation. In addition, by increasing the control width of the gain control circuit and enabling the control with an external control voltage, gain control can be performed at a relatively low frequency after quadrature demodulation, thereby reducing power consumption. Is possible. Therefore, by providing a quadrature demodulation circuit having these functions in a mobile terminal, it is possible to realize low power consumption as well as low cost of the mobile terminal.

Further, by applying the amplitude error suppressing method of the quadrature demodulation circuit of the present invention to the quadrature modulation circuit, the image component contained in the modulated wave signal can be reduced with a relatively simple configuration, and the modulation accuracy can be improved. Can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention;

FIG. 2 is a block diagram showing a second embodiment of the present invention;

FIG. 3 is a block diagram showing a third embodiment of the present invention;

FIG. 4 is a block diagram showing a conventional example of a quadrature demodulation circuit;

FIG. 5 is a block diagram showing a conventional example of a quadrature modulation circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Adder 2 Quadrature demodulator 3, 4 Gain control circuit 5 Control voltage converter 6, 7, 11 Amplifier 8, 9 DC pass filter 10 DC comparator 12 Modulation wave signal input terminal 13 I signal output terminal 14 Q signal output terminal 15 External control voltage input terminal 16 Carrier oscillator 19 Quadrature modulator 20 Modulation wave signal output terminal 21 I signal input terminal 22 Q signal input terminal

Claims (12)

[Claims] 1. An adder for adding a carrier having an arbitrary amplitude to a quadrature modulated signal, and a quadrature demodulator for converting the quadrature modulated signal to which the carrier is added into an I signal and a Q signal having arbitrary DC values. A gain control circuit for controlling the gains of the I signal and the Q signal according to the output voltage of the DC comparator; an amplifier for amplifying the output signal of the gain control circuit; and an I signal from the output signal of the amplifier. , A Q pass signal for extracting a DC component of each of the Q signals, and the DC comparator for comparing the extracted DC components and outputting a voltage corresponding to a difference. circuit. 2. The quadrature demodulation circuit according to claim 1, wherein the gain of the gain control circuit can be set according to an external control voltage. 3. An I signal according to an output voltage of the DC comparator,
A gain control circuit for controlling the gain of the Q signal; an amplifier for amplifying an output signal of the gain control circuit; a quadrature modulator for quadrature modulating a carrier with an I / Q signal to output a quadrature modulated wave signal; A DC pass filter that extracts a DC component of each of an I signal and a Q signal from an output signal of the amplifier; and a DC comparator that compares the extracted DC components and outputs a voltage corresponding to a difference. A quadrature modulation circuit comprising: 4. A quadrature modulated wave signal is added with a carrier having an arbitrary amplitude, and the quadrature modulated wave signal to which the carrier is added is converted into an I signal and a Q signal having an arbitrary DC value.
The gains of the I signal and the Q signal are controlled according to the comparison voltage, the gain-controlled signal is amplified, and the DC components of the I signal and the Q signal are extracted from the amplified signal. A quadrature demodulation method characterized by comparing the respective DC components and generating the DC comparison voltage according to the difference. 5. A quadrature modulated signal is added with a carrier having an arbitrary amplitude, and the quadrature modulated signal to which the carrier is added is converted into an I signal and a Q signal having an arbitrary DC value.
The gains of the I signal and the Q signal are controlled in accordance with the comparison voltage and the external control voltage, respectively, the gain-controlled signal is amplified, and the DC components of the I signal and the Q signal are extracted from the amplified signal. A quadrature demodulation method, wherein the extracted DC components are compared to generate the DC comparison voltage according to the difference. 6. A signal for controlling an I signal and a Q signal according to a DC comparison voltage, amplifying the gain-controlled signal, orthogonally modulating a carrier with an I / Q signal, and outputting a quadrature modulated wave signal. Then, a DC component of each of the I signal and the Q signal is extracted from the amplified signal, and each of the extracted D components is extracted.
A quadrature modulation method comprising comparing the C component and generating the DC comparison voltage according to the difference. 7. A mobile terminal comprising the quadrature demodulation circuit according to claim 1 or 2. 8. A base station connected to the mobile terminal according to claim 7. 9. A mobile communication system comprising the mobile terminal according to claim 7 and the base station according to claim 8. 10. A mobile terminal comprising the quadrature modulation circuit according to claim 3. 11. A base station connected to the mobile terminal according to claim 10. 12. A mobile communication system comprising the mobile terminal according to claim 10 and the base station according to claim 11.