JP2001345649A - High-frequency output circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a high-frequency output circuit whose linearity is high against a large input signal and whose distortion is low. SOLUTION: The high-frequency output circuit is constituted of a third transistor Q1 to the base of which a signal to be amplified is input, whose collector is connected to a first power supply Vcc via a first resistor R1 and to the base of a transistor !2 on the side of the first power supply for a push-pull amplifier and whose emitter is connected to a second power supply GND via a second resistor R2. The output circuit is constituted of a fourth transistor Q4 to the base of which the signal to be amplified is input, whose collector is connected to the first power supply Vcc, whose emitter is connected to the second power supply GND via a third resistor R5 and which is connected to the base of a transistor Q3 on the side of the second power supply for the push-pull amplifier via a first capacitor C1. The output circuit is constituted of a second capacitor C3 whose terminal on one side is connected to the base of the transistor Q3 on the side of the second power supply for the push-pull amplifier and whose terminal on the other side is connected to the second power supply GND.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency output circuit, and more particularly, to a high-frequency output circuit that improves linearity and reduces distortion of a strong input signal.

[0002]

2. Description of the Related Art In an output amplifier using a push-pull circuit for high frequency, it is required to improve linearity with respect to a strong input signal and to reduce distortion. In Conventional Example 1 shown in FIG. 5, an input terminal Vin1 is connected to the base of a transistor Q1 via a capacitor C2. The collector of the transistor Q1 is connected to one terminal of the resistor R1 and the base of a transistor Q2 which is one of two transistors forming a push-pull stage, and the other terminal of the resistor R1 is connected to a power supply Vcc. The emitter of transistor Q1 is connected to one terminal of resistor R2 and one terminal of capacitor C1, the other terminal of resistor R2 is connected to GND, and the other terminal of capacitor C1 is connected to a push-pull stage. It is connected to the base of one transistor Q3. A bias is applied to the base of the transistor Q3 from the power supply circuit via the resistor R4. The collector of transistor Q2 is connected to Vcc by transistor Q2.
The emitter of No. 3 is connected to GND via a resistor R3. The emitter of the transistor Q2 and the collector of the transistor Q3 are connected to each other, and a connection node between the emitter and the collector is connected to the output terminal Out. The output frequency characteristic of Conventional Example 1 in FIG.
As shown in FIG. 6, the gain tends to increase as the frequency increases. Also, a harmonic generated in the transistor Q1 is output from the output terminal Out. The capacitor C1 connected to the base of the transistor Q3 in FIG. 5 forms a high-pass filter, and transmits a harmonic component to the transistor Q3.

As a modification of the present invention, there is a circuit shown in FIG. 7 in which the capacitor C3 is short-circuited from the base of the transistor Q3 to GND in the conventional example 1. In this circuit, the signal input to the base of the transistor Q3 is {hFE · R3 // (1 / jωC3)} / ｛(1 /
jωC1) + hFE · R3 // (1 / jωC3)｝ times, the frequency of the input signal is high, and 1 << jω · hFE ·
If R3 (C1 + C3), harmonics can be reduced by optimizing the constants of the capacitors C1 and C3. However, the signal input to the base of the transistor Q2 is R1 / ｛R2 // ｛1 / jωC1 +
{(1 / jωC3) // (hFE · R3)} times. Expanding this,

[0004]

(Equation 1)

However, A = 1 + jωC1hFE · R3 B = 1 + jωC3hFE · R3, and the frequency characteristic of the signal output from the entire circuit is
As shown in FIG. 8, there is a peak near the high frequency band. For this reason, the gain of the harmonic component increases, which causes deterioration of the linearity of the strong input signal and the distortion characteristics.

Here, the cause of generation of harmonics in the push-pull circuit will be described below.

The maximum output power of the push-pull circuit is

[0008]

(Equation 2)

[0009] is determined. Here, Ip: push-pull current RL: output load impedance.

Further, the transistor Q1 has a relation of I = Is · E
XP (Vbe / VT) (where Is is a (reverse) saturation current, VT = kT / q (q is the carrier charge, and k is
Boltzmann's constant, T is an absolute temperature)), so if the signal A · Sin (ωt) is input to VBe,

[0011]

(Equation 3)

## EQU1 ## When this is expanded in series,

[0013]

(Equation 4)

,

[0015]

(Equation 5)

[0016] Higher harmonics are output. The signal required as an amplifier is only A · Sin (ωt), but when a harmonic is output, the signal with the added harmonic is transmitted to the push-pull circuit. Therefore, the push-pull current Ip is a current including the harmonic generated in the transistor Q1.

Next, the cause of deterioration of distortion characteristics due to generation of harmonics will be described below. Now, enter the characteristics of the output amplifier ei, when the output ^{eo, eo = k1 · ei +} k2 · ei 2 + k3 · ei 3 + ··
(Where k1, k2, k3,... Are coefficients representing the linearity of the amplifier).

Signal α = ACos as a plurality of input signals
a, when β = BCosb is input to the amplifier, ei =
When alpha + beta, term k3 · ei ³ is expanded as follows. That is,

[0019]

(Equation 6)

Which is the third harmonic component in the equation.

[0021]

(Equation 7)

However, there is a disadvantage that the distortion increases and the distortion becomes worse.

[0023]

SUMMARY OF THE INVENTION An object of the present invention is to improve the above-mentioned disadvantages of the prior art. In particular, in an output amplifier using a high-efficiency push-pull circuit for a high frequency, linearity with respect to a strong input signal is improved. It is an object of the present invention to provide a new high-frequency output circuit which has a higher distortion and lower distortion.

[0024]

SUMMARY OF THE INVENTION The present invention basically employs the following technical configuration to achieve the above object.

That is, in a first aspect of the high-frequency output circuit according to the present invention, a first transistor and a second transistor constituting a push-pull amplifier are provided between a first power supply and a second power supply. In a high-frequency output circuit connected in series, a signal to be amplified is input to a base, a collector is connected to the first power supply via a first resistor, and a first power supply side of the push-pull amplifier is connected to the first power supply. A third transistor configured to be connected to the base of the transistor of the first embodiment and to have the emitter connected to the second power supply through a second resistor.
, A signal to be amplified is input to a base, a collector is connected to the first power supply, an emitter is connected to the second power supply via a third resistor, and a first capacitor is connected to the first power supply. And a fourth transistor configured to be connected to the base of the transistor on the second power supply side of the push-pull amplifier via the first terminal, and one terminal connected to the base of the transistor on the second power supply side of the push-pull amplifier. And a second capacitor connected to the second power supply and the other terminal is connected to the second power supply. In a second mode, one terminal is connected to the third transistor. A third capacitor connected to the collector and having the other terminal connected to the first power supply or the second power supply is provided.

[0026]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A high frequency output circuit according to the present invention comprises a first transistor and a second transistor constituting a push-pull amplifier connected in series between a first power supply and a second power supply. In the connected high-frequency output circuit, a signal to be amplified is input to a base, a collector is connected to the first power supply via a first resistor, and a transistor on a first power supply side of the push-pull amplifier. And a third transistor having an emitter connected to the second power supply via a second resistor, a signal to be amplified being input to a base, and a collector connected to the third transistor. And a transistor connected to the second power supply side of the push-pull amplifier via a first capacitor, the emitter of which is connected to the second power supply via a third resistor. A fourth transistor configured to be connected to the second power supply, and one terminal connected to the base of the transistor on the second power supply side of the push-pull amplifier, and the other terminal connected to the second power supply. And a second capacitor.

[0027]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a high-frequency output circuit according to the present invention.

(First Specific Example) FIG. 1 is a diagram showing a first specific example of a high-frequency output circuit according to the present invention, and FIG. 1 shows a first power supply Vcc and a second power supply. In a high-frequency output circuit in which a first transistor Q2 and a second transistor Q3 constituting a push-pull amplifier are connected in series between the ground and a ground, a signal to be amplified is input to a base, and a collector is connected to a first resistor. The push-pull amplifier is connected to the base of a transistor Q2 on the first power supply side, and the emitter is connected to the first power supply Vcc via a second resistor R2. A third transistor Q1 configured to be connected to the second power supply GND, a signal to be amplified is input to the base, a collector is connected to the first power supply Vcc, and an emitter is connected to the third resistor R5. Through It is connected to the second power source GND, the fourth transistor via a first capacitor C1 and adapted to be connected to the base of the second power source side of the transistor Q3 of the push-pull amplifier Q4
And a second capacitor C3 having one terminal connected to the base of the transistor Q3 on the second power supply side of the push-pull amplifier, and the other terminal connected to the second power supply GND. A characteristic high frequency output circuit is shown.

Also, a third capacitor C4 having one terminal connected to the collector of the third transistor Q1 and the other terminal connected to the first power supply Vcc or the second power supply GND is provided. Is shown.

Hereinafter, the first specific example will be described in more detail.

A signal input terminal Vin1 is connected to the bases of the transistors Q4 and Q1 via a capacitor C2. The collector of the transistor Q1 has one terminal of the resistor R1, one terminal of the capacitor C4, and one of two transistors constituting a push-pull stage, Q.
The other terminal of the resistor R1 and the other terminal of the capacitor C4 are connected to the power supply Vcc.
The emitter of the transistor Q1 is connected to GND via the resistor R2. On the other hand, the collector of the transistor Q4 is connected to the power supply Vcc, and the emitter is connected to one terminal of the resistor R5 and one terminal of the capacitor C1.
Is connected to GND, and the other terminal of the capacitor C1 is connected to the base of another transistor Q3 forming a push-pull stage. The base of the transistor Q3 is connected to GND via a capacitor C3, and further, a bias is applied from a power supply circuit via a resistor R4.

The collector of the transistor Q2 is connected to the power supply V.
The emitter of the transistor Q3 is connected to GND via a resistor R3. Further, the emitter of the transistor Q2 and the collector of the transistor Q3 are connected to each other, and the connection between the emitter and the collector is connected to the output terminal Out.

In the high-frequency output circuit configured as described above, the signal input to the transistor Q2 is the same as that of the transistor Q2 if the input resistance of the transistor Q1 is RπQ1.
(R1 // (1 / jωC4)) /
Since it becomes (R2 + RπQ1) times, when this is expanded,

[0034]

(Equation 8)

When the frequency of the input signal increases (in the case of a harmonic), the denominator (R2 + rπQ) is obtained from ω = 2πf.
1) The value of (1 + jωR1 · C4) increases, and the gain converges to zero. Therefore, the input signal to the transistor Q2 has frequency characteristics, and the higher the frequency, the more the capacitor C4
Becomes dominant and the gain for harmonics converges to 0, so that the harmonic components transmitted to the transistor Q2 are reduced. As a result, by inserting the capacitor C4 between the power supply Vcc and the base of the transistor Q2, harmonic components transmitted to the transistor Q2 can be reduced. On the other hand, transistor Q
The signal input to the base of the transistor Q3 is obtained by adding the emitter follower composed of the transistor Q4 and the capacitor C3, so that the signal input to the transistor Q4 becomes {hFE · R3 //
(1 / jωC3)} / ｛(1 / jωC1) + hFE · R3 /
/ (1 / jωC3)} times.

[0036]

(Equation 9)

Is as follows. Now, assuming that the input signal has a high frequency (in the case of a harmonic), 1 << jωhFER3
(C1 + C3),

[0038]

(Equation 10)

## EQU1 ## The gain of the harmonic component in the transistor Q4 is 1 / (1 + C3 / C1) times the harmonic component input to the transistor Q4. Therefore, the capacitor C3 is inserted between GND and the base line of the transistor Q3, and the constants of the capacitors C3 and C1 are adjusted so that the gain of the high-frequency component is reduced, thereby reducing the harmonics transmitted to the transistor Q3. Is possible.
As a result, the transistor Q forming the push-pull stage
2. If the harmonic component of the signal input to Q3 is reduced,
It is possible to improve the linearity for a strong input and to reduce distortion. Also, regarding the output frequency characteristics of the entire circuit,
As shown in FIG. 2, a flat characteristic with less gain fluctuation is obtained in the use range as compared with the conventional example. (Second Specific Example) FIG. 3 shows a second specific example of the present invention.

The basic configuration of the circuit of FIG. 3 is substantially the same as that of FIG. 1, except that the capacitor C4 that short-circuits the base line to the transistor Q2 and the power supply Vcc is removed. In this case, the current ICQ3 flowing through the transistor Q3 in the push-pull stage is
Assuming that a power supply voltage for supplying a bias to V3 is Vbias and a base-emitter voltage of the transistor Q3 is VBEQ3, the following expression can be obtained.

[0041]

[Equation 11]

In the equation, R3 is a constant, and VBEQ3 is a dependent variable that is not a constant. VBEQ3 is

[0043]

(Equation 12)

In response to a change in the current ICQ3,
It is considered constant because the voltage change is small.

Even when the voltage amplitude of Vbias is considered, the maximum value of the current ICQ3 flowing through the transistor Q3 is determined by VBEQ3 and the resistor R3. In order to improve the linearity with respect to a strong input signal with the same current, the same resistance R3, and the same bias, the ratio of the current component of the harmonic signal in the ICQ3 may be reduced. Therefore, by short-circuiting the base line of the transistor Q3 using the capacitor C3, a harmonic signal of the signal input to the base of Q3 is removed, and the current component of the harmonic signal is reduced.

The current IcQ2 flowing through another transistor Q2 forming the push-pull stage is as follows.
Assuming that the center voltage of the signal input to the base of the transistor Q2 is VinQ2, the base-emitter voltage of the transistor Q2 is VBEQ2, and the load resistance connected to the output terminal Out is Zo, the following expression can be obtained.

[0047]

(Equation 13)

However, the difference from the above-described transistor Q3 is that VBEQ2 is Vbias + VCBQ3
(The collector-base voltage of Q3).

Generally, the relationship between ICQ2 and VBEQ2 can be expressed as follows.

[0050]

[Equation 14]

Therefore, the current I flowing through the transistor Q2 is
Since CQ2 increases in an exponential relationship with changes in VBEQ2, the transistor Q2 can ensure linearity with respect to a strong input signal even when including the current component of a harmonic signal.

As a result, the harmonic signal in the transistor Q2 is not reduced, but the linearity with respect to the strong input signal in the transistors Q2 and Q3 can be ensured.

Since the driving method of the transistor Q3 is the same as that of FIG. 1, the output frequency characteristic of the whole circuit is as shown in FIG.
As shown in FIG. 7, the characteristics are flatter than those of the conventional example, and improvement is expected.

This specific example is extremely advantageous from the viewpoint of the chip size because the number of capacitors can be reduced by one when the chip size is taken into consideration, as compared with the circuit shown in FIG.

Since the high frequency output circuit according to the present invention is constructed as described above, the linearity can be increased for a strong input signal, and the distortion can be reduced at the same time.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a first specific example of a high-frequency output circuit according to the present invention.

FIG. 2 is a diagram illustrating a frequency characteristic of FIG. 1;

FIG. 3 is a circuit diagram of a second specific example of the high-frequency output circuit according to the present invention.

FIG. 4 is a diagram illustrating a frequency characteristic of FIG. 3;

FIG. 5 is a circuit diagram of a conventional example.

FIG. 6 is a diagram illustrating a frequency characteristic of FIG. 5;

FIG. 7 is a circuit diagram of another conventional example.

FIG. 8 is a diagram showing the frequency characteristics of FIG. 7;

[Explanation of symbols]

 Q1 to Q4 Transistors R1 to R5 Resistors C1 to C4 Capacitors Vcc Power supply Gnd Ground

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Hiromi Saito 1-403, Kosugi-cho, Nakahara-ku, Kawasaki-shi, Kanagawa 53 F-term in NEC Icy Microcomputer Systems Co., Ltd. 5J090 AA01 AA17 AA41 CA22 GN01 HA02 HA25 HA29 TA03 5J091 AA01 AA17 AA41 CA22 HA02 HA25 HA29 TA01 TA03

Claims (2)

[Claims] 1. A high-frequency output circuit in which a first transistor and a second transistor constituting a push-pull amplifier are connected in series between a first power supply and a second power supply, and the high-frequency output circuit should be amplified to a base. A signal is input, a collector is connected to the first power supply via a first resistor, a base of a transistor on a first power supply side of the push-pull amplifier is connected, and an emitter is connected to a second power supply. A third transistor configured to be connected to the second power supply via a resistor, a signal to be amplified input to a base, a collector connected to the first power supply, and an emitter connected to the third power supply; A fourth transistor configured to be connected to the second power supply via a resistor and to be connected to a base of a transistor on a second power supply side of the push-pull amplifier via a first capacitor. And a second capacitor having one terminal connected to the base of the transistor on the second power supply side of the push-pull amplifier and the other terminal connected to the second power supply. High-frequency output circuit. 2. The semiconductor device according to claim 1, wherein one terminal is connected to a collector of the third transistor, and the other terminal is provided with a third capacitor connected to the first power supply or the second power supply. The high-frequency output circuit according to claim 1.