JP2001326358A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To manufacture a TFT capable of operating at a high speed by a method wherein a crystalline semiconductor film which controls a position and a size of crystal particles is manufactured and the crystalline semiconductor film is used for a channel formation region of the TFT. SOLUTION: After an organic resin film is formed so as to come into contact with a substrate 1 having translucence, the organic resin film is patterned to be in a predetermined profile, and an inorganic insulation film 3 is formed so as to coat the organic resin film 2, and an amorphous semiconductor film 4 is formed so as to come into contact with the inorganic insulation film. In the amorphous semiconductor film 4, a first region 5 existing above the organic resin film 2 is successively provided so as to be pinched between second regions 5b not existing above the organic resin film 2 via the inorganic insulation film. At this time, an island-like amorphous semiconductor film 5 is formed so that the second region has a width of 0.5 μm to 5 μm from an end of the first region. And, laser beams are applied on the island-like amorphous semiconductor film, thereby obtaining a crystalline semiconductor film 7 which controls a position and a size of crystal particles.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a crystalline semiconductor film formed on a substrate having an insulating surface,
And a method for manufacturing a semiconductor device using the semiconductor film as an active layer. In particular, the present invention relates to a thin film transistor (hereinafter, referred to as TFT) having an active layer formed of a semiconductor having crystallinity, that is, a crystalline semiconductor, and a semiconductor device using the same. Note that the semiconductor device here includes an electro-optical device such as a liquid crystal display device or an EL display device, and an electronic device including the electro-optical device as a component.

[0002]

2. Description of the Related Art An amorphous semiconductor film is formed on a transparent substrate having an insulating surface (hereinafter, referred to as a substrate), and a crystalline semiconductor obtained by crystallizing the amorphous semiconductor film is used as an active layer of a TFT. The technology used has been developed. For a light-transmitting substrate having an insulating surface, barium borosilicate glass, aluminoborosilicate glass, or the like is used in many cases. Although such a substrate is inferior to quartz glass in heat resistance, it is inexpensive on the market and has the advantage that a large-area substrate can be easily manufactured. In addition to the glass substrate, polyethylene terephthalate (PET), polyethylene naphthalate (PE)
The use of plastics having no optical anisotropy, such as N) and polyethersulfone (PES), has attracted attention, and the use of such substrates will produce large-area, light-weight and impact-resistant products. It becomes possible.

[0003] The laser annealing method is known as a crystallization technique capable of giving high energy to only an amorphous semiconductor film for crystallization without increasing the temperature of the substrate so much. In particular, an excimer laser that oscillates short-wavelength light having a wavelength of 400 nm or less is a typical laser that has been used since the beginning of development of this laser annealing method. In recent years, a technique using a solid-state laser, such as a YAG laser, has also been developed. These laser annealing methods are:
The laser beam is processed by an optical system so that it becomes a spot or a line on the surface to be irradiated, and the surface to be irradiated on the substrate is scanned with the processed laser light. Relative movement). For example, in the excimer laser annealing method using linear laser light, it is possible to perform laser annealing on the entire irradiated surface by scanning only in a direction perpendicular to the longitudinal direction, and since liquid crystal using TFTs is excellent in productivity, It is becoming mainstream as a display device manufacturing technique. The technology is a TFT (pixel TFT) that forms a pixel portion on a single substrate.
And a monolithic liquid crystal display device in which a TFT of a driving circuit provided around the pixel portion is formed.

Usually, a base film is formed so as to be in contact with a substrate, an amorphous semiconductor film is formed so as to be in contact with the base film, and a crystalline semiconductor film is formed by laser annealing the amorphous semiconductor film. You. This crystalline semiconductor film has a particle size of 0.3.
Single crystal grains of about 1 μm to 0.6 μm were aggregated, and the position and size of the crystal grains were random. In addition, in order to manufacture a TFT from the crystalline semiconductor film formed on the substrate in this manner, the crystalline semiconductor film is separated into island-like patterns. Could not be formed. Therefore, T
It was almost impossible to form the channel forming region, the source region and the drain region of the FT with a single crystal grain.

[0005] As compared with the inside of a crystal grain, an infinite number of recombination centers and trapping centers due to crystal defects and the like are present at the interface (crystal grain boundary) of the crystal grains. It is known that when carriers are trapped in the trapping center, the potential of the crystal grain boundary increases and acts as a barrier to the carriers, so that the current transport characteristics are reduced. In particular, the crystallinity of the channel formation region has a significant effect on the electrical characteristics of the transistor. In a TFT including many grain boundaries in a channel formation region, characteristics equivalent to those of a MOS transistor manufactured on a single crystal silicon substrate have not been obtained to date.

[0006] In order to solve such a problem, attempts have been made to increase the size of crystal grains. For example, `` H.
Kuriyama, S. Kiyama, S. Noguchi, T. Kuwahara, S.
Ishida, T. Noda, K. Sano, H. Iwata, H. Kawahara,
M. Ousumi, S. Tsuda, S. Nakano, and Y. Kuwano: Ja
n. J. Appl. Phys., vol. 30, p3700-p3703, 1991, reports on a laser annealing method in which an amorphous silicon film is irradiated with laser light while heating the substrate to 400 to 500 ° C. There is. Here, it is shown that by heating the substrate, the cooling rate of the silicon film is reduced to about one third, and the crystal grains can be made large.

Further, "R. Ishihara and A. Burtsev: A
In M-LCD '98., P153-156, 1998, a refractory metal film is formed between a substrate and underlying silicon oxide, and an amorphous silicon film is formed above the refractory metal film. There is a report on a laser annealing method in which excimer laser light is irradiated from both the film side and the substrate side. Laser light emitted from the film side is absorbed by the silicon film and converted into heat. On the other hand, the laser light emitted from the substrate side is absorbed by the high melting point metal film and turned into heat, and heats the high melting point metal film at a high temperature. The silicon oxide layer between the heated refractory metal film and the silicon film acts as a heat accumulation layer, so that the cooling rate of the molten silicon film can be reduced. Here, it is reported that by forming a high-melting-point metal film at an arbitrary location, a crystal grain having a maximum diameter of 6.4 μm can be obtained at an arbitrary location.

Further, "W. Yeh et al .: Jpn. J. Appl.
Phys., Vol. 38, pp. L110-L112, 1999 ”, a silicon oxide film as a base film formed on a substrate was made into a porous silicon oxide film, and an amorphous silicon film formed on it was irradiated with laser light. There is a report on the laser annealing method of irradiating with. By using the porous silicon oxide film as the base film, heat conduction from the amorphous silicon film to the substrate can be reduced, so that the cooling rate of the amorphous silicon film can be reduced, and the crystal grain size can be reduced. Attempts to increase the grain size have been reported.

[0009]

However, in the method of laser annealing while heating, it is not possible to use a substrate having no heat resistance, such as plastic, as the substrate.
And when using relatively inexpensive barium borosilicate glass or aluminoborosilicate glass for the substrate,
The heating temperature is limited due to the problem of heat resistance. Also,
The crystal grain size obtained by this method is about 0.3 μm, which is not a sufficient size.

In a method of forming a refractory metal film between a substrate and a base film, forming an amorphous silicon film thereon, and performing laser annealing, the semiconductor film formed by this method is used as an active layer. Although it is structurally possible to form a top gate type TFT as described above, the parasitic capacitance is generated by the silicon oxide film provided between the semiconductor film and the refractory metal film, so that power consumption increases. It is difficult to realize a high-speed operation of the TFT. On the other hand, by using a high melting point metal film as the gate electrode, it can be considered that it can be effectively applied to a bottom gate type or inverted stagger type TFT. However, in the three-layer structure, even if the thickness of the semiconductor film is excluded, the film thickness of the refractory metal film and the silicon oxide layer is suitable for the crystallization step and for the characteristics as the TFT element. Since the film thickness does not always match, it is impossible to satisfy both the optimum design in the crystallization step and the optimum design of the element structure at the same time.

Further, if a high melting point metal film having no translucency is formed on the entire surface of the glass substrate, it becomes impossible to manufacture a transmission type liquid crystal display device. Since a chromium (Cr) film or a titanium (Ti) film used as a high melting point metal material has high internal stress, there is a high possibility that a problem occurs in adhesion to a glass substrate. Further, the influence of the internal stress extends to the semiconductor film formed thereon, and there is a great possibility that the internal stress acts as a force for giving a strain to the formed crystalline semiconductor film.

On the other hand, in order to control a threshold voltage (hereinafter, referred to as Vth), which is an important characteristic parameter in a TFT, within a predetermined range, in addition to controlling valence electrons in a channel forming region, the active layer needs to be controlled. It is necessary to reduce the charge defect density of a base film and a gate insulating film which are closely formed by an insulating film and to consider a balance of internal stresses. In response to such demands, materials containing silicon as a constituent element, such as a silicon oxide film and a silicon oxynitride film, have been suitable. Therefore, there is a concern that providing a high melting point metal film between the substrate and the underlayer may break the balance.

In a method in which a porous silicon oxide film is used as a base film, an amorphous silicon film is formed thereon, and laser annealing is performed, the porous silicon oxide film is made of a normal TFT.
It is anticipated that the etching rate for a hydrogen fluoride (HF) -based etchant, which is an etchant for a silicon oxide film used in the fabrication of a silicon oxide film, will be high, and it will be difficult to control the etching.

The present invention is a technique for solving such a problem, in which a crystalline semiconductor film in which the positions and the sizes of crystal grains are controlled is manufactured, and the crystalline semiconductor film is formed by T
A TFT capable of high-speed operation is realized by using the TFT in a channel formation region of an FT. Further, it is another object of the present invention to provide a technique in which such a TFT can be applied to various semiconductor devices such as a transmission type liquid crystal display device and a display device using an electroluminescence material.

[0015]

In order to solve the problem, the inventors of the present invention heated and melted the island-shaped amorphous semiconductor film and solidified it by cooling when the island-shaped amorphous semiconductor film was crystallized by laser annealing. In the transient phenomenon that occurs, a temperature gradient is provided from the edge of the island-shaped silicon layer to the central region of the island-shaped silicon layer, thereby controlling the crystal nucleation region, the crystal nucleation generation rate, and the crystal grain growth direction, thereby forming a crystal. The grain size was increased.

FIG. 10 shows a conventional laser annealing method. FIG. 10 is a cross-sectional view in the width direction of the channel formation region of the TFT. However, in this specification, the direction connecting the source and the drain of the TFT is defined as the length direction of the channel formation region, and the direction perpendicular to the length direction of the channel formation region is defined as the width direction of the channel formation region. As shown in FIG. 10, when a structure in which an inorganic insulating film 2202 made of silicon oxide is formed over a substrate 2201 and an amorphous silicon layer 2203 is provided in an island shape over the inorganic insulating film is irradiated with laser light,
The amorphous silicon layer is heated and melted by absorbing laser light. The molten silicon layer becomes a crystalline silicon layer by being cooled and solidified after the end of laser beam irradiation (FIG. 1).
Such a configuration denoted by 0 is hereinafter referred to as Configuration 1.) Configuration 1
In the case of, the amount of heat released to the substrate from the interface between the silicon layer and the inorganic insulating film through the inorganic insulating film during and after the laser irradiation is closer to the edge region of the island-shaped silicon layer than to the central region of the island-shaped silicon layer. growing. Therefore, the temperature is lower in the region at the end of the island-shaped silicon layer than in the center region of the island-shaped silicon layer. That is, since heat flows in the direction from the central region of the island-shaped silicon layer toward the region at the edge of the island-shaped silicon layer, solidification starts at the edge of the island-shaped silicon layer, and crystal grains grow toward the central region. . The inventors have confirmed through experiments that the crystal grain growth distance from the end of the island-shaped silicon layer having such a structure is only about 2 μm at the maximum.

For this reason, the present inventor has disclosed in Japanese Patent Application Nos.
In the specification of 4722, a configuration as shown in FIG. 11 is described. FIG. 11 is a cross-sectional view in the width direction of a channel formation region. An organic resin film 2302 having a predetermined shape is provided over a substrate 2301, an inorganic insulating film 2303, an amorphous semiconductor film 2304 in an island shape are formed, Annealing,
A method for manufacturing a crystalline semiconductor film in which the positions and sizes of crystal grains are controlled is described (this configuration shown in FIG. 11 is hereinafter referred to as configuration 2). In the configuration 2, by providing a low thermal conductivity film such as an organic resin film below the amorphous semiconductor film,
The rate of heat diffusion from the liquid semiconductor film heated and melted by the laser annealing to the substrate side can be reduced. In the process of changing the liquid-phase semiconductor film to the solid-state, by suppressing thermal diffusion to the lower layer, the cooling rate of the semiconductor film is reduced, and crystals having a large grain size are formed.

FIG. 1 shows a manufacturing method of the present invention disclosed in this specification. FIG. 1 is a cross-sectional view in the width direction of a channel forming region of a TFT. As shown in FIG. 1, after forming an organic resin film in contact with a light-transmitting substrate 1, the organic resin film is patterned into a predetermined shape, and an inorganic insulating film 3 covering the organic resin film 2 is formed. The amorphous semiconductor film 4 is formed in contact with the inorganic insulating film. And the amorphous semiconductor film 3
Is provided continuously so that the first region 5a existing above the organic resin film 2 via the inorganic insulating film is sandwiched by the second region 5b not existing above the organic resin film 2. . At this time, the island-shaped amorphous semiconductor film 5 is formed so that the second region has a width of 0.5 μm to 5 μm from the end of the first region. By irradiating the island-shaped amorphous semiconductor film with laser light, the crystalline semiconductor film 7 in which the position and the size of the crystal grain are controlled is manufactured.

As described above, the first region existing above the organic resin film via the inorganic insulating film and the second region not existing above the organic resin film are provided, so that the laser annealing is performed. During the formation process, solidification starts from the end of the island-shaped semiconductor film in the second region, and crystal growth occurs toward the first region, which is the central portion of the island-shaped semiconductor film. Since the first region has the organic resin below, the cooling rate is lower than that of the second region where the organic resin does not exist below. As a result, a large temperature gradient can be realized from the edge of the island-shaped semiconductor film to the central region of the island-shaped semiconductor film.

The effectiveness of the configurations 1 and 2 and the configuration of the present invention were compared by heat conduction analysis simulation. The film thickness formed on the glass substrate is 100 nm of an organic resin film, 150 nm of a silicon oxide film, and 55 nm of an amorphous silicon film. These structures have an energy density of 0.3 J / cm ² and a pulse half width of 3
When the laser light of 0 ns is irradiated, the melting of the semiconductor layer
The temperature history of the solidification process was simulated by heat conduction analysis.
However, since the exact value of the thermal conductivity of the organic resin film is unknown, it is assumed in this calculation that the thermal conductivity is 1/10 that of the silicon oxide film.

FIG. 12 compares the solidification start time at the interface between the semiconductor layer and the base insulating film, which is derived from the results of the heat conduction analysis simulation, in Configurations 1, 2 and the configuration of the present invention. The horizontal axis in FIG. 12 is the position in the direction from the end of the island-shaped semiconductor to the inside, and the vertical axis is the solidification start time.

In the case of the structure 1, a temperature gradient is formed in a region within 1.5 μm from the edge of the island-shaped silicon layer.
It can be seen that the temperature is constant in the further inner area. The position and size of the crystal grains formed in the region without the temperature gradient are random. In a region within 1.5 μm from the edge of the island-shaped silicon layer, there is a temperature gradient, so that solidification starts from the edge of the island-shaped silicon film, and a directional crystal grows toward the inside of the island-shaped silicon film. However, the crystal growth distance does not exceed 1.5 μm.

In the case of the configuration 2, although a temperature gradient is formed in a region within 2.5 μm from the edge of the island-shaped silicon layer,
In the region further inside, the temperature is constant. In the structure 2, the presence of the organic resin film having low thermal conductivity causes the structure 1
The cooling rate of the island-shaped semiconductor film is smaller than that of the island-shaped semiconductor film. Therefore, a larger temperature gradient can be realized from the edge of the island-shaped semiconductor film toward the inner region.

In the case of the structure of the present invention, a temperature gradient is formed in a region within 4.5 μm from the edge of the island-shaped silicon layer.
In the configuration of the present invention, the effect that the edge of the island-shaped silicon film is easy to cool quickly and the effect that it is difficult to cool due to the presence of the organic resin film having low thermal conductivity inside the island-shaped silicon film are compared with the configuration 2. And can be realized more effectively. That is, in the configuration 2, since the low thermal conductivity organic resin film is also present immediately below the edge of the island-shaped silicon film, the effect that the edge of the island-shaped silicon film is easily cooled most quickly is suppressed. On the other hand, in the configuration of the present invention, the organic resin film having low thermal conductivity does not exist immediately below the edge of the island-shaped silicon film. As a result, a temperature gradient can be formed in a wide range from the edge of the island-like semiconductor film toward the inner region (that is, a solidification start time difference can be made), so that crystal growth can be performed even in the inner region of the island-like silicon. It was found that it could be stretched effectively.

FIG. 13 shows a bird's-eye view in which the crystal grains formed by the structure 1, the structure 2 and the structure of the present invention are compared, and the cross section of the channel forming region is taken in the width direction. FIG. 13 (a),
(B) and (c) are the cases of the configuration, configuration 1 and configuration 2 of the present invention, respectively.

Therefore, in the structure of the present invention, an organic resin film having a predetermined shape in contact with a light-transmitting substrate and an inorganic insulating film covering the organic resin film are provided. The first region formed of the crystalline semiconductor film existing above the organic resin film via the inorganic insulating film is continuously sandwiched by the second region formed of the crystalline semiconductor film not existing above the organic resin film. A semiconductor device characterized by being present as a semiconductor device.

In the semiconductor device, the second region includes the island-shaped crystalline semiconductor film so as to have a width of 0.5 μm to 5 μm from an end of the first region.

The inorganic insulating film is a single-layer film selected from a silicon oxide film, a silicon nitride film, and a silicon oxynitride film;
Or a laminated film thereof, and the film thickness is 50 nm to 5 nm.
00 nm (preferably 100 nm to 300 nm).

In another aspect of the invention, a base insulating film may be provided between the substrate and the organic resin film.

The organic resin film is made of BCB (benzocyclobutene) resin, polyimide resin (fluorine-containing polyimide), acrylic resin, siloxane resin, fluorine-containing paraxylene, fluorine-containing parylene, Teflon,
A single-layer film selected from fluoropolyallyl ether, PFCB, and polysilazane, or a laminated film thereof,
The organic resin film has a thermal conductivity of 1.0 Wm ^-1 K ^-1 or less.

It is preferable that the organic resin film has photosensitivity because patterning can be easily performed.

Therefore, the structure of the invention for realizing the above structure is to form an organic resin film in contact with a light-transmitting substrate, and then pattern the organic resin film into a predetermined shape. An inorganic insulating film covering an organic resin film having a shape is formed, and an amorphous semiconductor film is formed in contact with the inorganic insulating film. Then, the first region existing above the organic resin film with the amorphous semiconductor film interposed therebetween through the inorganic insulating film is continuously sandwiched by the second region not existing above the organic resin film. And irradiating the island-shaped amorphous semiconductor film with a laser beam to form an island-shaped crystalline semiconductor film.

[0033] The second area is located at a distance of 0.1 mm from the edge of the first area.
A method for manufacturing a semiconductor device, wherein an island-shaped crystalline semiconductor film is formed to have a width of 5 μm to 5 μm.

In the above manufacturing method, the inorganic insulating film and the amorphous semiconductor film may be formed continuously without touching the atmosphere.

In the above-mentioned manufacturing method, the laser beam may be irradiated from the front side of the substrate, or may be irradiated simultaneously from the front side and the back side of the substrate.

[0036]

Embodiments of the present invention will be described below.

FIG. 1 is a sectional view in the width direction of the channel forming region. In the present invention, as shown in FIG. 1, an amorphous semiconductor film 4 is formed on the organic resin film 2 with the inorganic insulating film 3 interposed therebetween.
The first region 5a present above the organic resin film 2
Is formed continuously so as to sandwich a second region 5b not present above the first region, and the second region has an island-shaped amorphous semiconductor having a width of 0.5 μm to 5 μm from an end of the first region. A film 5 is formed, and a laser beam 6 is applied to the island-shaped amorphous semiconductor film.
Is applied to form the island-shaped crystalline semiconductor film 7.

The laser annealing method of the present invention uses a pulse oscillation type or continuous emission type excimer laser, YAG laser, or argon laser as its light source, and forms a linear or rectangular island-like laser beam with an optical system. Is defined as the front side (in this specification, defined as the surface on which the island-shaped semiconductor film is formed) or the back side (in this specification, the island-shaped semiconductor film is (Defined as the surface opposite to the formed surface) or from both the front and back sides of the substrate.

In the laser annealing method, the semiconductor film is heated and melted by optimizing the conditions of the laser beam (or laser beam) to be irradiated, and the generation density of crystal nuclei and the crystal growth from the crystal nuclei are controlled. And

A laser annealing method is used to crystallize the island-shaped amorphous semiconductor film 5 to form the island-shaped crystalline semiconductor film 7. The laser annealing method of the present invention can be applied to a pulse oscillation type or continuous emission type excimer laser, YA
G laser or argon laser as its light source,
A laser beam formed into an island shape in a linear or rectangular shape by an optical system is applied to the front side of the substrate on which the island-shaped semiconductor film is formed with respect to the semiconductor film (the surface on which the island-shaped semiconductor film is formed in this specification). Irradiation from the back side (defined as a surface opposite to the surface on which the island-shaped semiconductor film is formed in this specification), or irradiation from both the front side and the back side of the substrate.

FIG. 2 is a view for explaining an example of the basic configuration of the optical system of the laser annealing apparatus according to the present invention. As the laser oscillator 1101, an excimer laser, a YAG laser, an argon laser, or the like is used. FIG.
(A) is a diagram of the optical system 1100 viewed from the side, and a laser beam emitted from a laser oscillator 1101 is split in a vertical direction by a cylindrical lens array 1102. The divided laser light is applied to a cylindrical lens 110.
4, the light is once condensed and then spread to form a mirror 1107
After that, the laser beam is converted into a linear laser beam on the irradiation surface 1109 by the cylindrical lens 1108. Thereby, the energy distribution in the width direction of the linear laser light can be made uniform. FIG. 2B is a diagram of the optical system 1100 as viewed from above, and the laser light emitted from the laser oscillator 1101 is divided in a horizontal direction by a cylindrical lens array 1102. After that, the laser light is combined into one at the irradiation surface 1109 by the cylindrical lens 1105. Thereby, the energy distribution in the longitudinal direction of the linear laser light can be made uniform.

The laser annealing method is particularly suitable when an excimer laser emitting a laser beam having a wavelength of 400 nm or less is used as a light source because the semiconductor film can be preferentially heated. Since the pulse width of the excimer laser is several nanoseconds to several tens of nanoseconds, for example, 30 nanoseconds, when the pulse oscillation frequency is set to 30 Hz, the semiconductor film is instantaneously heated by the pulse laser light, and cooled for a much longer time than the heating time Will be done. Immediately after the end of the laser beam irradiation, heat diffuses through the inorganic insulating film, so that the second region starts cooling rapidly and changes to a solid state, whereas the first region has an organic resin film. Accordingly, heat diffusion from the semiconductor film to the substrate is suppressed as compared with the second region, and the cooling rate is reduced.

The organic resin film 2 is formed on the substrate in accordance with the arrangement of the active layer of the TFT (the semiconductor film in which the channel forming region, the source region, the drain region, and the LDD region are formed).

The organic resin film 2 is not particularly limited as long as it has a thermal conductivity of 1.0 Wm ^-1 K ^-1 or less, preferably 0.3 Wm ^-1 K ^-1 or less. The thermal conductivity of the organic resin film 2 is such that an inorganic insulating film containing silicon (1 to 2) which is in contact with the substrate (quartz glass: 1.4 Wm ^-1 K ^-1 ) and the organic resin film.
0 Wm ^-1 K ^-1 ), so that thermal diffusion from the semiconductor film to the substrate can be sufficiently suppressed.

For example, as the organic resin film 2, BCB
(Benzocyclobutene) resin, polyimide resin (fluorine-containing polyimide), acrylic resin, siloxane resin, fluorine-containing paraxylene, fluorine-containing parylene, Teflon, fluoropolyallyl ether, PFCB, polysilazane, and the like. Above all, B having high heat resistance of about 450 ° C., plasma resistance and flatness
CB (benzocyclobutene) resin is most preferred in the present invention.

Further, since the inorganic insulating film 3 and the amorphous semiconductor film are laminated on the organic resin film 2, it is desirable to form the surface by a spin coating method to make the surface flat. Is preferably tapered to provide good coverage. In addition, when an organic resin film is formed using a coating method typified by a spin coating method, the cost is significantly lower than that of an inorganic insulating film using a CVD apparatus, which is advantageous because a complicated film formation process is not required. is there. In addition, if a photosensitive organic resin film is used also in the pattern processing, the number of steps can be reduced because photolithography using a photoresist is not required. In addition, even when a photosensitive organic resin film is not used, the etching rate with the substrate or the base insulating film can be easily secured and the controllability is high as compared with the case of etching the inorganic insulating film, which is advantageous.

The thickness of the organic resin film 2 is 100 nm.
It is desirable to set it to 500 nm. By adjusting the film thickness, the cooling rate in the crystallization step can be controlled. When the thickness is smaller than 100 nm, the flatness is deteriorated. If the thickness is larger than 500 nm, the step is too large, and it becomes difficult to form a laminated film.

As the inorganic insulating film 3 containing silicon as a constituent element, a single layer film selected from a silicon oxide film, a silicon nitride film, and a silicon oxynitride film by a PCVD method, an LPCVD method, or a sputtering method, or These stacked films can be used as appropriate. The inorganic insulating film has a role of preventing impurity diffusion from the substrate and the organic resin film, and a role of improving adhesion to a stacked semiconductor film. When a BCB resin is used as the organic resin film, the heat resistance of a single film is about 450 ° C., but when this is covered with a silicon oxide film, it can withstand a heat treatment of about 550 ° C. As described above, the inorganic insulating film has a function of protecting the organic resin film and has an effect of improving the heat resistance of the organic resin film.

The thickness of the inorganic insulating film containing silicon as a constituent element is 50 nm to 500 nm (preferably 1 nm).
00 nm to 300 nm). When the thickness of the inorganic insulating film is greater than 500 nm, the heat capacity of the inorganic insulating film itself increases, so that the effect of suppressing the thermal diffusion of the organic resin having low thermal conductivity from the semiconductor film to the substrate side is likely to be reduced. . Further, when the thickness of the inorganic insulating film is smaller than 50 nm, the coverage is deteriorated and the organic resin film may not be covered.

As an amorphous semiconductor film formed on an inorganic insulating film containing silicon as an element, there are an amorphous semiconductor film and a microcrystalline semiconductor film, and an amorphous semiconductor film such as an amorphous silicon germanium film. A compound semiconductor film having a structure may be used. The method for forming an amorphous semiconductor film is PCV.
A known method such as the D method, the LPCVD method, and the sputtering method may be used.

Referring to FIG. 1, an example of manufacturing an island-shaped crystalline semiconductor film will be briefly shown as an example of an embodiment of the manufacturing method of the present invention.

First, an organic resin film is formed on a substrate 1 and patterned to form an organic resin film 2 having a desired shape. (Fig. 1 (A))

Next, the inorganic insulating film 3 covering the organic resin film 2
To form Subsequently, an amorphous semiconductor film 4 is formed on the inorganic insulating film 3. (FIG. 1B) Further, here, the inorganic insulating film 3 and the amorphous semiconductor film 4 may be continuously formed without being exposed to the air to reduce the intrusion of impurities.

Next, the amorphous semiconductor film is patterned to complete the island-shaped amorphous semiconductor film 5 composed of the first region 5a and the second region 5b. (Fig. 1 (C))

Next, the amorphous semiconductor film is crystallized by irradiating laser light 6 to form a crystalline semiconductor film 6.
(Fig. 1 (D))

Hereinafter, the island-shaped crystalline semiconductor film formed by the process shown in FIG. 1 is used as an active layer (a semiconductor film in which a channel formation region, a source region, a drain region, and an LDD region are formed) of a TFT. TF according to known methods
By manufacturing T, a semiconductor device having excellent electric characteristics can be obtained.

FIG. 3 is a cross-sectional view in the width direction of the channel formation region. However, a base insulating film 3008 may be provided as shown in FIG. This base insulating film 3008
While preventing impurity diffusion from the substrate 3001,
001 and the organic resin film 3002 can be improved in adhesion.

The term “cooling rate” in this specification refers to a cooling rate of a semiconductor film after being melted by a laser beam.

FIG. 4 is a cross-sectional view of the channel formation region in the width direction. As shown in FIG. 4, the crystallization step is not performed only by the ordinary laser annealing method. Laser light 400 from front side and back side
6 may be irradiated simultaneously. In addition, a pulse oscillation type or a continuous emission type may be used as the laser light. In addition, the laser beam is a linear beam, spot beam,
It can be a planar beam or the like, and the shape is not limited.

The laser annealing method may be performed while heating the substrate. Further, the thermal annealing method and the laser annealing method may be combined. Further, a crystallization method using a catalyst element may be applied.

The present invention having the above configuration will be described in more detail with reference to the following embodiments.

[Embodiment 1] Here, a method for simultaneously manufacturing a pixel portion and a TFT (n-channel TFT and p-channel TFT) of a driving circuit provided around the pixel portion on the same substrate is described in detail. This will be described with reference to FIGS.

First, an organic resin film (thickness: 100 nm to 500 nm) is formed on a light-transmitting substrate 1001 by spin coating or the like, followed by baking. In this example, a benzocyclobutene film (hereinafter, referred to as a BCB film) was applied as an organic resin film by a spin coating method, and then baked (at 300 ° C. for one hour) to obtain a film thickness of 200 nm. The thickness of the BCB film used in this embodiment can be easily controlled by the spin speed. Further, when not used for a transmissive display element (such as a liquid crystal panel), the light-transmitting substrate 1001 does not need to be transparent, and has heat resistance and resistance to a process using a subsequent CVD apparatus. It goes without saying that the organic resin film is not limited to the BCB film as long as it has a plasma property.

Next, the BCB film is patterned by a known photolithography method, and island-shaped organic resin films 100a to 100f are formed by dry etching. In this embodiment, dry etching is performed using a mixed gas of O ₂ and CF ₄ . However, the position of the island-shaped organic resin film is formed in accordance with the island-shaped crystalline silicon film formed in a later step. Further, when a photosensitive material is used for the organic resin film, patterning can be performed without using a resist, so that the manufacturing process can be shortened.

Next, the inorganic insulating film 10 having a thickness of 50 nm to 500 nm is covered by a known method by covering the island-shaped organic resin film.
Form one. PCVD, LP
A single-layer film selected from a silicon oxide film, a silicon nitride film, and a silicon oxynitride film or a stacked film thereof can be used by a known method such as a CVD method or a sputtering method. However, when using a silicon nitride film or a silicon oxynitride film, it is necessary to consider the balance of internal stress. This inorganic insulating film is formed for the purpose of preventing impurity diffusion from the substrate, the purpose of improving the adhesion with the semiconductor film to be formed later, and the purpose of securing the selectivity with the semiconductor film to be etched later. Have been. In this embodiment, a silicon oxide film having a thickness of 100 nm is formed by a PCVD method.

Next, the amorphous semiconductor film 1 is formed on the inorganic insulating film.
02 is formed. In this embodiment, the film thickness is 5 by the PCVD method.
5nm amorphous silicon film (amorphous silicon film)
Was formed. (FIG. 5A) A semiconductor film having an amorphous structure is not limited to an amorphous silicon film, but includes an amorphous structure such as a microcrystalline semiconductor film or an amorphous silicon germanium film. A compound semiconductor film may be used. Further, the inorganic insulating film and the amorphous semiconductor film may be continuously formed without being exposed to the air. Then, the amorphous semiconductor film 2
No. 08 unnecessary portions were removed by etching.
3e is formed. (FIG. 5 (B))

Next, the amorphous semiconductor film is crystallized by a laser annealing method. 1 width for laser beam
Irradiation is performed from the substrate surface side as shown in FIG. 5B using a linear beam of 00 to 1000 μm. In this embodiment, a laser irradiation apparatus using a pulse oscillation type excimer laser as a light source is used.

In the laser light crystallization step, when a pulsed laser light is irradiated, the island-shaped semiconductor film is instantaneously heated to a molten state. Thereafter, in the second region, heat is sequentially transferred from the lower surface of the molten silicon film to the substrate through the inorganic insulating film, and the molten silicon film is cooled from the end of the island-shaped silicon film.

On the other hand, in the first region, heat is sequentially conducted from the lower surface of the molten silicon film to the organic resin film and the substrate through the inorganic insulating film, so that the molten silicon film is gradually cooled. To go.

As described above, the first region where the amorphous semiconductor film exists above the organic resin film via the inorganic insulating film and the amorphous semiconductor film does not exist above the organic resin film By providing the second region, the temperature distribution of the island-shaped semiconductor film after laser irradiation is increased, the lattice defect density is very small, and the island-shaped crystalline silicon film 104 having a large crystal grain size is provided.
a to 104e could be obtained at desired positions. When this island-shaped crystalline semiconductor film is used for an active layer of a TFT, excellent characteristics can be obtained.

After the formation of the semiconductor layers 104a to 104e, a small amount of impurity element (boron or phosphorus) may be doped in order to control the threshold value of the TFT.

Next, a gate insulating film 107 covering the semiconductor layers 104a to 104e is formed. Gate insulating film 107
Uses a plasma CVD method or a sputtering method and has a thickness of 4
The insulating film containing silicon is formed to have a thickness of 0 to 150 nm. In this embodiment, 110 nm is formed by a plasma CVD method.
Silicon oxynitride film (composition ratio Si = 32%, O
= 59%, N = 7%, H = 2%). Needless to say, the gate insulating film is not limited to the silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.

When a silicon oxide film is used,
TEOS (Tetraethyl Orthosilica) by plasma CVD
te) and O ₂ , a reaction pressure of 40 Pa, and a substrate temperature of 30
It can be formed by discharging at a high-frequency (13.56 MHz) power density of 0.5 to 0.8 W / cm ² at 0 to 400 ° C. The silicon oxide film thus manufactured can obtain good characteristics as a gate insulating film by subsequent thermal annealing at 400 to 500 ° C.

Next, as shown in FIG. 5C, a first conductive film 108 having a thickness of 20 to 100 nm and a second conductive film 10 having a thickness of 100 to 400 nm are formed on the gate insulating film 107.
9 are laminated. In this embodiment, a 30 nm-thick T
a first conductive film 408 made of an aN film and a film thickness of 370 nm
The second conductive film 109 composed of the W film was formed by lamination. T
The aN film was formed by a sputtering method, and was sputtered using a Ta target in an atmosphere containing nitrogen. The W film was formed by a sputtering method using a W target. In addition, thermal CV using tungsten hexafluoride (WF ₆ )
It can also be formed by Method D. In any case, it is necessary to lower the resistance in order to use it as a gate electrode,
It is desirable that the resistivity of the W film be 20 μΩcm or less. The resistivity of the W film can be reduced by enlarging the crystal grains. However, when the W film contains a large amount of impurity elements such as oxygen, crystallization is inhibited and the resistance is increased. Therefore, in this embodiment, the W film is formed by a sputtering method using a high-purity W (purity of 99.9999%) target, and further taking care not to mix impurities from the gas phase during film formation. By forming, a resistivity of 9 to 20 μΩcm could be realized.

In this embodiment, the first conductive film 108
Is TaN and the second conductive film 109 is W, but there is no particular limitation, and any of Ta, W, Ti, Mo, Al, Cu,
It may be formed of an element selected from Cr and Nd, or an alloy material or a compound material containing the element as a main component.
Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus may be used. Also, A
A gPdCu alloy may be used. A first conductive film formed of a tantalum (Ta) film, a second conductive film formed of a W film, a first conductive film formed of a titanium nitride (TiN) film, and a second conductive film formed of a titanium nitride (TiN) film; As a W film, the first
The first conductive film is formed of a tantalum nitride (TaN) film, the second conductive film is formed of a tantalum nitride (TaN) film, the second conductive film is formed of a tantalum nitride (TaN) film, and the second conductive film is formed of a Cu film. May be combined.

Next, masks 110 to 115 made of resist are formed by photolithography, and a first etching process for forming electrodes and wirings is performed. The first etching process is performed under the first and second etching conditions. In this embodiment, the first etching condition is I
Using a CP (Inductively Coupled Plasma) etching method, using CF ₄ , Cl _2, and O _{2 as} etching gases, and using a gas flow ratio of 25/2.
At 5/10 (sccm), 500 W RF (13.56 MHz) power was applied to the coil-type electrode at a pressure of 1 Pa to generate plasma and perform etching. Here, a dry etching apparatus (Model E645- □ ICP) using ICP manufactured by Matsushita Electric Industrial Co., Ltd. was used. A 150 W RF (13.56 MHz) power is also applied to the substrate side (sample stage), and a substantially negative self-bias voltage is applied. The W film is etched under the first etching conditions to form the first film.
Of the conductive layer is tapered.

Then, a mask 110 made of resist is formed.
The etching conditions were changed to the second etching conditions without removing 115, CF ₄ and Cl ₂ were used as etching gases, the respective gas flow rates were 30/30 (sccm), and the coil type electrode was formed at a pressure of 1 Pa. RF (13.56 MHz) power of 500 W was applied to generate plasma, and etching was performed for about 30 seconds. The substrate side (sample stage) also has a 20 W RF (13.56
MHz) power is applied and a substantially negative self-bias voltage is applied. Under the second etching condition in which CF ₄ and Cl ₂ are mixed, the W film and the TaN film are etched to the same extent. Note that in order to perform etching without leaving a residue on the gate insulating film, the etching time is preferably increased by about 10 to 20%.

In the first etching process, the shape of the resist mask is made appropriate,
The ends of the first conductive layer and the second conductive layer are tapered due to the effect of the bias voltage applied to the substrate side. The angle of the tapered portion is 15 to 45 °. Thus, by the first etching process, the first shape conductive layers 117 to 122 (the first conductive layers 117 a to 122 a and the second conductive layers 117 b to 117 b) each including the first conductive layer and the second conductive layer are formed.
2b) is formed. Reference numeral 116 denotes a gate insulating film,
The region not covered with the conductive layers 117 to 122 having the shape of
A region that is etched and thinned by about 50 nm is formed.

Then, the resist mask is removed.
The first doping process without adding an n-type semiconductor layer.
The added impurity element is added. (FIG. 6 (A)) Dopin
Can be done by ion doping or ion implantation
Good. The condition of the ion doping method is that the dose amount is 1 × 10¹³
~ 5 × 10^Fifteenatoms / cm^TwoAnd the acceleration voltage is 60 to 100
Performed as keV. In this embodiment, the dose is 1.5 × 1
0^Fifteenatoms / cm^TwoAnd the acceleration voltage is set to 80 keV.
Was. Element belonging to Group 15 as an impurity element imparting n-type
Using arsenic, typically phosphorus (P) or arsenic (As)
However, phosphorus (P) was used here. In this case, the conductive layer 1
17 to 121 are masses for the impurity element imparting n-type.
And the self-aligned high-concentration impurity regions 123 to 12
7 is formed. In the high-concentration impurity regions 123 to 127,
1 × 10²⁰~ 1 × 10^{twenty one}atoms / cm ^ThreeN type in the concentration range of
An impurity element to be added is added.

Next, a second etching process is performed without removing the resist mask. Here, the W film is selectively etched using CF ₄ , Cl ₂ and O _{2 as} an etching gas. At this time, the first conductive layers 128b to 133b are formed by the second etching process. On the other hand, the second conductive layers 117a to 122a are hardly etched to form the second conductive layers 128a to 133a.
Next, a second doping process is performed to obtain the state in FIG. Doping is performed on the second conductive layers 117a to 122
Using a as a mask for the impurity element, doping is performed so that the impurity element is added to the semiconductor layer below the tapered portion of the first conductive layer. Thus, impurity regions 134 to 138 overlapping with the first conductive layer are formed. The concentration of phosphorus (P) added to the impurity region has a gentle concentration gradient according to the thickness of the tapered portion of the first conductive layer. Note that in the semiconductor layer overlapping with the tapered portion of the first conductive layer, the impurity concentration is slightly reduced from the end of the tapered portion of the first conductive layer toward the inside, but is approximately the same. . Further, the first impurity region 123
To 127 are also doped with an impurity element.
To 143 are formed.

Next, a third etching process is performed without removing the resist mask. In the third etching treatment, the tapered portion of the first conductive layer is partially etched to reduce a region overlapping with the semiconductor layer. In the third etching, CHF ₃ is used as an etching gas.
Using a reactive ion etching method (RIE method). By the third etching, the first conductive layer 144 is formed.
To 149 are formed. At this time, the insulating film 116 is also etched at the same time, and the insulating films 150 and 151 are formed.

By the third etching, impurity regions (LDD regions) 134a to 138a which do not overlap with the first conductive layers 144 to 148 are formed. Note that the impurity regions (GOLD regions) 134b to 138b are still overlapped with the first conductive layers 144 to 148.

In this manner, the present embodiment provides the first
Region (GOLD) overlapping conductive layers 144 to 148 of
Regions) 134b to 138b and the first
Impurity regions that do not overlap with the conductive layers 144 to 148 (LD
The difference from the impurity concentration in the D regions 134a to 138a can be reduced, and the reliability can be improved.

Next, after removing the mask made of resist, masks 152 to 154 made of resist are newly formed, and a third doping process is performed. By the third doping process, impurity regions 155 to 160 are formed in a semiconductor layer serving as an active layer of a p-channel TFT, in which an impurity element imparting a conductivity type opposite to the one conductivity type is added. Using the second conductive layers 128a to 132a as a mask for the impurity element, an impurity element imparting p-type is added to form an impurity region in a self-aligned manner. In this embodiment, the impurity regions 155 to 160 are formed by ion doping using diborane (B ₂ H _6). In the third doping process, the semiconductor layers forming the n-channel TFT are covered with resist masks 152 to 154. Phosphorus is added at different concentrations to the impurity regions 155 to 160 by the first doping process and the second doping process, but the concentration of the impurity element imparting p-type is set to 2 × in each of the regions. 10 ²⁰
By performing the doping treatment so as to have a concentration of up to 2 × 10 ²¹ atoms / cm ³ , no problem arises because the p-channel TFT functions as a source region and a drain region. In this embodiment, since a part of the semiconductor layer serving as the active layer of the p-channel TFT is exposed, there is an advantage that an impurity element (boron) can be easily added.

Through the above steps, impurity regions are formed in the respective semiconductor layers.

Next, a mask 152 made of resist is used.
154 is removed to form a first interlayer insulating film 161.
The first interlayer insulating film 161 is formed by plasma CVD.
Thickness of 100 to 200 nm by using a sputtering method or a sputtering method
As an insulating film containing silicon. In this embodiment, a 150-nm-thick silicon oxynitride film is formed by a plasma CVD method. Of course, the first interlayer insulating film 161
Is not limited to a silicon oxynitride film, and another insulating film containing silicon may be used as a single layer or a stacked structure.

Next, as shown in FIG. 7B, a step of activating the impurity element added to each semiconductor layer is performed. This activation step is performed by a thermal annealing method using a furnace annealing furnace. As the thermal annealing method, the oxygen concentration is 400 to 700 ° C. in a nitrogen atmosphere having an oxygen concentration of 1 ppm or less, preferably 0.1 ppm or less, typically 500 to
The activation treatment may be performed at 550 ° C. In this embodiment, the activation treatment is performed by heat treatment at 550 ° C. for 4 hours. Note that, other than the thermal annealing method, a laser annealing method or a rapid thermal annealing method (RTA method) can be applied.

In this embodiment, at the same time as the activation treatment, nickel used as a catalyst during crystallization is doped with impurity regions 139, 141, 142, and 1 containing high-concentration phosphorus.
The nickel concentration in the semiconductor layer which is gettered at 55 and 158 and mainly becomes a channel formation region is reduced. A TFT having a channel formation region manufactured in this manner has a low off-current value and high crystallinity, so that a high field-effect mobility can be obtained and favorable characteristics can be achieved.

Further, an activation process may be performed before forming the first interlayer insulating film. However, when the wiring material used is weak to heat, after forming an interlayer insulating film (an insulating film containing silicon as a main component, for example, a silicon nitride film) for protecting the wiring and the like as in this embodiment, the active material is activated. It is preferable to carry out a chemical treatment.

Further, a heat treatment is performed at 300 to 550 ° C. for 1 to 12 hours in an atmosphere containing 3 to 100% hydrogen to hydrogenate the semiconductor layer. In this embodiment, heat treatment was performed at 410 ° C. for one hour in a nitrogen atmosphere containing about 3% of hydrogen. In this step, dangling bonds in the semiconductor layer are terminated by hydrogen contained in the interlayer insulating film. As another means of hydrogenation, plasma hydrogenation (using hydrogen excited by plasma) may be performed.

When a laser annealing method is used as the activation treatment, it is desirable to irradiate a laser beam such as an excimer laser or a YAG laser after the hydrogenation.

Next, a second interlayer insulating film 162 made of an inorganic insulating material or an organic insulating material is formed on the first interlayer insulating film 161. In this embodiment, the film thickness is 1.6 μm
Was formed, but the viscosity was 10 to 1000
cp, preferably 40 to 200 cp, and those having irregularities on the surface were used. Alternatively, a film whose surface is planarized may be used as the second interlayer insulating film 162.

In this embodiment, in order to prevent specular reflection, the second interlayer insulating film having the unevenness formed on the surface is formed to form the unevenness on the surface of the pixel electrode. In addition, a projection may be formed in a region below the pixel electrode in order to obtain light scattering by providing unevenness on the surface of the pixel electrode. In that case, the projection can be formed using the same photomask as that for forming the TFT, and thus can be formed without increasing the number of steps. Note that the protrusions may be appropriately provided on the substrate in the pixel portion region other than the wiring and the TFT portion. Thus, irregularities are formed on the surface of the pixel electrode along irregularities formed on the surface of the insulating film covering the convex portions.

Then, in the driving circuit, wirings 163 to 167 electrically connected to the respective impurity regions are formed. Note that these wirings are made of a 50 nm-thick Ti film and a 500 nm-thick alloy film (an alloy film of Al and Ti).
Is formed by patterning the laminated film.

In the pixel portion, the pixel electrode 17
0, a gate wiring 169, and a connection electrode 168 are formed.
(FIG. 7C) With the connection electrode 168, the source wiring (lamination of 143b and 149) is electrically connected to the pixel TFT. The gate wiring 169 is connected to the pixel T
An electrical connection is formed with the gate electrode of the FT. Also,
The pixel electrode 170 is electrically connected to the drain region of the pixel TFT, and is also electrically connected to the semiconductor layer 158 that functions as one electrode forming a storage capacitor. Further, as the pixel electrode 170, Al or A
It is desirable to use a material having excellent reflectivity, such as a film containing g as a main component or a stacked film thereof.

As described above, the n-channel TFT 50
1 and a CMOS circuit comprising a p-channel TFT 502;
And driving circuit 506 having n-channel TFT 503
And a pixel portion having a pixel TFT 504 and a storage capacitor 505 can be formed over the same substrate. Thus, an active matrix substrate is completed.

The n-channel TFT 50 of the driving circuit 506
Reference numeral 1 denotes a low concentration impurity region 13 which overlaps with the channel formation region 171 and the first conductive layer 144 forming a part of the gate electrode.
4b (GOLD region), a low concentration impurity region 134a (LDD region) formed outside the gate electrode, and a high concentration impurity region 1 functioning as a source region or a drain region.
39. The p-channel TFT 502 connected to the n-channel TFT 501 by the electrode 166 to form a CMOS circuit has a channel formation region 172, an impurity region 157 overlapping with the gate electrode, an impurity region 158 formed outside the gate electrode, and a source region. Alternatively, the semiconductor device includes a high-concentration impurity region 155 functioning as a drain region. The n-channel TFT 503 includes a channel formation region 173, a low-concentration impurity region 136b (GOLD region) overlapping with the first conductive layer 146 forming a part of the gate electrode, and a low-concentration impurity formed outside the gate electrode. It has a region 137a (LDD region) and a high-concentration impurity region 141 functioning as a source region or a drain region.

In the pixel TFT 504 in the pixel portion, a channel forming region 174 and a low-concentration impurity region 137b (GOLD) overlapping with the first conductive layer 147 forming a part of the gate electrode are provided.
Region), a low concentration impurity region 137a (LDD region) formed outside the gate electrode, and a high concentration impurity region 143 functioning as a source region or a drain region. The semiconductor layers 158 to 160 functioning as one electrode of the storage capacitor 505 are each doped with an impurity element imparting p-type. The storage capacitor 505 is formed using electrodes (lamination of 148 and 132b) and semiconductor layers 158 to 160 using the insulating film 451 as a dielectric.

In the pixel structure of this embodiment, the end of the pixel electrode is arranged so as to overlap with the source wiring so that the gap between the pixel electrodes is shielded from light without using a black matrix.

FIG. 14 is a top view of a pixel portion of an active matrix substrate manufactured in this embodiment. Note that the same reference numerals are used for the portions corresponding to FIGS. A chain line AA ′ in FIG. 7 corresponds to a cross-sectional view taken along a chain line AA ′ in FIG. 7 corresponds to a cross-sectional view taken along a dashed line BB ′ in FIG.

Further, according to the steps described in this embodiment, the number of photomasks required for manufacturing an active matrix substrate can be reduced to five. As a result, the process is shortened,
This can contribute to reduction in manufacturing cost and improvement in yield.

With the above-described configuration, it is possible to optimize the structure of the TFT constituting each circuit according to the specifications required by the pixel TFT and the driving circuit, and to improve the operation performance and reliability of the semiconductor device. . Further, the activation of the LDD region, the source region, and the drain region is facilitated by forming the gate electrode with a conductive material having heat resistance,
By forming the gate wiring from a low-resistance material, the wiring resistance can be sufficiently reduced. Therefore, the present invention can be applied to a display device having a display area (screen size) of 4 inches or more. A first region where the amorphous semiconductor film exists above the organic resin film via the inorganic insulating film and a second region where the amorphous semiconductor film does not exist above the organic resin film are provided. Accordingly, the region where the temperature gradient is formed in the horizontal direction of the island-shaped semiconductor film after laser irradiation can be lengthened, and as a result, the island-shaped crystalline silicon films 104a to 104g having a very small lattice defect density and a large crystal grain size can be obtained. By using 104e, very excellent characteristics can be realized in the completed TFT.

[Embodiment 2] In this embodiment, an example in which a base insulating film is provided between a substrate and an organic resin film is shown in FIG.

First, a base insulating film 3008 having a thickness of 50 to 400 nm is formed on a glass substrate 3001 by a known method.
To form PCVD as the base insulating film 3008
A single layer film selected from a silicon oxide film, a silicon nitride film, and a silicon oxynitride film, or a stacked film thereof can be used by a known method such as an LPCVD method, a sputtering method, or the like. However, when using a silicon nitride film or a silicon oxynitride film, it is necessary to consider the balance of internal stress. This base insulating film 3008 is formed for the purpose of preventing impurity diffusion from the substrate. In this embodiment, a silicon oxide film having a thickness of 50 nm is formed by the PCVD method.

Next, an organic resin film (thickness: 100 nm to 500 nm) is applied over the base insulating film 3008 by a spin coating method or the like and baked. In this embodiment, a benzocyclobutene film (hereinafter referred to as B
A CB film was applied by spin coating, followed by baking (at 300 ° C. for 1 hour) to obtain a film thickness of 200 nm.
When not used for a transmissive display element (such as a liquid crystal panel), the light-transmitting substrate 3001 does not need to be transparent, and has heat resistance and resistance to a process using a subsequent CVD apparatus. It goes without saying that the organic resin film is not limited to the BCB film as long as it has a plasma property.

Next, according to the first embodiment, the BCB film is patterned by a known photolithography method, and an island-shaped organic resin film 3002 is formed by dry etching.
Here, the base insulating film 3008 protects the surface of the glass substrate from dry etching.

The subsequent steps cover the island-shaped organic resin film 3002 according to the first embodiment, and form the inorganic insulating film 3 by a known method.
After forming the amorphous semiconductor film 003 and an amorphous semiconductor film, unnecessary portions of the amorphous semiconductor film are removed by etching to form an island-shaped amorphous semiconductor film 3005a. Next, the amorphous semiconductor film is crystallized by a laser annealing method. As described above, the first region where the amorphous semiconductor film exists above the organic resin film via the inorganic insulating film and the second region where the amorphous semiconductor film does not exist above the organic resin film Is provided, it is possible to lengthen the region for forming the temperature gradient in the horizontal direction of the island-shaped semiconductor film after laser irradiation, and as a result, the island-shaped crystalline silicon having a very small lattice defect density and a large crystal grain size is obtained. The film could be obtained at the desired position. When this island-shaped crystalline semiconductor film is used for an active layer of a TFT, excellent characteristics can be obtained.

This embodiment can be combined with Embodiment 1 as appropriate.

[Embodiment 3] In this embodiment, an example in which crystallization is performed by a laser irradiation method different from that in Embodiment 1 is shown in FIG.
Shown in In addition, since it is the same as Example 1 except a laser irradiation method, detailed description is omitted.

According to the first embodiment, an island-shaped organic resin film 4002 is formed on a substrate 4001. Next, the inorganic insulating film 400 covering the island-shaped organic resin film 42 in the same manner as in the first embodiment.
3 and an amorphous semiconductor film is formed over the inorganic insulating film 4003. However, in this embodiment, the substrate 4001,
The island-shaped organic resin film 4002 needs to have a light-transmitting property.

Next, as shown in FIG. 4, laser light is simultaneously irradiated from the front side and the back side of the substrate. Through the above steps, a crystalline silicon film having a large crystal grain size was obtained at a desired position. When this crystalline semiconductor film is used for an active layer of a TFT, excellent characteristics can be obtained.

This embodiment can be freely combined with Embodiment 1 or Embodiment 2 as appropriate. [Embodiment 4] In this embodiment, a process of manufacturing a reflective liquid crystal display device from the active matrix substrate manufactured in Embodiment 1 will be described below. FIG. 9 is used for the description.

First, according to the first embodiment, after obtaining the active matrix substrate in the state of FIG. 7C, at least the pixel electrode 170 is formed on the active matrix substrate of FIG.
An alignment film 171 is formed thereon and a rubbing process is performed. In addition,
In this embodiment, before forming the alignment film 171, a columnar spacer (not shown) for maintaining a substrate interval by patterning an organic resin film such as an acrylic resin film.
Was formed at the desired position. Instead of the columnar spacers, spherical spacers may be spread over the entire surface of the substrate.

Next, a counter substrate 171 is prepared. Next, the coloring layers 172 and 173 and the planarization film 174 are formed over the counter substrate 171. The red coloring layer 172 and the blue coloring layer 173 overlap each other to form a light-shielding portion. Alternatively, the light-blocking portion may be formed by partially overlapping the red coloring layer and the green coloring layer.

In this embodiment, the substrate shown in Embodiment 1 is used. Therefore, FIG. 8 shows a top view of the pixel portion of the first embodiment.
Then, at least a gap between the gate wiring 169 and the pixel electrode 170, a gap between the gate wiring 169 and the connection electrode 168,
It is necessary to shield the gap between the connection electrode 168 and the pixel electrode 170 from light. In this embodiment, the colored layers are arranged such that the light-shielding portion formed of the colored layers is overlapped at the positions where the light is to be shielded, and the opposing substrates are bonded to each other.

As described above, the number of steps can be reduced by shielding the gap between each pixel with the light-shielding portion composed of the stacked colored layers without forming a light-shielding layer such as a black mask.

Next, a counter electrode 175 made of a transparent conductive film was formed on at least the pixel portion on the flattening film 174, an alignment film 176 was formed on the entire surface of the counter substrate, and rubbing treatment was performed.

The active matrix substrate on which the pixel portion and the driving circuit are formed and the opposing substrate are sealed with a sealing material 177.
Paste in. A filler is mixed in the sealant 177, and the two substrates are bonded at a uniform interval by the filler and the columnar spacer. afterwards,
A liquid crystal material 178 is injected between the two substrates, and completely sealed with a sealant (not shown). A known liquid crystal material may be used for the liquid crystal material 178. Since the present embodiment is of a reflection type, the distance between the substrates is about half that of the first embodiment. Thus, the reflection type liquid crystal display device shown in FIG. 15 is completed. Then, if necessary, the active matrix substrate or the opposing substrate is cut into a desired shape. Further, a polarizing plate (not shown) was attached only to the counter substrate. Then, an FPC was attached using a known technique.

The liquid crystal display panel manufactured as described above can be used as a display section of various electronic devices.

The active matrix type liquid crystal display device of the present embodiment has been described with reference to the structure described in the first embodiment. However, the present invention is not limited to the configuration of the first embodiment, but is shown in the embodiment. An active matrix substrate completed by applying the above configuration to the first embodiment may be used. In any case, any active matrix substrate provided with the organic resin film described in the embodiment mode can be freely combined to manufacture an active matrix liquid crystal display device.

[Embodiment 5] A CMOS circuit and a pixel portion formed by implementing the present invention are used for various electro-optical devices (active matrix type liquid crystal display, active matrix type EC display, active matrix type EL display). Can be done. That is, the present invention can be applied to all electronic devices in which the electro-optical device is incorporated in the display unit.

Such electronic devices include a video camera, digital camera, projector (rear or front type), head mounted display (goggle type display), car navigation, car stereo,
Examples include a personal computer and a portable information terminal (a mobile computer, a mobile phone, an electronic book, or the like). Examples of these are shown in FIGS. 14, 15 and 16.

FIG. 14A shows a personal computer, which includes a main body 3001, an image input section 3002, and a display section 30.
03, a keyboard 3004 and the like. The present invention can be applied to the image input unit 3002, the display unit 3003, and other signal control circuits.

FIG. 14B shows a video camera, which includes a main body 3101, a display section 3102, a voice input section 3103, operation switches 3104, a battery 3105, and an image receiving section 310.
6 and so on. The present invention can be applied to the display portion 3102 and other signal control circuits.

FIG. 14C shows a mobile computer (mobile computer), which includes a main body 3201, a camera section 3202, an image receiving section 3203, operation switches 3204, a display section 3205, and the like. The present invention can be applied to the display portion 3205 and other signal control circuits.

FIG. 14D shows a goggle type display, which comprises a main body 3301, a display section 3302, and an arm section 330.
3 and so on. The present invention can be applied to the display portion 3302 and other signal control circuits.

FIG. 14E shows a player that uses a recording medium (hereinafter, referred to as a recording medium) on which a program is recorded, and includes a main body 3401, a display portion 3402, and a speaker portion 340.
3, a recording medium 3404, an operation switch 3405, and the like. This player uses a DVD (D
digital Versatile Disc), CD
And the like, it is possible to perform music appreciation, movie appreciation, games, and the Internet. The present invention can be applied to the display portion 3402 and other signal control circuits.

FIG. 14F shows a digital camera, which includes a main body 3501, a display section 3502, an eyepiece section 3503, operation switches 3504, an image receiving section (not shown), and the like. The present invention can be applied to the display portion 3502 and other signal control circuits.

FIG. 15A shows a front type projector, which includes a projection device 3601, a screen 3602, and the like. The present invention can be applied to the liquid crystal display device 3808 constituting a part of the projection device 3601 and other signal control circuits.

FIG. 15B shows a rear projector, which includes a main body 3701, a projection device 3702, and a mirror 370.
3, including a screen 3704 and the like. The present invention provides a projection device 3
The present invention can be applied to the liquid crystal display device 3808 which constitutes a part of the signal control circuit 702 and other signal control circuits.

FIG. 15C is a diagram showing an example of the structure of the projection devices 3601 and 3702 in FIGS. 15A and 15B. Projection devices 3601, 37
02 denotes a light source optical system 3801, mirrors 3802, 380
4 to 3806, dichroic mirror 3803, prism 3807, liquid crystal display device 3808, retardation plate 380
9. It is composed of a projection optical system 3810. Projection optical system 38
Reference numeral 10 denotes an optical system including a projection lens. In the present embodiment, an example of a three-plate type is shown, but there is no particular limitation, and for example, a single-plate type may be used. In addition, the practitioner may appropriately provide an optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, and an IR film in an optical path indicated by an arrow in FIG. Good.

FIG. 15D is a diagram showing an example of the structure of the light source optical system 3801 in FIG. 15C. In this embodiment, the light source optical system 3801 includes a reflector 3811, a light source 3812, a lens array 3813,
814, a polarization conversion element 3815, and a condenser lens 3816. Note that the light source optical system shown in FIG. 15D is an example and is not particularly limited. For example, a practitioner may appropriately provide an optical system such as an optical lens, a film having a polarizing function, a film for adjusting a phase difference, and an IR film in the light source optical system.

However, in the projector shown in FIG. 15, a case in which a transmissive electro-optical device is used is shown, and an application example in a reflective electro-optical device is not shown.

FIG. 16A shows a mobile phone, and the main body 39 is provided.
01, audio output unit 3902, audio input unit 3903, display unit 3904, operation switch 3905, antenna 3906
And so on. The present invention can be applied to the audio output unit 3902, the audio input unit 3903, the display unit 3904, and other signal control circuits.

FIG. 16B shows a portable book (electronic book), which includes a main body 4001, display portions 4002 and 4003, a storage medium 4004, operation switches 4005, and an antenna 4006.
And so on. The present invention can be applied to the display portions 4002 and 4003 and other signal circuits.

FIG. 16C shows a display, which includes a main body 4101, a support 4102, a display portion 4103, and the like.
The present invention can be applied to the display portion 4103. The display of the present invention is particularly advantageous when the screen is enlarged, and is advantageous for a display having a diagonal of 10 inches or more (particularly 30 inches or more).

As described above, the applicable range of the present invention is extremely wide, and the present invention can be applied to electronic devices in various fields. Further, the electronic apparatus according to the present embodiment can be realized by using any combination of the configurations of the first to fourth embodiments.

[0137]

According to the crystallization technique of the present invention, an island-shaped crystalline silicon film having a large crystal grain size can be obtained at a desired position. The region having a large crystal grain size has a very low lattice defect density, and when this region is used as a channel formation region of a TFT, excellent electric characteristics can be obtained.

[Brief description of the drawings]

FIG. 1 illustrates a configuration of the present invention.

FIG. 2 is an example of a basic configuration of an optical system of a laser annealing apparatus according to the present invention.

FIG. 3 illustrates a configuration of the present invention.

FIG. 4 illustrates a configuration of the present invention.

FIG. 5 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate.

FIG. 6 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate.

FIG. 7 is a cross-sectional view illustrating a manufacturing process of an active matrix substrate.

FIG. 8 is a top view illustrating a manufacturing process of an active matrix substrate.

FIG. 9 is a cross-sectional structural view of an active matrix liquid crystal display device.

FIG. 10 illustrates a conventional configuration (Configuration 1).

FIG. 11 is a diagram illustrating a configuration (configuration 2) of Japanese Patent Application No. 11-304722.

FIG. 12 shows the dependence of the solidification start time on the distance from the edge of the island-shaped silicon layer, obtained from the results of the heat conduction analysis simulation.

FIG. 13 is a comparative diagram of crystal grains formed by Configuration 1, Configuration 2, and the configuration of the present invention.

FIG. 14 illustrates an example of an electronic device.

FIG. 15 illustrates an example of an electronic device.

FIG. 16 illustrates an example of an electronic device.

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 21/20 G02F 1/136 500 21/268 H01L 29/78 626C 627C (72) Inventor Misako Nakazawa Kanagawa 398, Hase, Atsugi City, Semi-Conductor Energy Laboratory Co., Ltd. (72) Inventor Hisashi Ohtani, 398, Hase, Atsugi-shi, Kanagawa Prefecture, Japan Semi-Conductor Energy Laboratory Co., Ltd. F-term (reference) 2H092 GA59 JA25 JA29 JA38 JA42 JA44 JA46 JB13 JB23 JB32 JB33 JB38 JB42 JB51 JB57 JB63 JB69 KA04 KA07 MA05 MA07 MA14 MA15 MA16 MA18 MA19 MA20 MA27 MA30 MA32. DA02 DA10 DB03 EA11 EA12 5F110 AA30 BB02 BB04 CC02 DD03 DD12 DD13 DD14 DD15 DD 17 EE01 EE02 EE03 EE04 EE06 EE09 EE14 EE22 EE23 EE44 EE45 FF02 FF04 FF09 FF12 FF28 FF30 FF36 GG01 GG02 GG13 GG25 GG32 NN43 NN45 NN47 NN04 NN PP03 PP04 PP06 PP29 PP34 PP40 QQ09 QQ11 QQ24 QQ25 QQ28

Claims (14)

[Claims] An organic resin film having a predetermined shape in contact with a light-transmitting substrate; an inorganic insulating film covering the organic resin film; and an island-shaped crystalline semiconductor in contact with the inorganic insulating film. A first region existing above the organic resin film via the inorganic insulating film, the crystalline semiconductor film having a first region, the organic semiconductor film being in contact with the inorganic insulating film via the inorganic insulating film. A semiconductor device, comprising: a second region that does not exist above the first region; the first region is sandwiched by the second region and continuously exists. 2. The semiconductor device according to claim 1, wherein the island-shaped crystalline semiconductor film is present in the second region so as to have a width of 0.5 μm to 5 μm from an end of the first region. Semiconductor device. 3. The semiconductor device according to claim 1, wherein the inorganic insulating film is a single layer film selected from a silicon oxide film, a silicon nitride film, and a silicon oxynitride film, or a stacked film thereof. . 4. The device according to claim 1, wherein a base insulating film is provided between the substrate and the organic resin film. 5. The method according to claim 1, wherein
A semiconductor device, wherein the thermal conductivity of the organic resin film is 1.0 Wm ^-1 K ^-1 or less. 6. The method according to claim 1, wherein
The semiconductor device, wherein the organic resin film has photosensitivity. 7. The method according to claim 1, wherein
The organic resin film is made of a BCB (benzocyclobutene) resin, a polyimide resin (fluoridated polyimide), an acrylic resin, a siloxane resin, a fluorinated paraxylene, a fluorinated parylene, a Teflon (registered trademark), a fluoropolyallyl ether. , A semiconductor device comprising a single-layer film selected from PFCB and polysilazane, or a laminated film thereof. 8. The method according to claim 1, wherein
The semiconductor device, wherein the semiconductor device is a personal computer, a portable information terminal, a digital camera, a projector, or a display device using an organic electroluminescent material. 9. An organic resin film is formed in contact with a light-transmitting substrate, and then the organic resin film is patterned into a predetermined shape, and an inorganic insulating film covering the organic resin film having the predetermined shape is formed. Forming an amorphous semiconductor film in contact with the inorganic insulating film, wherein the amorphous semiconductor film is in contact with the inorganic insulating film and exists above the organic resin film via the inorganic insulating film. A region and a second region not in contact with the inorganic insulating film and above the organic resin film via the inorganic insulating film, and the first region is sandwiched by the second region and continuously. Forming an island-shaped amorphous semiconductor film by patterning the amorphous semiconductor film to be present; and irradiating the island-shaped amorphous semiconductor film with a laser beam to form an island-shaped crystalline semiconductor film. Method for manufacturing the device. 10. The semiconductor device according to claim 9, wherein the island-shaped amorphous semiconductor film is formed so that the second region has a width of 0.5 μm to 5 μm from an end of the first region. Method of manufacturing. 11. The method for manufacturing a semiconductor device according to claim 9, wherein the inorganic insulating film and the amorphous semiconductor film are formed continuously without exposure to air. 12. The method for manufacturing a semiconductor device according to claim 9, wherein the laser light is applied from a surface side of the substrate. 13. The method for manufacturing a semiconductor device according to claim 9, wherein the laser light is irradiated simultaneously from the front side and the back side of the substrate. 14. The semiconductor device according to claim 9, wherein the semiconductor device is a personal computer, a portable information terminal, a digital camera, a projector, or a display device using an organic electroluminescent material. Of manufacturing a semiconductor device.