JP2001326183A - Method and apparatus for processing substrate - Google Patents
Method and apparatus for processing substrateInfo
- Publication number
- JP2001326183A JP2001326183A JP2000142860A JP2000142860A JP2001326183A JP 2001326183 A JP2001326183 A JP 2001326183A JP 2000142860 A JP2000142860 A JP 2000142860A JP 2000142860 A JP2000142860 A JP 2000142860A JP 2001326183 A JP2001326183 A JP 2001326183A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- substrates
- substrate processing
- roll
- slip sheet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Physical Vapour Deposition (AREA)
- Chemical Vapour Deposition (AREA)
- Photovoltaic Devices (AREA)
- Cleaning Or Drying Semiconductors (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、基板処理方法およ
び基板処理装置に係り、特に光起電力素子等における機
能性堆積膜を積層した基板を処理する基板処理方法およ
び基板処理装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate processing method and a substrate processing apparatus, and more particularly to a substrate processing method and a substrate processing apparatus for processing a substrate on which a functional deposition film is stacked in a photovoltaic element or the like. .
【0002】[0002]
【従来の技術】従来、基板を処理する方法、例えば基板
上に機能性堆積膜を形成する方法として、平板状あるい
は長尺帯状の基板上に、スパッタ、CVD、真空蒸着な
どの堆積膜形成をおこなったり、プラズマを用いたドー
ピング、エッチングなどの処理方法が広く知られてい
る。例えば、Si系の薄膜等を用いて光起電力素子を作
製する場合には、一般に減圧下における化学気相堆積法
(CVD)、スパッタ法などが広く用いられている。2. Description of the Related Art Conventionally, as a method of processing a substrate, for example, as a method of forming a functional deposition film on a substrate, a deposition film such as sputtering, CVD, or vacuum deposition is formed on a flat or long strip substrate. Processing methods such as doping and etching using plasma are widely known. For example, when a photovoltaic element is manufactured using a Si-based thin film or the like, a chemical vapor deposition method (CVD) under reduced pressure, a sputtering method, and the like are generally widely used.
【0003】枚葉式の処理方法において、平板状の基板
を扱う場合には、これらの処理をおこなった後、輸送の
効率化を図るために基板を重ねて取り扱うことが多い。
また、基板を重ねるときに基板間に合紙を挿入すること
により、接触による傷の発生、膜の破壊を防止すること
ができる。In the single-wafer processing method, when a flat substrate is handled, it is often the case that after performing these processes, the substrates are stacked one upon another in order to improve the transportation efficiency.
Further, by inserting a slip sheet between the substrates when the substrates are stacked, it is possible to prevent the occurrence of scratches due to contact and the destruction of the film.
【0004】また、長尺の帯状基板を用いて量産性を向
上する方法として、例えば特公平4−32533号公報
には、ロール・ツー・ロール(Roll to Rol
l)方式を採用した連続プラズマCVD装置が開示され
ている。同公報によれば、堆積膜形成装置に複数のグロ
ー放電領域を設け、所望の幅を有し十分に長い可撓性の
帯状基板をその長手方向に順次連続的に貫通させながら
各グロー放電領域で導伝型の半導体層を堆積し、半導体
接合を有する素子を連続作成することができるとされて
いる。さらに、同公報には帯状基板の表面保護のために
合紙の使用が開示されている。合紙の材質としては、あ
る一定の厚さをもったもので、帯状基板よりも硬さが柔
らかなもの、例えば帯状基板が金属からなる場合には、
樹脂、化学繊維などが挙げられる。素子の作成時には、
帯状基板を連続的に搬送しながら前記合紙を基板間に挿
入することにより、ロール状に巻かれた基板の堆積膜面
とその裏面との接触による堆積膜へのダメージを防止し
ている。As a method for improving mass productivity using a long strip-shaped substrate, for example, Japanese Patent Publication No. 4-32533 discloses a roll-to-roll method.
1) A continuous plasma CVD apparatus employing the method is disclosed. According to the gazette, a plurality of glow discharge regions are provided in a deposition film forming apparatus, and each glow discharge region is sequentially penetrated in a longitudinal direction of a sufficiently long flexible strip substrate having a desired width. It is said that a conductive semiconductor layer can be deposited by the method described above to continuously produce an element having a semiconductor junction. Further, the publication discloses the use of interleaf paper for protecting the surface of the belt-like substrate. As the material of the slip sheet, a material having a certain thickness and a hardness that is softer than the band-shaped substrate, for example, when the band-shaped substrate is made of metal,
Resins, chemical fibers, and the like. When creating the element,
By inserting the slip sheet between the substrates while continuously transporting the belt-shaped substrate, damage to the deposited film due to contact between the deposited film surface of the rolled substrate and the back surface thereof is prevented.
【0005】また、特開平6−260421号公報に
は、ロール・ツー・ロール方式の堆積膜連続形成装置に
おいて、帯状基板あるいは合紙の移動経路に帯電除去に
よる除塵手段を設置し、帯電を除去しながら搬送する方
法が開示されている。同公報では、帯状基板や合紙を除
電することによって、処理室の雰囲気中に存在するダス
トが基板や合紙へ吸着することを防止して素子の欠陥発
生を防止している。Japanese Patent Application Laid-Open No. Hei 6-260421 discloses that in a roll-to-roll type continuous film forming apparatus, a dust removing means for removing a charge is installed on a moving path of a belt-like substrate or a slip sheet to remove a charge. A method of carrying while carrying is disclosed. In this publication, by removing electricity from a strip-shaped substrate and interleaf paper, dust existing in the atmosphere of the processing chamber is prevented from adsorbing to the substrate and interleaf paper, thereby preventing the occurrence of element defects.
【0006】[0006]
【発明が解決しようとする課題】しかし、従来の基板を
処理する方法において、工程途中で発生したダストが基
板表面に付着し、ダストの除去が困難であった場合、ダ
ストが基板に付着したまま工程が進むと、ダスト付着部
分が欠陥や傷となって歩留りを低下させたり、ダストが
基板処理工程において不純物として作用して特性を低下
させてしまうなどの問題があった。However, in the conventional method for processing a substrate, if dust generated during the process adheres to the substrate surface and it is difficult to remove the dust, the dust remains attached to the substrate. As the process proceeds, there are problems that the dust adhered portion becomes a defect or a scratch to lower the yield, and that the dust acts as an impurity in the substrate processing process to lower the characteristics.
【0007】このようなダストの発生源として、例えば
処理室雰囲気中のダスト、処理室内部に堆積した膜の剥
離、処理工程の副生成物として発生したパーティクル、
基板の搬送時に処理室等と接触して発生した切削粉など
が挙げられる。ダストのサイズや形状は、その発生過程
に大きく依存するが、本発明で問題としているダストは
おおよそ長径0.1μm〜1mmのサイズのものを指し
ている。As sources of such dust, for example, dust in a processing chamber atmosphere, peeling of a film deposited inside the processing chamber, particles generated as a by-product of the processing step,
Examples include cutting powder generated by contact with a processing chamber or the like when the substrate is transferred. Although the size and shape of the dust greatly depend on the generation process, the dust in the present invention generally has a major diameter of 0.1 μm to 1 mm.
【0008】また、合紙として表面がほぼ平坦で凹凸の
ない部材を用いた場合、基板と合紙との間に挟まれたダ
ストが基板表面に押し付けられることになり、特に基板
の積層数や、帯状基板の長さが増えた場合には自量によ
ってさらに強く押し付けられ、傷や欠陥が助長される傾
向があった。さらに、合紙側にダストが転写されて付着
した場合、合紙を再度利用するとダストが基板側に付着
してしまうため、合紙を一回の使用した後に廃棄せざる
をえず、コストがかかっていた。Further, when a member having a substantially flat surface and no irregularities is used as the slip sheet, dust sandwiched between the board and the slip sheet is pressed against the surface of the board. On the other hand, when the length of the belt-like substrate is increased, the substrate is pressed more strongly by its own amount, and the scratches and defects tend to be promoted. Furthermore, if the dust is transferred to and adheres to the slip sheet side, the dust will stick to the substrate side if the slip sheet is used again.Therefore, the slip sheet must be discarded after one use, resulting in lower costs. It was hanging.
【0009】本発明の目的は、上記課題に鑑み、枚葉式
またはロール・ツー・ロール方式を採用して基板を処理
する場合に、所定の合紙により基板の表面に付着したダ
ストを除去して、ダストによる基板表面あるいは堆積膜
への傷、欠陥、コンタミを防止することができ、基板の
処理を高品位に行うことで歩留りや特性を向上させるこ
とができ、かつ合紙の使用可能回数を増大させること
で、合紙に要するコストを低減することができる基板処
理方法および基板処理装置を提供することにある。SUMMARY OF THE INVENTION In view of the above-mentioned problems, it is an object of the present invention to remove dust adhering to the surface of a substrate by using a predetermined interleaving paper when processing the substrate by using a single-wafer method or a roll-to-roll method. It can prevent dust, scratches, defects and contamination on the substrate surface or deposited film due to dust, improve the yield and characteristics by processing the substrate with high quality, and use the number of usable slip sheets. It is an object of the present invention to provide a substrate processing method and a substrate processing apparatus that can reduce the cost required for interleaving by increasing the number of sheets.
【0010】[0010]
【課題を解決するための手段】上記目的を達成すべく、
本発明の基板処理方法は、少なくとも一方の表面が帯電
した合紙を基板間に挿入する工程を有し、該合紙の少な
くとも一方の表面の表面粗さRaが1μm〜1mm、表
面抵抗率が1×109Ω/cm2以上であることを特徴と
している。また、本発明の基板処理方法は、少なくとも
一方の表面が帯電した合紙を基板間から取り除く工程を
有し、該合紙の少なくとも一方の表面の表面粗さRaが
1μm〜1mm、表面抵抗率が1×109Ω/cm2以上
であることを特徴としている。In order to achieve the above object,
The substrate processing method of the present invention includes a step of inserting an interleaf sheet having at least one surface charged between the substrates, wherein at least one surface of the interleaf sheet has a surface roughness Ra of 1 μm to 1 mm and a surface resistivity of at least one surface. It is characterized by being at least 1 × 10 9 Ω / cm 2 . Further, the substrate processing method of the present invention includes a step of removing, from between the substrates, interleaving paper on which at least one surface is charged, at least one surface of the interleaving paper has a surface roughness Ra of 1 μm to 1 mm, and a surface resistivity of Is 1 × 10 9 Ω / cm 2 or more.
【0011】また、本発明の基板処理装置は、基板間に
合紙を挿入する手段を有する基板処理装置において、前
記基板間に合紙を挿入する手段が、少なくとも一方の表
面の表面粗さRaが1μm〜1mm、表面抵抗率が1×
109Ω/cm2以上であり、かつ少なくとも一方の表面
が帯電した合紙を基板間に挿入する手段であることを特
徴としている。また、本発明の基板処理装置は、基板間
から合紙を取り除く手段を有する基板処理装置におい
て、前記基板間から合紙を取り除く手段が、少なくとも
一方の表面の表面粗さRaが1μm〜1mm、表面抵抗
率が1×109Ω/cm2以上であり、かつ少なくとも一
方の表面が帯電した合紙を基板間から取り除く手段であ
ることを特徴としている。In the substrate processing apparatus of the present invention, there is provided a substrate processing apparatus having means for inserting a slip sheet between the substrates, wherein the means for inserting the slip sheet between the substrates includes at least one surface having a surface roughness Ra. Is 1 μm to 1 mm and the surface resistivity is 1 ×
It is a means for inserting an interleaving paper having a resistivity of 10 9 Ω / cm 2 or more and having at least one surface charged between the substrates. Further, the substrate processing apparatus of the present invention is a substrate processing apparatus having means for removing interleaving paper between substrates, wherein the means for removing interleaving paper between the substrates has a surface roughness Ra of at least one surface of 1 μm to 1 mm, It has a surface resistivity of 1 × 10 9 Ω / cm 2 or more, and is a means for removing interleaving paper having at least one surface charged between the substrates.
【0012】上記本発明の基板処理方法および装置は、
更なる特徴として、「基板同士を重ね合わせる枚葉式に
より基板を処理すること」、「ロール間にロール状の基
板を掛け渡して搬送するロール・ツー・ロール方式によ
り基板を処理すること」、「洗浄、堆積膜形成、エッチ
ング、改質、パターニング、切断、加熱、冷却のいずれ
かの処理を基板に施すこと」、を含むものである。The substrate processing method and apparatus according to the present invention include:
As further features, "processing a substrate by a single-wafer method in which substrates are overlapped with each other", "processing a substrate by a roll-to-roll method in which a roll-shaped substrate is stretched between rolls and transported", Subjecting the substrate to any one of cleaning, deposition film formation, etching, modification, patterning, cutting, heating, and cooling ".
【0013】[0013]
【発明の実施の形態】以下、本発明の好適な実施の形態
を説明するが、本発明は本実施形態に限られない。DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below, but the present invention is not limited to these embodiments.
【0014】図1は、本発明による枚葉式の基板処理方
法の一例である。図1において、100は基板、101
は合紙、102は搬送手段、103は帯電手段、104
は積層手段である。搬送手段102によって搬送される
基板100と位置が同期するように合紙101を搬送し
て、基板100の上に合紙101を被覆させる。このと
き、合紙101を基板100と接触させる直前に帯電手
段103によって合紙101を帯電させることで、基板
100の表面上に付着または存在しているダストが静電
吸着によって合紙101に捕獲される。FIG. 1 shows an example of a single wafer processing method according to the present invention. In FIG. 1, 100 is a substrate, 101
Is a slip sheet, 102 is a conveying means, 103 is a charging means, 104
Is a stacking means. The interleaf paper 101 is transported so that the position is synchronized with the substrate 100 transported by the transport means 102, and the interleaf paper 101 is coated on the substrate 100. At this time, the interleaf paper 101 is charged by the charging means 103 immediately before the interleaf paper 101 is brought into contact with the substrate 100, so that dust adhering or existing on the surface of the substrate 100 is captured by the interleaf paper 101 by electrostatic adsorption. Is done.
【0015】ここで、図1に示す装置を用いて、合紙1
01の表面抵抗率と基板のクリーニング効果、すなわち
ダストの捕獲率との関係の一例を図2に示す。実験方法
は、基板100として大きさ100mm平方、厚さ2m
mのステンレス板(SUS304)、合紙101として
木材パルプ製の厚さ0.1mmの上質紙、ダストとして
直径5μmステンレスの微粉末(SUS304)を用い
た。合紙101の抵抗率は、前記上質紙の含水率を変化
させることよって表面抵抗率を変化させた。Here, using the apparatus shown in FIG.
FIG. 2 shows an example of the relationship between the surface resistivity of No. 01 and the cleaning effect of the substrate, that is, the dust capture rate. The experimental method is as follows. The substrate 100 has a size of 100 mm square and a thickness of 2 m.
m stainless steel plate (SUS304), high quality paper made of wood pulp having a thickness of 0.1 mm as interleaf paper 101, and fine powder of stainless steel having a diameter of 5 μm (SUS304) were used as dust. As for the resistivity of the slip sheet 101, the surface resistivity was changed by changing the water content of the high-quality paper.
【0016】実験雰囲気の湿度を40%に調節し、帯電
手段103として高電圧電源(不図示)に接続されたス
テンレス製の針に−5kVの電圧をかけて、コロナ放電
によって合紙101の基板100と対面する全面を均一
に帯電させた。基板100上に前記微粉末を約100個
/cm2の密度で点在させ、その上に前記帯電した合紙
101を被覆させ、再度合紙101を取り除いた後に基
板100上に取り残された微粉末の密度と初期の密度と
の比をダスト捕獲率とし、合紙101の表面抵抗率との
関係を図2にプロットした。図2に示すように、表面抵
抗率が1×10 9Ω/cm2以上で捕獲率が上昇し始め、
1×1012Ω/cm2以上でほぼ全てのダストを捕獲で
きることがわかる。このことから、合紙101の表面抵
抗率が1×109Ω/cm2以上、好ましくは1×1010
Ω/cm2以上、より好ましくは1×1012Ω/cm2以
上であれば、合紙101の帯電電圧を維持しながらダス
トを効果的に捕獲できる。The humidity of the experimental atmosphere is adjusted to 40%,
As means 103, a switch connected to a high-voltage power supply (not shown)
Apply a voltage of -5 kV to the needle made of stainless steel and apply corona discharge.
The entire surface of the interleaf paper 101 facing the substrate 100 is uniform
Was charged. Approximately 100 pieces of the fine powder on the substrate 100
/ CmTwoInterspersed at the density of
101, and after removing the slip sheet 101 again,
The density of the fine powder left on the plate 100 and the initial density
Is the dust capture rate, and the ratio of the
The relationship is plotted in FIG. As shown in FIG.
Resistance rate 1 × 10 9Ω / cmTwoAs a result, the capture rate began to rise,
1 × 1012Ω / cmTwoWith the above, almost all dust can be captured
You can see that you can. From this, the surface resistance of the slip sheet 101 is
Resistance rate 1 × 109Ω / cmTwoAbove, preferably 1 × 10Ten
Ω / cmTwoAbove, more preferably 1 × 1012Ω / cmTwoLess than
If it is above, make sure that the charging voltage of the slip sheet 101 is maintained.
Can be effectively captured.
【0017】また本発明によれば、合紙101の表面粗
さRaが1μm〜1mmであり、表面に微細な凹凸形状
を有している。このため、吸着されたダストは合紙10
1の凹部分に捕獲されて、捕獲されたダストが基板10
0表面と接触することがなくなり、基板100へのダメ
ージを回避することができる。合紙101の表面の凹凸
形状は、凹部分の空間の大きさがダストの大きさと同程
度かそれ以上であればよく、ダストが凹部分に確実に入
り込むことで基板100表面との接触によるダメージを
回避できる。Further, according to the present invention, the surface roughness Ra of the interleaf paper 101 is 1 μm to 1 mm, and the surface has fine irregularities. Therefore, the adsorbed dust is inserted into the slip paper 10
The dust captured by the first concave portion is captured by the substrate 10.
The contact with the zero surface is eliminated, and damage to the substrate 100 can be avoided. The irregular shape of the surface of the slip sheet 101 may be such that the size of the space for the concave portion is equal to or larger than the size of the dust. Can be avoided.
【0018】上記のように規定されている表面抵抗率お
よび表面粗さRaは、合紙101の表面、裏面のうちの
少なくとも一方であれば効果を発揮できる。例えば、基
板100の片面のみが処理対象である場合では、合紙の
片面を金属で被覆したものも用いることができ、金属被
覆でない方の面が本発明に規定されている抵抗率および
表面粗さRaを有し、基板100の処理対象面とが対面
するように重ねることで、基板100をクリーニングす
る効果を発揮しうる。The surface resistivity and the surface roughness Ra defined as described above are effective if they are at least one of the front surface and the back surface of the slip sheet 101. For example, when only one surface of the substrate 100 is to be processed, a material in which one surface of the slip sheet is coated with metal can be used, and the non-metal coated surface has the resistivity and surface roughness specified in the present invention. When the substrate 100 is stacked so as to face the processing target surface of the substrate 100, an effect of cleaning the substrate 100 can be exerted.
【0019】さらに本発明は、長尺の帯状基板を処理す
るロール・ツー・ロール方式を採用した基板処理方法に
おいても効果的である。機能性堆積膜を基板に形成する
例として、ロール・ツー・ロール方式の装置を図3に示
す。この装置によれば、帯状基板300上にnip型ア
モルファスシリコンを用いた光起電力素子を連続的に作
成することができる。The present invention is also effective in a substrate processing method employing a roll-to-roll method for processing a long strip-shaped substrate. As an example of forming a functional deposition film on a substrate, a roll-to-roll type apparatus is shown in FIG. According to this apparatus, a photovoltaic element using nip type amorphous silicon can be continuously formed on the belt-shaped substrate 300.
【0020】nip型の光起電力素子の素子構成を図4
に示す。図4において、光起電力素子は、導電性の基板
400の上に、裏面反射層401、n型層402、i型
層403、p型層404、透明電極405、集電電極4
06を順次堆積することで得られる。図3の装置では、
そのうちのn型層402、i型層403、p型層404
を堆積することができるが、成膜室308〜310に相
当する部分の基板処理方法を変更することで、基板洗
浄、スパッタ蒸着、エッチング等の処理をおこなうこと
もできる。FIG. 4 shows an element configuration of a nip type photovoltaic element.
Shown in In FIG. 4, a photovoltaic element includes a conductive substrate 400, a back reflection layer 401, an n-type layer 402, an i-type layer 403, a p-type layer 404, a transparent electrode 405, and a current collecting electrode 4
06 are sequentially deposited. In the device of FIG.
Among them, the n-type layer 402, the i-type layer 403, and the p-type layer 404
However, by changing the substrate processing method of a portion corresponding to the film forming chambers 308 to 310, processing such as substrate cleaning, sputter deposition, and etching can be performed.
【0021】図3において、送出し室305にて帯状基
板300は送出しボビン301から送出され、ガスゲー
ト室315で接続された3つの真空容器307を通過し
て、巻取り室306にて巻取りボビン302に巻き取ら
れる。送出しボビン301から送出された合紙は合紙巻
取りボビン303に巻き取られ、巻取りボビン302に
巻き取られる合紙は合紙送出しボビン304から供給さ
れる。In FIG. 3, the strip-shaped substrate 300 is sent out from the sending-out bobbin 301 in the sending-out chamber 305, passes through three vacuum vessels 307 connected by the gas gate chamber 315, and is wound up in the winding-up chamber 306. It is wound around the bobbin 302. The slip sheet sent out from the sending-out bobbin 301 is taken up by a slip sheet take-up bobbin 303, and the slip sheet taken up by the take-up bobbin 302 is supplied from the slip sheet sending bobbin 304.
【0022】送出し室305、巻取り室306、真空容
器307および各成膜室308〜310は、排気管31
4を通して不図示の排気調整バルブと不図示の排気手段
により排気され、不図示の圧力計で測定して、各成膜室
308〜310は所望の圧力に調節できる。さらに、基
板加熱ヒータ312によって、帯状基板300は所望の
温度に昇温できる。原料ガス導入管313からは不図示
のガス混合器からの原料ガスを各成膜室308〜310
へ導入できる。The delivery chamber 305, the take-up chamber 306, the vacuum chamber 307, and the film formation chambers 308 to 310
The gas is exhausted by an exhaust adjustment valve (not shown) and exhaust means (not shown) through 4, and can be adjusted to a desired pressure in each of the film forming chambers 308 to 310 by measuring with a pressure gauge (not shown). Further, the band-shaped substrate 300 can be heated to a desired temperature by the substrate heater 312. Source gas from a gas mixer (not shown) is supplied from the source gas introduction pipe 313 to each of the film forming chambers 308 to 310.
Can be introduced to
【0023】また、高周波電極311には不図示の高周
波発振器から電力を印加して、各成膜室308〜310
にプラズマ放電を生起し、帯状基板300上にn,i,
p型のアモルファスシリコン膜を連続的に形成できる。Further, power is applied to the high-frequency electrode 311 from a high-frequency oscillator (not shown) so that each of the film forming chambers 308 to 310 is formed.
Generates a plasma discharge on the strip-shaped substrate 300,
A p-type amorphous silicon film can be formed continuously.
【0024】各ガスゲート室315には分離用ガス導入
管316から不活性ガスあるいはH 2ガスなどの掃気ガ
スを導入することで、各成膜室308〜310および真
空容器307の内部のガスが互いに混入することを防止
でき、高品位の堆積膜を得ることができる。また、真空
容器307やガスゲート室315内部の帯状基板300
の通路には、マグネットローラー317を適所に配置す
ることで、強磁性を有する帯状基板300を吸着させて
帯状基板300を所望の経路に沿って搬送させることが
できる。Introducing gas for separation into each gas gate chamber 315
Inert gas or H from tube 316 TwoScavenging gas such as gas
By introducing the source, each of the film forming chambers 308 to 310 and the true
Prevents gas inside empty container 307 from being mixed with each other
And a high-quality deposited film can be obtained. Also, vacuum
The band-shaped substrate 300 inside the container 307 or the gas gate chamber 315
The magnet roller 317 is placed in an appropriate place in the passage
This allows the band-shaped substrate 300 having ferromagnetism to be adsorbed.
The belt-shaped substrate 300 can be transported along a desired route.
it can.
【0025】図5は、図3の装置の一部の詳細であっ
て、巻取り室306の部分を示している。図5におい
て、501は合紙、502はアイドルローラー、503
は帯電手段である。帯状基板300と合紙ボビン304
から供給される合紙501とが共に基板ボビン302に
巻き取られ、基板ボビン302には帯状基板300と合
紙501が交互に接することになる。合紙501が基板
ボビン302に巻き取られる前に帯電手段503によっ
て連続的に合紙501が帯電させられ、巻き上げと同時
に帯状基板300の表面に存在するダストが合紙501
に静電吸着されて、帯状基板300がクリーニングされ
る。また、帯電手段503を用いなくとも、合紙ボビン
304から巻き出される合紙501の自己摩擦により合
紙501を帯電させて同様の効果を得ることができる。FIG. 5 shows a detail of a portion of the apparatus of FIG. In FIG. 5, reference numeral 501 denotes a slip sheet; 502, an idle roller;
Is a charging means. Band-shaped substrate 300 and interleaf bobbin 304
Is wound up on the substrate bobbin 302 together with the interleaving paper 501, and the band-shaped substrate 300 and the interleaving paper 501 come into contact with the substrate bobbin 302 alternately. Before the interleaf 501 is wound on the substrate bobbin 302, the interleaf 501 is continuously charged by the charging means 503, and the dust existing on the surface of the belt-shaped substrate 300 is simultaneously wound up with the interleaf 501.
And the belt-shaped substrate 300 is cleaned. Further, even if the charging unit 503 is not used, the same effect can be obtained by charging the interleaf 501 by the self-friction of the interleaf 501 unwound from the interleaf bobbin 304.
【0026】図6は、図3の装置の一部の詳細であっ
て、送出し室305の部分を示している。図6におい
て、基板ボビン301から基板300と合紙601が送
り出され、合紙601は合紙ボビン303へと巻かれる
が、帯電手段603を設置して合紙601を帯電させる
ことで、帯状基板300の表面に存在するダストが合紙
601に静電吸着されて、帯状基板300がクリーニン
グされる。また、帯電手段603を用いなくとも、基板
ボビン301から送り出される基板300と合紙601
との摩擦により合紙601を帯電させて同様の効果を得
ることができる。FIG. 6 is a detail of a portion of the apparatus of FIG. In FIG. 6, the substrate 300 and the interleaf 601 are sent out from the substrate bobbin 301, and the interleaf 601 is wound around the interleaf bobbin 303. The dust existing on the surface of the substrate 300 is electrostatically attracted to the slip sheet 601 and the belt-shaped substrate 300 is cleaned. Further, even if the charging unit 603 is not used, the substrate 300 sent out from the substrate bobbin 301 and the slip sheet 601 can be used.
The same effect can be obtained by charging the interleaving paper 601 by friction with the above.
【0027】[0027]
【実施例】以下、本発明の実施例を添付図面に基づいて
詳細に説明するが、本発明はこれらの実施例に限られな
い。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the accompanying drawings, but the present invention is not limited to these embodiments.
【0028】〔実施例1〕本実施例では図1に示す装置
を用いて基板の処理を行い、以下に示す手順によって基
板100上にnip型アモルファスシリコンを用いた光
起電力素子(図4参照)の作成を実施した。本実施例で
は、不図示のCVD装置およびスパッタ装置で裏面反射
層401から透明電極層405までを基板400上に作
成し、次に基板400を大気中に取り出して、図1に示
す基板処理装置で合紙101を被覆し、該合紙で被覆さ
れた基板100を積層手段104によって50枚重ね合
わせて、不図示の蒸着装置にまで輸送し、再度合紙10
1を剥離して取り除き、前記蒸着装置によって集電電極
406を形成した。なお、各堆積膜の作成条件および膜
厚を表1に示す。Embodiment 1 In this embodiment, a substrate is processed using the apparatus shown in FIG. 1, and a photovoltaic element using nip type amorphous silicon on a substrate 100 (see FIG. 4) by the following procedure. ) Was created. In this embodiment, from the back reflection layer 401 to the transparent electrode layer 405 are formed on the substrate 400 using a CVD device and a sputtering device (not shown), the substrate 400 is taken out into the atmosphere, and then the substrate processing device shown in FIG. The interleaving paper 101 is covered with the interleaving paper, 50 sheets of the substrate 100 covered with the interleaving paper are stacked by the laminating means 104 and transported to a vapor deposition device (not shown).
1 was removed by peeling, and a current collecting electrode 406 was formed by the vapor deposition apparatus. Table 1 shows the conditions and film thickness of each deposited film.
【0029】基板100として鏡面研磨された大きさ1
00mm平方、厚さ2mmのステンレス板(SUS30
4)を用い、合紙101として表面抵抗率2×1013Ω
/cm2(含水率6.0%)、表面粗さRa=20μm
で大きさ100mm平方、厚さ0.1mmの木材パルプ
製の上質紙を用いた。合紙被覆および基板の搬送は湿度
40%、クラス1000のクリーンルーム内で行い、帯
電手段103としてステンレス製の電極針に−5kVの
直流電圧を印加し、合紙被覆時の搬送手段102の搬送
速度はいずれも20mm/secとした。Mirror-polished size 1 as substrate 100
00mm square, 2mm thick stainless steel plate (SUS30
4), the surface resistivity is 2 × 10 13 Ω as the slip sheet 101
/ Cm 2 (water content 6.0%), surface roughness Ra = 20 μm
A high quality paper made of wood pulp having a size of 100 mm square and a thickness of 0.1 mm was used. The interleaf paper coating and the transport of the substrate are performed in a clean room with a humidity of 40% and class 1000, a DC voltage of -5 kV is applied to a stainless steel electrode needle as the charging means 103, and the transport speed of the transport means 102 during the interleaf paper coating is applied. Was set to 20 mm / sec.
【0030】以上の方法により作成した50個の光起電
力素子の特性評価を、AM値1.5、エネルギー密度1
00mW/cm2の擬似太陽光を照射したときの光電変
換効率ηを測定した。また、いわゆるシャント抵抗(素
子内部の短絡による抵抗)を測定して、シャント抵抗が
1×104Ω/cm2以上のものを良品として良品率を測
定した。それらの評価結果を表2に示す。ここに示す光
電変換効率ηは、良品であった素子の光電変換効率の平
均値である。The evaluation of the characteristics of the 50 photovoltaic elements produced by the above-described method was conducted with an AM value of 1.5 and an energy density of 1
The photoelectric conversion efficiency η when simulated sunlight of 00 mW / cm 2 was irradiated was measured. Further, the so-called shunt resistance (resistance due to a short circuit inside the element) was measured, and the non-defective product having a shunt resistance of 1 × 10 4 Ω / cm 2 or more was measured. Table 2 shows the evaluation results. The photoelectric conversion efficiency η shown here is an average value of photoelectric conversion efficiencies of non-defective devices.
【0031】〔比較例1〕本比較例では、合紙101と
して表面抵抗率1×1014Ω/cm2、表面粗さRa=
0.05μmで大きさ100mm平方、厚さ0.1mm
のポリエチレンシートを用いた以外は、実施例1と同一
の手順で光起電力素子の作成および評価を行った。その
評価結果を表2に示す。[Comparative Example 1] In this comparative example, the slip sheet 101 has a surface resistivity of 1 × 10 14 Ω / cm 2 and a surface roughness Ra =
0.05μm, size 100mm square, thickness 0.1mm
A photovoltaic element was prepared and evaluated in the same procedure as in Example 1 except that the polyethylene sheet was used. Table 2 shows the evaluation results.
【0032】〔比較例2〕本比較例では、合紙101と
して表面抵抗率1×103Ω/cm2、表面粗さRa=
2.5μmで大きさ100mm平方、厚さ0.1mmの
導電性ポリマー樹脂シートを用いた以外は、実施例1と
同一の手順で光起電力素子の作成および評価をおこなっ
た。その評価結果を表2に示す。[Comparative Example 2] In this comparative example, the interleaf paper 101 had a surface resistivity of 1 × 10 3 Ω / cm 2 and a surface roughness Ra =
A photovoltaic element was prepared and evaluated in the same procedure as in Example 1, except that a conductive polymer resin sheet having a size of 2.5 μm, a size of 100 mm square, and a thickness of 0.1 mm was used. Table 2 shows the evaluation results.
【0033】その結果、比較例1または比較例2に比べ
て、実施例1ではシャント抵抗の高い素子が多く、良品
率が向上していることが分かった。比較例1および比較
例2で不良判定となった素子の表面を観察したところ、
素子が破壊されていた部分に透明電極層であるInSn
O2の細かな破片(粒径1μm〜1mm)があり、平坦
な合紙を用いたことで破片が素子に破壊的な圧力を加え
たものと考えられる。実施例1ではそのようなことはな
かった。As a result, it was found that, in comparison with Comparative Example 1 or Comparative Example 2, there were many elements having a higher shunt resistance in Example 1, and the yield rate was improved. Observation of the surface of the element which was determined to be defective in Comparative Example 1 and Comparative Example 2 showed that
InSn, which is a transparent electrode layer, is applied to the portion where the device was destroyed.
There are fine fragments of O 2 (particle size: 1 μm to 1 mm), and it is considered that the fragments applied destructive pressure to the element by using flat interleaf paper. In Example 1, such a phenomenon did not occur.
【0034】[0034]
【表1】 [Table 1]
【0035】[0035]
【表2】 [Table 2]
【0036】〔実施例2〕本実施例では図3に示すロー
ル・ツー・ロール方式の装置を用いて基板の処理を行
い、実施例1と同様の素子構成のnip型アモルファス
シリコンを用いた光起電力素子を連続的に作成した。ま
た、図5に示す帯電手段を巻取り室306内に設置し
た。帯電手段503としてステンレス製の電極針に−5
kVの直流電圧を印加し、帯状基板300の搬送速度は
10mm/secとした。帯状基板300として、幅3
00mm、長さ100m、厚さ0.2mm、SUS43
0製、BA表面処理基板上に予め不図示のロール・ツー
・ロール方式のスパッタ式膜形成装置で帯状基板300
上に裏面反射層を堆積してあるものを使用し、合紙50
1として表面抵抗率1×1014Ω/cm2、表面粗さR
a=20μmで厚さ0.1mmのアラミド紙を用い、送
出し室305および巻取り室306で使用する合紙のい
ずれも同一材質のものを用いた。[Embodiment 2] In this embodiment, a substrate is processed using a roll-to-roll type apparatus shown in FIG. 3, and light using nip type amorphous silicon having the same element configuration as that of Embodiment 1 is used. Electromotive force elements were continuously produced. Further, the charging means shown in FIG. The charging means 503 has a -5
A DC voltage of kV was applied, and the transport speed of the belt-shaped substrate 300 was set to 10 mm / sec. The width of the band-shaped substrate 300 is 3
00mm, length 100m, thickness 0.2mm, SUS43
And a band-shaped substrate 300 on a BA surface-treated substrate by a roll-to-roll type sputtering film forming apparatus (not shown) in advance.
Use a sheet with a back reflection layer deposited on top
The surface resistivity is 1 × 10 14 Ω / cm 2 and the surface roughness R is 1.
The aramid paper having a = 20 μm and a thickness of 0.1 mm was used, and the interleaf used in the delivery chamber 305 and the winding chamber 306 was made of the same material.
【0037】各成膜室での堆積膜の作成条件を表3に示
す。成膜工程として連続的に膜堆積を約5時間行い、全
長100mの帯状基板のうち、70mに有効な素子を形
成することができた。Table 3 shows the conditions for forming a deposited film in each film forming chamber. As a film forming process, film deposition was continuously performed for about 5 hours, and an effective element could be formed on 70 m of a 100-m long strip-shaped substrate.
【0038】上記の手順で得られたアモルファスシリコ
ン膜を堆積した帯状基板および合紙が巻かれた巻取りボ
ビン302を取り出し、不図示のスパッタ方式の膜堆積
装置で透明導電膜を形成した後、帯状基板300を不図
示の切断機によって送り出しながら搬送方向に100m
m毎に切断してサンプルとし、Agのペーストをスクリ
ーン印刷することにより集電電極を形成して、図4の摸
式断面図に示す光起電力素子を作成した。帯状基板の素
子の有効部分70mのうち、1m毎にサンプルを抽出
し、作成された光起電力素子の特性評価を、AM値1.
5、エネルギー密度100mW/cm2の擬似太陽光を
照射したときの光電変換効率ηを測定して評価を行っ
た。また、シャント抵抗が1×104Ω/cm2以上のも
のを良品として良品率を測定した。それらの評価結果を
表4に示す。ここに示す光電変換効率ηは、良品であっ
たサンプルの光電変換効率の平均値である。The strip-shaped substrate on which the amorphous silicon film obtained by the above procedure is deposited and the winding bobbin 302 on which the slip sheet is wound are taken out, and a transparent conductive film is formed by a sputtering type film deposition apparatus (not shown). 100 m in the transport direction while sending the belt-shaped substrate 300 by a cutting machine (not shown).
Each sample was cut into a sample every m, and a current collector electrode was formed by screen-printing an Ag paste to form a photovoltaic element shown in the schematic cross-sectional view of FIG. A sample was extracted every 1 m from the effective portion 70 m of the device on the strip-shaped substrate, and the characteristic evaluation of the photovoltaic device thus prepared was performed using an AM value of 1.
5. Evaluation was performed by measuring the photoelectric conversion efficiency η when simulating sunlight with an energy density of 100 mW / cm 2 . A non-defective product having a shunt resistance of 1 × 10 4 Ω / cm 2 or more was measured for a non-defective product. Table 4 shows the evaluation results. The photoelectric conversion efficiency η shown here is the average value of the photoelectric conversion efficiencies of non-defective samples.
【0039】〔実施例3〕本実施例では、帯電手段50
3を設置しなかった以外は、実施例2と同一の手順で光
起電力素子の作成および評価を行った。本実施例では帯
電手段503を設置しなかったが、合紙501は基板ボ
ビン302に巻き取られる前に自己摩擦によって帯電し
ていたことが確認された。評価結果を表4に示す。[Embodiment 3] In this embodiment, the charging means 50
Except that No. 3 was not installed, a photovoltaic element was prepared and evaluated in the same procedure as in Example 2. In this embodiment, the charging means 503 was not provided, but it was confirmed that the slip sheet 501 was charged by self-friction before being wound on the substrate bobbin 302. Table 4 shows the evaluation results.
【0040】〔比較例3〕本比較例では、合紙501と
して表面抵抗率1×1010Ω/cm2、表面粗さRa=
0.05μmで厚さ0.1mmのポリエチレンシートを
用いた以外は、実施例2と同一の手順で光起電力素子の
作成および評価を行った。その評価結果を表4に示す。[Comparative Example 3] In this comparative example, as the slip sheet 501, the surface resistivity was 1 × 10 10 Ω / cm 2 , and the surface roughness Ra =
A photovoltaic element was prepared and evaluated in the same procedure as in Example 2, except that a polyethylene sheet having a thickness of 0.05 μm and a thickness of 0.1 mm was used. Table 4 shows the evaluation results.
【0041】その結果、比較例3に比べて実施例2およ
び実施例3ではシャント抵抗の高い素子が多く、良品率
が向上していることが分かった。比較例3で不良判定と
なった素子の表面を観察したところ、素子が破壊されて
いた部分に半導体層であるアモルファスシリコンの細か
な破片(粒径0.1μm〜100μm)があり、平坦な
合紙を用いたことで破片が素子に破壊的な圧力を加えた
ためと考えられる。また、実施例2では実施例3よりも
合紙501の帯電電圧が上がったためにクリーニング効
果がさらに向上して良品率が向上したと考えられる。As a result, it was found that in Examples 2 and 3, as compared with Comparative Example 3, there were many elements having a higher shunt resistance, and the yield rate was improved. Observation of the surface of the device which was determined to be defective in Comparative Example 3 revealed that fine portions (particle size: 0.1 μm to 100 μm) of amorphous silicon as a semiconductor layer were found in the portion where the device was broken, It is considered that the use of paper caused the debris to exert destructive pressure on the element. Further, in Example 2, it is considered that since the charging voltage of the slip sheet 501 was higher than in Example 3, the cleaning effect was further improved and the non-defective product rate was improved.
【0042】〔実施例4〕本実施例では、図6に示す帯
電手段603を送出し室305内に設置した以外は、実
施例2と同一の手順で光起電力素子の作成および評価を
行った。評価結果を表4に示す。[Embodiment 4] In this embodiment, the production and evaluation of the photovoltaic element are performed in the same procedure as in Embodiment 2 except that the charging means 603 shown in FIG. Was. Table 4 shows the evaluation results.
【0043】実施例4では実施例2よりも光電変換効率
ηが向上したが、帯状基板300を送り出すときにクリ
ーニングすることでダストを除去することができ、成膜
室308〜310への不純物混入が減少したためと考え
られる。In the fourth embodiment, the photoelectric conversion efficiency η is improved as compared with the second embodiment. However, dust can be removed by cleaning when the belt-shaped substrate 300 is sent out, and impurities are mixed into the film forming chambers 308 to 310. It is considered that the number has decreased.
【0044】[0044]
【表3】 [Table 3]
【0045】[0045]
【表4】 [Table 4]
【0046】〔実施例5〕本実施例では、実施例2でお
こなった光起電力素子の作成および評価について、同じ
合紙501を再利用しながら試行を10回繰り返しおこ
なった。各試行における良品率の変化を図7に示す。[Embodiment 5] In this embodiment, the trial of the production and evaluation of the photovoltaic element performed in Embodiment 2 was repeated 10 times while reusing the same slip sheet 501. FIG. 7 shows the change in the non-defective rate in each trial.
【0047】〔比較例4〕本比較例では、合紙501と
して表面抵抗率1×1014Ω/cm2、表面粗さRa=
0.05μmで厚さ0.1mmのアラミド紙を用いた。
これ以外は、実施例5と同一の手順で光起電力素子の作
成および評価を行った。各試行における良品率の変化を
図7に示す。Comparative Example 4 In this comparative example, the slip sheet 501 has a surface resistivity of 1 × 10 14 Ω / cm 2 and a surface roughness Ra =
Aramid paper having a thickness of 0.05 μm and a thickness of 0.1 mm was used.
Except for this, a photovoltaic element was prepared and evaluated in the same procedure as in Example 5. FIG. 7 shows the change in the non-defective rate in each trial.
【0048】その結果、比較例4に比べて、実施例5で
は試行回数が増えても良品率の低下が少ない。このよう
に、合紙の表面粗さをダストの平均粒径より大きくする
ことで、ダストによる素子の破壊を防止し、さらに合紙
の繰り返し使用回数を増大させることができる。As a result, in the fifth embodiment, as compared with the comparative example 4, even if the number of trials increases, the decrease in the non-defective rate is small. As described above, by making the surface roughness of the slip sheet larger than the average particle diameter of the dust, it is possible to prevent the destruction of the element due to the dust and to increase the number of times the slip sheet is repeatedly used.
【0049】[0049]
【発明の効果】以上説明したように、本発明によれば、
枚葉式またはロール・ツー・ロール方式を採用した基板
処理方法および基板処理装置において、少なくとも一方
の表面の表面粗さRaが1μm〜1mm、表面抵抗率が
1×109Ω/cm2以上を有し、かつ少なくとも一方の
表面が帯電した合紙を用いて基板の表面に付着したダス
トを除去して清浄な表面を得ることで、ダストによる基
板表面あるいは堆積膜への傷、欠陥、コンタミを防止す
ることができ、基板の処理を高品位に行うことで歩留り
や特性を向上させることができる。また、合紙の使用可
能回数を増大させることができ、合紙に要するコストを
低減することができる。As described above, according to the present invention,
In a substrate processing method and a substrate processing apparatus employing a single-wafer method or a roll-to-roll method, at least one surface has a surface roughness Ra of 1 μm to 1 mm and a surface resistivity of 1 × 10 9 Ω / cm 2 or more. By using a slip sheet with at least one surface charged to remove dust adhering to the surface of the substrate and obtaining a clean surface, dust, scratches, defects, and contamination on the substrate surface or the deposited film are reduced. Thus, the yield and characteristics can be improved by performing high-quality processing of the substrate. In addition, the number of usable sheets can be increased, and the cost required for the sheets can be reduced.
【図1】本発明の基板処理方法おける枚葉式の装置例を
示す概略図である。FIG. 1 is a schematic view showing an example of a single wafer type apparatus in a substrate processing method of the present invention.
【図2】合紙の表面抵抗率とダストの捕獲率の関係を説
明する図である。FIG. 2 is a diagram illustrating the relationship between the surface resistivity of the slip sheet and the dust capture rate.
【図3】本発明の基板処理方法におけるロール・ツー・
ロール方式の装置例を示す概略図である。FIG. 3 shows a roll-to-roll process in the substrate processing method of the present invention.
It is the schematic which shows the example of an apparatus of a roll system.
【図4】光起電力素子の断面構造を示す摸式図である。FIG. 4 is a schematic diagram showing a cross-sectional structure of a photovoltaic element.
【図5】本発明の基板処理方法におけるロール・ツー・
ロール方式の装置例の一部を示す概略図である。FIG. 5 shows a roll-to-roll process in the substrate processing method of the present invention.
It is the schematic which shows a part of apparatus example of a roll system.
【図6】本発明の基板処理方法におけるロール・ツー・
ロール方式の装置例の一部を示す概略図である。FIG. 6 shows a roll-to-roll process in the substrate processing method of the present invention.
It is the schematic which shows a part of apparatus example of a roll system.
【図7】基板処理の試行回数と良品率の関係を説明する
図である。FIG. 7 is a diagram illustrating the relationship between the number of trials of substrate processing and the yield rate.
100 基板 101 合紙 102 搬送手段 103 帯電手段 104 積層手段 300 帯状基板 301 送出しボビン 302 巻取りボビン 303 合紙巻取りボビン 304 合紙送出しボビン 305 送出し室 306 巻取り室 307 真空容器 308、309、310 成膜室 311 高周波電極 312 基板加熱ヒータ 313 原料ガス導入管 314 排気管 315 ガスゲート室 316 分離用ガス導入管 317 マグネットローラー 400 帯状基板 401 裏面反射層 402 n型層 403 i型層 404 p型層 405 透明電極 406 集電電極 500 帯状基板 501、601 合紙 502、602 アイドルローラー 503、603 帯電手段 DESCRIPTION OF SYMBOLS 100 Substrate 101 Interleaf 102 Conveying means 103 Charging means 104 Stacking means 300 Strip substrate 301 Sending bobbin 302 Winding bobbin 303 Inserting paper winding bobbin 304 Inserting paper sending bobbin 305 Sending chamber 306 Winding chamber 307 Vacuum container 308,309 , 310 Deposition chamber 311 High-frequency electrode 312 Substrate heater 313 Source gas introduction pipe 314 Exhaust pipe 315 Gas gate chamber 316 Separation gas introduction pipe 317 Magnet roller 400 Strip substrate 401 Back reflection layer 402 n-type layer 403 i-type layer 404 p-type Layer 405 Transparent electrode 406 Current collecting electrode 500 Band-shaped substrate 501, 601 Interleaving paper 502, 602 Idle roller 503, 603 Charging means
───────────────────────────────────────────────────── フロントページの続き (72)発明者 幸田 勇蔵 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 (72)発明者 芳里 直 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 (72)発明者 田村 秀男 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 (72)発明者 矢島 孝博 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 (72)発明者 金井 正博 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 (72)発明者 下田 寛嗣 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 (72)発明者 高井 康好 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 (72)発明者 都築 英寿 東京都大田区下丸子3丁目30番2号 キヤ ノン株式会社内 Fターム(参考) 4K029 BA35 KA01 KA03 4K030 AA05 BA30 BA31 GA11 GA14 5F045 AB04 AC01 AC19 AF07 BB15 CA16 DP22 5F051 AA05 BA11 BA14 CA22 DA04 GA05 GA11 GA20 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Yuzo Koda 3- 30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (72) Inventor Naoshi Yoshiri 3- 30-2 Shimomaruko 3-chome, Ota-ku, Tokyo Within Non Corporation (72) Inventor Hideo Tamura 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Corporation (72) Inventor Takahiro Yajima 3-30-2, Shimomaruko, Ota-ku, Tokyo Inside Canon Corporation (72) Inventor Masahiro Kanai 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (72) Inventor Hiroshi Shimoda 3-30-2 Shimomaruko 3-chome, Ota-ku, Tokyo Canon Inc. (72) Invention Person Yasuyoshi Takai 3-30-2 Shimomaruko, Ota-ku, Tokyo Inside Canon Inc. (72) Inventor Hidetoshi Tsuzuki 3-30-2 Shimomaruko, Ota-ku, Tokyo F term in Canon Inc. (reference) 4K029 BA35 KA01 KA03 4K030 AA05 BA30 BA31 GA11 GA14 5F045 AB04 AC01 AC19 AF07 BB15 CA16 DP22 5F051 AA05 BA11 BA14 CA22 DA04 GA05 GA11 GA20
Claims (10)
基板間に挿入する工程を有し、該合紙の少なくとも一方
の表面の表面粗さRaが1μm〜1mm、表面抵抗率が
1×109Ω/cm2以上であることを特徴とする基板処
理方法。An interleaving paper having at least one surface charged is inserted between substrates, wherein at least one surface of the interleaving paper has a surface roughness Ra of 1 μm to 1 mm and a surface resistivity of 1 × 10 A substrate processing method characterized by being 9 Ω / cm 2 or more.
基板間から取り除く工程を有し、該合紙の少なくとも一
方の表面の表面粗さRaが1μm〜1mm、表面抵抗率
が1×109Ω/cm2以上であることを特徴とする基板
処理方法。2. The method according to claim 1, further comprising the step of removing interleaving paper having at least one surface charged between the substrates, wherein at least one surface of the interleaving paper has a surface roughness Ra of 1 μm to 1 mm and a surface resistivity of 1 × 10 9. A substrate treatment method characterized by being Ω / cm 2 or more.
板を処理することを特徴とする請求項1または2に記載
の基板処理方法。3. The substrate processing method according to claim 1, wherein the substrate is processed by a single-wafer method in which the substrates are overlapped with each other.
搬送するロール・ツー・ロール方式により基板を処理す
ることを特徴とする請求項1または2に記載の基板処理
方法。4. The substrate processing method according to claim 1, wherein the substrate is processed by a roll-to-roll method in which a roll-shaped substrate is stretched between rolls and transported.
パターニング、切断、加熱、冷却のいずれかの処理を基
板に施すことを特徴とする請求項1乃至4のいずれかに
記載の基板処理方法。5. A method for cleaning, forming a deposited film, etching, modifying,
5. The substrate processing method according to claim 1, wherein any one of patterning, cutting, heating, and cooling is performed on the substrate.
板処理装置において、 前記基板間に合紙を挿入する手段が、少なくとも一方の
表面の表面粗さRaが1μm〜1mm、表面抵抗率が1
×109Ω/cm2以上であり、かつ少なくとも一方の表
面が帯電した合紙を基板間に挿入する手段であることを
特徴とする基板処理装置。6. A substrate processing apparatus having means for inserting a slip sheet between substrates, wherein the means for inserting the slip sheet between the substrates is such that at least one surface has a surface roughness Ra of 1 μm to 1 mm and a surface resistivity of Is 1
A substrate processing apparatus characterized in that it is a means for inserting an interleaving paper having a density of 10 9 Ω / cm 2 or more and having at least one surface charged between the substrates.
基板処理装置において、 前記基板間から合紙を取り除く手段が、少なくとも一方
の表面の表面粗さRaが1μm〜1mm、表面抵抗率が
1×109Ω/cm2以上であり、かつ少なくとも一方の
表面が帯電した合紙を基板間から取り除く手段であるこ
とを特徴とする基板処理装置。7. A substrate processing apparatus having means for removing an interleaf from between substrates, wherein the means for removing the interleaf from between the substrates has a surface roughness Ra of at least one surface of 1 μm to 1 mm and a surface resistivity of 1 μm. A substrate processing apparatus characterized in that it is a means for removing interleaving paper having at least 10 9 Ω / cm 2 or more and having at least one surface charged, between the substrates.
ることを特徴とする請求項6または7に記載の基板処理
装置。8. The substrate processing apparatus according to claim 6, wherein a single wafer type in which substrates are overlapped is adopted.
搬送するロール・ツー・ロール方式を採用することを特
徴とする請求項6または7に記載の基板処理装置。9. The substrate processing apparatus according to claim 6, wherein a roll-to-roll method is adopted in which a roll-shaped substrate is transferred between rolls and transported.
質、パターニング、切断、加熱、冷却のいずれかの処理
を基板に施すことを特徴とする請求項6乃至9のいずれ
かに記載の基板処理装置。10. The substrate processing according to claim 6, wherein any one of cleaning, deposition film formation, etching, modification, patterning, cutting, heating, and cooling is performed on the substrate. apparatus.
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JP2000142860A JP2001326183A (en) | 2000-05-16 | 2000-05-16 | Method and apparatus for processing substrate |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009046710A (en) * | 2007-08-16 | 2009-03-05 | Fuji Electric Systems Co Ltd | Continuous manufacturing apparatus of semiconductor device |
-
2000
- 2000-05-16 JP JP2000142860A patent/JP2001326183A/en not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009046710A (en) * | 2007-08-16 | 2009-03-05 | Fuji Electric Systems Co Ltd | Continuous manufacturing apparatus of semiconductor device |
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