JP2001323372A - Method for producing silicon carbide dummy wafer and silicon carbide dummy wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a production method in which a microcrack is coated with an SiC film and the generation of particulate is prevented, and to provide a dummy wafer made of silicon carbide which does not have a bad influence upon a silicon wafer. SOLUTION: In this method for producing a silicon carbide dummy wafer used in the process of producing a semiconductor device, a silicon carbide dummy wafer is produced by subjecting both sides of a silicon carbide dummy wafer substrate to machining for obtaining the thickness thinner than the finished dimensions of the dummy wafer and thereafter coating the whole with the material same as that of the base metal of the dummy wafer by a CDV method.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method of manufacturing a silicon carbide dummy wafer suitable for a dummy wafer used in a semiconductor device manufacturing process, and a silicon carbide dummy wafer.

[0002]

2. Description of the Related Art A semiconductor device using a silicon single crystal as a substrate includes an oxidation step of forming an oxide film on the surface of a silicon substrate (silicon wafer), a diffusion step of diffusing impurities, and a silicon nitride film under reduced pressure. Low pressure CVD (LPCVD) for forming crystalline silicon film (polysilicon film)
Through a process and the like, a fine circuit is formed on the silicon wafer. In these steps, a semiconductor manufacturing apparatus called a diffusion apparatus, an LPCVD apparatus, or the like is used. Each of these devices inserts a plurality of silicon wafers into a furnace, heats the silicon wafer main body to a high temperature, a gas introduction unit that supplies a reactive gas into the furnace, and an exhaust unit. Thus, a large number of silicon wafers can be processed simultaneously (batch processing). FIG. 9 shows an example of a vertical LPCVD apparatus.

In FIG. 9, a CVD apparatus 10 is provided with a heater (not shown) on the inner peripheral surface of a furnace body 12 so that the inside can be heated and maintained at a high temperature.
Connected to a vacuum pump (not shown).
The pressure can be reduced to rr or less. Furnace body 1
Inside 2, a process tube 14 made of high-purity quartz or silicon carbide (SiC) is provided.

A boat receiver 18 is provided at the center of the base 16 covered by the process tube 14, and a vertical rack-shaped wafer boat 20 made of SiC or quartz is arranged on the boat receiver 18. It is.
In the vertical direction of the wafer boat 20, a large number of silicon wafers 22 for forming semiconductor devices such as large-scale integrated circuits (LSI) are held at appropriate intervals. A gas introduction pipe 24 for introducing a reaction gas into the furnace is provided on the side of the wafer boat 20, and a thermocouple protection pipe 26 having a built-in thermocouple for measuring the temperature in the furnace is provided. It is provided.

In the CVD apparatus 10 configured as described above, a large number of silicon wafers 22 are placed in a furnace via a wafer boat 20. Then, the pressure inside the furnace is reduced to 100 Torr or less, and the furnace is heated to a high temperature of, for example, 800 to 1200 ° C., and a reactive gas (a raw material gas) such as SiCl _{4 is} mixed with a carrier gas such as H ₂ through a gas introduction pipe 24. And a polycrystalline silicon film (polysilicon film) or a silicon oxide film (Si
O ₂ ) is formed.

[0006] In such a CVD apparatus 10, it is difficult to make the gas flow, temperature, and the like uniform throughout the furnace. Therefore, conventionally, several wafers called dummy wafers 28 having the same shape as the silicon wafer 22 are arranged on the upper and lower portions of the wafer boat 20 for the purpose of maintaining the uniformity of the gas flow and the temperature in the furnace. are doing. In order to check the state of particles adhering to the silicon wafer 22 and whether a predetermined film thickness is formed on the silicon wafer 22, a plurality of monitor wafers are placed at appropriate positions in the vertical direction of the wafer boat 20. 30 are mixed with the silicon wafer 22. This dummy wafer 28 (including the monitor wafer 30)
Heretofore, those having a thickness of about 0.5 to 1 mm formed of silicon single crystal or high-purity quartz have been used.

However, the conventional dummy wafer 28 made of silicon single crystal or high-purity quartz has a coefficient of thermal expansion that is significantly different from that of a polysilicon film, a Si ₃ N ₄ film, or the like. And S
Not only does the i ₃ N ₄ film easily peel off and contaminates the inside of the furnace, but it must be disposed of in a short period of use due to heat resistance and corrosion resistance, resulting in poor economic efficiency. For this reason, in recent years, dummy wafers 28 made of silicon carbide have attracted attention in the industry. This silicon carbide dummy wafer 32 (hereinafter, referred to as SiC wafer 32) is formed by forming a silicon carbide film to a thickness of about 0.3 to 1 mm on the surface of a disk-shaped substrate made of graphite by LPCVD or the like, and then forming the graphite. It is obtained by oxidizing and removing the substrate in an oxidizing atmosphere. Since the SiC wafer 32 is superior in corrosion resistance to nitric acid and the like as compared with the dummy wafer 28 made of a conventional silicon single crystal or high-purity quartz, it is possible to easily remove deposits by etching. Long-term repeated use is possible. (B) Since the coefficient of thermal expansion is close to the coefficient of thermal expansion of the silicon nitride film and the polysilicon film, these films adhered on the dummy wafer 32 are not easily separated, and a large increase in particles during the film forming process is suppressed. can do. (C) Since the diffusion coefficient of impurities such as heavy metals at a high temperature is extremely low, there is little concern about furnace contamination due to impurities contained in the SiC wafer 32. (D) Since it is excellent in heat deformation resistance, automatic transfer such as transfer by a robot is easy. Practical application is promoted because of its great economic effect.

However, the above-mentioned SiC wafer 32
Has the disadvantage that cracks and warpage are likely to occur. For this reason, Japanese Patent Application Laid-Open No. 8-188408 proposes to improve these disadvantages. According to the gazette, the thickness of a silicon carbide substrate is set to 300 μm or less, and a silicon carbide film is formed on both surfaces of the substrate by a chemical vapor deposition method. Products have been made.

[0009]

However, in the conventional SiC wafer, as described above, a silicon carbide film having a thickness of 0.3 to 1 is formed on the surface of the graphite disk-shaped substrate by CVD or the like.
It is obtained by removing a graphite substrate by oxidation in an oxidizing atmosphere after forming a film of about mm. For this purpose, SiC
The wafer has a disk-shaped substrate surface Sg on the graphite side (shown in FIG. 5).
The surface of the SiC wafer is mechanically roughened as compared with the other surface side Su (shown in FIG. 5) on which the SiC wafer has been deposited because the surface is rough or foreign matter adhered to the disk-shaped substrate surface of graphite. It is necessary to process. Further, although the thickness of silicon carbide is formed by CVD or the like, there is a problem that it is difficult to accurately obtain a thickness required for a product, for example, a thickness of 700 μm. It is necessary to process. Also,
In Japanese Patent Application Laid-Open No. 8-188408, even if the thickness of the silicon carbide substrate is set to 300 μm or less to reduce cracks and warpage, a silicon carbide film is formed on both surfaces of the substrate by a chemical vapor deposition method, Alternatively, machining and purification are performed to obtain the finished dimensions. Si
Since the C wafer has a high hardness, it must be processed with a cutting tool such as diamond having a higher hardness. Also,
Since the SiC wafer is brittle, if the surface of the SiC wafer is subjected to mechanical processing such as polishing or grinding for thickness adjustment or surface roughness adjustment, microcracks may be generated on the surface of the SiC wafer. The SiC wafer having the microcracks on its surface may cause the SiC micro-pieces to peel off during use, that is, to cause particles to be generated. It has an adverse effect such as contamination and the generation of crystal defects due to particles adhering to the silicon wafer.

[0010] Furthermore, the dummy wafers, especially the dummy wafers placed at both ends of the wafer boat, reduce the work efficiency if they are replaced every time a film forming process or a diffusion process is performed. It is desired that they can be used continuously. And the dummy wafer is
If the film formed on the dummy wafer is peeled off during the film formation or the like, the inside of the furnace is contaminated, and adverse effects such as adhesion of particles to the silicon wafer are caused. For this reason, there is a demand for a SiC wafer having an appropriate roughness on the surface and having good adhesion strength without peeling off even when a film formed on the silicon wafer adheres.

In the case of a SiC wafer having a mirror-finished surface, the generation of particles due to peeling of SiC fine pieces due to microcracks can be reduced, but the mirror surface has low adhesion to the deposited film and the deposited film is less than the target film thickness. There is a possibility of peeling. Therefore, surface processing for obtaining an appropriate surface roughness is indispensable. Also, JP-A-8-188408
As described in Japanese Patent Application Laid-Open Publication No. H10-264, a part of the chemical solution may remain on the processed surface subjected to the purification treatment when the chemical solution is washed.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned drawbacks of the prior art, and has as its object to provide a manufacturing method for covering microcracks with a SiC film to prevent generation of particles, and a silicon carbide dummy wafer. And Another object of the present invention is to provide a silicon carbide dummy wafer that does not adversely affect a silicon wafer.

[0013]

In order to achieve the above-mentioned object, a silicon carbide dummy wafer according to the present invention has been made focusing on the following points. The surface roughness is not a mirror surface as described above, and the surface roughness Ra is an appropriate roughness, for example, 0.
When the thickness is in the range of 1 μm to 1.0 μm, even if the thickness of the film is small, the contact area with the surface roughness increases, the strength increases, and the film can be almost completely eliminated. Further, the microcracks that occur on the surface of the SiC wafer that has been subjected to mechanical processing such as polishing and grinding have a depth of several μm to tens of μm. The thickness of the film deposited on the surface of the SiC wafer is approximately the same, and the surface roughness of the film thickness is similar to the surface roughness of the SiC wafer.

Therefore, in order to cover the microcracks on the surface of the SiC wafer, it is sufficient to deposit a film having a thickness of at least more than 20 μm. Preferably, a thickness of 30 to several 50 μm may be deposited. Although a film thickness larger than this may be deposited, the cost increases.

Further, if the thickness of the SiC wafer which has been subjected to machining such as polishing and grinding is less than 0.5 mm, it becomes difficult to machine the SiC wafer. Preferably, it has a thickness of 5 mm or more.

As described above, according to the method for manufacturing a silicon carbide dummy wafer of the present invention, in the method for manufacturing a silicon carbide dummy wafer used in a semiconductor device manufacturing process, both surfaces of the silicon carbide dummy wafer substrate are machined to be thinner than the finished dimensions of the dummy wafer. Later, the whole is covered with the same material as the base material of the dummy wafer by the CVD method.

In the silicon carbide dummy wafer of the present invention, a silicon carbide dummy wafer used in a semiconductor device manufacturing process comprises a silicon carbide dummy wafer substrate serving as a dummy wafer substrate and a silicon carbide coating covering the entire silicon carbide dummy wafer substrate. are doing.

[0018]

According to the present invention formed as described above, after the SiC dummy wafer substrate is machined to be thinner than the finished dimensions of the dummy wafer, the whole (all surfaces) is coated with the same material as the dummy wafer substrate (base material) by the CVD method. ing. As a result, micro cracks generated by machining
Since the dummy wafer substrate (base material) is covered with the same material, even if the temperature rises, the thermal expansion coefficient is the same, so that it shrinks at the same time. It does not cause peeling, that is, generation of particles. Similarly, the film covering the dummy wafer substrate (base material) is shrunk at the same time even when the temperature rises because the entire material (all surfaces) is covered with the same material as the dummy wafer substrate (base material). Will not be done. Further, since the surface of the dummy wafer substrate (base material) is processed to have an appropriate roughness, for example, in the range of 0.1 μm to 1.0 μm, the surface of the dummy wafer substrate (base material) is covered with the surface roughness. The contact area with the film is increased and the strength is increased, and peeling can be almost completely eliminated even in the case of a thin film.

As described above, when a polycrystalline silicon film (polysilicon film) or a silicon oxide film (SiO ₂ ) is formed on the surface of a silicon wafer by the CVD method,
A SiC dummy wafer coated with a C film and having an appropriate roughness, for example, a close value in a range of 0.1 μm to 1.0 μm is used. As a result, the contact area between the polycrystalline silicon film (polysilicon film) or silicon oxide film (SiO ₂ ) and the surface of the SiC dummy wafer is increased to increase the strength, and even in the case of a thin film, peeling can be almost completely eliminated. So
After the SiC dummy wafer is placed on the wafer boat once, it can be used continuously for a plurality of times.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of a method for manufacturing a silicon carbide dummy wafer and a silicon carbide dummy wafer according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a partial sectional view schematically showing a silicon carbide dummy wafer according to an embodiment of the present invention. In FIG. 1, a silicon carbide dummy wafer 40 includes:
It comprises a silicon carbide substrate 42 formed by a CVD method and a high-purity silicon carbide film 44. The silicon carbide film 44 covers the entire silicon carbide substrate 42 (all surfaces), and covers the surface of the silicon carbide substrate 42 with microcracks 46 generated by machining such as grinding and polishing. This silicon carbide dummy wafer 40 is
For example, it is composed of the thickness Ta of the silicon carbide substrate 42 and the thickness tc of the silicon carbide film 44. This silicon carbide coating 44 can be formed by micro-cracks 46 even when silicon carbide dummy wafer 40 is placed together with silicon wafer 22 in a high-temperature atmosphere such as a diffusion step.
It is sufficient that the microcrack 46 is covered with a film thickness that does not cause peeling of C micro pieces, that is, generation of particles. That is, the silicon carbide coating 4
The film thickness tc of 4 may be at least twenty and several μm or more, and is preferably from thirty and several μm to fifty and several μm.
It is sufficient to deposit a thickness of m.

FIGS. 2 to 8 show an example of a manufacturing process of the silicon carbide dummy wafer 40 according to the embodiment of the present invention, and show a manufacturing process by the CVD method.

As shown in FIG. 2, first, a predetermined size of high-purity graphite having a diameter De equal to or larger than the outer diameter Dd of the silicon carbide dummy wafer 40 to be manufactured is used. A disk-shaped graphite substrate 50 is manufactured. Next, as shown in FIG. 3, the graphite substrate 50 is carried into a low-pressure CVD apparatus, and the inside of the CVD apparatus 10 (inside the furnace) is depressurized to, for example, 100 Torr or less, and then the furnace is heated to 1000 to 1600 ° C. ,Hold. Then, SiCl ₄ and CH ₄ , which are source gases, together with hydrogen gas (H ₂ ), which is a carrier gas, are contained in the furnace by 5 to 20% by volume.
%, And a silicon carbide film 52 to be a silicon carbide substrate 42 is deposited on the surface of the graphite substrate 50 by a reduced pressure CVD method to a predetermined thickness Th, for example, about 0.5 to 1.5 mm to form a film.

After the silicon carbide film 52 is coated, the graphite substrate 50 is taken out of the furnace, and the peripheral portion of the silicon carbide film 52 is cut off by grinding by machining, and as shown in FIG. The surface Ma is exposed. The cutting diameter Dj at this time is the outer diameter dimension D of the silicon carbide dummy wafer 40.
It is processed to be smaller than d by twice the thickness tc of the silicon carbide film 44 to be deposited. Next, the graphite substrate 50 sandwiched between the silicon carbide films 52 is placed in a furnace at 900 to 1400 ° C., and oxygen is supplied to oxidize and burn the graphite substrate 50, thereby removing the graphite substrate 50, as shown in FIG. Two silicon carbide films 52 are obtained.

Thereafter, both surfaces of silicon carbide film 52 are
As shown in FIG.
Thus, mechanical processing such as grinding or polishing is performed, and a silicon carbide substrate 42 shown in FIG. 7 is formed. In this machining, the thickness Ta of the silicon carbide substrate 42 is made thinner by a predetermined amount (twice the thickness Tc of the silicon carbide film 44) than the product thickness Tk of the dummy wafer 40 made of silicon carbide. For example, as shown in FIG. 7, the processing thickness Ta is 50 μm thicker on each side than the product thickness Tk, that is, 1 μm on both sides.
Finish thinly by 00 μm. At this time, surface roughness Ra of silicon carbide substrate 42 is 0.1 μm to 1.0 μm.
Finish between. At this time, on the surface of the silicon carbide substrate 42, microcracks 46 generated by mechanical processing such as grinding and polishing are generated at a depth of several μm to several tens μm. The silicon carbide substrate 42 in which the microcracks 46 have been generated is washed with pure water and dried so that no chemical or the like remains.

The thinly finished silicon carbide substrate 42 is carried into the reduced pressure CVD apparatus 10 again, and the inside of the CVD apparatus 10 (inside the furnace) is reduced in pressure to, for example, 100 Torr or less.
The inside of the furnace is heated and maintained at 1000 to 1600 ° C. Then, SiCl ₄ and CH ₄ , which are source gases, together with hydrogen gas (H ₂ ), which is a carrier gas, are contained in the furnace in a volume percentage of 5%.
-20%, and as shown in FIG.
Silicon carbide is deposited to a thickness of about 50 μm on the entire surface of No. 2 to form a silicon carbide film 44.

As a result, the microcracks 46 generated during the processing are coated with the silicon carbide film 44, which is the same material as the silicon carbide substrate 42 as the base material, by the CVD method. The crack 46 can be concealed. At this time, CVD
Roughness Ra of the silicon carbide coating 44 coated by the method
b appears according to the surface roughness Ra of the silicon carbide substrate 42 during processing. For example, when the surface roughness Ra of the silicon carbide substrate during processing is 0.1 μm, the surface roughness Rab of the silicon carbide coating 44 is also approximately 0.1 μm. Further, when the surface roughness Ra at the time of processing is rough and is 0.9 μm, the surface roughness Rab of the silicon carbide coating 44 is also rough and approximately 0.9 μm. Thereby, for example, the surface roughness Rab of the silicon carbide coating 44 is 0.9 μm
When it is rough, even if a thin polycrystalline silicon film (polysilicon film) or silicon oxide film (SiO ₂ ) is deposited, the polycrystalline silicon film (polysilicon film), the silicon oxide film (SiO ₂ ) and the silicon carbide film 44 are formed. Since the contact area of the surface of the SiC dummy wafer 40 increases, the strength increases, and even in the case of a thin film, peeling can be almost completely eliminated.
Can be used plural times continuously after it is placed on the wafer boat. In the above embodiment, the silicon carbide substrate 42
The silicon carbide film 44, which is the same material as that described above, is coated by a CVD method. good.

[0028]

As described above, according to the present invention, the SiC dummy wafer has a machined SiC dummy wafer substrate entirely covered with the same material (entire surface) by the CVD method. For this reason, the microcracks generated during the machining process have the same thermal expansion coefficient because the entire material (all surfaces) is covered with the same material as the dummy wafer substrate (base material). No particles are generated, and the inside of the furnace is not contaminated and the silicon wafer and the like are not adversely affected. Similarly, since the thermal expansion coefficient is the same even when the temperature rises, the whole (all surfaces) is covered with the same material as the dummy wafer substrate (base material), so that the coated film does not peel off. Thus, the same effect as described above can be obtained.

As described above, when a polycrystalline silicon film (polysilicon film) or a silicon oxide film (SiO ₂ ) is formed on the surface of a silicon wafer by CVD,
A SiC dummy wafer coated with a C film and having an appropriate roughness, for example, a value close to the range of 0.1 μm to 1.0 μm, and having an increased contact area and increased strength is used. As a result, after the SiC dummy wafer is placed on the wafer boat once, it can be used continuously a plurality of times. Therefore, the dummy wafers placed at both ends of the wafer boat need to be replaced in each film forming step or diffusion step. And work efficiency is improved.

[Brief description of the drawings]

FIG. 1 is a partially enlarged cross-sectional view of a silicon carbide dummy wafer according to an embodiment of the present invention.

FIG. 2 is a side view of a disk-shaped graphite substrate in the method for manufacturing a silicon carbide dummy wafer according to the embodiment of the present invention.

FIG. 3 is a side cross-sectional view in which a silicon carbide film is formed on a disc-shaped graphite base material by a CVD method in the method for manufacturing a silicon carbide dummy wafer according to the embodiment of the present invention.

FIG. 4 is a side cross-sectional view in which the outer periphery of the silicon carbide film is machined in the method for manufacturing a silicon carbide dummy wafer according to the embodiment of the present invention.

FIG. 5 is a side cross-sectional view in which a disc-shaped graphite base material is incinerated to form a silicon carbide film in the method for manufacturing a silicon carbide dummy wafer according to the embodiment of the present invention.

FIG. 6 is a side cross-sectional view for machining both surfaces of a silicon carbide film in the method for manufacturing a silicon carbide dummy wafer according to the embodiment of the present invention.

FIG. 7 is a side cross-sectional view of a silicon carbide dummy wafer substrate in which both surfaces of a silicon carbide film are machined in the method of manufacturing a silicon carbide dummy wafer according to the embodiment of the present invention.

FIG. 8 shows a method of manufacturing a silicon carbide dummy wafer according to an embodiment of the present invention.
It is explanatory drawing which forms a silicon carbide film by the D method.

FIG. 9 is an explanatory diagram of a low pressure CVD apparatus.

[Explanation of symbols]

10 CVD apparatus, 40 silicon carbide dummy wafer, 42 silicon carbide substrate, 44 silicon carbide coating, 46 microcrack, 50 graphite base, 52 ... silicon carbide film, 54 ... processing tool

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4G001 BA22 BB22 BC72 BD38 BE32 4K030 AA03 AA10 BA37 CA05 DA08 DA09 KA04 LA11 5F045 AA06 AB06 AC01 AC03 AC11 AD14 AD15 AD16 AD17 AD18 AE23 AE25 AF02 AF19 BB14 GH09

Claims (2)

[Claims] In a method of manufacturing a silicon carbide dummy wafer used in a semiconductor device manufacturing process or the like, a silicon carbide dummy wafer substrate is machined to be thinner than a finished size of the dummy wafer, and then the whole is formed of the same material as the dummy wafer base material by CVD. A method for producing a silicon carbide dummy wafer, which is coated by a method. 2. A silicon carbide dummy wafer used in a semiconductor device manufacturing process or the like, comprising: a silicon carbide dummy wafer substrate serving as a substrate of the dummy wafer; and a silicon carbide coating covering the entire silicon carbide dummy wafer substrate. Silicon carbide dummy wafer.