JP2001320088A - Semiconductor light emitting device - Google Patents

Semiconductor light emitting device

Info

Publication number
JP2001320088A
JP2001320088A JP2000331421A JP2000331421A JP2001320088A JP 2001320088 A JP2001320088 A JP 2001320088A JP 2000331421 A JP2000331421 A JP 2000331421A JP 2000331421 A JP2000331421 A JP 2000331421A JP 2001320088 A JP2001320088 A JP 2001320088A
Authority
JP
Japan
Prior art keywords
light emitting
layer
conductivity type
emitting device
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000331421A
Other languages
Japanese (ja)
Inventor
Katsunobu Kitada
勝信 北田
Yoshifumi Bito
喜文 尾藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2000331421A priority Critical patent/JP2001320088A/en
Publication of JP2001320088A publication Critical patent/JP2001320088A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Landscapes

  • Led Devices (AREA)
  • Printers Or Recording Devices Using Electromagnetic And Radiation Means (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light emitting device in which image quality is prevented from deteriorating due to light reflected toward an individual electrode while reducing the chip size by not forming an individual electrode between light emitting diodes. SOLUTION: A plurality of one conductivity type semiconductor layers and opposite conductivity type semiconductor layers are provided on a substrate, the one conductivity type semiconductor layer is connected with common electrodes, the opposite conductivity type semiconductor layer is arranged with a plurality of light emitting diodes connected with individual electrodes, the light emitting diodes are divided into groups of a plurality of diodes, each group is connected with the same individual electrode, the opposite conductivity type semiconductor layers belonging to different groups are connected with the same common electrode, and the common electrodes belonging to different groups are interconnected through an insulation film.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は半導体発光装置に関
し、特にページプリンタ用感光ドラムの露光用光源など
に用いられる半導体発光装置に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device, and more particularly to a semiconductor light emitting device used as an exposure light source of a photosensitive drum for a page printer.

【0002】[0002]

【従来の技術】従来の半導体発光装置を図5と図6に示
す。図5は断面図、図6は平面図である。
2. Description of the Related Art A conventional semiconductor light emitting device is shown in FIGS. FIG. 5 is a sectional view, and FIG. 6 is a plan view.

【0003】図5において、21は半導体基板、22は
一導電型半導体層、23は逆導電型半導体層、24は個
別電極、25は共通電極である。
In FIG. 5, 21 is a semiconductor substrate, 22 is a semiconductor layer of one conductivity type, 23 is a semiconductor layer of opposite conductivity type, 24 is an individual electrode, and 25 is a common electrode.

【0004】一導電型半導体層22は、バッファ層22
a、オーミックコンタクト層22b、電子注入層22c
で構成される。
The one-conductivity-type semiconductor layer 22 includes a buffer layer 22.
a, ohmic contact layer 22b, electron injection layer 22c
It consists of.

【0005】逆導電型半導体層23は、発光層23a、
クラッド層23bおよび第2のオーミックコンタクト層
23cで構成される。
[0005] The opposite conductivity type semiconductor layer 23 comprises a light emitting layer 23a,
It is composed of a cladding layer 23b and a second ohmic contact layer 23c.

【0006】半導体基板21上に一導電型半導体層22
と逆導電型半導体層23とから成る発光ダイオードを設
けるに当たり、一導電型半導体層22よりも逆導電型半
導体層23を小面積と成すとともに、この一導電型半導
体層22の露出部に共通電極25(25a、25b)を
接続して設け、逆導電型半導体層23に個別電極24を
接続して設けている。なお、26は窒化シリコン膜など
から成る保護膜である。
A semiconductor layer 22 of one conductivity type is formed on a semiconductor substrate 21.
When providing a light emitting diode composed of the semiconductor layer 23 and the opposite conductivity type semiconductor layer 23, the semiconductor layer 23 having the opposite conductivity type has a smaller area than the semiconductor layer 22 of the one conductivity type. 25 (25a, 25b) are connected, and the individual electrodes 24 are connected to the opposite conductivity type semiconductor layer 23. Reference numeral 26 denotes a protective film made of a silicon nitride film or the like.

【0007】また、図6に示すように、共通電極25
(25a、25b)は隣接する島状半導体層22、23
(発光ダイオード)ごとに異なる群に属するように二群
に分けて接続して設けられ、隣接する島状半導体層2
2、23が同じ個別電極24に接続されている。
[0007] Further, as shown in FIG.
(25a, 25b) are adjacent island-shaped semiconductor layers 22, 23.
(Light emitting diodes) are connected and divided into two groups so as to belong to different groups, and adjacent island-shaped semiconductor layers 2
2 and 23 are connected to the same individual electrode 24.

【0008】このような発光ダイオードアレイでは、個
別電極24と共通電極25(25a、25b)の組み合
わせを選択して電流を流すことによって、各発光ダイオ
ードを選択的に発光させることができる。
In such a light emitting diode array, each light emitting diode can be made to emit light selectively by selecting a combination of the individual electrode 24 and the common electrode 25 (25a, 25b) and flowing a current.

【0009】[0009]

【発明が解決しようとする課題】しかしながら、この構
成の半導体発光装置では、外部回路との接続点数が発光
ダイオードの増加にともない増えるという課題があり、
この点を以下に述べる。
However, in the semiconductor light emitting device having this configuration, there is a problem that the number of connection points with an external circuit increases as the number of light emitting diodes increases.
This will be described below.

【0010】従来例では何れも、工程が煩雑になるだけ
でなく、外部回路との接続電極数も増加し、しかも、各
半導体発光装置であるチップに占める接続電極の面積も
増加し、これによってチップサイズが増大する傾向にあ
る。また、外部回路自体も複雑になっていた。
In each of the conventional examples, not only the process becomes complicated, but also the number of connection electrodes with external circuits increases, and the area of the connection electrodes occupying a chip as each semiconductor light emitting device also increases. The chip size tends to increase. Also, the external circuit itself has become complicated.

【0011】これらの課題を解消するために、配線幅を
小さくすることが考えれるが、それも配線抵抗に関係し
て制限があり、実際には30μm以下の配線幅という配
線ルールがある。
In order to solve these problems, it is conceivable to reduce the wiring width. However, there is a limit related to the wiring resistance, and there is a wiring rule of a wiring width of 30 μm or less in practice.

【0012】以上のようなチップサイズの増大化、外部
回路の複雑化、配線幅の制限というなかで、低コスト化
がはかられているが、未だ満足し得るような域に至って
いなかった。
With the increase in chip size, the complexity of external circuits, and the limitation on the wiring width as described above, cost reduction has been attempted, but it has not yet reached a satisfactory level. .

【0013】しかも、島状半導体層22、23(発光ダ
イオード)ごとに異なる群に属するように二群に分けて
接続して設けられているので、発光ダイオードと発光ダ
イオードとの間に個別電極を通過させなければならず、
そのために、発光ダイオードと発光ダイオードとの間に
個別電極が形成しなければならず、これによって、その
個別電極による反射光が原因になり、印画濃度のむらが
発生し、印画品質が低下していた。
Furthermore, since the island-like semiconductor layers 22 and 23 (light-emitting diodes) are connected and divided into two groups so as to belong to different groups, an individual electrode is provided between the light-emitting diodes. Must be passed,
For that purpose, an individual electrode must be formed between the light emitting diode and the light emitting diode. This causes light reflected by the individual electrode to cause unevenness in printing density and deteriorated printing quality. .

【0014】このような課題を解消すべく、複数個の発
光ダイオードを複数個の組に区分して、各組を選択する
共通電極群と上記複数個の各組における組内の個別の発
光ダイオードを選択する個別電極群とを設けることで接
続点数の低減をはかる技術が提案されている(特開昭6
2−152873号および特開平9−277592号参
照)。
In order to solve such a problem, a plurality of light emitting diodes are divided into a plurality of sets, and a common electrode group for selecting each set and an individual light emitting diode in each of the plurality of sets are set. There has been proposed a technique for reducing the number of connection points by providing an individual electrode group for selecting the number of electrodes (Japanese Unexamined Patent Publication No.
2-152873 and JP-A-9-277592).

【0015】しかしながら、共通電極群からの外部接続
点は、チップ幅を増大させる原因となっている。そこ
で、これを解消するために、共通電極群の線幅を細くす
ればよいが、そのために接続点数が減るが、その反面、
チップ幅が増えることで、コストが増大するという課題
がある。
However, external connection points from the common electrode group cause an increase in chip width. In order to solve this problem, the line width of the common electrode group may be reduced, but the number of connection points is reduced.
There is a problem that the cost increases due to the increase in the chip width.

【0016】さらに特開平9−277592号において
は、各ブロック群内に外部回路との接続点を設けて配線
抵抗の低減をおこなっており、そのために、接続点数も
大きく削減できなかった。
Further, in Japanese Patent Application Laid-Open No. 9-277592, a connection point with an external circuit is provided in each block group to reduce the wiring resistance. Therefore, the number of connection points cannot be largely reduced.

【0017】また、特開平11−40842号において
は、アレイサイズ幅を小さくするために、マトリクス配
線上に層間絶縁膜を介して外部回路との電極を形成する
技術が提案されている。
Japanese Patent Application Laid-Open No. H11-40842 proposes a technique for forming an electrode with an external circuit on a matrix wiring via an interlayer insulating film in order to reduce the array size width.

【0018】しかしながら、この技術によれば、各ブロ
ック内でマトリクス配線は各発光体に対し必ず1箇所の
層間絶縁膜にコンタクトホールを設けた構造となってい
ることで、発光体に対しコンタクト不良が発生する危険
性が高くなり、その結果、駆動電圧不良に対しても致命
的である。
However, according to this technique, the matrix wiring in each block always has a structure in which a contact hole is provided in one interlayer insulating film for each light-emitting element, so that a defective contact with the light-emitting element is provided. Is more likely to occur, and as a result, it is fatal to a drive voltage failure.

【0019】また、電極にAuGeを用いることで、G
eが表面に拡散し、酸化膜を形成し、これにより、ワイ
ヤーボンディング不良が発生している。また、層間絶縁
膜と金属間の密着性に劣ることで、ワイヤーボンディン
グ不良も発生する。
Also, by using AuGe for the electrode, G
e diffuses to the surface to form an oxide film, which causes wire bonding failure. Further, poor bonding between the interlayer insulating film and the metal causes poor wire bonding.

【0020】本発明は叙上に鑑みて完成されたものであ
り、その目的は発光ダイオードと発光ダイオードとの間
に個別電極を形成しないことで、個別電極への反射光に
よる印画品質の低下を防ぎ、さらに外部回路との接続点
数が多く工程が煩雑であることや、チップサイズの増大
化という従来の装置の問題点を解消し、これによって高
性能かつ小型化を達成した半導体発光装置を提供するこ
とにある。
The present invention has been completed in view of the above, and an object of the present invention is not to form an individual electrode between light-emitting diodes, thereby reducing the printing quality due to light reflected on the individual electrodes. To provide a semiconductor light emitting device that achieves high performance and miniaturization by solving the problems of the conventional device such as preventing a large number of connection points with an external circuit and complicating the process and increasing the chip size. Is to do.

【0021】本発明の他の目的は合成樹脂からなる絶縁
層と金属層との間の密着性を大きくして、製造歩留まり
を高め、これによって低コスト化を達成した高信頼性の
半導体発光装置を提供することにある。
Another object of the present invention is to increase the adhesion between the insulating layer made of synthetic resin and the metal layer to increase the manufacturing yield and thereby reduce the cost of the semiconductor light emitting device with high reliability. Is to provide.

【0022】[0022]

【課題を解決するための手段】本発明の半導体発光装置
は、基板上に複数の一導電型半導体層と逆導電型半導体
層を設け、この一導電型半導体層に共通電極を接続して
設けるとともに、逆導電型半導体層に個別電極を接続し
た発光ダイオードを複数個配列して設け、そして、前記
発光ダイオードを複数個ごとに群に分けて同じ個別電極
に接続し、異なる群に属する逆導電型半導体層同志を同
じ共通電極に接続し、さらに絶縁膜を介して異なる群に
属する共通電極同志を接続せしめたことを特徴とする。
A semiconductor light emitting device according to the present invention is provided with a plurality of one conductivity type semiconductor layers and a reverse conductivity type semiconductor layer on a substrate, and a common electrode connected to the one conductivity type semiconductor layer. A plurality of light emitting diodes each having an individual electrode connected to the opposite conductivity type semiconductor layer are arranged and provided, and the plurality of light emitting diodes are divided into groups and connected to the same individual electrode, and are connected to different groups. The semiconductor layers are connected to the same common electrode, and the common electrodes belonging to different groups are connected via an insulating film.

【0023】本発明の他の半導体発光装置は、前記発光
ダイオードの配列ラインを挟み、一方側に共通電極を、
他方側に個別電極を形成したことを特徴とする。
In another semiconductor light emitting device of the present invention, a common electrode is provided on one side of the arrangement line of the light emitting diodes.
An individual electrode is formed on the other side.

【0024】本発明のさらに他の半導体発光装置は、前
記絶縁膜上に外部回路との接続端子部を設けて、個別電
極もしくは共通電極と通電せしめるよう成したことを特
徴とする。
Still another semiconductor light emitting device according to the present invention is characterized in that a connection terminal portion for connecting to an external circuit is provided on the insulating film so that an electric current is supplied to an individual electrode or a common electrode.

【0025】また、本発明のさらに他の半導体発光装置
は、Geを含むAu層上にCr層を積層して成る個別電
極または共通電極の上に、合成樹脂から成る前記絶縁膜
を形成したことを特徴とする。
According to still another semiconductor light emitting device of the present invention, the insulating film made of synthetic resin is formed on an individual electrode or a common electrode obtained by laminating a Cr layer on an Au layer containing Ge. It is characterized by.

【0026】さらにまた、本発明の半導体発光装置は、
合成樹脂から成る前記絶縁膜の上に、前記接続端子部お
よび/または異なる群に属する共通電極同志を接続する
接続電極を配設するとともに、これら接続端子部または
接続電極はCr層とAuまたはAlからなる金属層とを
順次積層して成ることを特徴とする。
Furthermore, the semiconductor light emitting device of the present invention
On the insulating film made of synthetic resin, connection terminals for connecting the connection terminals and / or common electrodes belonging to different groups are arranged, and these connection terminals or connection electrodes are formed of a Cr layer and Au or Al. And a metal layer composed of

【0027】[0027]

【発明の実施の形態】以下、本発明を添付図面に基づき
詳細に説明する。図1〜図3は本発明に係る半導体発光
装置の一実施形態を示し、図1は上記の絶縁膜を形成し
た後の横断面図であり、本例では、絶縁膜を2種類の材
料でもって形成し、第1の絶縁膜として、たとえばポリ
イミド合成樹脂などから成る樹脂膜があり、第2の絶縁
膜としては、たとえば窒化珪素などから成る無機質膜な
どがある。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. 1 to 3 show one embodiment of a semiconductor light emitting device according to the present invention. FIG. 1 is a cross-sectional view after forming the above-mentioned insulating film. In this example, the insulating film is made of two kinds of materials. For example, a resin film made of, for example, a polyimide synthetic resin is used as the first insulating film, and an inorganic film made of, for example, silicon nitride is used as the second insulating film.

【0028】図2は前記絶縁膜である第1の絶縁膜を形
成する前の上面図であり、図3は第1の絶縁膜形成後の
上面図である。
FIG. 2 is a top view before forming a first insulating film as the insulating film, and FIG. 3 is a top view after forming the first insulating film.

【0029】これらの図において、1は基板であり、こ
の基板1の上に一導電型半導体層2、逆導電型半導体層
3および個別電極4を順次積層形成する。5は一導電型
半導体層2を延在し、その上に形成した共通電極であ
る。
In these figures, reference numeral 1 denotes a substrate on which a semiconductor layer 2 of one conductivity type, a semiconductor layer 3 of opposite conductivity type and an individual electrode 4 are sequentially laminated. Reference numeral 5 denotes a common electrode extending over the one conductivity type semiconductor layer 2 and formed thereon.

【0030】7は前記絶縁膜としての、たとえばポリイ
ミド合成樹脂、感光性樹脂、窒化シリコン、酸化シリコ
ンなどから成る第1の絶縁膜であり、その厚みは300
0Å程度以上に形成するとよい。
Reference numeral 7 denotes a first insulating film made of, for example, a polyimide synthetic resin, a photosensitive resin, silicon nitride, silicon oxide, or the like, and has a thickness of 300.
It is preferable to form it at about 0 ° or more.

【0031】また、6はたとえば窒化シリコン、酸化シ
リコンなどから成る第2の絶縁膜であり、厚み3000
Å程度に形成される。
Reference numeral 6 denotes a second insulating film made of, for example, silicon nitride, silicon oxide, etc., and has a thickness of 3000.
Å is formed.

【0032】一導電型半導体層2と逆導電型半導体層3
とを順次積層形成して成る発光ダイオードは複数個アレ
ー状に配列し、その発光ダイオードの配列ラインを挟
み、一方側に共通電極を、他方側に個別電極を形成して
いる。
One conductivity type semiconductor layer 2 and opposite conductivity type semiconductor layer 3
Are arranged in an array, and a common electrode is formed on one side and an individual electrode is formed on the other side with the arrangement line of the light emitting diodes interposed therebetween.

【0033】まず、共通電極側において、8は接続電極
であり、共通電極5の上に被覆した第1の絶縁膜7を被
覆し、この第1の絶縁膜7の上に形成したものであり、
さらに第1の絶縁膜7にコンタクトホール10aを形成
して、接続電極8の端部がコンタクトホール10aに到
り、共通電極5と通電している。
First, on the common electrode side, reference numeral 8 denotes a connection electrode, which is formed by coating the first insulating film 7 coated on the common electrode 5 and forming the first insulating film 7 on the first insulating film 7. ,
Further, a contact hole 10 a is formed in the first insulating film 7, and an end of the connection electrode 8 reaches the contact hole 10 a and is electrically connected to the common electrode 5.

【0034】第1の絶縁膜7の上には前記接続端子部と
しての共通電極側の外部回路との接続用パッド9が形成
され、一部の接続電極8は接続用パッド9とも接続され
る。
On the first insulating film 7, pads 9 for connection to an external circuit on the common electrode side as the connection terminal portions are formed, and some of the connection electrodes 8 are also connected to the connection pads 9. .

【0035】一方、個別電極側においては、第1の絶縁
膜7にて外部回路と接続するためのコンタクトホール1
0bが形成され、11は前記接続端子部としてのコンタ
クトホール10b上に設けた接続用パッドである。
On the other hand, on the individual electrode side, a contact hole 1 for connecting to an external circuit through the first insulating film 7.
0b is formed, and 11 is a connection pad provided on the contact hole 10b as the connection terminal portion.

【0036】次に各部材について、詳述する。基板1
は、たとえばシリコン(Si)やガリウム砒素(GaA
s)などの単結晶半導体基板やサファイア(Al23
などの単結晶絶縁基板である。単結晶半導体基板の場
合、(100)面を<011>方向に2〜7°オフさせ
た基板などが好適に用いられる。サファイアの場合、C
面基板が好適である。
Next, each member will be described in detail. Substrate 1
Is, for example, silicon (Si) or gallium arsenide (GaAs).
s) or a single crystal semiconductor substrate such as sapphire (Al 2 O 3 )
And the like. In the case of a single crystal semiconductor substrate, a substrate or the like in which the (100) plane is turned off by 2 to 7 ° in the <011> direction is preferably used. For sapphire, C
Surface substrates are preferred.

【0037】一導電型半導体層2は、バッファ層2a、
オーミックコンタクト層2b、電子の注入層2cで構成
される。
The one conductivity type semiconductor layer 2 includes a buffer layer 2a,
It comprises an ohmic contact layer 2b and an electron injection layer 2c.

【0038】バッファ層2aは2〜4μm程度の厚みに
形成され、オーミックコンタクト層2bは0.1〜1.
0μm程度の厚みに形成され、電子の注入層2cは0.
2〜0.4μm程度の厚みに形成される。
The buffer layer 2a has a thickness of about 2 to 4 μm, and the ohmic contact layer 2b has a thickness of 0.1 to 1.
The electron injection layer 2c is formed to a thickness of about 0 μm.
It is formed to a thickness of about 2 to 0.4 μm.

【0039】バッファ層2aとオーミックコンタクト層
2bはガリウム砒素などで形成され、電子の注入層2c
はアルミニウムガリウム砒素などで形成される。
The buffer layer 2a and the ohmic contact layer 2b are formed of gallium arsenide or the like, and the electron injection layer 2c
Is formed of aluminum gallium arsenide or the like.

【0040】オーミックコンタクト層2bはシリコンな
どの一導電型半導体不純物を1×1016〜1019ato
ms/cm3 程度含有し、電子の注入層2cはシリコン
などの一導電型半導体不純物を1×1016〜1019at
oms/cm3 程度含有する。
The ohmic contact layer 2b is made of one conductivity type semiconductor impurity such as silicon at 1 × 10 16 to 10 19 at.
ms / cm 3 , and the electron injection layer 2c contains one conductivity type semiconductor impurity such as silicon at 1 × 10 16 to 10 19 at.
oms / cm 3 .

【0041】バッファ層2aは基板1と半導体層との格
子定数の不整合に基づくミスフィット転位を防止するた
めに設けるものであり、半導体不純物を含有させる必要
はない。
The buffer layer 2a is provided to prevent misfit dislocation due to mismatch of the lattice constant between the substrate 1 and the semiconductor layer, and does not need to contain semiconductor impurities.

【0042】逆導電型半導体層3は、発光層3a、第2
のクラッド層3bおよび第2のオーミックコンタクト層
3cで構成される。
The opposite conductivity type semiconductor layer 3 includes the light emitting layer 3a and the second
And a second ohmic contact layer 3c.

【0043】発光層3aと第2のクラッド層3bは0.
2〜0.4μm程度の厚みに形成され、オーミックコン
タクト層3cは膜厚d>(0.15μm−オーミックコ
ンタクト層膜厚)程度の厚みに形成される。
The light emitting layer 3a and the second cladding layer 3b have a thickness of 0.1 mm.
The ohmic contact layer 3c is formed to a thickness of about 2 to 0.4 μm, and the thickness of the ohmic contact layer 3c is about d> (0.15 μm−the thickness of the ohmic contact layer).

【0044】発光層3aと第2のクラッド層3bはアル
ミニウムガリウム砒素などから成り、第2のオーミック
コンタクト層3cはガリウム砒素などから成る。
The light emitting layer 3a and the second cladding layer 3b are made of aluminum gallium arsenide or the like, and the second ohmic contact layer 3c is made of gallium arsenide or the like.

【0045】発光層3aと第2のクラッド層3bは、電
子の閉じ込め効果と光の取り出し効果を考慮してアルミ
ニウム砒素(AlAs)とガリウム砒素(GaAs)と
の混晶比を異ならしめる。
The light emitting layer 3a and the second cladding layer 3b differ in the mixed crystal ratio between aluminum arsenide (AlAs) and gallium arsenide (GaAs) in consideration of the electron confinement effect and the light extraction effect.

【0046】発光層3aと第2のクラッド層3bは亜鉛
(Zn)などの逆導電型半導体不純物を1×1016〜1
21atoms/cm3 程度含有し、第2のオーミック
コンタクト層3cは亜鉛などの逆導電型半導体不純物を
1×1019〜1021atoms/cm3 程度含有する。
The light emitting layer 3a and the second cladding layer 3b contain opposite conductive semiconductor impurities such as zinc (Zn) in an amount of 1 × 10 16 to 1 × 10 16.
0 21 atoms / cm 3 order containing the second ohmic contact layer 3c contains about 1 × 10 19 ~10 21 atoms / cm 3 the opposite conductivity type semiconductor impurity such as zinc.

【0047】個別電極4と共通電極5は金/金ゲルマニ
ュム/クロム(Au/AuGe/Cr)の各金属層を順
次積層した層構造であって、厚み1μm程度以下に形成
される。なお、この積層に対し熱処理を加えることで、
Geは拡散し表面と界面に移動する。
The individual electrode 4 and the common electrode 5 have a layer structure in which metal layers of gold / gold germanium / chromium (Au / AuGe / Cr) are sequentially laminated, and are formed to a thickness of about 1 μm or less. By applying heat treatment to this stack,
Ge diffuses and moves to the surface and interface.

【0048】外部接続電極8および接続用パッド9、1
1は、いずれもCrを300Å以上形成した下地に/ア
ルミニウム/金などの各金属層を順次積層した構成であ
り、1μm程度の厚みに形成する。
External connection electrode 8 and connection pads 9, 1
Reference numeral 1 denotes a configuration in which each metal layer such as / aluminum / gold is sequentially laminated on a base on which Cr is formed at 300 ° or more, and is formed to a thickness of about 1 μm.

【0049】図1に示すようにコンタクトホール10a
内にも外部接続電極8を延在して設けることで、その一
部を接続用パッド9と成す。
As shown in FIG. 1, contact hole 10a
The external connection electrode 8 is provided to extend inside, and a part thereof is formed as a connection pad 9.

【0050】また、図1に示すコンタクトホール10b
内にも、この外部接続電極8と同一構成材を設ける。こ
れにより、図3に示すような楕円形のA1とA2の各領
域を設ける。さらにこれら各領域A1,A2の上に接続
用パッド11を形成する。
The contact hole 10b shown in FIG.
The same constituent material as that of the external connection electrode 8 is provided therein. Thus, elliptical areas A1 and A2 as shown in FIG. 3 are provided. Further, connection pads 11 are formed on these areas A1 and A2.

【0051】外部接続電極8および接続用パッド9、1
1は、いずれもCrを300Å以上形成した下地に/ア
ルミニウム/金などから成る金属を積層し、1μm程度
の厚みに形成する。
External connection electrode 8 and connection pads 9, 1
No. 1 is formed by laminating a metal such as / aluminum / gold on a base on which Cr is formed at 300 ° or more, and is formed to a thickness of about 1 μm.

【0052】次に本発明の半導体発光装置の回路を述べ
る。本発明の半導体発光装置については図2、図3に示
すように、一導電型半導体層2と逆導電型半導体層3か
ら成る島状半導体層2、3(発光ダイオード)を基板1
上に一列状に並べて、隣接する島状半導体層3毎に同じ
個別電極4に接続し群とする。図2および図3は本発明
に係る半導体発光装置の一実施形態を示す上面図であ
り、図2は第1の絶縁膜7の形成前を示し、図3は第1
の絶縁膜7の形成後を示す。
Next, the circuit of the semiconductor light emitting device of the present invention will be described. As shown in FIGS. 2 and 3, the semiconductor light emitting device of the present invention includes an
It is arranged in a line above and connected to the same individual electrode 4 for each adjacent island-shaped semiconductor layer 3 to form a group. 2 and 3 are top views showing one embodiment of the semiconductor light emitting device according to the present invention. FIG. 2 shows a state before the first insulating film 7 is formed, and FIG.
After the formation of the insulating film 7 of FIG.

【0053】図2で個別電極で共通化された群を形成
し、この群を複数形成し、隣り合う群と群は、一導
電型半導体層3同士を共通電極5で多層配線せずに接続
する。群、群のような2群をさらに隣り合うように
連続的に形成して群、群を形成していく。図3のよ
うに、群、群の共通電極と群、群の共通電極
を、第1の絶縁膜7を介して接続することで、それぞれ
に独立した共通電極の接続用パッド9と、個別電極の接
続用パッド11に選択的に電流を流すことによってペー
ジプリンタ用感光ドラムの露光用光源として用いられ
る。
In FIG. 2, a group shared by the individual electrodes is formed, a plurality of the groups are formed, and the adjacent group is connected to the one conductivity type semiconductor layer 3 by the common electrode 5 without multilayer wiring. I do. A group is formed by continuously forming two groups, such as a group and a group, so as to be further adjacent to each other. As shown in FIG. 3, by connecting the group and group common electrodes with the group and group common electrodes via the first insulating film 7, the independent common electrode connection pad 9 and the individual electrode Is selectively used as an exposure light source for a photosensitive drum for a page printer.

【0054】なお、第1の絶縁膜7にコンタクトホール
10aとコンタクトホール10bとを形成したことで、
双方には同一材料でもって同時に接続用パッド9と接続
用パッド11を設けてもよい。
By forming the contact holes 10a and 10b in the first insulating film 7,
Both may be provided with the connection pad 9 and the connection pad 11 simultaneously with the same material.

【0055】さらに図4にて電気的接続状態を示す。た
とえば共通電極1を選択し、個別電極1を選択すること
で、ドットN11が点灯する。同様に個別電極2、3、
4・・・nの選択をおこなうことで共通電極1にかかわ
る発光体N12、N13、N14・・・N1nについて
独立的な制御をおこなう。順次共通電極を切り替えてす
べての発光体を独立に制御することができる。
FIG. 4 shows an electrical connection state. For example, when the common electrode 1 is selected and the individual electrode 1 is selected, the dot N11 is turned on. Similarly, individual electrodes 2, 3,
.. N are independently controlled for the luminous bodies N12, N13, N14... N1n related to the common electrode 1. By sequentially switching the common electrode, all the light emitters can be controlled independently.

【0056】このような制御をおこなうことで、たとえ
ば256bitのLEDアレイを形成するには、図2で
示したような1つの個別電極に対して8個の発光体が接
続されていて群となし、その隣に同様の群を形成
し、それぞれを8本の独立した共通電極で接続形成した
構造と成る16個の発光体を有する群と群を32群
まで形成する。さらに、共通電極配線4上に形成した第
1の絶縁膜7上に外部回路との接続端子部である接続用
パッド9を形成する。
By performing such control, for example, to form a 256-bit LED array, eight luminous bodies are connected to one individual electrode as shown in FIG. Next, a similar group is formed next to it, and a group having 16 light-emitting bodies and a group having up to 32 groups each having a structure formed by connecting eight independent common electrodes are formed. Further, on the first insulating film 7 formed on the common electrode wiring 4, a connection pad 9 which is a connection terminal portion with an external circuit is formed.

【0057】かくして本発明の半導体発光装置によれ
ば、共通電極5と個別電極4は発光ダイオードである発
光体と発光体の間に電極を配する必要がなく、これによ
り、発光体間の個別電極の反射光が無くなり、その結
果、印画品質に悪影響を与えない。
Thus, according to the semiconductor light-emitting device of the present invention, the common electrode 5 and the individual electrode 4 do not need to be provided between the light-emitting elements, which are light-emitting diodes. The reflected light from the electrodes is eliminated, so that the printing quality is not adversely affected.

【0058】さらに図2に示すように、共通電極配線5
上に形成した第1の絶縁膜7において、その上に外部回
路との接続端子部である接続用パッド9を形成したこと
で、チップサイズは従来のものよりも小さく設計でき
た。
Further, as shown in FIG.
By forming the connection pad 9 which is a connection terminal portion with the external circuit on the first insulating film 7 formed thereon, the chip size can be designed smaller than the conventional one.

【0059】256bitのチップを想定した場合、外
部との接続点数をカウントすると、個別電極接続用のコ
ンタクトホール10bが32、共通電極に接続された外
部接続用共通電極の接続用パッド9が8となり、合計に
て40点となる。従来の共通電極を分割しないものの接
続点数が個別電極256点、共通電極1点の計257点
に比べ40/257と大幅に接続点を減らすことができ
る。このように接続点数が激減できることで、外部回路
の配線ルールも単純化すると同時に、低コスト化が達成
できた。
When a 256-bit chip is assumed, when the number of connection points with the outside is counted, the number of contact holes 10b for connecting individual electrodes is 32, and the number of connection pads 9 of the external connection common electrode connected to the common electrode is 8. , A total of 40 points. Although the conventional common electrode is not divided, the number of connection points can be greatly reduced to 40/257 compared to 256 individual electrodes and 257 points of one common electrode. Since the number of connection points can be drastically reduced in this manner, the wiring rules of the external circuit can be simplified and the cost can be reduced.

【0060】その上、上記構成の半導体発光装置によれ
ば、個別電極4と共通電極5の上に、ポリイミド合成樹
脂や感光性樹脂などの合成樹脂にから成る第1の絶縁膜
7を被覆した構成において、これら電極4、5は金/金
ゲルマニュム/クロム(Au/AuGe/Cr)の各金
属層を順次積層した層構造にしたことで、Cr層でもっ
てGeの拡散が防ぐことができ、これにより、第1の絶縁
膜7の密着性を高めることができた。
In addition, according to the semiconductor light emitting device having the above configuration, the first insulating film 7 made of a synthetic resin such as a polyimide synthetic resin or a photosensitive resin is coated on the individual electrodes 4 and the common electrode 5. In the configuration, these electrodes 4 and 5 have a layer structure in which each metal layer of gold / gold germanium / chromium (Au / AuGe / Cr) is sequentially laminated, so that the diffusion of Ge can be prevented by the Cr layer, Thereby, the adhesion of the first insulating film 7 could be improved.

【0061】また、ポリイミド合成樹脂や感光性樹脂な
どの合成樹脂にから成る第1の絶縁膜7の上に、外部接
続電極8および接続用パッド9、11を形成した場合
に、これらをCr/アルミニウム/金などから成る金属
を積層したことで、そのCr層にて密着性を高めること
ができた。
When the external connection electrodes 8 and the connection pads 9 and 11 are formed on the first insulating film 7 made of a synthetic resin such as a polyimide synthetic resin or a photosensitive resin, these are formed of Cr / By laminating a metal composed of aluminum / gold or the like, it was possible to enhance the adhesion with the Cr layer.

【0062】したがって、下記のようにワイヤーボンデ
ィング性が向上する。
Accordingly, the wire bonding property is improved as described below.

【0063】外部回路との接続に用いられるオーミック
電極ではAuGe等が用いられ、Geの酸化によるワイ
ヤーボンディング性の著しい低下に対してもCrを介在
させることで表面に析出した酸素とCrが結合すること
で密着性も高まる。
AuGe or the like is used for the ohmic electrode used for connection to an external circuit, and even if the wire bonding property is remarkably reduced due to Ge oxidation, Cr and oxygen deposited on the surface combine with Cr by interposing Cr. This also increases the adhesion.

【0064】同時に、その後の熱処理でもGeが更に表
面へ拡散できないことで、接続用パッド11側のワイヤ
ーボンディング性の向上がはかれる。
At the same time, Ge cannot be further diffused to the surface even in the subsequent heat treatment, so that the wire bonding property on the connection pad 11 side can be improved.

【0065】さらには個別電極の接続用パッド11の如
く、第1の絶縁膜7を介した金属・金属接合にも前述の
同時に形成したCrを用いていることから、金属・金属
間のコンタクト不良や、ワイヤーボンディング不良を激
減させることができる。
Furthermore, as in the case of the connection pads 11 for the individual electrodes, the above-mentioned simultaneously formed Cr is also used for the metal-to-metal bonding via the first insulating film 7, so that the contact failure between the metals is poor. In addition, wire bonding defects can be drastically reduced.

【0066】即ち、金属―金属結合では、途中プロセス
の汚れや酸化膜などの影響で電気的なコンタクト不良や
電極剥がれ等の問題が発生しやすいが、界面にCrを密着
層として用いることは、界面での酸化層と結合しやすく
Cr2O7などの化合物をつくり易い。これにより、電気的
にも機械的にもコンタクトが良好になり、その結果、金
属・金属間のコンタクト不良や、ワイヤーボンディング
不良が激減した。
That is, in the metal-metal bonding, problems such as electrical contact failure and electrode peeling are apt to occur due to the influence of dirt or oxide film in the middle of the process. Easy to bond with oxide layer at interface
Easy to make compounds such as Cr2O7. As a result, the contact was improved both electrically and mechanically, and as a result, the contact failure between the metals and the wire bonding failure were drastically reduced.

【0067】本発明者は本例のようにCr層を形成した
場合と、Cr層を形成しない場合との双方を以下のとお
り作製し、その他の構成は同じにして、ワイヤーボンド
不良の発生率を測定した。
The present inventor made both the case where the Cr layer was formed as in this example and the case where the Cr layer was not formed as described below, and the other configurations were the same. Was measured.

【0068】即ち、Si基板上にポリイミド合成樹脂層
を膜厚を1.5μ程度にてスピンコートし、次いで抵抗
加熱式の真空蒸着装置を用いて、それぞれの金属層を同
一真空内にて積層した。その際、Cr層(密着層)の厚
みは、表1に示すとおりに幾とおりにも変えている。そ
して、このようにパターンニングした一辺90μmの矩
形状エリアに対し、長さ20μmの金線(径80μm)
でもってボールボンディングをおこない、ワイヤーボン
ディングをした。
That is, a polyimide synthetic resin layer is spin-coated on a Si substrate to a thickness of about 1.5 μm, and then each metal layer is laminated in the same vacuum using a resistance heating type vacuum evaporation apparatus. did. At this time, the thickness of the Cr layer (adhesion layer) was varied as shown in Table 1. Then, a gold wire (diameter: 80 μm) having a length of 20 μm is applied to a rectangular area having a side of 90 μm patterned in this manner.
Then, ball bonding was performed and wire bonding was performed.

【0069】しかる後に、図7に示すようにボンディン
グワイヤをばねばかりのマイクロゲージでもって持ち上
げるという測定手法にて、接着強度をはかった。
Thereafter, as shown in FIG. 7, the bonding strength was measured by a measuring method in which the bonding wire was lifted by a spring-only micro gauge.

【0070】[0070]

【表1】 [Table 1]

【0071】同表に示す接着強度の評価については、
「二重丸印」、「丸印」および「バツ印」の3とおりに
区分し、二重丸印はマイクロゲージにて5g以上示して
も剥がれなかった場合であり、丸印は5g以下にて剥が
れなかった場合である。バツ印はワイヤーボンディング
不良である。
Regarding the evaluation of the adhesive strength shown in the table,
It is divided into three types of "double circle", "circle" and "cross", and the double circle is a case where the microgauge shows no more than 5g and does not peel off. This is the case when it did not come off. Crosses indicate poor wire bonding.

【0072】この表から明らかなとおり、Cr層を設け
ることで、接着強度が顕著に向上したことがわかる。
As is clear from this table, it can be seen that the provision of the Cr layer significantly improved the adhesive strength.

【0073】次に、上述のような半導体発光装置の製造
方法を説明する。
Next, a method for manufacturing the above-described semiconductor light emitting device will be described.

【0074】まず、単結晶基板1上に、一導電型半導体
層2、逆導電型半導体層3をMOCVD法などで順次積
層して形成する。
First, a semiconductor layer 2 of one conductivity type and a semiconductor layer 3 of opposite conductivity type are sequentially formed on a single crystal substrate 1 by MOCVD or the like.

【0075】これらの半導体層2、3を形成する場合、
基板温度をまず400〜500℃に設定して200〜2
000Åの厚みにアモルファス状のガリウム砒素膜を形
成した後、基板温度を700〜900℃に上げて所望厚
みの半導体層2、3を形成する。
When these semiconductor layers 2 and 3 are formed,
First, set the substrate temperature to 400 to 500 ° C. and
After forming an amorphous gallium arsenide film to a thickness of 000 °, the substrate temperature is raised to 700 to 900 ° C. to form semiconductor layers 2 and 3 having a desired thickness.

【0076】この場合、原料ガスとしてはTMG((C
33Ga)、TEG((C25 3Ga)、アルシン
(AsH3)、TMA((CH33Al)、TEA
((C253Al)などが用いられ、導電型を制御す
るためのガスとしては、シラン(SiH4)、セレン化
水素(H2Se)、TMZ((CH33Zn)などが用
いられ、キャリアガスとしては、H2などが用いられ
る。
In this case, TMG ((C
HThree)ThreeGa), TEG ((CTwoHFive) ThreeGa), arsine
(AsHThree), TMA ((CHThree)ThreeAl), TEA
((CTwoHFive)ThreeAl) is used to control the conductivity type.
Silane (SiHFour), Selenization
Hydrogen (HTwoSe), TMZ ((CHThree)ThreeZn) etc.
The carrier gas is HTwoEtc. are used
You.

【0077】そして、隣接する素子同志が電気的に分離
されるように、半導体層2、3が島状にパターニングさ
れる。このエッチングは、硫酸過酸化水素系のエッチン
グ液を用いたウエットエッチングやCCl22ガスを用
いたドライエッチングなどで行われる。
The semiconductor layers 2 and 3 are patterned in an island shape so that adjacent elements are electrically separated from each other. This etching is performed by wet etching using a sulfuric acid-hydrogen peroxide-based etchant, dry etching using CCl 2 F 2 gas, or the like.

【0078】次いで、一導電型半導体層2の一端部側の
一部が露出し、且つこの一導電型半導体層2の隣接する
領域部分が露出するように逆導電型半導体層3が一導電
型半導体層2よりも幅狭に形成されるように逆導電型半
導体層3をエッチングする。このエッチングも硫酸過酸
化水素系のエッチング液を用いたウェットエッチングや
CCl22ガスを用いたドライエッチングなどでおこな
われる。
Next, the opposite conductivity type semiconductor layer 3 is formed so that a part of the one conductivity type semiconductor layer 2 on one end side is exposed and a region adjacent to the one conductivity type semiconductor layer 2 is exposed. The opposite conductivity type semiconductor layer 3 is etched so as to be formed narrower than the semiconductor layer 2. This etching is also performed by wet etching using a sulfuric acid-hydrogen peroxide-based etchant, dry etching using CCl 2 F 2 gas, or the like.

【0079】次にプラズマCVD法で、シランガス(S
iH4)とアンモニアガス(NH3)を用いて窒化シリコ
ンから成る第2の絶縁膜6を形成してパターニングす
る。さらに第1層目のオーミック電極としてのクロムと
金ゲルマニウムと金を蒸着法やスパッタリング法で形成
し、個別電極4と共通電極5とをパターニングする。
Next, a silane gas (S
Using iH 4 ) and ammonia gas (NH 3 ), a second insulating film 6 made of silicon nitride is formed and patterned. Further, chromium, gold germanium, and gold as an ohmic electrode of the first layer are formed by an evaporation method or a sputtering method, and the individual electrode 4 and the common electrode 5 are patterned.

【0080】そして、ポリイミドから成る第1の絶縁膜
7を形成してパターニングする。この際、共通電極5
は、第1の絶縁膜7におおわれていることで、共通電極
同士をつなぐコンタクトホール10aをフォトファブに
より形成する。その際に、第1の絶縁層7で覆われた個
別電極4を露出させるためのコンタクトホール10bも
同時に形成する。
Then, a first insulating film 7 made of polyimide is formed and patterned. At this time, the common electrode 5
Forms a contact hole 10a connecting the common electrodes by photofabrication because the first insulating film 7 covers the common electrode. At this time, a contact hole 10b for exposing the individual electrode 4 covered with the first insulating layer 7 is also formed at the same time.

【0081】その後、接続電極8と共通電極の接続用パ
ッド9、ならびにコンタクトホール10b上に積層した
個別電極の接続用パッド11を同時に形成する。これら
電極形成には、蒸着法やスパッタ法が用いられ、Cr、Au
もしくはCr、Alを順次積層する。
Thereafter, the connection electrode 8 and the connection pad 9 for the common electrode, and the connection pad 11 for the individual electrode laminated on the contact hole 10b are simultaneously formed. These electrodes are formed by a vapor deposition method or a sputtering method.
Alternatively, Cr and Al are sequentially laminated.

【0082】[0082]

【発明の効果】以上のように、本発明に係る半導体発光
装置によれば、基板上に複数の一導電型半導体層と逆導
電型半導体層を設け、この一導電型半導体層に共通電極
を接続して設けるとともに、逆導電型半導体層に個別電
極を接続した発光ダイオードを複数個配列して設け、そ
して、前記発光ダイオードを複数個ごとに群に分けて同
じ個別電極に接続し、異なる群に属する逆導電型半導体
層同志を同じ共通電極に接続し、さらに絶縁膜を介して
異なる群に属する共通電極同志を接続せしめたことで、
発光ダイオードの配列ラインを挟み、一方側に共通電極
を、他方側に個別電極を形成した構成になり、これによ
り、共通電極と個別電極は発光ダイオードと発光ダイオ
ードの間に電極を配する必要がなくなり、発光ダイオー
ド間の個別電極の反射光はなく、印画品質に悪影響を与
えなくなり、さらに外部回路との接続点数が多く工程が
煩雑であることや、チップサイズの増大化という従来の
装置の問題点を解消し、配線も単純で、外部との接続点
も大幅に減らすことができ、そして、接続点数が激減で
きることで、外部回路の配線ルールも単純化すると同時
に、低コスト化がはかられ、高性能かつ小型化の半導体
発光装置を提供することができた。
As described above, according to the semiconductor light emitting device of the present invention, a plurality of one conductivity type semiconductor layers and a reverse conductivity type semiconductor layer are provided on a substrate, and a common electrode is provided on the one conductivity type semiconductor layer. A plurality of light emitting diodes each having an individual electrode connected to the opposite conductivity type semiconductor layer are arranged and provided, and the plurality of light emitting diodes are divided into groups and connected to the same individual electrode to provide different groups. By connecting the opposite conductive type semiconductor layers belonging to the same common electrode to the same common electrode, and further connecting the common electrodes belonging to different groups via the insulating film,
A common electrode is formed on one side and an individual electrode is formed on the other side, with the arrangement line of the light emitting diodes interposed, so that the common electrode and the individual electrode need to be arranged between the light emitting diodes. There is no reflected light from the individual electrodes between the light emitting diodes, which does not adversely affect the print quality, and the number of connection points with external circuits is large, the process is complicated, and the chip size is increased. By eliminating the points, the wiring is simple, the number of connection points with the outside can be greatly reduced, and the number of connection points can be drastically reduced, simplifying the wiring rules of the external circuit and reducing the cost. Thus, a high-performance and compact semiconductor light emitting device can be provided.

【0083】また、本発明においては、Geを含むAu
層上にCr層を積層して成る個別電極または共通電極の
上に、合成樹脂から成る絶縁膜を形成したり、あるいは
合成樹脂から成る絶縁膜の上に、接続端子部および/ま
たは共通電極の接続電極を配設するとともに、これら接
続端子部または接続電極はCr層とAuまたはAlから
成る金属層とを順次積層して成ることで、金属層と絶縁
膜との密着性を高め、ワイヤーボンディング性も向上で
きた。
In the present invention, Au containing Ge is used.
An insulating film made of a synthetic resin is formed on an individual electrode or a common electrode formed by laminating a Cr layer on a layer, or a connection terminal portion and / or a common electrode is formed on an insulating film made of a synthetic resin. In addition to providing connection electrodes, these connection terminal portions or connection electrodes are formed by sequentially laminating a Cr layer and a metal layer made of Au or Al, so that the adhesion between the metal layer and the insulating film is increased, and wire bonding is performed. The performance was also improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明に係る半導体発光装置の一実施形態を示
す断面図である。
FIG. 1 is a sectional view showing one embodiment of a semiconductor light emitting device according to the present invention.

【図2】本発明に係る半導体発光装置の多層配線する前
の状態を示す上面図である。
FIG. 2 is a top view showing a state before multi-layer wiring of the semiconductor light emitting device according to the present invention.

【図3】本発明に係る半導体発光装置の多層配線した後
の状態を示す上面図である。
FIG. 3 is a top view showing a state after multi-layer wiring of the semiconductor light emitting device according to the present invention.

【図4】本発明に係る半導体発光装置のー実施形態を示
す電気的構成を示す図である。
FIG. 4 is a diagram showing an electrical configuration of an embodiment of the semiconductor light emitting device according to the present invention.

【図5】従来の半導体発光装置を示す断面図である。FIG. 5 is a sectional view showing a conventional semiconductor light emitting device.

【図6】従来の半導体発光装置を示す平面図である。FIG. 6 is a plan view showing a conventional semiconductor light emitting device.

【図7】ワイヤーボンドの性能を測定する説明図であ
る。
FIG. 7 is an explanatory diagram for measuring the performance of a wire bond.

【符号の説明】[Explanation of symbols]

1…基板 2…一導電型半導体層 3…逆導電型半導体層 4…個別電極 5…共通電極 6…第2の絶縁膜 7…第1の絶縁膜 8…接続電極 9…接続用パッド 10a、10b…コンタクトホール 11…接続用パッド DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... One conductivity type semiconductor layer 3 ... Reverse conductivity type semiconductor layer 4 ... Individual electrode 5 ... Common electrode 6 ... Second insulating film 7 ... First insulating film 8 ... Connection electrode 9 ... Connection pad 10a, 10b: Contact hole 11: Connection pad

フロントページの続き Fターム(参考) 2C162 AH04 AH40 FA04 FA17 FA23 5F041 AA31 AA47 CA36 CA82 CA85 CA87 CB22 DA07 DA20 DA41 FF13 Continued on the front page F term (reference) 2C162 AH04 AH40 FA04 FA17 FA23 5F041 AA31 AA47 CA36 CA82 CA85 CA87 CB22 DA07 DA20 DA41 FF13

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】基板上に複数の一導電型半導体層と逆導電
型半導体層を設け、この一導電型半導体層に共通電極を
接続して設けるとともに、逆導電型半導体層に個別電極
を接続した発光ダイオードを複数個配列して設けた半導
体発光装置において、前記発光ダイオードを複数個ごと
に群に分けて同じ個別電極に接続し、異なる群に属する
逆導電型半導体層同志を同じ共通電極に接続し、さらに
絶縁膜を介して異なる群に属する共通電極同志を接続せ
しめたことを特徴とする半導体発光装置。
1. A semiconductor device comprising: a plurality of one conductivity type semiconductor layers and a reverse conductivity type semiconductor layer provided on a substrate; a common electrode connected to the one conductivity type semiconductor layer; and an individual electrode connected to the opposite conductivity type semiconductor layer. In a semiconductor light-emitting device in which a plurality of light-emitting diodes are arranged and provided, the light-emitting diodes are divided into groups and connected to the same individual electrode, and opposite conductive semiconductor layers belonging to different groups are connected to the same common electrode. A semiconductor light-emitting device comprising: a plurality of common electrodes connected to different groups via an insulating film;
【請求項2】前記発光ダイオードの配列ラインを挟み、
一方側に共通電極を、他方側に個別電極を形成したこと
を特徴とする請求項1に記載の半導体発光装置。
2. An arrangement line of said light emitting diodes,
2. The semiconductor light emitting device according to claim 1, wherein a common electrode is formed on one side and an individual electrode is formed on the other side.
【請求項3】前記絶縁膜上に外部回路との接続端子部を
設けて、個別電極もしくは共通電極と通電せしめるよう
成したことを特徴とする請求項1に記載の半導体発光装
置。
3. The semiconductor light-emitting device according to claim 1, wherein a connection terminal portion for connecting to an external circuit is provided on the insulating film so as to supply current to an individual electrode or a common electrode.
【請求項4】Geを含むAu層上にCr層を積層して成
る個別電極または共通電極の上に、合成樹脂から成る前
記絶縁膜を形成したことを特徴とする請求項1に記載の
半導体発光装置。
4. The semiconductor according to claim 1, wherein said insulating film made of synthetic resin is formed on an individual electrode or a common electrode obtained by laminating a Cr layer on an Au layer containing Ge. Light emitting device.
【請求項5】合成樹脂から成る前記絶縁膜の上に、前記
接続端子部および/または異なる群に属する共通電極同
志を接続する接続電極を配設するとともに、これら接続
端子部または接続電極はCr層とAuまたはAlから成
る金属層とを順次積層して成ることを特徴とする請求項
1または3に記載の半導体発光装置。
5. A connecting electrode for connecting said connecting terminal portions and / or common electrodes belonging to different groups on said insulating film made of synthetic resin, and said connecting terminal portions or connecting electrodes are made of Cr. 4. The semiconductor light emitting device according to claim 1, wherein the semiconductor light emitting device is formed by sequentially stacking a layer and a metal layer made of Au or Al.
JP2000331421A 2000-02-28 2000-10-30 Semiconductor light emitting device Pending JP2001320088A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000331421A JP2001320088A (en) 2000-02-28 2000-10-30 Semiconductor light emitting device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000050978 2000-02-28
JP2000-50978 2000-02-28
JP2000331421A JP2001320088A (en) 2000-02-28 2000-10-30 Semiconductor light emitting device

Publications (1)

Publication Number Publication Date
JP2001320088A true JP2001320088A (en) 2001-11-16

Family

ID=26586202

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000331421A Pending JP2001320088A (en) 2000-02-28 2000-10-30 Semiconductor light emitting device

Country Status (1)

Country Link
JP (1) JP2001320088A (en)

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