JP2001314644A - Entertainment apparatus and computer system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an entertainment apparatus which can execute a software of conventional kinds. SOLUTION: In a normal mode, an MPU 100 functions as a main CPU, while a GP 110 functions as a graphics processor, and an IOP 120 functions as a sub processor. In a compatibility mode for executing a software of conventional kinds, the IOP 120 is able to execute a software of conventional kinds functions as the main CPU 110, while the MPU 100 and GP 110 emulates the graphics processor of conventional kinds.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an entertainment device for executing a game or the like, and more particularly, to an entertainment device capable of ensuring compatibility with an old model. In addition, the present invention relates to a computer device that can be used for an entertainment device.

[0002]

2. Description of the Related Art In recent years, with the progress of semiconductor technology and the like, higher performance home video game machines have been developed and sold. In general, such a new video game machine is not compatible with an old model, even if it is produced by the same manufacturer. That is, a user who has purchased a new model cannot use the old model game software even if he has the old model.

[0003]

However, in order not to waste the accumulation of past software (titles), it is desirable that the new model can execute software for the old model.

An object of the present invention is to provide an entertainment device that can execute software for an old model. Another object of the present invention is to provide a computer system that can be used for the entertainment device.

[0005]

An entertainment apparatus according to the present invention comprises first processor means and second processor means. The first processor means and the second processor means have the first mode as their operation mode.
Mode and the second mode. In the first mode, the first processor means operates as a main CPU.
And the second processor means functions as an I / O processor. On the other hand, in the second mode, the second processor functions as a main CPU, and the first processor functions as a drawing processor.

In this case, the second processor has two types of reset methods, and when reset by the first reset method, performs an operation as an I / O processor, and performs the second reset. When reset by the method, the operation as the main CPU may be performed. Further, first and second clocks are supplied to the second processor means, and when reset by the first reset method, the second processor means operates in synchronization with the first clock, and When the reset is performed by the reset method 2, the operation may be performed in synchronization with the second clock.

The information processing apparatus may further include information reading means for reading information from the portable recording medium, and determine whether or not to operate in the second mode depending on the type of the recording medium. The portable recording medium includes, for example, a CD and a DV.
D etc. correspond.

[0008] The first processor means includes, for example, a microprocessor and a graphics processor. In this case, in the second mode, the microprocessor converts the drawing command passed from the second processor into a drawing command for the graphics processor by software, and passes the command to the graphics processor. It may be.

A computer system according to the present invention is a computer system having at least two types of execution modes. Then, booting is performed at different frequencies and execution modes according to the physical characteristics of the recording medium on which the program is recorded. The program is started at a different frequency and in an execution mode according to an identification signal of a recording medium on which a program is recorded. For example, booting is performed at a different frequency and in an execution mode depending on whether the recording medium on which the program is recorded is a CD or DVD.

[0010] A method for starting a program according to the present invention is a method for starting a program in a computer capable of reading and executing the program from a plurality of types of recording media. When a program is started, a screen corresponding to the recording medium is first displayed. It is characterized by doing.

An emulation method according to the present invention is a method for software emulation of a program on a different system, wherein an operation timing parameter is changed by a serial number unique to the program.

[0012]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram showing a configuration of an entertainment apparatus according to the present invention.

As shown in FIG. 1, the present entertainment apparatus includes an MPU (main processing unit) 100.
, GP (graphics processor) 110, IO
P (input / output sub-processor) 120 and CD / DV
D decoder 130, SPU (sound reproduction processor) 140, and OSROM (read only memory)
150, main memory 160, and IOP memory 170
And

[0015] The MPU 100 and the GP 110
They are connected by a dedicated bus 101. Also, MPU
100 and the IOP 120 are connected to a bus 1 called SBUS.
02. Also, IOP120, C
D / DVD decoder 130, SPU 140 and OSRO
M150 is connected to a bus 103 called SSBUS.

The MPU 100 has a main memory 1
60, and the IOP 120 has an IOP memory 17
0 is connected. Further, a controller (PAD) 180 is connected to the IOP 120.

The MPU 100 is a main CPU (central processing unit) of the entertainment apparatus. MPU
The 100 performs predetermined processing by executing a program stored in the OSROM 150 and executing a program loaded from the CD or DVD into the main memory 160.

The GP 110 has a rendering function of the present entertainment apparatus. GP110 is MP
The drawing process is performed according to the instruction from U100.

The IOP 120 controls data exchange between the MPU 100 and peripheral devices (CD / DVD decoder 130, SPU 140, etc.).

[0020] The CD / DVD decoder 130 is a CD / DVD decoder.
The data is read from the VD and transferred to the main memory 160.

The SPU 140 reproduces compressed waveform data stored in a sound buffer (not shown) at a predetermined sampling frequency based on a tone generation command from the MPU 100 or the like.

The OSROM 150 stores the MPU1
00 and a ROM in which a program executed by the IOP 120 is stored. The OSROM 150 contains the MPU 10
0 and the code shared by the IOP 120 and the code dedicated to each processor are separately stored. MPU10
The code (program) dedicated to 0 includes, for example, a GPU emulator described later.

The main memory 160 is a main memory of the MPU 100, and stores instructions executed by the MPU 100 and MPU 10
Data used by 0 is stored.

The IOP memory 170 is a main storage of the IOP 120. The IOP memory 170 stores the IOP12
0 stores an instruction to be executed, data used by the IOP 120, and the like.

A controller (PAD) 180 is an interface for transmitting a player's intention to an application or the like during execution of a game or the like. This controller 1
80 has an operation unit. Then, a signal is output as the operation unit is operated by the player.

Next, the configuration of an existing entertainment apparatus will be described. This entertainment device
An entertainment device having the above-described configuration is an object for which compatibility is to be ensured.

FIG. 2 is a block diagram showing a configuration of an existing entertainment apparatus. As shown in FIG. 1, an existing entertainment apparatus includes a CPU (central processing unit) 220 and a GPU (graphics processor) 2.
10, a CD decoder 230, an SPU (sound reproduction processor) 240, an OSROM (read only memory) 250, and a main memory 270.

The CPU 220 includes a GPU 210
And the main memory 270 are connected to each other. Also, the CPU 220, the CD-ROM decoder 230, the SP
U240 and OSROM 250 are connected to bus 290. Further, the CPU 220 has a controller (P
AD) 280 is connected.

The CPU 220 performs a predetermined process by executing a program stored in the OSROM 250 or a program loaded from a CD into the main memory 270. The operating frequency of the CPU 220 is, for example, 3
3 MHz.

The GPU 210 performs a drawing process in accordance with an instruction from the CPU 220. The GPU 210 has a CRTC function for image display and a polygon drawing function for a frame buffer (not shown).

The CD-ROM decoder 230 reads data from a CD and transfers the data to the main memory 270.

The OSROM 250 stores the CPU 2
R storing a program to be executed by
OM.

The main memory 270 is a main memory of the CPU 220, and stores instructions executed by the CPU 220 and CPU 22.
Data used by 0 is stored.

The controller (PAD) 280 is an interface for transmitting a player's intention to an application or the like during execution of a game or the like.

In order to ensure compatibility with the existing entertainment apparatus having the above configuration, the present entertainment apparatus has two operation modes, a first mode and a second mode. The first mode is a normal mode for performing a normal operation on the device, and the second mode is a normal mode.
Is a compatible mode that operates on the assumption of compatibility with other models. And this entertainment device,
Usually, it is started in the normal mode and operates in the normal mode. However, when the present entertainment apparatus executes a title (software) for an existing entertainment apparatus, the mode shifts to the compatible mode.

In the compatible mode, the IOP 120 operates as the CPU 220, and the MPU 100 and the GP 11
0 emulates GPU 210 to execute the title for existing entertainment devices.
That is, in the present entertainment device, the MPU 10
0 and a first processor means having GP 110 and I
There is a second processor means having an OP120. In the normal mode, the first processor functions as a main CPU and a drawing processor, and the second processor functions as an I / O processor. On the other hand, in the compatibility mode, the second processor functions as a main CPU, and the first processor functions as a drawing processor.

For this reason, the IOP 120
It has the same processor core. That is, I
OP120 is a CPU of an existing entertainment device.
The program code prepared for 220 can be executed as it is, and the same operation is performed. The processor core of the IOP 120 is a CPU of the existing entertainment device.
Any code that can execute the program code prepared for 220 as it is and performs the same operation (for example, a binary-compatible processor core) may be used. In the present embodiment, the same processor core is used in order to enhance backward compatibility with existing entertainment devices.

The operating frequency of the IOP 120 is, for example, 37.5 MHz in the normal mode, but is 33 Mhz in the compatible mode, which is the same as that of the existing entertainment apparatus.
Hz. As a result, even if the game software optimizes the operation of the hardware of the existing entertainment apparatus at the level of one clock, the operation can be reliably performed. The method of switching the operating frequency will be described later.

Also, the MPU 100 and the IOP 120
The interface between the two is switched according to the operation mode. That is, in the compatibility mode, the IOP 120
The same interface as the CPU 220 is provided to the U100, and the MPU 100 also
Provides the same interface as PU 210. Details of the switching of the interface will be described later.

Further, the operation of the SPU 140 is switched between the compatible mode and the normal mode. That is, in the compatible mode, the SPU 240 operates exactly as the SPU 240 of the existing entertainment apparatus. On the other hand, in the normal mode, it operates as a sound processor having higher performance than the SPU 240. The operating frequency of the SPU 140 is
In the compatible mode, the frequency is 44.1 KHz corresponding to the sampling frequency of the CD-ROM.
It is 48 KHz corresponding to the sampling frequency of VD. Next, an outline of an operation mode determination method will be described.

In the present entertainment apparatus, when the power is turned on, the CD / DVD decoder 130 starts up in the normal mode, and the disc mounted on the CD / DVD drive is used for the present entertainment apparatus or for the existing entertainment apparatus. Determine if As a result of the discrimination, a CD / D for the entertainment device
When a VD disk is inserted or when no VD disk is inserted, the apparatus starts up in the normal mode. On the other hand, if the disc in the drive is a CD for an existing entertainment device, the mode is shifted to the compatibility mode.

Next, details of each component of the present entertainment apparatus will be described.

First, the internal configuration of the MPU 100 will be described.

FIG. 3 is a diagram showing the internal configuration of the MPU 100. As shown in the figure, the MPU 100 includes a processor core 300 and a vector operation unit 310 (VP
U0) and the vector operation unit 320 (VPU1)
, GIF (graphical interface unit) 330, and DMA controller (Direct Memory Ac)
process controller) 340, an IPU (image data processor) 350, a memory interface unit 360,
An IOP interface unit 370. Each unit is connected to the internal bus 380. Internal bus 3
80 is the clock frequency of the processor core 300 (3
00 MHz) (150 MHz).

The processor core 300 includes the MPU 100
The main unit controls other units to perform predetermined processing.

The vector operation units 310 and 320
It is a coprocessor provided to process geometry operations at high speed. The vector operation unit 310 is directly connected to the processor core 300,
0 operates as a coprocessor. The vector operation unit 310 has four floating-point product-sum operation units and one floating-point division unit.

The vector operation unit 320 operates as a geometry engine. Vector operation unit 3
In addition to the same operation unit as 10, there is an operation unit (Elementary-Function Unit) for calculating elementary functions. The vector operation unit 320 is directly connected to the GIF 330.

GIF 330 exchanges data with GP 110. The polygon display list generated by the vector operation units 310 and 320 is
The GIF 330 transfers the data to the GP 110 at 150 MHz on the dedicated 64-bit bus 101.

The DMA controller 340 receives the instruction from the processor core 300 and
And the processor core 300 and the vector operation unit 3
Data transfer to and from 10, 320, etc. is performed.

The IPU 350 is an MPEG2 (Moving Pic)
2) The main functions are to expand the bit stream and decode macroblocks.

The memory interface unit 360 is an interface unit for reading and writing data from and to the main memory 160.

The IOP interface unit 370 has an MPU
An interface unit for exchanging data between the IOP 100 and the IOP 120. Details of the IOP interface unit 370 will be described later.

Next, the internal configuration of the GP 110 will be described.

FIG. 4 is a diagram showing the internal configuration of the GP 110. As shown in the figure, the GP 110 includes a host interface unit 400, a drawing function block 410, a local memory 420, and a CRTC (CRT controller) unit 43.
0.

The host interface unit 400 has an MPU
An interface unit for exchanging data with the H.100.

The drawing function block 410 includes the MPU 100
This is a logic circuit unit that performs a rendering process based on an instruction from. The drawing function block 410 is a digital
It has 16 differential analyzers (DDA) and 16 pixel engines each. The drawing function block 410 has 64 bits (color information 32 bits, Z value 3
A maximum of 16 pieces of (2 bits) pixel data are processed in parallel.
The DDA calculates an RGB value, a Z value, a texture value, and the like. Based on these data, the pixel engine generates final pixel data.

The local memory 420 stores the pixel data and the MPU generated by the drawing function block 410.
The texture data and the like transferred from the storage unit 100 are stored.

The CRTC unit 430 outputs the contents of the frame buffer area of the local memory 420 as a video signal according to a specified output format (NTSC, PAL, VESA format, etc.).

Next, the internal configuration of the IOP 120 will be described.

FIG. 5 is a diagram showing the internal configuration of the IOP 120. As shown in the figure, the IOP 120 includes a processor core 500, an MPU interface unit 510,
An SSBUS interface unit 520, a memory controller 530, a serial input / output unit 540, and a DMA controller 550 are provided.

The processor core 500 has the IOP 120
This is a control unit that controls the entire operation. As previously mentioned,
The processor core 500 is the same as the processor core of the CPU 220 of the existing entertainment device.

[0062] The MPU interface unit 510
This is an interface unit for exchanging data with the H.100. Details of the MPU interface unit 510 will be described later.

The SSBUS interface unit 520
An interface for exchanging data with the SBUS 103.

The serial I / O unit 540 is connected to the IOP 120
Is an interface unit for exchanging data with the controller 180 connected to the.

The DMA controller 550 exchanges data between the IOP memory 170 and the components of the IOP 120.

The memory controller 530 is a controller that controls reading and writing of data from and to the IOP memory 170.

Next, a method of switching from the normal mode to the compatible mode will be described.

In the present entertainment apparatus, switching from the normal mode to the compatible mode is performed by a reset signal (SRE).
SET). For this reason, in this entertainment device, two reset signals (RESET and S
RESET) is provided.

FIG. 6 is a diagram showing a connection form of the reset signal in the present entertainment apparatus.

As shown in the figure, the RESETIN signal output from the power control / reset IC 610 is applied to a reset control circuit 630 and OR circuits 640 and 65.
Input to 0. The control signals (CTL1, CTL2) output from the reset control circuit 630 are
0,650. The RESET1 signal output from the OR circuit 640 is input to the MPU 100 and the GP 110. Also, the RE output from the OR circuit 650
The SET2 signal is transmitted from the SOP of the IOP 120 and the SPU 140, etc.
The data is input to a device on the SBUS 103. In addition, IO
The SRESET signal output from the MPU 100 is also input to the P120, the SPU 140, and the like.

In the above connection configuration, when the power is turned on or the reset switch 620 is pressed, first, the power control / reset IC 6
10 asserts the RESETIN signal. The power supply control / reset IC 610 negates the RESETIN signal when a predetermined time has elapsed after all power supplies have been turned on.

The reset control circuit 630 provides a RESETI
When the N signal is asserted, the control signals (CTL1, CTL2) for the OR circuits 640, 650 are asserted. After a lapse of a predetermined time, first, the IOP 120, S
The RESET signal (RESET signal) supplied to the PU 140
To negate T2), the control signal (CTL2) for the OR circuit 650 is negated. Then, MPU1
00, the RESET signal (R
In order to negate ESET1), the control signal (CTL1) for the OR circuit 640 is negated. The reason why the timing of releasing the RESET signal is shifted between the MPU 100 or the like and the IOP 120 or the like is as follows.
Starts operation to some extent, and then the MPU 100
This is because the GP 110 starts the operation.

The RESET signal (RESET1, RESE
MPU100, IOP12 reset at T2)
0, the SPU 140, etc., first start operation in the normal mode.

After completion of the necessary initialization processing, the MPU 100 asserts the SRESET signal when shifting to the compatible mode according to the above-described operation mode determination result. I reset by this SRESET signal
The OP 120, the SPU 140, and the like each start operating in the compatible mode.

As described above, when shifting to the compatible mode, the operating frequency of the IOP 120 or the like is also switched. Next, the switching of the operating frequency will be described.

FIG. 7 is a diagram showing a connection form of a clock signal in the present entertainment apparatus.

As shown in FIG.
The 400 MHz clock generated by MPU
100. The MPU 100 transmits this clock to an internal PLL (Phase-Locked Loop) circuit 710.
To convert the clock into a clock of 300 MHz, 150 MHz and 37.5 MHz.

The MPU 100 uses a 300 MHz clock as an operation reference clock for the processor core 300, and uses a 150 MHz clock as a bus clock for the internal bus 380. Also, the 150 MHz clock is
It is also used as a reference clock for data transfer to the GP 110. The MPU 100 uses the 37.5 MHz clock as the IOP12 clock as the operation reference clock in the normal mode.
Supply 0.

On the other hand, the 66 MHz clock generated by the clock generator 720 is also supplied to the IOP 120. The IOP 120 converts this clock into a 33 MHz clock by an internal frequency conversion circuit 730, supplies the 33 MHz clock to the multiplexer (MUX) 740,
As a communication synchronization clock for communication with the PU 100,
It is supplied to the MPU 100. The MPU 100 uses this 33M
Hz clock (PGCLK) in IOP in compatible mode
Used for communication with H.120.

The multiplexer 740 selects an operation reference clock of the IOP 120.
A clock of 37.5 MHz supplied from 00 and a clock of 33 MHz output from the frequency conversion circuit 730 are input. The multiplexer 740 is connected to the IO
When P120 is reset by the RESET signal (RESET2), 37.5M is used as the reference clock.
Hz clock is selected and output. On the other hand, SRESE
When reset by the T signal, a 33 MHz clock is selected and output as a reference clock.

The IOP 120 operates in synchronization with the reference clock output from the multiplexer 740. Further, the reference clock output from the multiplexer 740 is also supplied to a device (such as the SPU 140) on the SSBUS.

Accordingly, the reference clock of the IOP 120 and the SPU 140 becomes 37.5 MHz when reset by the RESET signal, and becomes 33 MHz (the same frequency as that of the existing entertainment apparatus) when reset by the SRESET signal. .

As described above, when shifting to the compatible mode, switching of the interface between the MPU 100 and the IOP 120 is also performed. Next, the switching of the interface will be described.

FIG. 8 is a diagram showing the internal configuration of the IOP interface 370 in the MPU 100 and the MPU interface unit 510 in the IOP 120.

As shown in the figure, the IOP interface section 370 is provided with an SIF (SBUS interface) section 80.
0, and a PGPU interface (pseudo GPU interface) unit 810. The MPU interface unit 510 includes an SIF (SBUS interface) unit 8
20 and a GPU interface unit 830.

The SIF section 800 is a block for providing the SBUS interface in the normal mode in the MPU 100. On the other hand, the PGPU interface unit 810, in the MPU 100,
Simulated GPU 210 of existing entertainment device
This is a block for providing the same interface as. SIF section 800 and PGPU interface section 81
0 includes a FIFO buffer for storing transfer data and a group of registers used for transfer control and the like.

The SIF section 820 is a block for providing an SBUS interface in the normal mode in the IOP 120. On the other hand, in the IOP 120, the GPU interface unit 830 uses the same GPU as the CPU 220 of the existing entertainment apparatus in the compatible mode.
This is a block for providing a PU interface.

The IOP interface unit 370 operates in synchronization with the bus clock (150 MHz) of the internal bus 380. On the other hand, the MPU interface unit 510
It operates in synchronization with the operating frequency of the IOP 120. That is, in the normal mode, 37.5 (= 150/4) M
Hz and operates in synchronization with the 33 MHz clock in the compatible mode. Therefore, the MPU 100 and the IOP 12 in the normal mode
0 becomes synchronous communication, and M in the compatible mode
Communication between the PU 100 and the IOP 120 is asynchronous communication. The PGPU interface unit 810 includes logic for absorbing asynchronous communication in the compatible mode, and includes PGCLK (33 MH) supplied from the IOP 120.
z) is input.

Under the above configuration, in the normal mode,
In the MPU 100, the SIF unit 800 is used as an interface to the IOP 120, and the IOP 12
In the case of 0, the SIF unit 820 is used as an interface to the MPU 100. In the compatible mode, the PGPU interface unit 810 is used in the MPU 100, and the GPU interface unit 830 is used in the IOP 120.

The SIF unit 800 in the MPU 100 and the P
Switching with the GPU interface unit 810 is performed by software. That is, at reset, the SIF
The unit 800 is selected, and then the MPU is executed by software executed by the processor core 300 of the MPU 100.
When writing to a specific control register in U100 is performed, switching to PGPU interface section 810 is performed.

On the other hand, the SIF section 82 in the IOP 120
Switching between 0 and the GPU interface unit 830 is performed by hardware at the time of reset. That is, IO
When P120 is reset by a RESET signal (RESET2), the SIF unit 820 is selected and SRESET
When reset by a signal, the GPU interface unit 83
0 is selected.

Next, a boot sequence of the present entertainment apparatus will be described.

RESET signal (RESET1, RESE
When reset by T2), MPU 100 and I
The OP 120 first starts executing the program from the same boot vector address. In the present embodiment, MP
Since U100 and IOP120 are assumed to be processors of the same architecture, the boot vector addresses are also the same.

At this time, the IOP 120 is stored in the OSROM 1
Access 50 directly. On the other hand, the MPU 100
The OS ROM 150 is accessed via P120.
The IOP 120 does not give the MPU 100 the right to use the bus until the necessary initialization processing is completed so that the MPU 100 waits until the necessary initialization processing is completed.

MPU 100 and IOP 12 at reset
0, the processor ID is acquired in the area of the OSROM 150 accessed by the MPU 100 or the
It is determined whether the processing is the OP 120, and a code for jumping to a code for each processor is stored in accordance with the result. The IOP 120 and the MPU 100 jump to their own code by executing the code.

When the IOP 120 jumps to its own code, it first determines whether the current reset is a reset by a RESET signal or a reset by a SRESET signal. The IOP 120 can determine whether it is reset by the RESET signal or reset by the SRESET signal by referring to the bit of the specific control register.

In this case, since the reset is performed by the RESET signal, the hardware is initialized for the present entertainment apparatus in order to start up the present entertainment apparatus. And peripherals (controller,
Set up a driver for a CD / DVD drive or the like.

When necessary initialization processing is completed, IOP1
20 starts the operation of the MPU 100 in the waiting state (MPU on), and enters a state of waiting for a request from the MPU 100. The MPU is turned on by the IOP 120 rewriting a bit of a specific control register.

When access to the OSROM 150 is permitted by the IOP 120 that has completed its initialization processing (when the MPU is turned on), the MPU 100 executes the OSRO.
M150 is read, and execution of the read program is started. In the program, the MPU 100
Obtains its own processor ID and jumps to its own (that is, for MPU 100) code, similarly to the IOP 120.

When jumping to its own code, MPU 100 first displays a common opening screen between the existing entertainment apparatus and the present entertainment apparatus.

Next, the type of the disc loaded in the CD / DVD drive is determined. This judgment is made for CD / D
This is performed by referring to the disc type register in the VD decoder 130.

The CD / DVD decoder 130 has a RESE
When reset by the T signal (RESET2), first, the disc inserted into the drive is identified, and as a result, the disc (the disc for the present entertainment apparatus / the disc for the existing entertainment apparatus / no disc, etc.) The command wait state is reflected in the disk type register in the CD / DVD decoder 130.

As a result of the disc type determination, if a disc for this entertainment apparatus is loaded or no disc is loaded, the apparatus is started up as it is, and
Display the entertainment device logo.

Further, when a disk for the present entertainment apparatus is loaded in the drive, the MPU 100
Loads the software for the entertainment device from the disk into the main memory 160 and executes it.
When performing drawing processing during execution of software, GP1
When drawing is instructed to 10 and sound is output, the SPU 140 is instructed to output sound via the IOP 120.

On the other hand, as a result of discrimination of the disc type, if a disc for an existing entertainment apparatus is loaded in the drive, the mode is switched to the compatibility mode and the apparatus is started up as an existing entertainment apparatus.

For this reason, the MPU 100 loads the GPU emulator from the OSROM 150 into the main memory 160 and executes it.

The GPU emulator executed by the MPU 100 first obtains a title number from a disc, and sets parameters of the GPU emulator according to the title number. This parameter is used to adjust the drawing time according to the title. For example, it is used to set the number of WAITs according to the type of drawing primitive.

Next, the interface for the IOP 120 is changed from the SIF section 800 to the PGPU interface section 8.
Switch to 10. This switch, as described above,
This is done by writing a specific value to a specific control register.

Next, the SRESET signal is asserted to shift the IOP 120 or the like to the compatible mode. SRE
Assertion of the SET signal can be performed by writing to a specific control register as described above. SR
When the ESET signal is asserted, the MPU 100
It is in a state of waiting for a graphics command from P120. M
PU 100 + GP 110 operates as GPU 210 thereafter.

When the IOP 120 reset by the SRESET signal jumps to the code for the IOP 120 in the same manner as when reset by the RESET signal, it is determined whether this reset is the reset by the RESET signal or the reset by the SRESET signal. .

In this case, since the reset is performed by the SRESET signal, the IOP 120 initializes the hardware for the existing entertainment device in order to start up as an existing entertainment device. In addition, IO
Similarly to P120, the SPU 140 reset by the SRESET signal starts in the compatible mode. Also, SRE
When the SET signal is asserted, an interrupt occurs for the CD / DVD decoder 130. When the CD / DVD decoder 130 detects this interrupt, the CD / DVD decoder 130 starts operation in the compatible mode and waits for a command. Become.

After the necessary initialization processing is completed, the IOP 120
Is a CPU 22 in an existing entertainment device.
As in the case of 0, it starts operating as a main CPU, displays a logo for an existing entertainment device, and boots a compatible kernel. Thereafter, the IOP 120 executes software for the existing entertainment device in the same manner as the CPU 220 of the existing entertainment device. During the execution of software, when performing graphics drawing, the IOP 120 instructs drawing by transmitting a GPU command to the MPU 100, and when outputting sound, to the SPU 140 in the compatible mode, Specify output.

Next, the operation of the GPU emulator in the compatible mode will be described in detail. The GPU emulator transmits the GPU transmitted from the IOP 120 to the MPU 100.
To make the command executable on GP110,
Format conversion to GP command.

FIG. 9 is a diagram showing a processing flow of the GPU emulator. When a drawing packet in the GPU format is written to the FIFO in the PGPU interface unit 810, an interrupt to the MPU 100 occurs.

Upon receiving this interrupt, the GPU emulator sends the drawing packet in the GPU format to the PGPU.
Take out from the FIFO of the interface unit 810 (S9
01). Then, the extracted GPU format drawing packet is converted into a GP format drawing packet,
The data is written to the main memory 160 (S902). And
The DMA controller 340 transfers the converted GP format drawing packet to the GP
A DMA transfer is made to 110 (S903).

Next, a specific example of format conversion of a drawing command will be described. Here, format conversion of a triangular polygon drawing command will be described.

FIGS. 10A and 10B are diagrams showing the format of a polygon drawing command. FIG.
FIG. 1A shows the format of a GPU command.
0 (B) indicates the format of the GP command. GP
The U command is one word and 32 bits, and the GP command is one word and 64 bits.

In FIGS. 10A and 10B,
“Code” is a code for identifying a drawing type, and B, G, and R are color information. X and Y are coordinate information, and Z is depth information. GP110
Adopts the Z-buffer method, so that the priority can be controlled regardless of the drawing order. On the other hand, GPU
210 does not employ the Z-buffer method,
The U command does not include depth information. for that reason,
When converting to the GP format, the GPU emulator puts the same predetermined value in Z.

The MPU 100 operates as follows from the IOP 120 in FIG.
When a GPU packet as shown in (A) is received, the type of command is determined by interpreting the first word,
Interpret the following data. Then, the interpreted data is rearranged, RGB and XY precisions are converted, and
Generating a GP command packet as shown in (B),
Transfer to GP110.

Finally, the transition of the screen when the present entertainment apparatus is started will be described.

First, when the entertainment apparatus is powered on, the MPU 100
Animations and sounds are played. Thereafter, the screen blacks out and the audio fades out.
If the disc inserted in the drive is a disc for an existing entertainment device, the mode is switched to the compatible mode. As in the case of the existing entertainment device, the IOP 120 displays a black background mark for the existing entertainment device on the screen and reproduces the sound effect for the existing entertainment device. On the other hand, when the disc inserted in the drive is a disc for the present entertainment device, the MPU 100 displays a black back mark for the present entertainment device in the normal mode and plays the sound effect for the present entertainment device. Let it. As described above, by blacking out the screen before switching the operation mode, the mark for the existing entertainment device with the black background is smoothly connected to the blackout at startup, and the switch to the compatible mode can be performed. It can be done smoothly.

Although the present invention relates to an entertainment device, it can be described as a computer system in view of its structure and capabilities. Therefore, the scope of application is not limited to entertainment. However, graphics, graphics,
Since the processing ability of sound and the like is high, it is desired to use the method utilizing its characteristics. Further, the present invention is not limited to the embodiment described above. For example, in the first mode, the second processor functions as a main CPU and a drawing processor, and the first processor
/ O processor, and in the second mode,
This includes the case where the first processor functions as a main CPU and the second processor functions as a drawing processor.

[0123]

As described above in detail, according to the present invention, it is possible to provide an entertainment apparatus compatible with the old model.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an entertainment device according to the present invention.

FIG. 2 is a block diagram showing a configuration of an existing entertainment device.

FIG. 3 is a block diagram showing an internal configuration of the MPU 100.

FIG. 4 is a block diagram showing an internal configuration of a GP 110.

FIG. 5 is a block diagram showing an internal configuration of the IOP 120.

FIG. 6 is a block diagram showing a connection form of a reset signal.

FIG. 7 is a block diagram showing a connection form of a clock signal.

FIG. 8 is a block diagram showing an internal configuration of an IOP interface unit 370 and an MPU interface unit 510.

FIG. 9 is a flowchart showing the flow of processing of the GPU emulator.

FIG. 10A is an explanatory diagram showing a format of a GPU command relating to a polygon drawing command;
(B) is an explanatory diagram showing a format of a GP command relating to a polygon drawing command.

[Explanation of symbols]

 100 MPU 110 GP 120 IOP 130 CD / DVD decoder 140 SPU 150 OSROM 160 Main memory 170 IOP memory 180 Controller

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Masakazu Suzuoki 7-1-1, Akasaka, Minato-ku, Tokyo Inside Sony Computer Entertainment Inc. (72) Inventor Yasuyuki Yamamoto 7-1-1, Akasaka, Minato-ku, Tokyo No. Sony Computer Entertainment Inc. (72) Inventor Masayoshi Tanaka 7-1-1, Akasaka, Minato-ku, Tokyo In-house Sony Computer Entertainment Inc. (72) Inventor Makoto Furuhashi 7-1-1, Akasaka, Minato-ku, Tokyo No. Sony Computer Entertainment Inc. (72) Inventor Toshifumi Okada 7-1-1, Akasaka, Minato-ku, Tokyo Inside Sony Computer Entertainment Inc. (72) Toru Akazawa 7-1-1, Akasaka, Minato-ku, Tokyo No. Co., Ltd. Within Sony Computer Entertainment

Claims (10)

[Claims] 1. A first processor means and a second processor means, wherein the first processor means and the second processor means have a first mode and a second mode as their operation modes. In the first mode, the first processor functions as a main CPU and a drawing processor, and the second processor functions as an I / O processor. In the second mode, the second processor functions as an I / O processor. An entertainment device, wherein the second processor functions as a main CPU and the first processor functions as a drawing processor. 2. The second processor means has two types of reset methods. When reset by the first reset method, the second processor means operates as an I / O processor. If reset, the main C
The entertainment device according to claim 1, wherein the entertainment device performs an operation as a PU. 3. The first processor is supplied with first and second clocks, and when reset by the first reset method, performs an operation in synchronization with the first clock. 3. The entertainment device according to claim 2, wherein when reset by the second reset method, the operation is performed in synchronization with the second clock. 4. The apparatus according to claim 1, further comprising information reading means for reading information from a portable recording medium, wherein it is determined whether or not to operate in the second mode according to a type of the recording medium. An entertainment device as described. 5. The first processor means comprises a microprocessor and a graphics processor. In the second mode, the microprocessor receives a drawing command passed from the second processor means, 2. The entertainment device according to claim 1, wherein the entertainment device is converted into a drawing command for a graphics processor by software and is passed to the graphics processor. 6. The method according to claim 1, wherein the first mode is a normal mode in which a normal operation is performed on the device, and the second mode is a compatibility mode in which the device operates assuming compatibility with another model. An entertainment device according to any one of claims 1, 2, 3, 4, and 5. 7. A computer system having at least two types of execution modes, wherein the computer system boots at different frequencies and execution modes according to physical characteristics of a recording medium on which a program is recorded. 8. A computer system having at least two types of execution modes, wherein the computer system is started at different frequencies and execution modes according to an identification signal recorded on a recording medium on which a program is recorded. Computer system. 9. A method for activating a program in a computer capable of reading and executing the program from a plurality of types of recording media, wherein a screen corresponding to the recording medium is first displayed when the program is activated. starting method. 10. A method for performing software emulation of a program on a different system, wherein an operation timing parameter is changed by a serial number unique to the program.