JP2001285753A - Audio multiplex television broadcasting identification circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an audio multiplex television broadcasting identification circuit for accurately and stably outputting received broadcasting content identification signals to an output switching circuit even in the case that received radio waves are weak. SOLUTION: This circuit for identifying the received broadcasting contents of audio multiplex television broadcasting is provided with a 55.069 kHz 9-bit reference clock counter, a D flip-flop circuit for stereo output and bilingual output whose data input is connected to the output of the 9-bit reference clock counter, a 4-bit identification signal clock counter for frequency-dividing identification signals, a 2-bit counter for the stereo output and the 2-bit counter for the bilingual output for counting the output pulses of the 9-bit reference clock counter and the D flip-flop circuit for the stereo output and the bilingual output whose the data input is connected to the output of the 2-bit counters.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an audio multiplex television broadcast identification circuit for identifying the contents of an audio multiplex television broadcast in an apparatus for receiving the audio multiplex television broadcast.

[0002]

2. Description of the Related Art In recent years, not only color television / video tape recorders, but also audio multiplex television broadcast receivers, which have become more and more popular as in-vehicle television car navigation systems,
The audio multiplex television broadcast identification circuit is an indispensable circuit.

FIG. 2 shows a configuration of a conventional audio multiplex television broadcast identification circuit, where 1 is a first counter which operates with 9 bits and counts a reference clock of 55.069 kHz, and 2 is a 55.069 kHz reference clock. Are input terminals 3 for inputting the reference clock of 982.
5 Hz, an input terminal for inputting a broadcast identification signal clock of 922.5 Hz during bilingual broadcasting, 4 is a third counter which operates with 2 bits and counts the identification signal clock, and 5 is an input for inputting a reset signal at power-on. A terminal 6 supplies a reset signal to an R terminal, a D flip-flop circuit for stereo output which operates by inputting an output of the first counter 1 to a D terminal, and 7 supplies a reset signal to an R terminal. A bi-lingual output D flip-flop circuit which operates by inputting the output of the counter 1 to a D terminal; 8 is a path for outputting a stereo reception result;
Is an output switching circuit for outputting a bilingual reception result, and an output switching circuit 10 for individually inputting the stereo reception result and the bilingual reception result and switching the output.

[0004] The operation of the audio multiplex television broadcast identification circuit configured as described above will be described below.

[0005] The broadcast identification signal is 98 at the time of stereo broadcast.
2.5 Hz, which is different from 922.5 Hz during bilingual broadcasting. Here, the audio multiplex television broadcast identification circuit converts a broadcast identification signal of a stereo broadcast or a bilingual broadcast from a 55.069 kHz reference clock input terminal 2 into a first counter 1 operating at 9 bits in a fixed cycle. The received broadcast is identified by detecting that the counted number is different.

First, a 55.069 kHz reference clock supplied from an internal oscillator (not shown) is input from the input terminal 2 to the counter 1. The counter 1 is reset when a reset signal is input from the input terminal 5 when the power is turned on, and the identification signal clock is reset by the signal 16 which is given from the input terminal 3 and divided by 4, and the count number during that time is 208. The HI signal is output to the data input of the D flip-flop circuit 6 when the count is ２３231 times, and the HI signal is output to the data input of the D flip-flop circuit 7 when the count number is 232 to 255 times.

The clock input of the D flip-flop circuits 6 and 7 is input with a signal 16 obtained by dividing the signal given from the input terminal 3 of the identification signal clock by 4 from the counter 4, and the input terminal 3 is input to the reset input. A signal obtained by delaying the signal obtained by dividing the identification signal clock given by 4 by 4 by a half cycle is input. In four cycles of the identification signal clock,
When the identification result of the counter 1 is received, a HI pulse signal is output to the stereo reception output path 8 during stereo broadcast reception,
At the time of bilingual broadcast reception, an HI pulse signal is output to the bilingual reception output path 9. Output switching circuit 10
The stereo reception output path 8 outputs the stereo broadcast when the HI pulse signal is output, the bilingual reception output path 9 outputs the bilingual broadcast when the HI pulse signal is output, and further outputs the stereo reception output path. 8 is a circuit that is controlled to output monaural broadcasting when both the bilingual reception output path 9 is LO.

When the power is turned on, a reset signal input from the input terminal 5 is input to the counter 1 and the reset terminals of the D flip-flop circuits 6 and 7, and both outputs of the D flip-flop circuits 6 and 7 are set to LO. The purpose of this operation is to set the initial setting at power-on to monaural.

[0009]

However, in the above-described conventional audio multiplex television broadcast identification circuit, when a received radio wave is weak, a stereo broadcast or a bilingual broadcast is caused by a lot of noise superimposed on the broadcast identification signal. Counter 4 in the four periods of the broadcast identification signal
In some cases, the count number of the 55.069 kHz reference clock counted by the above is incorrectly counted. As a result, for example, even when a stereo broadcast is being received, it is erroneously determined that a bilingual broadcast or monaural is being received, or an unstable received broadcast identification signal is output to an output switching circuit, and a stereo broadcast is received in a short time. Broadcasting, bilingual broadcasting, and monaural broadcasting are repeatedly switched to output a broadcast different from the broadcast content that should be originally output. As a result, there is a problem that the user of the device feels uncomfortable.

SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problems, and is an audio multiplex television broadcast identification system capable of accurately and stably outputting a signal for identifying the contents of a received broadcast to an output switching circuit. The aim was to provide a circuit.

[0011]

SUMMARY OF THE INVENTION In order to solve this problem, an audio multiplex television broadcast identification circuit according to the present invention includes not only a first counter circuit for counting the number of internal reference clocks during four cycles of a broadcast identification signal, but also A second counter circuit for counting the output pulses of the first counter circuit for 16 periods of the broadcast identification signal is also provided.

With this configuration, the output pulse of the first counter is counted by the second counter circuit for a period four times as long as the count cycle of the first counter, so that the output of the received broadcast content identification signal of the first counter circuit is stabilized. Can be determined.

[0013]

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a configuration diagram of an audio multiplex television broadcast identification circuit according to an embodiment of the present invention.

1 operates with 9 bits and is 55.069 kHz.
a first counter for counting the reference clock of z, 2
Is an input terminal for inputting a reference clock of 55.069 kHz, 3 is 982.5 Hz during stereo broadcast,
An input terminal to which a broadcast identification signal clock of 922.5 Hz is input during bilingual broadcasting; 11 is a fourth counter which operates with 4 bits and counts the identification signal clock;
5 is an input terminal for inputting a reset signal when the power is turned on.
Supplies a reset signal to an R terminal, inputs a first counter output to a D terminal, and operates for a D flip-flop circuit for stereo output, 7 supplies a reset signal to an R terminal,
A bilingual output D flip-flop circuit 12 that operates by inputting the first counter output to a D terminal, operates with 2 bits, and counts the output pulses of the stereo D flip-flop circuit 6 during 16 cycles of the identification signal. The stereo second counter 13 operates with 2 bits, and the bilingual second counter 14 counts the output pulses of the bilingual D flip-flop circuit 7 during 16 cycles of the identification signal, and provides a reset signal to the R terminal. A D flip-flop circuit for stereo output, which operates by inputting the output of the second counter for stereo 12 to the D terminal, 15
Is a bi-lingual output D flip-flop circuit that operates by applying a reset signal to the R terminal and inputting the output of the bilingual second counter 13 to the D terminal, 8 is a path for outputting a stereo reception result, and 9 is The path 10 for outputting the bilingual reception result is an output switching circuit that inputs the stereo reception result and the bilingual reception result and switches the output.

The operation of the audio multiplex television broadcast identification circuit according to the present embodiment configured as described above will be described below.

The audio multiplex television broadcast identification circuit has a frequency of 982.5 Hz for stereo broadcast and 92 for bilingual broadcast.
55.069 counted by the first counter 1 during a certain period of the broadcast identification signal having a frequency different from 2.5 Hz.
The reception broadcast is identified by detecting that the count number of the kHz reference clock is different.

First, 55.069 kHz supplied from the internal oscillator to the first counter 1 through the input terminal 2.
A reference clock is input. The first counter 1 is reset when a reset signal is input from the input terminal 5 when the power is turned on. Also, the identification signal clock is supplied from the input terminal 3 and is reset by the signal 16 divided by 4, and the counting during that time. When the number is 208 to 231 times, the HI signal is output to the data input of the D flip-flop circuit 6, and when the count is 232 to 255, the HI signal is output to the data input of the D flip-flop circuit 7.

Next, the D flip-flop circuits 6 and 7
Inputting a signal 16 obtained by dividing the identification signal clock supplied from the input terminal 3 by 4 to the clock input, and inputting a signal 17 obtained by delaying the identification signal clock divided by 4 by a half cycle to the reset input. Then, the output pulse indicating whether the identification result of the first counter is stereo or bilingual during the four periods of the identification signal clock is output to the stereo second counter 12 and the bilingual second counter 13.
To supply. The stereo second counter 12 and the bilingual second counter 13 are reset when a reset signal is input from the input terminal 5 when the power is turned on, and the identification signal clock is supplied from the input terminal 3.
The signal is reset by the frequency-divided signal 18, and the D flip-flop circuits 14 and 15
Output a HI signal to the data input of the.

The D flip-flop circuits 14 and 15
The delayed signals of the output pulses of the second counters 12 and 13D are input to the clock input, and the count number of the stereo second counter 12 and the bilingual second counter 13 becomes 0 during the 16 cycles of the identification signal clock to the reset input. The reset signal is input only at the same time.

As a result, the HI signal is output to the path 8 for outputting the stereo reception result when the count number of the second stereo counter 12 is 4 during 16 cycles of the identification signal clock, and thereafter, the identification signal is output. HI is maintained until the count number of the second stereo counter 12 for every 16 periods of the signal becomes zero.

Similarly, the path 9 for outputting the bilingual reception result is connected to the path 9 for 16 cycles of the identification signal clock.
When the count number of the bilingual second counter 13 is four, the HI signal is output, and thereafter, the HI signal is held until the count number of the bilingual second counter 13 every sixteen cycles of the identification signal becomes zero.

The output switching circuit 10 outputs a stereo broadcast when the stereo reception output path 8 is at the HI level.
This circuit is controlled to output a monaural broadcast when both the stereo reception output path 8 and the bilingual reception output path 9 are LO so that the bilingual reception output path 9 is HI and bilingual broadcast is output.

When the power is turned on, the reset signal input from the input terminal 5 is input to the counters 1, 2, 3 and the reset terminals of the D flip-flop circuits 6, 7, 14, 15. The stereo reception output path 8 and the bilingual reception Both output paths 9 are set to LO. The purpose of this operation is to set the initial setting at power-on to monaural.

[0025]

As described above, according to this embodiment, when the received radio wave is weak, the count number of the first counter is unstable due to the influence of noise superimposed on the broadcast identification signal and external noise. Is determined by counting the output pulse of the first counter with the second counter, and giving the hysteresis by the change of the count number of the second counter, stereo reception output and bilingual By outputting the reception output to the output switching circuit, it is possible to accurately and stably identify the content of the received broadcast regardless of the strength of the received radio wave.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of an audio multiplex television broadcast identification circuit according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of a conventional audio multiplex television broadcast identification circuit.

[Explanation of symbols]

1 First counter that operates with 9 bits and counts a 55.069 kHz reference clock 2 Input terminal to which a 55.069 kHz reference clock is input 3 Broadcasting that becomes 982.5 Hz for stereo broadcasting and 922.5 Hz for bilingual broadcasting An input terminal to which the identification signal clock is input 4 A third counter that operates with 2 bits and counts the identification signal clock 5 An input terminal to input a reset signal when power is turned on 6 A reset signal is given to the R terminal, and an output of the first counter 1 D flip-flop circuit for stereo output, which operates by inputting to the D terminal 7 A reset signal is supplied to the R terminal, and the D flip-flop circuit for bilingual output, which operates by inputting the output of the first counter 1 to the D terminal 8 Output route for stereo reception 9 Output bilingual reception 10 An output switching circuit for individually inputting the stereo reception result and the bilingual reception result and switching the output 11 A fourth counter which operates with 4 bits and counts the identification signal clock 12 An operation with 2 bits and the identification signal 16 A second stereo counter 13 for counting the output pulses of the stereo D flip-flop circuit 6 during the period 13. The bilingual second counter which operates with 2 bits and counts the output pulses of the bilingual D flip-flop circuit 7 for the identification signal 16 periods. Two counters 14 A reset signal is supplied to an R terminal, an output of the second stereo counter 12 is input to a D terminal, and a D flip-flop circuit for stereo output is operated. 15 A reset signal is supplied to an R terminal, and a bilingual second counter is provided. 13 operates by inputting the output of D flip-flop circuit for lingual output 16 Signal obtained by dividing broadcast identification signal clock by 4 17 Half-cycle delay signal of signal obtained by dividing broadcast identification signal clock by 4 18 Signal obtained by dividing broadcast identification signal clock by 16

Claims (1)

[Claims] 1. A first counter circuit for counting the number of internal reference clocks during a fixed period of a broadcast identification signal having different frequencies between stereo broadcast of audio multiplex television broadcast and bilingual broadcast, and an output pulse of the first counter circuit. An audio multiplex television broadcast identification circuit, comprising: a second counter circuit that counts for an integral multiple of the count period of the first counter circuit.