JP2001285726A - Driving device for image pickup element, image pickup device and driving method for image pickup element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce unrequired beat noise generated by an analog signal processing to which a frequency spread technique is applied and to provide excellent images. SOLUTION: This image pickup device is provided with a frequency spread circuit 802 for generating a clock for which the frequency of a reference clock is continuously changed in a prescribed cycle, a reset signal generation part 815 for impressing reset signals to the frequency spread circuit 802 at a random timing and resetting the phase of the clock generated by the frequency spread circuit 802 at the random timing and a drive/control clock generation circuit 804 for generating a CCD drive clock for controlling a CCD 807 corresponding to the clock generated by the frequency spread circuit 802.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup device driving device, an image pickup device, and an image pickup device driving method.

[0002]

2. Description of the Related Art In a conventional image processing apparatus, a system design using a control / drive clock generated in accordance with a clock having high oscillation accuracy has been mainly used. However, regulations that require suppression of radiation noise generated during operation of the apparatus are becoming stricter year by year, and as a countermeasure, a frequency spreading technique in which apparent oscillation accuracy is intentionally reduced is known. The frequency spreading technique has an effect of reducing the peak of radiation noise in an integrated manner by continuously changing the oscillation frequency according to a predetermined period. In the frequency spreading technology, the phase relationship is preserved in each control / drive clock generated based on the frequency spread clock, so that the digital system operates normally except for special cases. Can be provided.

[0003]

When the frequency spreading technique is applied to analog signal processing, a device which is driven by a digital clock such as a CCD and outputs an analog signal waveform correlated with the phase relationship and pulse width of the clock is used. When the output signal is processed, it is difficult to synchronize the cycle of the frequency spread with the drive cycle of the CCD, and the C that varies slightly due to the influence of the frequency spread of the CCD drive clock.
Beat noise occurs in response to the cycle of frequency spread due to the data fluctuation between the CD output signal waveform and the sampling position, and an image including beat noise asynchronous with the reference signal (HSYNC) may be formed during image formation. .

The present invention has been made in view of the above background, and has as its object to reduce unnecessary beat noise generated by analog signal processing to which a frequency spreading technique is applied, and to obtain a good image. I do.

[0005]

According to a first aspect of the present invention, there is provided a driving apparatus for an image pickup device, comprising: frequency spreading means for generating a clock in which the frequency of a reference clock is continuously changed at a predetermined period; Reset means for resetting the phase of the clock generated by the means at random timing; and control clock generating means for generating a control clock for controlling the image sensor according to the clock generated by the frequency spreading means. .

In the image pickup device driving apparatus according to the first aspect of the present invention, the reset unit resets a phase of a clock generated by the frequency spreading unit at random timing during a blank period of the image pickup device. Is preferred.

In the driving device for an image sensor according to the first aspect of the present invention, the reset means may be, for example, the frequency control device in the period between one horizontal scanning period and the next horizontal scanning period of the image sensor. It is preferable to reset the phase of the clock generated by the spreading means at random timing.

In the driving device for an image sensor according to the first aspect of the present invention, the reset unit resets, for example, the phase of the clock generated by the frequency spreading unit once at a random timing once per line. Is preferred.

In the driving device for an image sensor according to the first aspect of the present invention, it is preferable that the image sensor is a linear image sensor.

An image pickup apparatus according to a second aspect of the present invention is an image pickup apparatus having an image pickup device, comprising: a frequency spreading means for generating a clock in which a frequency of a reference clock is continuously changed at a predetermined cycle; Reset means for resetting the phase of the clock generated by the spreading means at random timing, and control clock generating means for generating a control clock for controlling the image sensor according to the clock generated by the frequency spreading means. I do.

In the imaging apparatus according to a second aspect of the present invention, the reset means may reset a phase of a clock generated by the frequency spreading means at a random timing during a blank period of the image sensor. preferable.

In the imaging apparatus according to a second aspect of the present invention, the reset means may be, for example, the frequency spreading means in a period between one horizontal scanning period and the next horizontal scanning period of the imaging device. It is preferable to reset the phase of the generated clock at random timing.

[0013] In the imaging apparatus according to the second aspect of the present invention, it is preferable that the reset means resets a phase of a clock generated by the frequency spreading means once at a random timing once per line.

In the imaging device according to the second aspect of the present invention, the imaging device is, for example, a linear image sensor.

[0015] An imaging apparatus according to a second aspect of the present invention comprises: processing means for processing an image output from the imaging element;
The image processing apparatus may further include an output main stage that outputs an image processed by the processing unit.

According to a third aspect of the present invention, in a method of driving an image sensor, a phase reset signal is applied at random timing to a frequency spreading circuit that generates a clock in which the frequency of a reference clock is continuously changed at a predetermined cycle. Meanwhile, a control clock is generated according to a clock generated by the frequency spreading means, and the image pickup device is controlled by the control clock.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In a preferred embodiment of the present invention,
By randomizing the phase of the clock generated by the frequency spreading circuit, the correlation of the modulation period between lines is eliminated, thereby preventing the occurrence of a beat image.

Hereinafter, a preferred embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a schematic diagram of a general clock generating circuit to which a frequency spreading technique is applied. Reference numeral 101 denotes an oscillator such as a commonly used crystal oscillator or crystal oscillator. In recent years, a programmable oscillator and a transmitter having a built-in frequency spreading circuit are also available. Conventionally, as an oscillator, signals A, B, C, D,
As shown in E, F, G, H and I, the oscillation accuracy is 100P.
It was common to select a high-precision oscillator such as PM or 50 PPM. On the other hand, this clock generation circuit includes a frequency spreading circuit 102,
As indicated by reference numeral 105, the frequency of the output clock is gradually changed.

The output clock of the frequency spreading circuit 102 is
As indicated by reference numeral 106, the frequency is calculated so as to smoothly change with a predetermined width such as ± 0.5% or ± 1.0% around a reference frequency (frequency of a clock generated by the oscillator 101). Controlled. However, in general, a frequency spreading circuit has a regular frequency spreading cycle, and code 1
As in the example indicated by reference numeral 06, after changing the frequency by a predetermined modulation width in the direction in which the clock cycle becomes shorter (modulation toward the high frequency side), the direction in which the clock cycle becomes longer (lower) along the same characteristic curve. The modulation cycle of changing the frequency by a predetermined amount to the modulation on the frequency side) is repeated. Therefore,
For each frequency spreading cycle, a timing occurs at which the output clock of the frequency spreading circuit 102 matches the phase of the clock of the reference frequency.

As a result of comparing radiation noise between a clock (reference frequency) generated by the oscillator 101 and a clock subjected to frequency spreading by the frequency spreading circuit 102, a result as shown in FIG. 8 is generally known. ing. Reference frequency spectrum analyzer (spectrum analyzer)
The waveform 901 has a peak at the natural frequency, whereas the spread spectrum waveform 90 of the frequency-spread clock has
In the case of 2, the frequency diverges, so that the peak level decreases like an integrated signal. The effect is about 4 to 5 dB, and a reduction effect of 10 dB or more can be expected depending on the conditions. Driving / control clock generator 103
Generates a CCD driving clock and an analog signal processing clock in accordance with the clock frequency-spread by the frequency spreading circuit 102. Since these clocks are generated according to the clocks subjected to the frequency spreading, a noise reduction effect can be obtained in the entire system.

Next, one problem related to the present invention will be described.

FIG. 2 is a diagram for explaining operations relating to CCD drive and sample hold in an analog signal system to which the frequency spreading technique is applied. As described above, by applying the frequency spreading technique, the CCD driving clock is also a signal modulated according to the frequency spreading cycle.
The output signal width slightly changes for each pixel. Furthermore, CCD
The output waveform changes in accordance with the output stage transfer clock (φ2B) (not shown) and the pulse width and phase of the output stage residual charge reset pulse (RS).
In 1, the waveform slightly changes at both the reference level and the data level. Similarly, subtle changes occur in the pulse width and sampling position of the S / HF pulse 202 for sampling the CCD output feed-through section (reference level) and the S / HD pulse 203 for sampling the CCD output data section. , Output signal 20 of a sample and hold circuit (not shown)
Reference numeral 4 may be a signal on which a beat signal (beat noise) according to the frequency spreading cycle is carried.

FIG. 3 is a diagram showing the influence of the beat signal. Reference numeral 301 denotes HSYN as a synchronization signal of the circuit.
C. Reference numerals 302, 303, 304 denote CCDs.
This is an output result obtained by sampling and holding the output signal of the line sensor for each continuous line, and includes beat noise according to the frequency spreading period. Further, when the frequency spreading circuit and the HSYNC are not synchronized, beat noise flows as indicated by reference numerals 302, 303 and 304, and an image including beat noise as indicated by reference numeral 701 in FIG. 6 is obtained. Can be

Next, a preferred embodiment of the present invention for solving the above-mentioned beat problem will be described. In one embodiment of the present invention, the timing for resetting the frequency spreading unit is randomized. As a result, the phase of the frequency spreading period becomes random between the main scanning lines, and the phase correlation between the main scanning lines is eliminated. Since the beat strongly depends on the phase correlation between the main scanning lines, and is generated by the periodicity of the frequency spread and the subtle shift between the main scanning lines, by eliminating the phase correlation between the main scanning lines, Beats do not occur in principle.

FIG. 4 is a diagram showing the beat reduction by randomizing the reset timing. Since the phase of the clock generated by the frequency spreading circuit is reset at a random timing, the output signals 402, 403, and 40 of the analog processor (analog processor) for each continuous line
No. 4 has no phase correlation with respect to each other's frequency spreading period. For this reason, the phenomenon that the beat flows due to the phase correlation between the lines and the subtle phase shift is essentially solved,
A good image as indicated by reference numeral 702 in FIG. 6 is obtained.

In another embodiment of the present invention, CC
In an imaging device having a D linear image sensor (including an image reading device and a camera), between one horizontal transfer timing for reading an image signal of an effective pixel from a horizontal transfer register of a CCD linear image sensor and the next horizontal transfer timing In the period (horizontal transfer blank period),
By resetting the phase of the clock generated by the frequency spreading unit at random timing, it is possible to prevent subtle image distortion caused by resetting during horizontal transfer.

FIG. 5 is a diagram showing beat reduction by resetting the phase of the frequency spreading section at random timing during the period between one horizontal transfer timing and the next horizontal transfer timing. As shown in FIG. 5, in another embodiment of the present invention, the horizontal transfer blank period is a period between a period during which a valid video image signal is output from an analog processor (analog processor) and the next period. Then, a frequency spread reset signal is generated with a random phase. As a result, anapro (analog processor) output signals 502, 503, 50 for each continuous line
In 4, there is no phase correlation between the frequency spreading periods. Therefore, the phenomenon that the beat flows due to the phase correlation between the lines and the subtle phase shift is essentially solved, and a good image as indicated by reference numeral 702 in FIG. 6 is obtained.

Further, in still another embodiment of the present invention,
By resetting the phase of the clock generated by the frequency spreading unit at random timing for one main scan only once, subtle image distortion caused by resetting during the horizontal transfer Can be prevented.

Hereinafter, embodiments of the present invention will be described. FIG. 7 is a diagram showing a main part of an imaging device according to a preferred embodiment of the present invention. Reference numeral 801 denotes an oscillator that oscillates at a natural frequency, and 802 denotes a frequency spreading circuit having a built-in PLL (Phase Locked Loop) circuit capable of setting a multiple. A control unit 803 controls various controls, and performs setting of a multiplication factor, ON / OFF control of a peripheral portion of the CCD, acquisition of correction data, and the like.

The frequency-spread clock output from the frequency spread circuit 802 is supplied to the drive / control clock generation circuit 8.
04. Driving / control clock generation circuit 804
Has an ON / OFF control unit 806 and a power control unit 80
5 according to the output voltage of the drive / control clock (for example, CC
D drive clock) is turned ON / OFF. That is, when the power is turned off by the power control unit 805, there is no need to output a clock,
The OFF control unit 806 stops outputting various drive / control clocks.

The CCD 807 is turned on when the power is turned on.
The reading operation is started at a predetermined speed according to the driving clock supplied from the / OFF control unit 806. CCD80
7 is supplied to an analog signal processing circuit 808. After being subjected to processing such as sample hold, offset adjustment, gain adjustment, and CDS, the output signal is converted into a digital image signal by an A / D converter 809 and stored in a memory. It is supplied to the unit 810.

At the time of reading (imaging) the reference image, the memory unit 810 fetches an image signal for one line by the line memory 811 supplied from the A / D converter 809 and fetches correction data from the control unit 803. In response to the request, the data is stored in the correction data storage unit 813 via the correction memory 812. Thereafter, when reading the original image (imaging), shading correction is performed inside the correction memory 812 based on the correction data for each line of the original image, and the corrected image signal is supplied to the image processor 814. Appropriate image processing (eg, scaling, rotation, etc.)
Is made.

Next, the reset signal generator 815 will be described. In one embodiment of the present invention, the reset signal generator 815 generates a frequency spread reset signal at random timing, and the phase of the frequency spread circuit 802 is reset by the reset signal. In another embodiment of the present invention, the reset signal generator 815 generates a frequency spread reset signal only in the horizontal transfer blank period in FIG. 5, and the phase of the frequency spread circuit 802 is reset by the reset signal.

FIG. 9 is a diagram showing a specific configuration example of the reset signal generator 815 of the frequency spreading circuit 802. This reset signal generation unit 8015 includes a random number generation unit 100
1 generates a random number, and latch 1002 latches the random number. On the other hand, the counter 1005 counts a CCD transfer clock (CCD drive clock). Comparison section 100
2 compares the output of the latch 1002 with the output of the counter 1005, and if they match, the pulse generator 10
At 04, a frequency spread reset signal is generated. This reset signal is supplied to the latch clock terminal of the latch 1002 and the clear terminal of the counter 1005.

In another embodiment of the present invention, there is provided a horizontal blank signal generator 1006 for generating a horizontal blank signal in accordance with an HSYNC signal (horizontal synchronizing signal) indicating one horizontal period and a CCD transfer clock. The output of the pulse generator 1004 is connected to the gate circuit 100
Gate by 7. Thus, the frequency spread reset signal is supplied to the frequency spread circuit 802 only during the horizontal blank period.

In still another embodiment of the present invention, instead of resetting the counter 1005 by the output of the pulse generator 1004, for example, resetting the counter by a horizontal blank signal and causing the random number generator 1001 to generate a random number in a predetermined range. Thereby, resetting of the frequency spreading unit 802 can be limited to once in one main scan (one line). Here, by resetting the counter 1005 continuously while the horizontal transfer blank signal is inactive (horizontal transfer period), the reset of the frequency spreading unit 802 can be limited to the horizontal transfer period.

The imaging device described as an example as a preferred embodiment of the present invention is not limited to an imaging device such as a CCD and its driving circuit, and also processes an image output from the imaging device (for example, zooming, rotation, etc.). , Compression, etc.), and an image processed by the processing unit (e.g., print,
Display, transmission, storage in a memory, etc.).

Further, such an image pickup apparatus includes various image processing apparatuses (for example, a copying machine, a scanner, a facsimile apparatus,
Camera or the like).

For controlling an image pickup device such as a CCD, a storage medium (or a recording medium) in which software program codes are recorded is supplied to a system or an apparatus, and a computer (or CPU or MP) of the system or the apparatus is supplied.
It goes without saying that U) is also achieved by reading and executing the program code stored in the storage medium. In this case, the program code itself read from the storage medium or the storage medium storing the program code constitutes the invention. In addition, by the computer executing the readout program code, not only the functions of the above-described embodiment are realized, but also an operating system (OS) running on the computer based on the instructions of the program code. Performs part or all of the actual processing, and the functions of the above-described embodiments can also be realized by the processing.

Further, after the program code read from the storage medium is written into the memory provided in the function expansion card inserted into the computer or the function expansion unit connected to the computer, the program code is read based on the instruction of the program code. The functions of the above-described embodiment can also be realized when a CPU or the like provided in the function expansion card or the function expansion unit performs part or all of the actual processing.

[0042]

According to the present invention, for example, unnecessary beat noise generated by analog signal processing to which a frequency spreading technique is applied can be reduced. Therefore, for example, a good image can be obtained while maintaining the radiation noise reduction effect.

[Brief description of the drawings]

FIG. 1 is a schematic diagram of a general clock generation circuit to which a frequency spreading technique is applied.

FIG. 2 is a diagram for explaining operations relating to CCD driving and sample hold in an analog signal system to which a frequency spreading technique is applied.

FIG. 3 is a diagram illustrating beat noise due to frequency spreading.

FIG. 4 is a diagram showing beat reduction by randomizing reset timing.

FIG. 5 is a diagram showing beat reduction by resetting the phase of the frequency spreading unit at random timing during a period between one horizontal transfer timing and the next horizontal transfer timing.

FIG. 6 is a diagram showing a beat noise improvement effect.

FIG. 7 is a diagram showing a main part of an imaging device according to a preferred embodiment of the present invention.

FIG. 8 is a diagram illustrating a radiation noise reduction effect by frequency spreading.

FIG. 9 is a diagram illustrating a specific configuration example of a reset signal generation unit of the frequency spreading circuit.

Claims (12)

[Claims] 1. A driving device for an image pickup device, comprising: a frequency spreading means for generating a clock in which a frequency of a reference clock is continuously changed at a predetermined cycle; And a control clock generating means for generating a control clock for controlling the image sensor according to a clock generated by the frequency spreading means. 2. The driving of the image sensor according to claim 1, wherein the reset unit resets a phase of a clock generated by the frequency spreading unit at random timing during a blank period of the image sensor. apparatus. 3. The reset unit resets a phase of a clock generated by the frequency spreading unit at a random timing in a period between one horizontal scanning period and the next horizontal scanning period of the image sensor. The driving device for an image sensor according to claim 1, wherein: 4. The reset means sets the phase of a clock generated by the frequency spreading means to one for one line.
4. The driving device for an image sensor according to claim 1, wherein the resetting is performed at random times. 5. 5. The driving device for an image sensor according to claim 1, wherein the image sensor is a linear image sensor. 6. An image pickup apparatus having an image pickup device, comprising: a frequency spreading means for generating a clock in which the frequency of a reference clock is continuously changed at a predetermined cycle; An imaging apparatus, comprising: reset means for resetting at a timing; and control clock generation means for generating a control clock for controlling the image sensor according to a clock generated by the frequency spreading means. 7. The imaging apparatus according to claim 6, wherein the reset unit resets a phase of a clock generated by the frequency spreading unit at a random timing during a blank period of the imaging device. 8. The reset unit resets a phase of a clock generated by the frequency spreading unit at a random timing in a period between one horizontal scanning period and the next horizontal scanning period of the image sensor. The imaging device according to claim 6, wherein: 9. The reset means sets the phase of a clock generated by the frequency spreading means to one for one line.
9. The imaging device according to claim 5, wherein the reset is performed at random times. 10. The image pickup apparatus according to claim 5, wherein the image pickup device is a linear image sensor. 11. The image processing apparatus according to claim 5, further comprising: a processing unit configured to process an image output from the imaging device; and an output main unit configured to output an image processed by the processing unit. 10
The imaging device according to any one of the above. 12. A method for driving an image sensor, comprising: applying a phase reset signal at random timing to a frequency spreading circuit that generates a clock in which a frequency of a reference clock is continuously changed at a predetermined cycle; A method for driving an image sensor, comprising: generating a control clock according to a clock generated by a diffusion unit; and controlling the image sensor by the control clock.