JP2001285056A - Automatic trimming circuit of oscillator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To automatically perform trimming adjustment with higher accuracy in the case of needing the trimming adjustment of an oscillation frequency. SOLUTION: This circuit is provided with a variable CR oscillation circuit 11, a crystal oscillation circuit 12, a voltage comparator circuit 13 for power supply voltage change detection, a control logic circuit 14 that is actively controlled by the voltage comparator circuit and generates an enable signal with a pulse width related to a crystal oscillation output period and a latch signal, a counter 15 receiving and counting a CR oscillation output clock in an enable signal period, a data register 16 for comparison having reference data, a data latch circuit 171 latching a count output by a latch signal, and a data comparator circuit 172 which compares latch data with the reference data, outputs a binary m-bit trimming signal changing in response to the difference of both inputs to change the oscillation frequency of the variable CR oscillation circuit, and stops the control operation of the control logic circuit, when the difference between the both inputs is within a prescribed range.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic trimming circuit for automatically adjusting the frequency of an oscillator formed by using a semiconductor integrated circuit. To an automatic trimming circuit that performs

[0002]

2. Description of the Related Art An automatic trimming circuit for an oscillator of this kind is disclosed in, for example, Japanese Patent Application Laid-Open No. Hei 7-193426, "Automatic Adjustment Device and Automatic Adjustment Method of Oscillation Frequency", and Japanese Patent Application Laid-Open No. 8-139593, "Oscillation Circuit". ing.

The former Japanese Patent Application Laid-Open No. H7-193426 aims to adjust the oscillation frequency of an oscillator having a large frequency fluctuation, such as a CR oscillator or an LR oscillator, with a simple configuration without being affected by changes in temperature or voltage. And has a configuration as shown in FIG.

In other words, the oscillating signal φ1 from the CR oscillating circuit 11 is converted by the hex counter 44 into an interval in which a pulse signal A of a predetermined cycle is output from the NOR gate NOR in response to the 32 KHz oscillating signal supplied from the crystal oscillator. When the counted value becomes “32” or more, the down signal D is supplied to the trimming circuit 45 to change the resistance value of the CR oscillation circuit 41 in a direction in which the oscillation frequency decreases. On the other hand, when the count value becomes equal to or less than "31", the up signal U is supplied to the trimming circuit 45 to output the CR signal.
The resistance value of the oscillation circuit 41 is changed in a direction in which the oscillation frequency increases.

[0005] Japanese Patent Application Laid-Open No. 8-139593 discloses that in a CR oscillator, the oscillation frequency is adjusted automatically by using an internal or external oscillation signal of a reference oscillator in order to suppress variations in the oscillation frequency between products. It has a configuration as shown in FIG. 5, for example.

That is, the output of the CR oscillator 50 is taken into a counter 54, the output of the counter 54 is taken into a selection circuit 60, and the number of transistors to be turned on among the switch transistors 1 to 6 is adjusted. And automatically adjust the oscillation frequency.

As described above, the conventional automatic trimming circuit of the oscillator adjusts the oscillation frequency by trimming the resistance or capacitance of the oscillation circuit using the oscillation frequency of a crystal oscillator or the like whose oscillation frequency is relatively stable. I was adjusting.

However, the frequency of the oscillator is not always stable because the adjustment circuit is always on (operating). Even if the operation of the adjustment circuit is stopped after the frequency is adjusted, the frequency changes due to a change in the power supply voltage or the like.

Further, when trimming adjustment of the resistance value or the capacitance value of the oscillation circuit is performed, the value of the resistor or the capacitor controlled on / off by each bit of each trimming signal is not weighted. There were problems such as inability to do so.

[0010]

As described above, the conventional automatic trimming circuit of the oscillator has problems in frequency stability and adjustment accuracy.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide an automatic trimming circuit of an oscillator which can automatically perform trimming adjustment with higher accuracy when trimming adjustment is required. .

[0012]

An automatic trimming circuit for an oscillator according to the present invention comprises a first oscillating circuit of a variable frequency type having a relatively low oscillating frequency accuracy and a second oscillating circuit having a relatively high oscillating frequency accuracy. A voltage comparison circuit that compares a divided voltage of the power supply voltage with a reference voltage and outputs a detection signal of a different logic level according to the magnitude relation between the voltage comparison circuit and an active / inactive state controlled by the detection signal of the voltage comparison circuit A counter enable signal having a pulse width related to the oscillation cycle of the second oscillation circuit during an active period, a control logic circuit for generating a latch signal at a predetermined timing with respect to the counter enable signal, and activation / deactivation by the counter enable signal An active state is controlled, a counter that receives and counts an output clock signal of the first oscillation circuit during an active period, and a comparison data having reference data for comparison. A register, a latch operation of which is controlled by the latch signal, a counter data latch circuit that latches count output data of the counter, a latch data of the counter data latch circuit, and data of the comparison data register. A binary m-bit trimming signal that changes in accordance with the difference between the inputs is output to control the oscillation frequency of the first oscillation circuit to be changed. When the difference between the two inputs falls within a certain range, A data comparison circuit for controlling so as to stop the control operation of the control logic circuit.

[0013]

Embodiments of the present invention will be described below in detail with reference to the drawings.

<First Embodiment> FIG. 1 shows an automatic trimming circuit of an oscillator according to a first embodiment of the present invention.

In FIG. 1, reference numeral 11 denotes a variable frequency type first oscillation circuit having a relatively low oscillation frequency accuracy. For example, a variable CR oscillation circuit is used, and its output clock signal is supplied to an LSI internal circuit (see FIG. 1). (Not shown).

The variable CR oscillating circuit 11 selectively connects a variable capacitance section C in which m (plural) capacitors each having a binary weighted capacitance value are formed by a binary m-bit trimming signal. By controlling, the oscillation frequency can be changed.

Reference numeral 12 denotes a second oscillation circuit having a relatively high oscillation frequency accuracy. For example, a high-precision crystal oscillation circuit using a crystal oscillator (X'tal) is used. In this example, for convenience of explanation, the oscillation frequency of the crystal oscillation circuit 12 is variable C
It is assumed that the oscillation frequency is lower than the oscillation frequency of the R oscillation circuit 11.

A voltage comparison circuit (comparator) 13 for detecting a power supply voltage compares a divided voltage generated by the resistance voltage dividing circuit with the power supply voltage VCC with a reference voltage, and detects a detection signal of a different logic level according to the magnitude relation. Is output as a trimming enable signal Trimming Enable.

An active / inactive state of a control logic circuit (Control Logic) 14 is controlled by the trimming enable signal Trimming Enable, and a counter enable signal having a pulse width related to the oscillation cycle of the crystal oscillation circuit 12 during an active period. Enable and generates a latch signal Latch at a predetermined timing. On this occasion,
Upon receiving the output clock signal of the crystal oscillation circuit 12, the counter enable signal Enable is activated during one clock or several clocks.

N-bit COUNTER 15
The active / inactive state is controlled by the counter enable signal Enable, and the variable CR oscillation circuit is activated during the active period.
The counter receives and counts the 11 output clock signals.

The comparison data register 16 stores data prepared in advance on a data bus (BU) as reference data for comparison.
S) is read (stored) via S) or fixed data is incorporated as an initial value.

A counter data latch circuit (COUNTER DATA
The latch operation of the counter data latch circuit 171 in the latch & data comparison circuit 17 is controlled by the latch signal Latch, and the count output data of the N-bit counter 15 is latched.

The data comparison circuit 172 compares the latch data of the counter data latch circuit 171 with the data of the comparison data register 16, and changes the binary m bits (m−m) corresponding to the difference between the two inputs. (bit) trimming signal to control the oscillation frequency of the variable CR oscillation circuit 11 to change, and stop the control operation of the control logic circuit 14 when the difference between the two inputs falls within a certain range. To control.

In this embodiment, the data comparison circuit 172 controls the capacitance value of the variable capacitance section C of the variable CR oscillation circuit 12 according to the trimming signal. In this case, when the difference between the two inputs is larger than a predetermined data range (when the CR oscillation frequency is higher than the expected frequency), the capacitance value of the variable capacitance section C is increased (the CR oscillation frequency is lowered). ), The content of the trimming signal is changed by one bit (LSB).

On the other hand, when the difference between the two inputs is smaller than a predetermined data range (when the CR oscillation frequency is lower than the expected frequency), the variable capacitor C
The content of the trimming signal is changed by one bit (LSB) in the direction of lowering the capacitance value (increase the CR oscillation frequency). If the difference between the two inputs is within a predetermined data range, a control stop signal Stop is output while holding the contents of the trimming signal to stop the operation of the control logic circuit.

Although the circuit other than the crystal oscillation circuit 12 is integrated on the same semiconductor chip, the circuit other than the crystal oscillator (X'tal) may be integrated on the same semiconductor chip. Instead of the circuit 12, another reference oscillation circuit may be integrated on the same semiconductor chip.

Next, the operation of the automatic trimming circuit having the above configuration will be described.

When the control logic circuit 14 is activated by the trimming enable signal generated by the voltage comparison circuit 13, the control logic circuit 14 receives the output clock signal of the crystal oscillation circuit 12 and waits for one or several clocks. Activate the counter enable signal Enable and output the latch signal Latch after the end of the counter enable signal Enable.

The N-bit counter 15 has a variable C during the period activated by the counter enable signal Enable.
The output clock signal of the R oscillation circuit 11 is received and counted. The counter data latch circuit 171 is an N-bit counter.
After completion of the counting operation of No. 15, the counter data is latched in response to the latch signal Latch.

The data comparison circuit 172 stores the latch data of the counter data latch circuit 171 and the comparison data register 16.
And changes according to the difference between the two inputs.
It outputs a m-bit trimming signal, controls the capacitance value of the variable capacitance section C of the variable CR oscillation circuit 12, and adjusts the CR oscillation frequency.

As described above, until the CR oscillation frequency falls within a predetermined range based on the reference oscillation frequency, C
The adjustment operation of the R oscillation frequency is automatically repeated, and the CR oscillation frequency is controlled to a target value and stabilized. At this time, when the difference between the two inputs falls within a predetermined data range, the data comparison circuit 172 outputs the control stop signal STOP while holding the contents of the trimming signal, and stops the operation of the control logic circuit 14. .

Thereafter, when a rise or fall of the power supply voltage is detected by the voltage comparison circuit 13, the control logic circuit 14
Is activated (trimming enable), and the adjustment operation as described above is performed again during this period. After the adjustment, the operation of the control logic circuit 14 is stopped.

Therefore, according to the automatic trimming circuit of the above embodiment, by preparing m frequency variable elements of the variable CR oscillation circuit 11, fine trimming can be performed in units of 1 LSB of a binary m-bit trimming signal. And the number of frequency variable elements (capacitors or resistance elements) used can be reduced, so that the pattern area can be reduced.

In the above example, the case where the CR oscillation frequency is higher than the crystal oscillation frequency has been described.
If the crystal oscillation frequency is higher than the oscillation frequency, C
The enable signal Enable may be activated during one or several clocks of the R oscillation oscillation frequency, and the output clock of the crystal oscillation circuit 12 may be used as the counter clock input. However, in this case, the data comparison circuit 172 compares the latch data of the counter data latch circuit 171 with the data of the comparison data register 16 and finds that the difference between the two inputs is larger than a predetermined data range (CR oscillation). When the frequency is higher than the expected frequency), the capacitance value of the variable capacitance section C is reduced (the CR oscillation frequency is increased).
The content of the trimming signal is changed by one bit (LSB) in the direction. When the difference between the two inputs is smaller than a predetermined data range (when the CR oscillation frequency is lower than the expected frequency), the capacitance value of the variable capacitance section C is increased (the CR oscillation frequency is decreased). ), The content of the trimming signal is changed by one bit (LSB).

FIG. 2 shows a circuit example in which the variable capacitance section C of the variable CR oscillation circuit 11 in FIG. 1 is taken out.

Here, the capacitor CS is always connected to the variable CR oscillation circuit 11, and m capacitors C1 to C
m is selectively connected in parallel to the capacitor CS by a binary m-bit trimming signal. In this case, each of the m capacitors C1 to Cm is a switch element (for example, a MOS transistor) S that is on / off controlled correspondingly by the m-bit trimming signal.
1 to Sm are connected in series, and are connected to the capacitor CS by turning on corresponding switch elements. The m capacitors C1 to Cm are 2
Capacitors C2 to C2 have a capacitance value weighted in binary, that is, based on the capacitance value of the capacitor C1 selectively controlled by the minimum weight code LSB of the trimming signal.
m is sequentially doubled, and the capacitor C selectively controlled by the maximum weight code MSB of the trimming signal.
The capacitance value of m is 2 ^(m-1) times the capacitance value of the capacitor C1.

Therefore, in the variable capacitance section of FIG.
If the center target value of the trimming is, for example, a state where the capacitors CS and Cm are connected in parallel (that is, a state where the capacitor Cm is selected and connected), the trimming signal becomes 1
By changing in LSB units, the capacitance value can be varied up and down, and fine trimming is possible.

That is, for example, if m = 4, and the capacitors for trimming are represented by C1 to C4, the center target value is obtained when the capacitor C4 is selected by the trimming signal (MSB to LSB) = (1000). At this time CR
If it is determined that the oscillation frequency is high, the trimming signal (MSB to LSB) is shifted to (1001), and the capacitor C1 is additionally selected and the capacitance value increases, so that the CR oscillation frequency changes in the direction of decreasing. At this time, if it is determined that the CR oscillation frequency is still high, the trimming signal (MSB to LSB) is shifted to (1010) and the capacitor is shifted.
Since the capacitor C2 is additionally selected instead of C1 and the capacitance value increases, the CR oscillation frequency changes in a direction to further decrease. Hereinafter, similar control is performed according to the above control operation.

On the other hand, when it is determined that the CR oscillation frequency is low at the center target value, the trimming signal (MSB to LSB) is shifted to (0111), and the capacitors C1 to C1 are used instead of the capacitor C4. Since C3 is selected and the capacitance value decreases, the CR oscillation frequency changes in a direction to increase. At this time, if it is determined that the CR oscillation frequency is still low, the trimming signal (MSB to LSB) = (0110)
And the capacitor C1 is deselected and the capacitance value decreases, so that the CR oscillation frequency further increases. Hereinafter, similar control is performed according to the above control operation.

In the above control operation, if the center target value of the trimming is, for example, a state where the capacitors CS, C4 and C3 are connected in parallel (that is, a state where the capacitors C4 and C3 are selected and connected), the trimming is performed. The center target value is obtained when the signals (MSB to LSB) = (1100). At this time, if it is determined that the CR oscillation frequency is high, the trimming signal (MSB to LSB) = (110
Shifting to 1), the capacitor C1 is additionally selected and the capacitance value increases, so that the CR oscillation frequency changes in the direction of decreasing. On the other hand, if it is determined that the CR oscillation frequency is low at the center target value, the trimming signal (MSB to LSB) is shifted to (1011), and the capacitors C1 and C2 are selected instead of the capacitor C3. As a result, the capacitance value decreases, so that the CR oscillation frequency changes in a rising direction.

In the automatic trimming circuit according to the above-described embodiment, the adjustment accuracy and the adjustment width are determined by the capacitance value of the capacitor selectively connected in the state of the center target value for trimming. A center target value for capacity is designed.

FIG. 3 shows a circuit example of a variable resistor portion according to a modification of the variable CR oscillation circuit 11 shown in FIG.

This variable CR oscillation circuit is a variable CR oscillation circuit shown in FIG.
The variable capacitance section in the R oscillation circuit 11 is replaced with a fixed capacitance section (not shown), and the fixed resistance section R in the variable CR oscillation circuit 11 in FIG. 1 is replaced with a variable resistance section.

This variable resistance section is composed of m (plural) resistance elements R1 to Rm having a binary weighted resistance value.
It is possible to change the oscillation frequency by selectively controlling the connection in series with the m-bit trimming signal.

Here, the resistance element RS is a variable CR oscillation circuit.
The m resistance elements R1 to Rm are selectively connected in series to the resistance element RS by a binary m-bit trimming signal. In this case, the m resistance elements R1 to Rm correspond to the m resistance elements, respectively.
Switch elements (for example, MOS transistors) S1 to Sm that are turned on / off by a bit trimming signal are connected in parallel, and the corresponding switch elements are turned off to be connected to the resistance element RS.
The m resistance elements R1 to Rm each have a binary weighted resistance value. That is, the resistance elements R1 to Rm are selected based on the resistance value of the resistance element R1 selectively controlled by the minimum weight code LSB of the trimming signal. To Rm are sequentially 2
The maximum weight code MSB of the trimming signal
The resistance value of the resistance element Rm selectively controlled by ⁽ 2 ^{) is} 2 ^(m-1) times the resistance value of the resistance element R1.

Therefore, in the variable resistance section of FIG.
The center target value of the trimming is set to, for example, the resistance elements RS and R.
m is connected in series (that is, a state where the resistance element Rm is selected and connected), the trimming signal is set to 1LS
By changing in B units, the resistance value can be changed up and down, and fine trimming becomes possible.

In the above embodiment, the case where the oscillation frequency of the CR oscillation circuit 11 is automatically adjusted has been described.
The same configuration can be applied to the R oscillation circuit to stabilize the oscillation frequency.

[0048]

As described above, according to the oscillator automatic trimming circuit of the present invention, when trimming adjustment is necessary, trimming adjustment with higher accuracy can be automatically performed, and the number of frequency variable elements used is reduced. And the pattern area is small.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an automatic trimming circuit of an oscillator according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram showing an example of a variable capacitance portion of the variable CR oscillation circuit shown in FIG.

FIG. 3 is a circuit diagram showing an example of a variable resistor section according to a modification of the variable CR oscillation circuit shown in FIG.

FIG. 4 is a circuit diagram for explaining an oscillation frequency automatic adjustment device and an automatic adjustment method according to Conventional Example 1.

FIG. 5 is a circuit diagram showing an oscillation circuit of Conventional Example 2.

[Explanation of symbols]

11: variable CR oscillation circuit (first oscillation circuit), C: variable capacitance section, 12: crystal oscillation circuit (second oscillation circuit), 13: voltage comparison circuit (comparator) for detecting power supply voltage, 14: control Logic circuit (Control Logic), 15: N-bit counter (N-bit COUNTER), 16: Data register for comparison, 171: Counter data latch circuit (COUNTER DATA Latch)
), 172 ... data comparison circuit.

 ──────────────────────────────────────────────────続 き Continuing from the front page (72) Inventor Shoji Mori 25-1, Ekimae Honcho, Kawasaki-ku, Kawasaki-ku, Kanagawa Prefecture F-term (reference) 5J081 AA08 CC06 CC22 EE03 EE04 FF08 FF12 JJ23 KK02 KK07 KK23 MM01 5J106 AA01 CC02 CC03 CC33 DD06 DD17 DD42 DD46 GG03 HH01 JJ01 KK05 LL01 LL03

Claims (6)

[Claims] A first oscillation circuit of a variable frequency type having a relatively low oscillation frequency accuracy, a second oscillation circuit having a relatively high oscillation frequency accuracy, and a divided voltage of a power supply voltage being compared with a reference voltage; A voltage comparison circuit that outputs a detection signal of a different logic level in accordance with the magnitude relationship; an active / inactive state is controlled by the detection signal of the voltage comparison circuit; A counter enable signal having an associated pulse width and a control logic circuit for generating a latch signal at a predetermined timing with respect to the counter enable signal; an active / inactive state controlled by the counter enable signal; A counter for receiving and counting the output clock signal of the circuit; a comparison data register having reference data for comparison; and a latch operation controlled by the latch signal. A counter data latch circuit for latching the count output data of the counter; comparing the latch data of the counter data latch circuit with the data of the comparison data register; And outputs a trimming signal of m bits to change the oscillation frequency of the first oscillation circuit, and stops the control operation of the control logic circuit when the difference between the two inputs falls within a certain range. An automatic trimming circuit for an oscillator, comprising: a data comparison circuit for controlling. 2. A variable frequency type first oscillation circuit having a relatively low oscillation frequency accuracy, a second oscillation circuit having a relatively high oscillation frequency accuracy, and a divided voltage of a power supply voltage being compared with a reference voltage; A voltage comparison circuit that outputs a detection signal of a different logic level in accordance with the magnitude relationship; an active / inactive state is controlled by the detection signal of the voltage comparison circuit; A counter enable signal having an associated pulse width and a control logic circuit for generating a latch signal at a predetermined timing with respect to the counter enable signal; an active / inactive state controlled by the counter enable signal; A counter for receiving and counting the output clock signal of the circuit; a comparison data register having reference data for comparison; and a latch operation controlled by the latch signal. A counter data latch circuit for latching the count output data of the counter; comparing the latch data of the counter data latch circuit with the data of the comparison data register; And outputs a trimming signal of m bits to change the oscillation frequency of the first oscillation circuit, and stops the control operation of the control logic circuit when the difference between the two inputs falls within a certain range. An automatic trimming circuit for an oscillator, comprising: a data comparison circuit for controlling. 3. The first oscillation circuit includes a fixed resistance section and a variable capacitance section in which m (plural) capacitors having a binary weighted capacitance value are formed. 3. The automatic trimming circuit for an oscillator according to claim 1, wherein an oscillation frequency is changed by selectively controlling connection of a capacitor of the variable capacitance section by an m-bit trimming signal. 4. The first oscillation circuit includes: a fixed capacitance section; and a variable resistance section in which m (plural) resistance elements having a binary weighted resistance value are formed. 3. The automatic trimming circuit for an oscillator according to claim 1, wherein the oscillation frequency is changed by selectively controlling connection of the resistance element of the variable resistance section by the m-bit trimming signal. 5. The automatic trimming circuit according to claim 1, wherein the second oscillation circuit is a crystal oscillation circuit that outputs an oscillation signal having a predetermined period. 6. The automatic trimming circuit for an oscillator according to claim 1, wherein components other than the second oscillation circuit are integrated on the same semiconductor chip.