JP2001284594A - Thin-film transistor and display device - Google Patents

Thin-film transistor and display device

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Publication number
JP2001284594A
JP2001284594A JP2000094068A JP2000094068A JP2001284594A JP 2001284594 A JP2001284594 A JP 2001284594A JP 2000094068 A JP2000094068 A JP 2000094068A JP 2000094068 A JP2000094068 A JP 2000094068A JP 2001284594 A JP2001284594 A JP 2001284594A
Authority
JP
Japan
Prior art keywords
light
film
region
shielding film
gate electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000094068A
Other languages
Japanese (ja)
Inventor
Masashi Jinno
優志 神野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP2000094068A priority Critical patent/JP2001284594A/en
Publication of JP2001284594A publication Critical patent/JP2001284594A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide TFT where the crystal grain size in a polycrystal silicon film of an active layer is large and constant while light is prevented from being irradiated to a joint surface with an electric field concentrated. SOLUTION: On a glass substrate 10, a light-shielding film 100 of chromium and an insulating film 101 are formed, over which an amorphous silicon film 13 is laminated, which is irradiated with laser beam to provide a polycrystal silicon film 13. The polycrystal silicon 13 has an LDD structure, over which a gate insulating film 12 and a gate electrode 11 are formed. Here, the light- shielding film 100 is so formed as to even cover an LDD region 13LD.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、レーザ照射にて非
晶質半導体膜を多結晶化した多結晶半導体膜を能動層と
する薄膜トランジスタ(Thin Film Transistor:以下、
「TFT」と称する。)及びそれを備えた表示装置に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film transistor (hereinafter, referred to as a thin film transistor) having an active layer of a polycrystalline semiconductor film obtained by polycrystallizing an amorphous semiconductor film by laser irradiation.
It is called "TFT". ) And a display device provided with the same.

【0002】[0002]

【従来の技術】従来より、例えば、表示画素部の液晶を
駆動するTFT、及びそのTFTを駆動し表示画素部の
周辺に設けられた周辺駆動回路部のTFTを備えた液晶
表示装置(Liqui d Crystal Display、以下、「LC
D」と称する。)など表示装置のスイッチング素子とし
てのTFTの研究開発が進められている。
2. Description of the Related Art Conventionally, for example, a liquid crystal display (LCD) having a TFT for driving liquid crystal in a display pixel portion and a TFT for a peripheral drive circuit portion provided around the display pixel portion for driving the TFT. Crystal Display, LC
D ". Research and development of TFT as a switching element of a display device are being advanced.

【0003】以下に従来のTFTについて説明する。Hereinafter, a conventional TFT will be described.

【0004】図5に従来のTFTの断面図を示す。FIG. 5 is a sectional view of a conventional TFT.

【0005】同図に示すように、石英ガラス、無アルカ
リガラス等からなる絶縁性基板10上に、クロム(C
r)等の不透明材料を堆積して、後に能動層となる領域
にその不透明材料を残して遮光膜100とする。その遮
光膜100の上に、SiN膜、SiO2膜等の絶縁膜1
01を形成する。そして非晶質シリコン膜にレーザ光を
照射して多結晶化することによって得られた多結晶シリ
コン膜から成る能動層13を形成し、その上に、SiO
2膜等から成るゲート絶縁膜12を形成する。更にその
上に、Cr、モリブデン(Mo)などの高融点金属から
なるゲート電極11を順に形成する。
As shown in FIG. 1, chromium (C) is deposited on an insulating substrate 10 made of quartz glass, non-alkali glass or the like.
An opaque material such as r) is deposited, and the opaque material is left in a region to be an active layer later to form the light shielding film 100. An insulating film 1 such as a SiN film or a SiO 2 film is formed on the light shielding film 100.
01 is formed. Then, an active layer 13 made of a polycrystalline silicon film obtained by irradiating the amorphous silicon film with a laser beam to be polycrystallized is formed.
A gate insulating film 12 composed of two films or the like is formed. Further, a gate electrode 11 made of a refractory metal such as Cr and molybdenum (Mo) is formed thereon in this order.

【0006】能動層13には、チャネル13cと、ゲー
ト電極11をマスクとしてチャネル13cの両側に不純
物イオンを注入し、次いでゲート電極11を含みこのゲ
ート電極11の両側の一部を覆ったレジスト等をマスク
として能動層に不純物イオンの注入を行い、結果として
ゲート電極11の両側に低濃度不純物領域13LD、更
にその外側には高濃度不純物領域であるソース13s及
びドレイン13dを設け、いわゆるLDD(Lightly Do
ped Drain)構造を有したTFTを形成する。
In the active layer 13, impurity ions are implanted into both sides of the channel 13c using the channel 13c and the gate electrode 11 as a mask, and a resist or the like including the gate electrode 11 and partially covering both sides of the gate electrode 11 is used. Is used as a mask to implant impurity ions into the active layer. As a result, a low-concentration impurity region 13LD is provided on both sides of the gate electrode 11, and a source 13s and a drain 13d, which are high-concentration impurity regions, are further provided outside the region. Do
A TFT having a ped drain structure is formed.

【0007】そして、ゲート絶縁膜12及びゲート電極
11上の全面に、SiO2膜、SiN膜及びSiO2膜の
順に積層された層間絶縁膜15を形成し、そしてドレイ
ン13dに対応して設けたコンタクトホールにアルミニ
ウム(Al)等の金属を充填してドレイン電極16を形
成する。更に全面に例えば有機樹脂から成り表面を平坦
にする平坦化絶縁膜17を形成する。そして、その平坦
化絶縁膜17のソース13sに対応した位置にコンタク
トホールを形成し、このコンタクトホールを介してソー
ス13sとコンタクトしたITO(Indium Thin Oxid
e)から成りソース電極14兼ねた表示電極18を平坦
化絶縁膜17上に形成する。
An interlayer insulating film 15 is formed on the entire surface of the gate insulating film 12 and the gate electrode 11 in the order of a SiO 2 film, a SiN film and a SiO 2 film, and is provided corresponding to the drain 13d. The drain electrode 16 is formed by filling the contact hole with a metal such as aluminum (Al). Further, a flattening insulating film 17 made of, for example, an organic resin and flattening the surface is formed on the entire surface. Then, a contact hole is formed at a position corresponding to the source 13s of the planarization insulating film 17, and an ITO (Indium Thin Oxid) contacting the source 13s through the contact hole.
e) A display electrode 18 which also serves as the source electrode 14 is formed on the planarizing insulating film 17.

【0008】[0008]

【発明が解決しようとする課題】ところが、図6に示す
ように、LDD領域の低濃度領域13LDと、高濃度領
域であるソース領域13S又はドレイン領域13dとの
界面は、不純物濃度が異なる領域が接していることから
抵抗の差異が有り、TFTがオフ状態の場合その界面付
近に電界が集中してしまう。そこに光が入ってくるとT
FTのオフ電流が高くなってしまうという欠点があっ
た。即ち、同図に示すように、遮光膜100でLDD領
域までを覆っているのでオフ電流は大きくないが、遮光
膜で遮光していないLDDを越えた領域においてはオフ
電流が急激に増大している。
However, as shown in FIG. 6, the interface between the low-concentration region 13LD of the LDD region and the source region 13S or the drain region 13d, which is the high-concentration region, has different impurity concentrations. Since the TFTs are in contact with each other, there is a difference in resistance. When the TFT is in an off state, an electric field concentrates near the interface. When light enters there, T
There is a disadvantage that the off current of the FT is increased. That is, as shown in the drawing, the off-state current is not large because the light-shielding film 100 covers the region up to the LDD region, but the off-state current increases sharply in the region beyond the LDD that is not shielded by the light-shielding film. I have.

【0009】図6は、遮光膜の半導体膜とのオーバーラ
ップ量と、遮光膜を設けない場合に対する設けた場合の
電流比との関係を表している。同図においてLDD領域
は1.25μmまで形成されている。その領域を越える
と電流比が下がっていることがわかる。
FIG. 6 shows the relationship between the amount of overlap of the light-shielding film with the semiconductor film and the current ratio in the case where the light-shielding film is provided when it is not provided. In the figure, the LDD region is formed up to 1.25 μm. It can be seen that the current ratio is lowered when the area exceeds that range.

【0010】また、非晶質シリコン膜形成後、その非晶
質シリコン膜にレーザ光を照射して多結晶シリコン膜の
能動層を形成する際、レーザ光照射による熱は金属から
なる遮光膜によって逃げやすいため、レーザ光照射によ
り多結晶化された遮光膜100上の多結晶シリコン膜1
3のチャネル13cの粒径は、その他の遮光膜100と
重畳しない多結晶シリコン膜の13LD,13d,13
sの粒径、即ちガラス基板10上の多結晶シリコン膜の
粒径に比べて小さくなってしまう。
After the amorphous silicon film is formed, when the amorphous silicon film is irradiated with a laser beam to form an active layer of a polycrystalline silicon film, heat generated by the laser beam irradiation is reduced by a light shielding film made of metal. The polycrystalline silicon film 1 on the light-shielding film 100 polycrystallized by laser light irradiation because it is easy to escape
The grain size of the third channel 13c is 13LD, 13d, 13 of the polycrystalline silicon film which does not overlap with the other light shielding films 100.
The grain size of s, that is, the grain size of the polycrystalline silicon film on the glass substrate 10 becomes smaller.

【0011】このように、金属から成る遮光膜上である
かガラス基板上であるかによって、多結晶シリコン膜の
結晶粒径が異なってしまうという欠点があった。
As described above, there is a disadvantage that the crystal grain size of the polycrystalline silicon film is different depending on whether it is on a light-shielding film made of metal or on a glass substrate.

【0012】レーザーエネルギーを大きくしてチャネル
領域の粒径を大きくしていくと、ガラス上の粒径が逆に
小さくなってしまうので、チャネル領域の結晶粒径を大
きくすることができず、結晶粒径が小さいと粒界が増大
し電界移動度が小さくなりTFT特性が低下してしまう
という欠点があった。
When the laser energy is increased to increase the grain size of the channel region, the grain size on the glass becomes smaller on the contrary, so that the crystal grain size of the channel region cannot be increased. If the particle size is small, there is a disadvantage that the grain boundaries increase, the electric field mobility decreases, and the TFT characteristics deteriorate.

【0013】また、低濃度に不純物を注入したLDD領
域の抵抗値は、多結晶シリコン膜内の結晶粒径の大小に
よって大きく変動し不安定であり、遮光膜の端部がLD
D領域の途中、即ちLDD領域を完全に覆っていない場
合には、LDD領域内で結晶粒径が変化することによ
り、シート抵抗の変動が大きくなりTFT特性の変動も
大きくなるという欠点もあった。
Also, the resistance value of the LDD region into which impurities are implanted at a low concentration varies greatly depending on the crystal grain size in the polycrystalline silicon film and is unstable.
In the case where the LDD region is not completely covered in the middle of the D region, the crystal grain size changes in the LDD region, so that there is a disadvantage that the sheet resistance changes greatly and the TFT characteristics also changes. .

【0014】そこで本発明は、上記の従来の欠点に鑑み
て為されたものであり、電界集中した接合面に光が照射
されることを防止するとともに、能動層である多結晶シ
リコン膜中の結晶粒径が大きく均一なTFTを提供する
ことを目的とする。
The present invention has been made in view of the above-mentioned conventional drawbacks, and it is intended to prevent light from being irradiated to a junction surface where an electric field is concentrated, and to prevent a polycrystalline silicon film serving as an active layer from being irradiated with light. An object is to provide a TFT having a large crystal grain size and uniformity.

【0015】[0015]

【課題を解決するための手段】本発明のTFTは、絶縁
性基板上に不透明金属から成る遮光膜を備えており、該
遮光膜の上層に、非単結晶半導体膜にレーザ光を照射し
て多結晶化した半導体膜と、該多結晶半導体膜と絶縁膜
を介して形成されたゲート電極とを有したLDD構造を
有するTFTであって、前記遮光膜は、前記ゲート電極
と平面的に重畳したチャネル領域と、該チャネル領域の
両側に設けられた低濃度領域とを、平面的に覆っている
ものである。
The TFT of the present invention has a light-shielding film made of an opaque metal on an insulating substrate, and a non-single-crystal semiconductor film is irradiated with laser light on the light-shielding film. A TFT having an LDD structure including a polycrystallized semiconductor film and a gate electrode formed with the polycrystalline semiconductor film and an insulating film interposed therebetween, wherein the light-shielding film overlaps the gate electrode in a plane. And a low-concentration region provided on both sides of the channel region.

【0016】また、本発明のTFTは、絶縁性基板上に
不透明金属から成る遮光膜を備えており、該遮光膜の上
層に、非単結晶半導体膜にレーザ光を照射して多結晶化
した半導体膜と、該多結晶半導体膜と絶縁膜を介して形
成されたゲート電極とを有したLDD構造を有するTF
Tであって、前記遮光膜のチャネル長方向の長さは、前
記ゲート電極と平面的に重畳したチャネル領域のチャネ
ル長と、該チャネル領域の両側に設けられた低濃度領域
の長さとの合計よりも大きいものである。
Further, the TFT of the present invention has a light-shielding film made of an opaque metal on an insulating substrate, and a non-single-crystal semiconductor film is irradiated with laser light to form a polycrystal on the light-shielding film. TF having an LDD structure including a semiconductor film and a gate electrode formed with the polycrystalline semiconductor film and an insulating film interposed therebetween
T, wherein the length of the light-shielding film in the channel length direction is a sum of a channel length of a channel region that is planarly overlapped with the gate electrode and a length of a low-concentration region provided on both sides of the channel region. Is larger than

【0017】更に、上述のTFTは、前記遮光膜の端部
が、前記低濃度領域の外側に形成されたソース領域又は
ドレイン領域と重畳しているTFTである。
Further, the above-mentioned TFT is a TFT in which an end portion of the light-shielding film overlaps a source region or a drain region formed outside the low-concentration region.

【0018】また、本発明の表示装置は、絶縁性基板上
に不透明金属から成る遮光膜を備えており、該遮光膜の
上層に、非単結晶半導体膜にレーザ光を照射して多結晶
化した半導体膜と、該多結晶半導体膜と絶縁膜を介して
形成されたゲート電極とを有したLDD構造を有する薄
膜トランジスタを備えた表示装置であって、前記遮光膜
は、前記ゲート電極と平面的に重畳したチャネル領域
と、該チャネル領域の両側に設けられた低濃度領域と
を、平面的に覆った薄膜トランジスタを備えたものであ
る。
Further, the display device of the present invention has a light-shielding film made of an opaque metal on an insulating substrate, and a non-single-crystal semiconductor film is irradiated with a laser beam on the light-shielding film to form a polycrystal. A thin film transistor having an LDD structure having a semiconductor film formed and a gate electrode formed with the polycrystalline semiconductor film and an insulating film interposed therebetween, wherein the light-shielding film is planar with the gate electrode. And a thin-film transistor that covers a channel region superimposed on the thin film and low-concentration regions provided on both sides of the channel region in a planar manner.

【0019】また、本発明の表示装置は、絶縁性基板上
に不透明金属から成る遮光膜を備えており、該遮光膜の
上層に、非単結晶半導体膜にレーザ光を照射して多結晶
化した半導体膜と、該多結晶半導体膜と絶縁膜を介して
形成されたゲート電極とを有したLDD構造を有する薄
膜トランジスタを備えた表示装置であって、前記遮光膜
のチャネル長方向の幅は、前記ゲート電極と平面的に重
畳したチャネル領域のチャネル長と、該チャネル領域の
両側に設けられた低濃度領域の長さとの合計よりも大き
い薄膜トランジスタを備えたものである。
Further, the display device of the present invention includes a light-shielding film made of an opaque metal on an insulating substrate, and irradiates a non-single-crystal semiconductor film with laser light on the upper layer of the light-shielding film to form a polycrystal. A thin film transistor having an LDD structure having a semiconductor film formed and a gate electrode formed with the polycrystalline semiconductor film and an insulating film interposed therebetween, wherein a width of the light shielding film in a channel length direction is: A thin film transistor is provided which is larger than the sum of the channel length of a channel region overlapping the gate electrode in a plane and the length of a low concentration region provided on both sides of the channel region.

【0020】更にまた、上述の表示装置は、前記遮光膜
の端部が、前記低濃度領域の外側に形成されたソース領
域又はドレイン領域と重畳している薄膜トランジスタを
備えた表示装置である。
Further, the above-mentioned display device is a display device including a thin film transistor in which an end of the light-shielding film overlaps a source region or a drain region formed outside the low-concentration region.

【0021】[0021]

【発明の実施の形態】以下に本発明の実施の形態につい
て説明する。
Embodiments of the present invention will be described below.

【0022】図1に本発明のTFTの平面図を示し、図
2にそのTFTをLCDに用いた場合の断面図を示す。
本実施形態の場合にはゲート電極が2つであるいわゆる
ダブルゲート電極構造のTFTを示す。
FIG. 1 is a plan view of a TFT according to the present invention, and FIG. 2 is a cross-sectional view when the TFT is used for an LCD.
In the case of the present embodiment, a TFT having a so-called double gate electrode structure having two gate electrodes is shown.

【0023】石英ガラス、無アルカリガラス等からなる
絶縁性基板10上に、Crからなる遮光膜100を形成
する。このとき、遮光膜100を形成する領域は、後に
能動層13を形成する領域である。この遮光膜100の
上に、SiO2膜、SiN膜等から成る絶縁膜101を
形成する。次いでCr、Moなどの高融点金属からなる
ゲート電極11を形成し、その上にSiO2膜、SiN
膜単体またはそれらの積層体からなるゲート絶縁膜1
2、及び非晶質シリコン膜からなる能動層13を堆積す
る。その後、その非晶質シリコン膜13にレーザ光を照
射して溶融再結晶化して多結晶化して多結晶シリコン膜
13に改質する。その後、多結晶シリコン膜13を島状
にエッチングする。
A light-shielding film 100 made of Cr is formed on an insulating substrate 10 made of quartz glass, non-alkali glass, or the like. At this time, the region where the light shielding film 100 is formed is a region where the active layer 13 is formed later. On this light-shielding film 100, an insulating film 101 made of a SiO 2 film, a SiN film or the like is formed. Next, a gate electrode 11 made of a high melting point metal such as Cr or Mo is formed, and a SiO 2 film, SiN
Gate insulating film 1 composed of a single film or a laminate thereof
2, and an active layer 13 made of an amorphous silicon film is deposited. Thereafter, the amorphous silicon film 13 is irradiated with a laser beam to be melted and recrystallized to be polycrystallized, thereby being modified into a polycrystalline silicon film 13. Thereafter, the polycrystalline silicon film 13 is etched into an island shape.

【0024】続いて、ゲート電極11をマスクとして多
結晶シリコン膜13にリン(P)などの不純物イオンを
注入して不純物イオンの低濃度領域13LDを形成し、
更にゲート電極11及びそのゲート電極の両側の一部を
覆ったレジスト等をマスクとして再度不純物イオンを注
入する。それによって不純物低濃度領域13LD、及び
不純物高濃度領域であるソース領域13sとドレイン領
域13dを多結晶シリコン膜13に形成する。能動層1
3上にSiO2膜、SiN膜からなるゲート絶縁膜12
を形成し、その上に、Cr、モリブデン(Mo)などの
高融点金属からなるゲート電極11を順に形成する。更
にゲート電極及びゲート絶縁膜12上にSiO2膜、S
iN膜及びSiO2膜の3層からなる層間絶縁膜15を
堆積する。そして、その層間絶縁膜15のドレイン領域
13dに対応した位置にコンタクトホールを形成し、そ
こにAl等の金属を充填してドレイン電極16を形成す
る。
Subsequently, impurity ions such as phosphorus (P) are implanted into the polycrystalline silicon film 13 using the gate electrode 11 as a mask to form a low concentration region 13LD of impurity ions.
Further, impurity ions are implanted again using the gate electrode 11 and a resist or the like which partially covers both sides of the gate electrode as a mask. As a result, a low impurity concentration region 13LD and a source region 13s and a drain region 13d which are high impurity concentration regions are formed in the polycrystalline silicon film 13. Active layer 1
A gate insulating film 12 of SiO 2 film and SiN film on 3
Is formed thereon, and a gate electrode 11 made of a high melting point metal such as Cr and molybdenum (Mo) is sequentially formed thereon. Further, a SiO 2 film and S on the gate electrode and the gate insulating film 12 are formed.
An interlayer insulating film 15 consisting of three layers, iN film and SiO 2 film, is deposited. Then, a contact hole is formed at a position corresponding to the drain region 13d of the interlayer insulating film 15, and a metal such as Al is filled therein to form a drain electrode 16.

【0025】そのドレイン電極16及び層間絶縁膜15
上に、表面を平坦化する平坦化絶縁膜17を形成し、そ
の平坦化絶縁膜17、層間絶縁膜15及びゲート絶縁膜
12のソース領域13sに対応した位置にコンタクトホ
ールを形成して、そこにITO等の透明材料を充填して
ソース電極14を兼ねた表示電極18を平坦化絶縁膜1
7上に形成する。
The drain electrode 16 and the interlayer insulating film 15
A planarizing insulating film 17 for planarizing the surface is formed thereon, and a contact hole is formed at a position corresponding to the source region 13s of the planarizing insulating film 17, the interlayer insulating film 15, and the gate insulating film 12. Is filled with a transparent material such as ITO, and the display electrode 18 serving also as the source electrode 14 is planarized.
7.

【0026】その後、図2に示すように、平坦化絶縁膜
17及び表示電極18上に液晶35を配向する配向膜1
9を形成することによっていわゆるTFT基板10が完
成する。
Thereafter, as shown in FIG. 2, the alignment film 1 for aligning the liquid crystal 35 on the flattening insulating film 17 and the display electrode 18.
By forming 9, a so-called TFT substrate 10 is completed.

【0027】また、このTFT基板10に対向した対向
電極基板30には、赤(R)、緑(G)、青(B)等の
各色を呈する領域と、これら各色間に設けられたブラッ
クマトリクス32を配置したカラーフィルタ31と、そ
の保護膜34と、配向膜19が順に形成された対向電極
基板30を形成し、これらTFT基板10及び対向電極
基板30の周辺をシール接着剤で接着して両基板間の空
隙に液晶35を充填してLCDが完成する。
The counter electrode substrate 30 facing the TFT substrate 10 has regions exhibiting respective colors such as red (R), green (G), blue (B), and a black matrix provided between these colors. A counter electrode substrate 30 on which a color filter 31 on which a color filter 32 is disposed, a protective film 34 thereof, and an alignment film 19 are sequentially formed, and the periphery of the TFT substrate 10 and the counter electrode substrate 30 are bonded with a seal adhesive. The liquid crystal 35 is filled in the space between the two substrates to complete the LCD.

【0028】ここで、遮光膜100の形成領域について
説明する。
Here, the formation region of the light shielding film 100 will be described.

【0029】図3に、図1のTFTの近傍を拡大した拡
大図を示す。
FIG. 3 is an enlarged view in which the vicinity of the TFT of FIG. 1 is enlarged.

【0030】同図に示すように、ゲート電極11a,1
1bの両側には、低濃度領域(以下、「LDD領域」と
称する。)13LD(添字a,b,c,dを付与)が設
けられている。
As shown in FIG. 3, the gate electrodes 11a, 1
On both sides of 1b, a low concentration region (hereinafter, referred to as an “LDD region”) 13LD (subscripts a, b, c, and d are provided) is provided.

【0031】このとき、平面的に見て、遮光膜100
は、各LDD領域13LD及びゲート電極11a,11
bを覆うように形成されている。またその遮光膜100
の周辺の端部は、LDD領域13LDの外側、即ちゲー
ト電極11a側においてはドレイン電極16とLDD領
域13LDaとの間に位置し、ゲート電極11b側にお
いてはソース電極14とLDD領域13LDdとの間に
位置するように形成されている。ゲート電極11aとゲ
ート電極11bとの間においては、LDD領域13LD
b,13LDc、及びこのLDD領域13LDbと13
LDcとの間を覆っている。
At this time, the light-shielding film 100
Are the LDD regions 13LD and the gate electrodes 11a and 11d.
b. Also, the light shielding film 100
Is located outside the LDD region 13LD, that is, between the drain electrode 16 and the LDD region 13LDa on the gate electrode 11a side, and between the source electrode 14 and the LDD region 13LDd on the gate electrode 11b side. Is formed. LDD region 13LD is provided between gate electrode 11a and gate electrode 11b.
b, 13LDc and the LDD regions 13LDb and 13LDc
LDc.

【0032】このように、LDD領域13LD、特にL
DD領域13LDと、ソース領域13s及びドレイン領
域13dとの間の領域まで覆うようにすることにより、
図2に示すように、LDD領域と、ソース領域13s及
びドレイン領域13dとの間の接合面で電界集中が起こ
りそこに光Lが入射してきても、遮光膜100によって
その光Lは遮られて接合面に照射されることはない。従
って、接合面への光照射によるTFTのオフ電流の増大
を防止することができる。
As described above, the LDD region 13LD, especially L
By covering the region between the DD region 13LD and the source region 13s and the drain region 13d,
As shown in FIG. 2, even when light L is incident on the junction surface between the LDD region and the source region 13s and the drain region 13d, the light L is blocked by the light shielding film 100. There is no irradiation on the joint surface. Therefore, it is possible to prevent an increase in off-state current of the TFT due to light irradiation on the bonding surface.

【0033】また、レーザ光照射による多結晶化の際
に、非晶質シリコン膜下層の遮光膜にレーザ光の熱が吸
収されてしまい、能動層の遮光膜と重畳した領域におい
ては結晶粒径が小さくなる。即ち、遮光膜上かガラス基
板上かによって結晶粒径が異なっていた。
Further, during polycrystallization by laser light irradiation, the heat of the laser light is absorbed by the light-shielding film below the amorphous silicon film, and the crystal grain size overlaps with the light-shielding film of the active layer. Becomes smaller. That is, the crystal grain size was different depending on whether it was on the light shielding film or the glass substrate.

【0034】そのため、従来においては、レーザーエネ
ルギーを大きくしてチャネル領域の粒径を大きくしてい
くと、ガラス上の粒径が逆に小さくなってしまうので、
チャネル領域の結晶粒径を大きくすることができず、結
晶粒径が小さいと粒界が増大し電界移動度が小さくなり
TFT特性が低下してしまうという欠点、及び、低濃度
に不純物を注入したLDD領域の抵抗値は、多結晶シリ
コン膜内の結晶粒径の大小によって大きく変動し不安定
であり、遮光膜の端部がLDD領域の途中、即ちLDD
領域を完全に覆っていない場合には、LDD領域内で結
晶粒径が変化することにより、シート抵抗の変動が大き
くなりTFT特性の変動も大きくなるという欠点があっ
た。
For this reason, conventionally, if the laser energy is increased to increase the particle size of the channel region, the particle size on the glass will be conversely reduced.
The crystal grain size of the channel region cannot be increased, and when the crystal grain size is small, the grain boundaries increase, the electric field mobility decreases, and the TFT characteristics deteriorate, and impurities are implanted at a low concentration. The resistance value of the LDD region fluctuates greatly depending on the size of the crystal grain in the polycrystalline silicon film and is unstable.
When the region is not completely covered, the crystal grain size changes in the LDD region, so that there is a drawback that the fluctuation of the sheet resistance increases and the fluctuation of the TFT characteristics also increases.

【0035】しかし、本発明のように、遮光膜100を
LDD領域13LDを覆ってしまうことにより、レーザ
光による多結晶化を行った場合にも、チャネル領域13
cとLDD領域13LDとの結晶粒径は同じであるた
め、従来のような不具合は生じることがない。
However, since the light-shielding film 100 covers the LDD region 13LD as in the present invention, even when polycrystallization by laser light is performed, the channel region 13LD can be formed.
Since the crystal grain size of c and the LDD region 13LD is the same, the conventional problem does not occur.

【0036】以上のように、本発明によれば、チャネル
13cとLDD領域13LDとの接合面において光り照
射によるオフ電流の増大を防止することができるととも
に、両領域13c,13LDにおける結晶粒径を均一に
することができる。
As described above, according to the present invention, it is possible to prevent an increase in off-state current due to light irradiation at the junction between the channel 13c and the LDD region 13LD, and to reduce the crystal grain size in both regions 13c and 13LD. It can be uniform.

【0037】また、それによって、良好な表示が得られ
る表示装置を得ることができる。
In addition, it is possible to obtain a display device capable of obtaining a good display.

【0038】なお、上述の各実施の形態においては、本
発明のTFTを備えた表示装置としてLCDについて説
明したが、本発明はそれに限定されるものではなく、例
えば有機EL(Electro Luminescence)表示装置の有機
EL素子のスイッチング素子やセンサー等の半導体デバ
イスとして採用しても本発明の効果を得ることができ
る。
In each of the above embodiments, the LCD has been described as a display device having the TFT of the present invention. However, the present invention is not limited to this. For example, an organic EL (Electro Luminescence) display device The effects of the present invention can be obtained even when the present invention is adopted as a semiconductor device such as a switching element or a sensor of an organic EL element.

【0039】[0039]

【発明の効果】本発明によれば、界集中した接合面に光
が照射されることを防止するとともに、能動層である多
結晶シリコン膜中の結晶粒径が大きく均一なTFTを得
ることができる。
According to the present invention, it is possible to prevent the irradiation of light to the junction surface where the field is concentrated and to obtain a TFT having a large crystal grain size in the polycrystalline silicon film as the active layer. it can.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施形態を示すLCDの平面図であ
る。
FIG. 1 is a plan view of an LCD showing an embodiment of the present invention.

【図2】本発明の実施形態を示すLCDの断面図であ
る。
FIG. 2 is a cross-sectional view of an LCD showing an embodiment of the present invention.

【図3】本発明のTFTの一部拡大平面図である。FIG. 3 is a partially enlarged plan view of the TFT of the present invention.

【図4】従来のLCDの平面図である。FIG. 4 is a plan view of a conventional LCD.

【図5】従来のLCDの断面図である。FIG. 5 is a cross-sectional view of a conventional LCD.

【図6】TFTの特性を示す特性図である。FIG. 6 is a characteristic diagram showing characteristics of a TFT.

【符号の説明】[Explanation of symbols]

10 絶縁性基板 11 ゲート電極 12 ゲート絶縁膜 13 能動層 13s ソース 13d ドレイン 13c チャネル 13LD LDD領域 15 層間絶縁膜 17 平坦化絶縁膜 18 表示電極 30 対向電極基板 31 対向電極 35 液晶 100 遮光膜 DESCRIPTION OF SYMBOLS 10 Insulating substrate 11 Gate electrode 12 Gate insulating film 13 Active layer 13s Source 13d Drain 13c Channel 13LD LDD region 15 Interlayer insulating film 17 Flattening insulating film 18 Display electrode 30 Counter electrode substrate 31 Counter electrode 35 Liquid crystal 100 Light shielding film

───────────────────────────────────────────────────── フロントページの続き Fターム(参考) 2H092 JA25 JA31 JA32 JA46 JB42 JB51 JB58 KA04 KA12 KA18 KB25 MA30 NA22 NA24 5F110 AA01 AA06 AA30 BB02 CC02 DD02 DD03 DD13 DD14 DD17 EE04 EE28 FF02 FF03 FF09 GG02 GG13 GG26 HJ01 HJ13 HL03 HM15 NN03 NN23 NN24 NN46 NN72 PP03 QQ11 QQ19 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H092 JA25 JA31 JA32 JA46 JB42 JB51 JB58 KA04 KA12 KA18 KB25 MA30 NA22 NA24 5F110 AA01 AA06 AA30 BB02 CC02 DD02 DD03 DD13 DD14 DD17 EE04 EE28 FF02 FF03 GG03 GG09 GG09 NN03 NN23 NN24 NN46 NN72 PP03 QQ11 QQ19

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 絶縁性基板上に不透明金属から成る遮光
膜を備えており、該遮光膜の上層に、非単結晶半導体膜
にレーザ光を照射して多結晶化した半導体膜と、該多結
晶半導体膜と絶縁膜を介して形成されたゲート電極とを
有したLDD構造を有する薄膜トランジスタであって、 前記遮光膜は、前記ゲート電極と平面的に重畳したチャ
ネル領域と、該チャネル領域の両側に設けられた低濃度
領域とを、平面的に覆っていることを特徴とする薄膜ト
ランジスタ。
1. A light-shielding film made of an opaque metal is provided on an insulating substrate, and a semiconductor film obtained by irradiating a non-single-crystal semiconductor film with a laser beam to be polycrystallized is formed on the light-shielding film. What is claimed is: 1. A thin film transistor having an LDD structure including a crystalline semiconductor film and a gate electrode formed with an insulating film interposed therebetween, wherein the light-shielding film has a channel region planarly overlapping the gate electrode, and both sides of the channel region. Wherein the low-concentration region provided in the thin film transistor is planarly covered.
【請求項2】 絶縁性基板上に不透明金属から成る遮光
膜を備えており、該遮光膜の上層に、非単結晶半導体膜
にレーザ光を照射して多結晶化した半導体膜と、該多結
晶半導体膜と絶縁膜を介して形成されたゲート電極とを
有したLDD構造を有する薄膜トランジスタであって、 前記遮光膜のチャネル長方向の幅は、前記ゲート電極と
平面的に重畳したチャネル領域のチャネル長と、該チャ
ネル領域の両側に設けられた低濃度領域の長さとの合計
よりも大きいことを特徴とする薄膜トランジスタ。
2. A light-shielding film made of an opaque metal is provided on an insulating substrate, and a semiconductor film obtained by irradiating a non-single-crystal semiconductor film with a laser beam and polycrystallizing the light-shielding film on the light-shielding film. A thin film transistor having an LDD structure including a crystalline semiconductor film and a gate electrode formed with an insulating film interposed therebetween, wherein a width of the light-shielding film in a channel length direction is equal to a width of a channel region overlapping the gate electrode in a plane. A thin film transistor which is larger than a sum of a channel length and lengths of low concentration regions provided on both sides of the channel region.
【請求項3】 前記遮光膜の端部は、前記低濃度領域の
外側に形成されたソース領域又はドレイン領域と重畳し
ていることを特徴とする請求項1又は2に記載の薄膜ト
ランジスタ。
3. The thin film transistor according to claim 1, wherein an end of the light-shielding film overlaps a source region or a drain region formed outside the low-concentration region.
【請求項4】 絶縁性基板上に不透明金属から成る遮光
膜を備えており、該遮光膜の上層に、非単結晶半導体膜
にレーザ光を照射して多結晶化した半導体膜と、該多結
晶半導体膜と絶縁膜を介して形成されたゲート電極とを
有したLDD構造を有する薄膜トランジスタを備えた表
示装置であって、 前記遮光膜は、前記ゲート電極と平面的に重畳したチャ
ネル領域と、該チャネル領域の両側に設けられた低濃度
領域とを、平面的に覆った薄膜トランジスタを備えたこ
とを特徴とする表示装置。
4. A light-shielding film made of an opaque metal is provided on an insulating substrate, and a semiconductor film obtained by irradiating a non-single-crystal semiconductor film with a laser beam to form a polycrystal, A display device including a thin film transistor having an LDD structure including a crystalline semiconductor film and a gate electrode formed with an insulating film interposed therebetween, wherein the light-shielding film includes a channel region that overlaps the gate electrode in a plane. A display device comprising: a thin film transistor that covers a low-concentration region provided on both sides of the channel region in a planar manner.
【請求項5】 絶縁性基板上に不透明金属から成る遮光
膜を備えており、該遮光膜の上層に、非単結晶半導体膜
にレーザ光を照射して多結晶化した半導体膜と、該多結
晶半導体膜と絶縁膜を介して形成されたゲート電極とを
有したLDD構造を有する薄膜トランジスタを備えた表
示装置であって、 前記遮光膜のチャネル長方向の幅は、前記ゲート電極と
平面的に重畳したチャネル領域のチャネル長と、該チャ
ネル領域の両側に設けられた低濃度領域の長さとの合計
よりも大きい薄膜トランジスタを備えたことを特徴とす
る表示装置。
5. A light-shielding film made of an opaque metal is provided on an insulating substrate, and a semiconductor film obtained by irradiating a non-single-crystal semiconductor film with a laser beam to be polycrystallized is provided above the light-shielding film. A display device including a thin film transistor having an LDD structure including a crystalline semiconductor film and a gate electrode formed with an insulating film interposed therebetween, wherein a width of the light shielding film in a channel length direction is planar with respect to the gate electrode. A display device, comprising: a thin film transistor which is larger than a sum of a channel length of a superposed channel region and lengths of low concentration regions provided on both sides of the channel region.
【請求項6】 前記遮光膜の端部は、前記低濃度領域の
外側に形成されたソース領域又はドレイン領域と重畳し
ている薄膜トランジスタを備えたことを特徴とする請求
項4又は5に記載の表示装置。
6. The light-shielding film according to claim 4, wherein an end portion of the light-shielding film includes a thin film transistor overlapping a source region or a drain region formed outside the low-concentration region. Display device.
JP2000094068A 2000-03-30 2000-03-30 Thin-film transistor and display device Pending JP2001284594A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000094068A JP2001284594A (en) 2000-03-30 2000-03-30 Thin-film transistor and display device

Publications (1)

Publication Number Publication Date
JP2001284594A true JP2001284594A (en) 2001-10-12

Family

ID=18609163

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
JP (1) JP2001284594A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011187931A (en) * 2010-02-15 2011-09-22 Nec Lcd Technologies Ltd Thin-film transistor, method of manufacturing the same, display device, and electronic device
US8604579B2 (en) 2008-12-05 2013-12-10 Sharp Kabushiki Kaisha Semiconductor device, and method for manufacturing same
JP2014160268A (en) * 2014-04-14 2014-09-04 Japan Display Inc Liquid crystal display device
WO2021073253A1 (en) * 2019-10-18 2021-04-22 京东方科技集团股份有限公司 Thin film transistor and manufacturing method therefor, array substrate, and display apparatus

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8604579B2 (en) 2008-12-05 2013-12-10 Sharp Kabushiki Kaisha Semiconductor device, and method for manufacturing same
JP2011187931A (en) * 2010-02-15 2011-09-22 Nec Lcd Technologies Ltd Thin-film transistor, method of manufacturing the same, display device, and electronic device
US8334553B2 (en) 2010-02-15 2012-12-18 Nlt Technologies, Ltd. Top gate thin-film transistor, display device, and electronic apparatus
US8912583B2 (en) 2010-02-15 2014-12-16 Nlt Technologies, Ltd. Top gate thin-film transistor, display device, and electronic apparatus
JP2014160268A (en) * 2014-04-14 2014-09-04 Japan Display Inc Liquid crystal display device
WO2021073253A1 (en) * 2019-10-18 2021-04-22 京东方科技集团股份有限公司 Thin film transistor and manufacturing method therefor, array substrate, and display apparatus
US11869976B2 (en) 2019-10-18 2024-01-09 Ordos Yuansheng Optoelectronics Co., Ltd. Thin film transistor and manufacturing method therefor, array substrate, and display device

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