JP2001283170A - Semiconductor memory and authenticating system using the same memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor memory capable of flexibly facilitating a countermeasure to plural interface specifications, and realizing inexpensive manufacture. SOLUTION: A semiconductor memory 1 is provided with a memory cell array 4 equipped with a format storage area 5 for storing the control data of plural kinds of input and output formats and a data storage area 6 and an input and output format control circuit 3 for recognizing the interface specification of an external system device 2, and for reading the control data of the input and output format suitable for the recognized specification of the interface from the format storage area 5, and for setting the interface programmable according to the control data.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device such as a memory card used as a small storage medium for storing images, sounds, music and the like.

[0002]

2. Description of the Related Art In recent years, various small memory cards equipped with flash memories have been commercialized as storage media for portable audio equipment, digital still cameras, portable personal computers, and the like.

[0003] The advantages of this type of small memory card are that it is small and lightweight, which makes it easy to make the memory card-equipped device compact, that it is electrically rewritable and that its stored contents are semi-permanent even when the power is turned off. To be preserved. When a conventional storage medium such as a floppy disk or MD (mini disk) is used, a space for incorporating a drive device such as a motor is required on the drive side, so there is no limit to miniaturizing a portable device. Was. Therefore, the demand for small-sized memory cards has increased sharply, especially with the recent spread of portable devices, and at present, competition for lower prices has occurred.

[0004]

However, the conventional small memory card has a problem that the interface specifications are different depending on the device on which the memory card is mounted. For example, there is a great difference between a serial interface that inputs and outputs data one bit at a time and a parallel interface that inputs and outputs data by a plurality of bits, for example, 8 bits and 16 bits. Therefore, at present, a flash memory LSI conforming to the interface specifications is prepared for each memory card. In the future, when a memory card having various interface specifications is put into practical use,
A serious problem may occur that the conventional device equipped with a memory card cannot cope with these specifications.

[0005] Competition for increasing the capacity of flash memory LSIs is also heating up. Although the cost of the flash memory LSI is reduced, the unit price per bit is higher than other storage media such as a floppy disk. In addition, when a flash memory LSI capable of supporting a plurality of interfaces is manufactured,
There is a problem that the manufacturing cost increases.

In view of the above problems, an object of the present invention is to provide a semiconductor memory device which can flexibly cope with a plurality of interface specifications and can be manufactured at low cost.

[0007]

In order to solve the above-mentioned problems,
The present inventor focused on the storage data structure of the memory cell array and made intensive studies, and as a result, arrived at the present invention.

That is, a semiconductor memory device according to the present invention recognizes a memory cell array having a format storage area storing control data of a plurality of types of input / output formats and an interface specification of the external system device. An input / output format control circuit that reads the control data of the input / output format conforming to the interface specification from the format storage area and sets its own interface specification to be programmable according to the control data. Things.

Here, the memory cell array has a data storage area in addition to the format storage area, and the data storage area includes an electrically non-rewritable non-volatile memory for storing large-capacity data, and a data write-once. And a rewritable nonvolatile memory.

Further, an authentication system using such a semiconductor storage device can be configured. That is, the authentication system according to the present invention includes the semiconductor storage device and an authentication device that authenticates the specified content of the semiconductor storage device, and the authentication device communicates with the memory via the input / output format control circuit. It is characterized in that the specified contents of the semiconductor memory device are authenticated based on the storage information obtained from the cell array.

[0011]

FIG. 1 is a schematic block diagram showing one embodiment of a semiconductor memory device according to the present invention.

As shown in FIG. 1, a semiconductor memory device 1 of the present embodiment is detachably connected to an interface (not shown) of an external system device 2. The external system device 2 is specifically a portable audio device, a digital camera, a personal computer, or the like. The external system device 2 causes the semiconductor storage device 1 to store, read, and execute various data such as music, voice, images, and program codes.

The semiconductor memory device 1 includes an input / output format control circuit 3 for converting control signals and data exchanged with the external system device 2 according to the interface of the external system device 2, and a memory cell array 4. And a data writing / reading unit 7. The data write / read unit 7 has a circuit group for writing data to the memory cell array 4 and reading data from the memory cell array 4.

The memory cell array 4 includes a plurality of memory chips (non-volatile or volatile storage elements) arranged in a matrix, and may be a single memory cell array or a plurality of memory cell arrays. May be done. As shown in FIG. 2, the memory cell array 4 has a format storage area 5 for storing control data of a plurality of types of input / output formats and a data storage area 6 for storing various data such as music, images, and program codes. And is divided into two. The data storage area 6 includes:
Furthermore, an electrically non-rewritable nonvolatile memory area 6a (hereinafter, referred to as a non-rewritable area) such as a mask ROM for storing large-capacity data, and an electrically rewritable flash memory or the like for additionally writing data. And a non-volatile memory area 6b (hereinafter, referred to as a rewritable area).

It should be noted that the present invention is not limited to the memory cell array 4 shown in FIG. 2, but may be, for example, one in which the data storage area 6 is entirely composed of only the rewritable area 6b as shown in FIG. As shown in b), the data storage area 6 may be entirely composed of only the non-rewritable area 6a.

The data write / read section 7 includes an address register 10, address buffers 11, 12, an X decoder 13, and a Y decoder 14. The address buffers 12 and 11 receive X- and Y-system address input signals for designating a cell selection address in the memory cell array 4 from the address register 10 via a data bus, respectively, and generate internal address signals. Then X
The decoder 13 receives the internal address signal from the address buffer 12 and selects one designated word line (X line). The Y decoder 14 receives the internal address signal from the address buffer 11 and selects a data line (Y Select the specified line from (line). As a result, the memory cell is selected.

The information stored in the memory cell is applied to a signal voltage generated when the information is transmitted to the bit line.
Amplified at 5 and held. Next, the information corresponding to the Y-system address signal is selected from the information held by the sense amplifier 15 by the gate circuit 16, taken into the output data latch 17, and sent to the external system device 2 through the input / output format control circuit 3. Is output.

When a command signal for instructing execution of a predetermined process is input from the external system device 2 to the input / output format circuit 3, the command signal is stored in the command register 18 and output to the control circuit 19. Control circuit 1
Reference numeral 9 denotes a status register 20, an address register 10, and a write data latch 2 for storing a status signal for confirming the internal state of the apparatus in response to the command signal.
1. Control the write control circuit 22 and the high voltage generation circuit 23. The high voltage generation circuit 23 switches the applied voltage in accordance with the operation mode, and generates a power supply voltage necessary for data reading, writing, erasing, and the like.

Further, the external system device 2 issues a control signal for controlling the memory cell array 4 and can control the memory cell array 4 via the external system device 2 by the control signal. Such control signals include a chip select signal for selecting a memory cell array to be accessed when there are a plurality of memory cell arrays, and a write / read control (Write / Read Strobe) for designating data reading or writing. And a write protect (write inhibit) signal.

The general-purpose I / O port 24 connected to the input / output format control circuit 3 for connecting to devices other than the external system device 2 and the semiconductor memory device 1 are turned on when the semiconductor memory device 1 is powered on. A power-on reset circuit 25 for resetting the output format control circuit 3,
And a reset terminal 26 are provided.

The input / output format control circuit 3 of the semiconductor memory device 1 recognizes the interface specification of the external system device 2 and sets the interface specification to the recognized interface specification. The setting procedure will be described below with reference to the flowchart of FIG.

First, when the semiconductor memory device 1 is connected to the external system device 2 (ST1), the input / output format control circuit 3 is reset (ST2). At this time, the input / output format control circuit 3 may be automatically reset by the power-on reset circuit 25 when the semiconductor memory device 1 is powered on, or may be reset by a reset input from the reset terminal 26. For example, when the semiconductor memory device 1 is connected to the external system device 2 by being supplied with a drive voltage from the external system device 2, the power is automatically turned on, and when the semiconductor memory device 1 is disconnected from the external system device 2, the power is automatically turned on. The power supply may be turned off.

Next, the input / output format control circuit 3
The interface specification of the external system device 2 is automatically recognized (ST3). As specific means of the automatic recognition,
A known technique, for example, pulling up or pulling down some connection terminals of the external system device 2 and combining the H and L of the voltage level when the input / output format control circuit 3 is powered on and reset when the power is turned on. , And the interface specification of the external system device 2 is recognized, that is, a technique called a strap can be used.

Next, the input / output format control circuit 3
The control data of the input / output format conforming to the recognized interface specification is automatically read from the format storage area 5 of the memory cell array 4 (ST4). That is, the input / output format control circuit 3 generates an address signal designating a cell selection address corresponding to the control data stored in the format storage area 5, transfers the address signal to the address buffers 11, 12, and The control data stored in the memory cell is amplified by the sense amplifier 15, selected by the gate circuit 16, and taken into the input / output format control circuit 3 through the output data latch 17.

Then, the interface of the input / output format control circuit 3 is programmed so as to match the interface of the external system device 2 by the input / output format control data (ST5). In this manner, the semiconductor memory device 1 can flexibly change its own interface according to the specifications of various interfaces such as a serial interface and a parallel interface.

The control data of the input / output format can specifically set an interface specification of a signal on a 16-bit common bus or an 8-bit common bus. For example, when setting up a serial interface, data input / output signals, clock signals, command signals,
The address signal, the order of data, the number of bytes, and the like are set. In addition, the setting of switching between enable and disable of control terminals such as the above-described chip select signal, write / read control signal, and write protect signal, general-purpose I / O
It is also possible to set an O port terminal, set a programmable command, and the like.

The control data of the input / output format from the external system device 2 is transferred to the memory cell array 4 described above.
Can be transferred to the format storage area 5 and stored. At this time, the control data may be transmitted to the semiconductor storage device 1 via a network or the like and written in the format storage area 5. As a result, control data of a new input / output format that the memory cell array 4 does not have can be rewritten, erased, or switched by external control.

The specific procedure is as follows. When a write command is input from the external system device 2, the input / output format control circuit 3 checks whether or not the memory cell array 4 is write-protected. If the memory cell array 4 is in the write-protected state, the write-inhibit process is executed. . Next, if the memory cell array 4 is not in the write protection state, the input / output format control circuit 3
According to the above-described procedure, the memory cell to be written is selected using the X decoder 13 and the Y decoder 14. Then, under the control of the control circuit 19, the high voltage generation circuit 23 generates a power supply voltage corresponding to the write mode, applies a voltage to the write data latch 21 and the write control circuit 22, and outputs the control data transferred from the external system device 2. It amplifies and writes to the designated memory cell.

When the memory cell array 4 is divided into a non-rewritable area 6a such as a mask ROM and a rewritable area 6b such as a flash memory as shown in FIG. 2, the non-rewritable area 6a It is preferable to allocate a storage area for relatively large-capacity data that requires a transfer time when a transfer time is required or passes through a network, and allocate a data additional recording area to the rewritable area 6b formed of a flash memory or the like. Since it takes a considerable amount of time to transmit a large amount of data such as a moving image through a network with a limited communication band, in such a case, a mask ROM represented by a low-cost and relatively large-capacity relatively easy-to-represent. A non-volatile memory is desirable.

For example, when the game application data is stored in the memory cell array 4, the basic data necessary for the progress of the game is stored in the non-rewritable area 6.
a, and when new characters (characters) and new scenes are required according to the progress of the game, new data is downloaded through a communication network or the like, and the downloaded data can be rewritten. It is preferable to additionally use the area 6b. By providing the data rewritable area 6b in the memory cell array 3 in this manner, applications such as games can be easily upgraded. In addition, the life of the application can be extended by the rewritable area 6b, and the development cost of a game requiring a large investment can be suppressed.

When music data is stored in the memory cell array 4, common data such as sound source data is stored in a non-rewritable area 6a composed of a large-capacity and low-cost mask ROM, and music score data is stored in a flash memory. If the data is downloaded to the rewritable area 6b composed of a memory and added, the music data having a relatively small capacity can be downloaded in a short time via the communication network. At the same time, the traffic of the communication network when a large number of users use the semiconductor memory device according to the present invention can be reduced.

The semiconductor memory device according to the present invention may be applied to an authentication memory card. For example, as schematically shown in FIG. 5, control data in an input / output format suitable for interfaces of various authentication devices are stored in a format storage area 5 of the memory cell array 4, and an authentication data is stored in a data storage area 6. The personal information of the authorized user of the authentication memory card, such as an ID for unlocking the device, a key such as a password and an encryption key, an image and a sound, is stored.

Since the stored information cannot be read by the memory cell array 4 alone, unless the interface specifications of the authentication device are compatible with the control data stored in the format storage area 5 of the memory cell array 4, the authentication memory is not used. It is impossible to read the personal information on the card. Therefore, the interface specification of the authentication device can be used as a secret key. For example, the face image data of the owner of the authentication memory card is stored in the data storage area 6, and the face image read by the authentication device is compared with the actual face of the owner, and Can be checked whether or not the user is an authorized user of the memory card. Even if the authentication memory card is lost or stolen, the risk of forgery is low, so that an extremely secure authentication memory card can be manufactured. The authentication target is not limited to a human, and may be any object as long as the content is specified by an authentication memory card such as a pet.

If no data additional area is provided in the memory cell array of the authentication memory card, the write operation of the write data latch 21 and the write control circuit 22 among the circuit configuration in the data write / read section 7 is performed. Necessary components are not required.

Next, FIG. 6 shows a configuration example of the authentication memory card 30 and the authentication device 35, and a more specific application example will be described below. As shown in FIG. 6, processing is performed on an authentication memory card 30 including a memory cell array 4, an input / output format control circuit 3, and a data write / read unit 7 having substantially the same configuration as that of the semiconductor storage device 1 described above. An authentication device 35 having a unit 31, an interface 32, an input unit 33, and a user authentication unit 34 is prepared.
In the data storage area 6 of the memory cell array 4 composed of the mask ROM, as shown in FIG.
Personal information such as a password, a face image, and voice is stored.

An example of an authentication procedure using such an authentication memory card 30 will be described below. As shown in the flowchart of FIG. 7, first, the authentication memory card according to the present embodiment is inserted into the slot of the
5 (ST20).

Next, the input / output format control circuit 3 recognizes the specification of the interface 32 of the authentication device 35 (ST21), and the interface specification conforms to the control data stored in the format storage area 5 of the memory cell array 4. A check is made to determine whether or not the authentication is to be performed (ST22). If the control data does not conform to the interface specifications, authentication end processing is executed (ST23).

On the other hand, if the control data is compatible with the interface, the input / output format control circuit 3
The control data of the input / output format stored in the format storage area 5 is read by the procedure of step ST4 in FIG. 4 (ST24), and the interface of the input / output format control circuit 3 is set by the control data (ST25).

Next, the input / output format control circuit 3 reads out the personal information such as the ID, password, voice and face image of the authorized user stored in the data storage area 5 of the memory cell array 4 (ST26), and the authentication device 35 Output to The authentication device 35 that has obtained the personal information prompts the user of the authentication memory card to input an ID and a password, and the user inputs the ID and the password through the input unit 33 including a keyboard (S).
T27).

Next, the user authentication means 34 collates the ID and password obtained as personal information in step ST26 with the entered ID and password (ST28). Authentication termination processing is performed (ST23).

On the other hand, if the ID and the password match, the authentication device 35 reads out the personal information such as the face image and voice of the authorized user from the authentication memory card 30 (ST29). The user information such as a face image and a voice of the user is fetched through a device (not shown) (ST29).
Then, a process of extracting characteristic lines (nose lines, eyes and mouth lines, etc.) of the face image and voiceprint data of the voice is executed, and pattern matching is performed between the voiceprint of the user and the legitimate user and the characteristic line of the face photograph (ST31). ). If the voiceprints and characteristic lines do not match, authentication end processing is executed (ST23). If the voiceprints and characteristic lines match, the user is authenticated as a regular user, and a series of processing ends.

Incidentally, keys such as an encryption key, a public key and a decryption key may be stored in the data storage area 6 of the memory card 33 for authentication. For example, when the user refers to highly confidential encrypted information stored in the authentication device 35,
The authentication device 35 reads the decryption key stored in the memory cell array of the authentication memory card 33, decrypts the encrypted information by using the decryption key, and can present the decrypted information to the user. Further, the authentication device 35 can read out the public key or the encryption key and use it to encrypt the plaintext information. This makes it possible for an authorized user to obtain a simple and highly secure authentication memory card because there is no need to store the key.

[0043]

As described above, according to the semiconductor memory device of the first aspect, from among a plurality of types of control data stored in the format storage area of the memory cell array, control data conforming to the interface specifications of the external system device. And the control data can match the interface of the semiconductor memory device with that of the external system. Therefore, it is possible to flexibly cope with a plurality of interface specifications of the external system device without requiring a complicated circuit configuration. Thus, a semiconductor memory device which can be manufactured at low cost can be obtained.

Further, according to the semiconductor memory device of the present invention, the large-capacity data is stored in the non-rewritable nonvolatile memory, and the relatively small-capacity data such as the correction data of the large-capacity data or the additional recording data is stored. Since data can be stored in a rewritable nonvolatile memory, data can be updated efficiently in a short time. In particular, when data transmission is performed on a network with a limited communication band, it is possible to reduce network traffic.

According to the authentication system of the third aspect, it is difficult to retrieve the stored information unless the interface specification of the authentication device matches the control data stored in the format storage area of the memory cell array. Thus, an authentication system with high security can be obtained.

[Brief description of the drawings]

FIG. 1 is a schematic block diagram showing one embodiment of a semiconductor memory device according to the present invention.

FIG. 2 is an explanatory diagram schematically showing an example of a memory cell array according to the present invention.

FIG. 3 is an explanatory view schematically showing another example of the memory cell array according to the present invention.

FIG. 4 is a flowchart showing a procedure for matching the interfaces of both the input / output format control circuit and the external system device.

FIG. 5 is an explanatory diagram showing a configuration example of data stored in a memory cell array of an authentication memory card.

FIG. 6 is a schematic block diagram illustrating a configuration example of an authentication memory card and an authentication device.

FIG. 7 is a flowchart showing an outline of an authentication procedure using an authentication memory card.

[Explanation of symbols]

 Reference Signs List 1 semiconductor storage device 2 external system device 3 input / output format control circuit 4 memory cell array 5 format storage area 6 data storage area 6a non-rewritable area 6b rewritable area 30 authentication memory card 31 processing unit 32 interface 33 input means 34 user authentication means

Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat II (reference) G11C 17/00 601P 601U F term (reference) 5B017 AA01 BA05 BA07 CA11 CA12 CA14 CA16 5B018 GA10 HA26 JA26 MA24 NA06 QA11 RA11 5B025 AD00 AE00 AE10 5B035 BB09 BC05 CA11 5B058 CA23

Claims (3)

[Claims] A memory cell array having a format storage area storing control data of a plurality of types of input / output formats; and an input / output format adapted to recognize an interface specification of the external system device and conform to the recognized interface specification. A read / write format control circuit for reading out the control data from the format storage area and setting its own interface specifications in a programmable manner by the control data. 2. The memory cell array further comprises a data storage area in addition to the format storage area, wherein the data storage area includes an electrically non-rewritable nonvolatile memory for storing a large amount of data, 2. The semiconductor memory device according to claim 1, comprising a rewritable nonvolatile memory. 3. An authentication system comprising a semiconductor memory device and an authentication device for authenticating specified contents of the semiconductor memory device, wherein the semiconductor memory device stores control data of a plurality of input / output formats. A memory cell array having a format storage area, recognizing an interface specification of the authentication device, reading the control data of the input / output format conforming to the recognized interface specification from the format storage area, and An input / output format control circuit that sets the interface specifications of the semiconductor memory device based on storage information obtained from the memory cell array via the input / output format control circuit. Characterize specified contents Authentication system.