JP2001282463A5 - - Google Patents
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- Publication number
- JP2001282463A5 JP2001282463A5 JP2001048235A JP2001048235A JP2001282463A5 JP 2001282463 A5 JP2001282463 A5 JP 2001282463A5 JP 2001048235 A JP2001048235 A JP 2001048235A JP 2001048235 A JP2001048235 A JP 2001048235A JP 2001282463 A5 JP2001282463 A5 JP 2001282463A5
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/515,046 US6801954B1 (en) | 2000-02-25 | 2000-02-25 | Method and apparatus to concurrently operate on multiple data movement transactions in a disk array subsystem |
| US09/515046 | 2000-02-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001282463A JP2001282463A (ja) | 2001-10-12 |
| JP2001282463A5 true JP2001282463A5 (enExample) | 2007-08-02 |
Family
ID=24049756
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001048235A Withdrawn JP2001282463A (ja) | 2000-02-25 | 2001-02-23 | 複数のデータ移動トランザクションを並行に操作する装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6801954B1 (enExample) |
| EP (1) | EP1128253A3 (enExample) |
| JP (1) | JP2001282463A (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7107343B2 (en) * | 2001-07-12 | 2006-09-12 | Adaptec, Inc. | Method and apparatus for improved RAID 1 write performance in low cost systems |
| JP2003030018A (ja) * | 2001-07-13 | 2003-01-31 | Sony Corp | データ通信装置および方法、データ通信システム、情報処理装置および方法、記録媒体、並びにプログラム |
| US7293196B2 (en) * | 2002-05-08 | 2007-11-06 | Xiotech Corporation | Method, apparatus, and system for preserving cache data of redundant storage controllers |
| US7275084B2 (en) * | 2002-05-28 | 2007-09-25 | Sun Microsystems, Inc. | Method, system, and program for managing access to a device |
| US7453888B2 (en) * | 2002-08-27 | 2008-11-18 | Alcatel Lucent | Stackable virtual local area network provisioning in bridged networks |
| US20040111537A1 (en) * | 2002-12-05 | 2004-06-10 | Intel Corporation | Method, system, and program for processing operations |
| US20100229029A1 (en) * | 2009-03-06 | 2010-09-09 | Frazier Ii Robert Claude | Independent and dynamic checkpointing system and method |
| US20130304970A1 (en) * | 2012-04-20 | 2013-11-14 | Stec, Inc. | Systems and methods for providing high performance redundant array of independent disks in a solid-state device |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5392244A (en) | 1993-08-19 | 1995-02-21 | Hewlett-Packard Company | Memory systems with data storage redundancy management |
| DE69523124T2 (de) | 1994-12-15 | 2002-05-29 | Hewlett-Packard Co. (N.D.Ges.D.Staates Delaware), Palo Alto | Fehlererkennungssystem für einen gespiegelten Speicher in einer duplizierten Steuerung eines Plattenspeicherungssystems |
| US5638531A (en) * | 1995-06-07 | 1997-06-10 | International Business Machines Corporation | Multiprocessor integrated circuit with video refresh logic employing instruction/data caching and associated timing synchronization |
| US5812803A (en) * | 1995-09-29 | 1998-09-22 | Intel Corporation | Method and apparatus for controlling data transfers between a bus and a memory device using a multi-chip memory controller |
| US6108735A (en) * | 1995-09-29 | 2000-08-22 | Intel Corporation | Method and apparatus for responding to unclaimed bus transactions |
| US5687390A (en) * | 1995-11-14 | 1997-11-11 | Eccs, Inc. | Hierarchical queues within a storage array (RAID) controller |
| US5787304A (en) * | 1996-02-05 | 1998-07-28 | International Business Machines Corporation | Multipath I/O storage systems with multipath I/O request mechanisms |
| US5983326A (en) * | 1996-07-01 | 1999-11-09 | Sun Microsystems, Inc. | Multiprocessing system including an enhanced blocking mechanism for read-to-share-transactions in a NUMA mode |
| US6260096B1 (en) * | 1999-01-08 | 2001-07-10 | Intel Corporation | Read latency across a bridge |
| US6134630A (en) * | 1997-11-14 | 2000-10-17 | 3Ware | High-performance bus architecture for disk array system |
| US6298407B1 (en) * | 1998-03-04 | 2001-10-02 | Intel Corporation | Trigger points for performance optimization in bus-to-bus bridges |
| US6425041B1 (en) * | 1998-06-05 | 2002-07-23 | Micron Technology, Inc. | Time-multiplexed multi-speed bus |
| US6230240B1 (en) * | 1998-06-23 | 2001-05-08 | Hewlett-Packard Company | Storage management system and auto-RAID transaction manager for coherent memory map across hot plug interface |
| US6240479B1 (en) * | 1998-07-31 | 2001-05-29 | Motorola, Inc. | Method and apparatus for transferring data on a split bus in a data processing system |
| US6122723A (en) * | 1998-08-20 | 2000-09-19 | International Business Machines Corporation | Switching multi-initiator SCSI devices to a singular target bus |
| US6418518B1 (en) * | 1998-09-18 | 2002-07-09 | National Semiconductor Corporation | Decoupled address and data access to an SDRAM |
| TW514788B (en) * | 1999-04-23 | 2002-12-21 | Via Tech Inc | Method of delayed transaction in bus system and device using the method |
-
2000
- 2000-02-25 US US09/515,046 patent/US6801954B1/en not_active Expired - Lifetime
- 2000-09-28 EP EP00121113A patent/EP1128253A3/en not_active Withdrawn
-
2001
- 2001-02-23 JP JP2001048235A patent/JP2001282463A/ja not_active Withdrawn