JP2001274421A - Compound semiconductor device and producing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a compound semiconductor infrared imaging device with which a dark current is a small and further uniformity in sensitivity for each pixel is satisfactory. SOLUTION: Concerning the compound semiconductor device with which a diffusing area containing a second electro-conductive impurity is cyclically located on the surface area of a first electro-conductive compound semiconductor, a diffusion blocking area containing a second electro-conductive impurity different from the impurity contained in the diffusing area is provided in the lateral periphery and/or on the bottom of the diffusion area.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a compound semiconductor device having sensitivity to infrared rays and a method of manufacturing the same, and more particularly to a compound semiconductor infrared imaging device and a method of manufacturing the same.

[0002]

2. Description of the Related Art As an image sensor having sensitivity in the infrared region, an image sensor using InSb, an image sensor using HgCdTe, a Schottky barrier type image sensor, and the like are known. Among these, the imaging element using HgCdTe changes the band gap depending on the value of x of Hg _1-x Cd _x Te, can change the cutoff wavelength, and has a high quantum efficiency of 70% or more. Most attention has been paid to infrared semiconductor imaging devices.

Hereinafter, referring to FIG. 7, Hg _1-x Cd _x T
The conventional technology will be described using an e-infrared device as an example. As shown in FIG. 7, the HgCdTe infrared imaging device is a substrate 1 of p-type Hg _1-x Cd _x Te (x = 0.23).
In addition, using boron as an ion species, an acceleration voltage of 140 keV,
It is formed by implanting ions under the condition of a dose of 1 × 10 ¹⁴ cm ⁻² and arranging and forming a large number of n ⁺ regions 3.

After the n ⁺ region 3 is formed, the substrate is heated at 150 ° C. to remove a damaged layer remaining on the substrate 1 after ion implantation.
After performing a heat treatment for a long time, a protective film 4 is formed, and then an electrode 5 is formed, thereby obtaining an Hg _1-x Cd _x Te infrared device.

However, according to such an infrared device,
For example, a report by Ebe et al. (Journal of Cry)
stal Growth Vol. 184/185 (1
998) p. According to 1223), the heat treatment for removing the damaged layer has a drawback in that the pn junction depth can be distributed, resulting in an increase in the junction area and an increase in the dark current of the photodiode. .

Further, p-type Hg _1-x Cd _x Te (x = 0.
Abnormal diffusion also occurs around the dislocations existing in the substrate 1 of (23), which has the disadvantage that the junction area increases and the dark current of the photodiode increases. Further, when an imaging device is formed by arranging a large number of the photodiodes two-dimensionally, there is a disadvantage that the characteristics of the pixels vary widely.

[0007]

As described above, the conventional H
The g _1-x Cd _x Te infrared device has poor junction depth uniformity, has a large dark current, and has a large variation in characteristics between pixels when the imaging device is formed in a two-dimensional array. It was very difficult to manufacture the infrared imaging device of the above.

[0008] The present invention has been made under such circumstances,
It is an object of the present invention to provide a high-performance compound semiconductor device having a small dark current and a small characteristic variation.

Another object of the present invention is to provide a method for producing a high-performance compound semiconductor device having a small dark current and a small characteristic variation.

[0010]

In order to solve the above-mentioned problems, a compound semiconductor device of the present invention has a diffusion region containing a second electric conduction type impurity in a surface region of a first electric conduction type compound semiconductor. In the periodically arranged compound semiconductor element, a diffusion blocking region including a second electric conductivity type impurity different from an impurity included in the diffusion region is provided adjacent to the diffusion region. Provided is a compound semiconductor device.

In such a compound semiconductor device, the diffusion blocking region is provided around the diffusion region in a lateral direction, and the diffusion blocking region includes an element having the largest atomic number among the elements constituting the compound semiconductor. Impurities having an ionic radius larger than the ionic radius are distributed, and impurities having an ionic radius smaller than the ionic radius of the element having the largest atomic number among the elements constituting the compound semiconductor are distributed in the diffusion region. I can do it.

A second electric conduction type diffusion blocking region is provided at the bottom of the diffusion region, and the ionic radius of the element having the largest atomic number among the elements constituting the compound semiconductor is provided in the diffusion blocking region. An impurity having a larger ionic radius is distributed, and an impurity having an ionic radius smaller than the ionic radius of the element having the largest atomic number among the elements constituting the compound semiconductor is distributed in the diffusion region. I can do it.

Further, a second electric conduction type diffusion blocking region is provided on the lateral periphery and bottom of the diffusion region, and the diffusion blocking region has the largest atomic number among the elements constituting the compound semiconductor. Impurities having an ionic radius larger than the ionic radius of the element are distributed, and in the diffusion region,
An impurity having an ionic radius smaller than the ionic radius of the element having the largest atomic number among the elements constituting the compound semiconductor can be distributed.

The compound semiconductor used in the present invention may contain mercury. As a compound semiconductor containing mercury, Hg _1-x Cd _x Te (x = 0.16-0.
It is preferable to use 3).

The present invention also relates to a method of manufacturing a compound semiconductor device in which a diffusion region containing a second electric conduction type impurity is periodically arranged in a surface region of a first electric conduction type compound semiconductor. Forming a diffusion blocking region by ion-implanting a second electrical conductivity type impurity different from the impurity contained in the diffusion region into a region adjacent to the region to be formed, and forming the diffusion region Provided is a method for manufacturing a compound semiconductor device, which includes a step of forming a diffusion region by ion-implanting a second electrically conductive impurity into a predetermined region.

According to the present invention configured as described above,
Since the diffusion blocking region including the second electric conductivity type impurity different from the impurity included in the diffusion region is provided adjacent to the diffusion region, the impurity in the diffusion region is arranged in the lateral direction and / or the depth direction. Diffusion is prevented by the diffusion blocking region, so that the junction area is suppressed from increasing by making the pn junction depth constant, the dark current of the photodiode is small, and the compound semiconductor infrared ray has good sensitivity uniformity for each pixel. It is possible to obtain an imaging device.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, various embodiments of the present invention will be described. FIG. 1 is a sectional view schematically showing an infrared semiconductor device according to the first embodiment of the present invention. FIG.
In the infrared element shown in (1), a diffusion region 3 of the second conductivity type is provided in the surface region of the compound semiconductor substrate 1 of the first conductivity type.
Around the lateral direction, a diffusion blocking region 21 is provided. Further, a protective film 4 is formed on the substrate 1 around the diffusion region 3, and an electrode 5 is formed on the diffusion region 3.

As the compound semiconductor constituting the substrate, H
gCdTe, InP, InSb and the like can be used. Of these, HgCdTe is most preferred, and Hg _1-x C
The one represented by d _x Te (x = 0.16 to 0.3) is preferable.

The diffusion region is formed by causing the substrate 1 of the first conductivity type to contain impurities of the second conductivity type by ion implantation or the like. As the impurity of the second conductivity type included in the diffusion region, an impurity which acts as a donor to the compound semiconductor and has an ionic radius larger than the ionic radius of the element having the largest atomic number among the elements constituting the compound semiconductor is preferable. .

For example, when the compound semiconductor is HgCdTe, an element having an ionic radius smaller than the ionic radius of Hg which is the element having the largest atomic number among the elements constituting HgCdTe, for example, boron or aluminum can be used. The dose of the impurity of the second conductivity type contained in the diffusion region is 1 × 10 ¹² cm ⁻² to 1 × 10 ^2.
It is preferably ¹⁴ cm ^-2 .

The diffusion blocking region 21 is formed by incorporating impurities of the second conductivity type around the diffusion region 3 or the region where the diffusion region is to be formed by ion implantation or the like. The impurities of the second conductivity type contained in the diffusion blocking region 21 act as donors for the compound semiconductor and have an ionic radius larger than the ionic radius of the element having the largest atomic number among the elements constituting the compound semiconductor. preferable.

Such second conductivity type impurities include:
When the compound semiconductor is HgCdTe, HgCdTe
An element having an ionic radius larger than the ionic radius of Hg which is the element having the largest atomic number among the elements constituting
Argon, krypton, xenon, or the like can be used.

The second conductivity type impurities contained in the diffusion blocking region
The dose of the product is 1 × 10¹²cm ^-2~ 1 × 10¹⁴
cm^-2It is preferred that Substrate around diffusion region 3
1 is formed of ZnS (sub-sulphide).
Lead) can be used. As the electrode 5, indium
Can be used.

According to the infrared semiconductor device shown in FIG. 1 described above, the diffusion blocking region is provided around the diffusion region 3 in the lateral direction, so that the heat treatment for removing the damaged layer caused by the ion implantation is performed. In addition, diffusion of impurities in the diffusion region 3 in the lateral direction is prevented, whereby various inconveniences due to an increase in the junction area can be prevented.

FIG. 2 is a sectional view schematically showing an infrared semiconductor device according to a second embodiment of the present invention. In the infrared device shown in FIG. 2, a diffusion region 3 of the second conductivity type is provided in the surface region of the compound semiconductor substrate 1 of the first conductivity type, and a diffusion blocking region 22 is provided at the bottom thereof. Further, a protective film 4 is formed on the substrate 1 around the diffusion region 3, and further,
The electrode 5 is formed on the diffusion region 3.

According to the infrared semiconductor device shown in FIG. 2, since the diffusion blocking region 22 is provided at the bottom of the diffusion region 3, the diffusion region 3 is not heat-treated for removing a damaged layer caused by ion implantation. Diffusion of impurities therein in the depth direction is prevented, whereby various inconveniences due to an increase in the junction area can be prevented.

FIGS. 3 and 4 are cross-sectional views schematically showing an infrared semiconductor device according to a third embodiment of the present invention.
In the infrared device shown in FIGS. 3 and 4, the diffusion region 3 of the second conductivity type is provided in the surface region of the compound semiconductor substrate 1 of the first conductivity type, and the diffusion blocking region 21 is provided around the lateral direction thereof. In addition, a diffusion blocking region 22 is provided at the bottom. Further, a protective film 4 is formed on the substrate 1 around the diffusion region 3, and an electrode 5 is formed on the diffusion region 3.

According to the infrared semiconductor device shown in FIGS. 3 and 4, the diffusion blocking region 21 is provided around the diffusion region 3 in the lateral direction, and the diffusion blocking region 22 is also provided at the bottom. In the heat treatment for removing the damaged layer caused by the above, the diffusion of the impurity in the diffusion region 3 in both the lateral direction and the depth direction is prevented,
Thereby, various inconveniences associated with an increase in the bonding area can be more effectively prevented.

FIG. 5 is a plan view showing an image pickup device in which a large number of infrared semiconductor devices shown in FIGS. 1, 3 and 4 are arranged in a lattice. The number of imaging devices is usually 100, 200, 25
It is configured by arranging about 0 infrared semiconductor elements in a lattice. Each infrared semiconductor element is usually, for example,
It has a rectangular planar shape with one side of 10 μm, and the center-to-center distance between adjacent infrared semiconductor elements is, for example, 30 μm.

FIG. 6 is a plan view showing an image sensor in which a large number of octagonal planar infrared semiconductor devices are arranged in a lattice. By setting the planar shape of the infrared semiconductor element to a polygon as described above, an acute angle portion can be eliminated, so that electric field concentration at a corner can be prevented.

[0031]

EXAMPLES Examples of various specific manufacturing methods of the present invention will be described below.

EXAMPLE 1 The Hg _1-x Cd _x Te infrared device shown in FIG. 1 is manufactured as follows. First, p-type Hg _1-x Cd _x Te (x
= 0.23), around the region where the n ⁺ region 3 is to be formed, argon is ion-implanted into a rectangular frame-like pattern having a width of about 3 μm as an element having an ion radius larger than that of mercury. For example, the acceleration voltage for ion implantation is 50 keV, and the dose is 1 × 10 ¹⁴ cm ⁻² . By this ion implantation, the side wall 21 of the n ⁺ region is formed.

[0033] Then, the smaller boron than the ionic radius mercury formation region of the n ⁺ region 3, i.e., injected into the inner region of the side wall 21 by injecting argon ions previously, n ⁺
Region 3 is formed. As a result, a pn junction with a small spread of the pn junction boundary in the lateral direction is formed.

In order to remove the damaged layer remaining after the ion implantation, heat treatment is performed at 150 ° C. for about 1 hour, and then a protective film 4 made of ZnS (zinc sulfide) is formed on the substrate 1 around the n ⁺ region 3. Is formed, and an indium electrode 5 is formed on the n ⁺ region 3.

The Hg _1-x Cd _x thus formed
The current-voltage characteristics of the Te infrared element were measured at a liquid nitrogen temperature of 77 K while blocking the incidence of infrared light. As a result, the product of the resistance value at the time of 0 bias and the junction area value is 2
It was about ²⁰ Ω · cm ² .

Example 2 The Hg _1-x Cd _x Te infrared device shown in FIG. 2 is manufactured as follows. First, p-type Hg _1-x Cd _x Te (x
= 0.23) Argon is ion-implanted as an element having an ion radius larger than that of mercury over the entire region of the substrate 1 where the n ⁺ region 3 is to be formed. For example, the acceleration voltage for ion implantation is 100 keV, and the dose is 1 × 10 ¹⁴ cm ^−2.
A region 22 having a thickness of 1 μm is formed such that the upper surface forms the bottom surface of n ⁺ region 3.

Thereafter, a horn having an ion radius smaller than that of mercury is used.
Element, n⁺The region where the region 3 is to be formed, that is,
Ion implantation into a region shallower than ion implanted region 22
Then n ⁺Region 3 is formed. As a result, in the depth direction
Pn junction with a small spread of the pn junction boundary is formed.
You.

In order to remove the damaged layer remaining after the ion implantation, heat treatment is performed at 150 ° C. for about 1 hour, and then a protective film 4 made of ZnS (zinc sulfide) is formed on the substrate 1 around the n ⁺ region 3. Is formed, and an indium electrode 5 is formed on the n ⁺ region 3.

The Hg _1-x Cd _x thus formed
The current-voltage characteristics of the Te infrared element were measured at a liquid nitrogen temperature of 77 K while blocking the incidence of infrared light. As a result, the product of the resistance value at the time of 0 bias and the junction area value is 2
It was about 50 Ω · cm ² .

Example 3 The Hg _1-x Cd _x Te infrared device shown in FIG. 3 is manufactured as follows. First, p-type Hg _1-x Cd _x Te (x
= 0.23) Argon is ion-implanted as an element having an ion radius larger than that of mercury over the entire region of the substrate 1 where the n ⁺ region 3 is to be formed. For example, the acceleration voltage for ion implantation is 100 keV, and the dose is 1 × 10 ¹⁴ cm ^−2.
A region 22 having a thickness of 1 μm is formed such that the upper surface forms the bottom surface of n ⁺ region 3.

Next, p-type Hg _1-x Cd _x Te (x =
0.23) Argon is ion-implanted in a rectangular frame-like pattern having a width of about 3 μm as an element having an ion radius larger than that of mercury around the region where the n ⁺ region 3 is to be formed on the substrate 1. For example, the acceleration voltage for ion implantation is 50 keV, and the dose is 1 × 10 ¹⁴ cm ⁻² . By this ion implantation, the side wall 21 of the n ⁺ region is formed.

Thereafter, boron having an ion radius smaller than that of mercury is deposited in a region where the n ⁺ region 3 is to be formed, that is, in a region shallower than the region 22 into which argon ions have been implanted previously and on the side wall 2.
Ions are implanted into the region inside 1 to form an n ⁺ region 3. Thereby, pn in both the depth direction and the lateral direction is obtained.
A pn junction with a small extension of the junction boundary is formed.

In order to remove the damaged layer remaining after the ion implantation, heat treatment is performed at 150 ° C. for about one hour, and then a protective film 4 made of ZnS (zinc sulfide) is formed on the substrate 1 around the n ⁺ region 3. Is formed, and an indium electrode 5 is formed on the n ⁺ region 3.

The Hg _1-x Cd _x thus formed
The current-voltage characteristics of the Te infrared element were measured at a liquid nitrogen temperature of 77 K while blocking the incidence of infrared light. As a result, the product of the resistance value and the junction area value at 0 bias is 3
It was about 00 Ω · cm ² .

Embodiment 4 The Hg _1-x Cd _x Te infrared device shown in FIG. 4 is manufactured as follows. First, p-type Hg _1-x Cd _x Te (x
= 0.23), around the region where the n ⁺ region 3 is to be formed, argon is ion-implanted into a rectangular frame-like pattern having a width of about 3 μm as an element having an ion radius larger than that of mercury. For example, the acceleration voltage for ion implantation is 50 keV, and the dose is 1 × 10 ¹⁴ cm ⁻² . By this ion implantation, the side wall 21 of the n ⁺ region is formed.

Next, p-type Hg _1-x Cd _x Te (x =
0.23) over the entire region of the substrate 1 where the n ⁺ region 3 is to be formed, as an element having an ion radius larger than that of mercury,
Argon is ion-implanted. For example, the ion implantation acceleration voltage is 100 keV, the dose is 1 × 10 ¹⁴ cm ⁻² , and the region 22 having a thickness of about 1 μm is formed such that the upper surface forms the bottom surface of the n ⁺ region 3.

Thereafter, boron having an ion radius smaller than that of mercury is added to the region where the n ⁺ region 3 is to be formed, that is, the region inside the side wall 21 into which the argon ions have been implanted previously and the region 2.
Ions are implanted into a region shallower than 2 to form an n ⁺ region 3. Thereby, pn in both the lateral direction and the depth direction is obtained.
A pn junction with a small extension of the junction boundary is formed.

In order to remove the damaged layer remaining after the ion implantation, a heat treatment is performed at 150 ° C. for about 1 hour, and then a protective film 4 made of ZnS (zinc sulfide) is formed on the substrate 1 around the n ⁺ region 3. Is formed, and an indium electrode 5 is formed on the n ⁺ region 3.

The Hg _1-x Cd _x thus formed
The current-voltage characteristics of the Te infrared element were measured at a liquid nitrogen temperature of 77 K while blocking the incidence of infrared light. As a result, the product of the resistance value and the junction area value at 0 bias is 3
It was about 00 Ω · cm ² .

[0050]

As described above in detail, according to the present invention, since the diffusion blocking region is provided adjacent to the diffusion region, the impurity in the diffusion region can be removed in the lateral direction and / or the depth direction. Diffusion is prevented, so that the pn junction depth is kept constant, thereby suppressing an increase in junction area, preventing an increase in the dark current of the photodiode, and having a good sensitivity uniformity for each pixel. It is possible to obtain

[Brief description of the drawings]

FIG. 1 is a sectional view showing a compound semiconductor infrared device according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing a compound semiconductor infrared device according to a second embodiment of the present invention.

FIG. 3 is a sectional view showing a compound semiconductor infrared device according to a third embodiment of the present invention.

FIG. 4 is a sectional view showing a compound semiconductor infrared device according to a third embodiment of the present invention.

FIG. 5 is a plan view showing an imaging device in which a plurality of compound semiconductor infrared devices are arranged in a lattice.

FIG. 6 is a plan view showing an image sensor in which a plurality of octagonal planar compound semiconductor infrared devices are arranged in a grid pattern.

FIG. 7 is a sectional view showing a conventional compound semiconductor infrared device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Compound semiconductor substrate, 3 ... Diffusion area, 4 ... Protective film, 5 ... Electrode, 21, 22 ... Diffusion prevention area.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M118 AB01 CB09 5F088 AA03 AB09 AB17 BA04 BA10 BB03 CB10 CB11 FA05 GA03 GA05 HA12 LA01

Claims (7)

[Claims] 1. A compound semiconductor device in which a diffusion region containing a second electric conduction type impurity is periodically arranged in a surface region of a first electric conduction type compound semiconductor, wherein said diffusion region is adjacent to said diffusion region. A compound semiconductor device comprising: a diffusion blocking region including a second electric conductivity type impurity different from an impurity included in the diffusion region. 2. The diffusion blocking region is provided around the diffusion region in a lateral direction, and the diffusion blocking region has an ionic radius larger than an ionic radius of an element having the largest atomic number among elements constituting the compound semiconductor. The impurity having the following formula: is distributed, and the impurity having an ionic radius smaller than the ionic radius of the element having the largest atomic number among the elements constituting the compound semiconductor is distributed in the diffusion region. The compound semiconductor device according to any one of the preceding claims. 3. The diffusion blocking region is provided at a bottom of the diffusion region, and the diffusion blocking region has an ion radius larger than an ion radius of an element having the largest atomic number among elements constituting the compound semiconductor. 2. The impurity according to claim 1, wherein impurities are distributed, and impurities having an ion radius smaller than an ion radius of an element having the largest atomic number among elements constituting the compound semiconductor are distributed in the diffusion region. Compound semiconductor device. 4. A diffusion blocking region of a second electrical conductivity type is provided on the periphery and bottom of the diffusion region in the lateral direction, and the diffusion blocking region has the largest atomic number among the elements constituting the compound semiconductor. Impurities having an ionic radius larger than the ionic radius of the element are distributed, and impurities having an ionic radius smaller than the ionic radius of the element having the largest atomic number among the elements constituting the compound semiconductor are distributed in the diffusion region. The compound semiconductor device according to claim 1, wherein: 5. The compound semiconductor device according to claim 1, wherein said compound semiconductor contains mercury. 6. The compound semiconductor according to claim 1, wherein said compound semiconductor is Hg _1-x Cd _x Te.
The compound semiconductor device according to claim 5, wherein (x = 0.16 to 0.3). 7. A method for manufacturing a compound semiconductor device in which a diffusion region containing a second electric conduction type impurity is periodically arranged in a surface region of a first electric conduction type compound semiconductor. Forming a diffusion blocking region by ion-implanting a second electrical conductivity type impurity different from the impurity contained in the diffusion region into a region adjacent to the planned region, and a region where the diffusion region is to be formed Forming a diffusion region by ion-implanting a second electric conduction type impurity into the semiconductor device.