JP2001257215A - Field effect transistor and method of forming gate electrode - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a field effect transistor having a high withstand voltage, a small parasitic capacitance, and a good high-frequency characteristic. SOLUTION: This field effect transistor is composed of a compound semiconductor-based field effect transistor formed on a GaAs substrate 41 and has a gate electrode 52 electrically connected to the channel area (not shown in the figure) of the substrate 41 through an SiN film 42 formed on the substrate 41. The electrode 52 is formed as a T-shaped gate electrode composed of a conductive plug section 52a formed by filling up a gate opening 46, which is formed through the film 42 and in which the channel area (not shown) of the substrate 41 is exposed and a conductive extension 52b extended on the film 42 from the top of the plug section 52a. The electrode 52 is constituted as a laminated film of a gate electrode base film 48 formed by electron gun vapor deposition or sputtering and a gate electrode metallic layer 51 formed on the film 48 by electroplating. The peripheral section of the extended section 52b of the electrode 52 is separated from the SiN film 42 so that a gap G may be formed between the section and film 42.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a T-shaped gate electrode of a field effect transistor and a method of forming the same, and more particularly, to a field effect transistor having a high withstand voltage, a small parasitic capacitance and good high frequency characteristics. And a method for forming the gate electrode.

[0002]

2. Description of the Related Art A compound semiconductor field effect transistor (FET) such as GaAs is widely used as a transistor having good high-frequency operation characteristics as a semiconductor device for a CCD camera or the like.

Here, referring to FIG. 5 and FIG.
A conventional method of forming the gate electrode will be described. FIG. 5 (a)
6 (e) to 6 (e) and FIGS. 6 (f) to 6 (h) are cross-sectional views of the substrate in each step when a gate electrode is formed according to a conventional forming method. First, as shown in FIG.
A silicon nitride insulating film (hereinafter, SiN film) 12 is formed on a GaAs compound semiconductor substrate 11. Next, a photoresist film is applied and formed on the SiN film 12, and photolithography is performed to form an etching mask 13 having an opening 14 in a gate electrode formation region as shown in FIG. 5B. . Subsequently, as shown in FIG.
Si by anisotropic etching using F ₄ gas 15
The N film 12 is etched to form a gate opening 16 exposing the GaAs substrate 11. Next, the etching mask 13 is subjected to an ashing process to be peeled off.
As shown in FIG. 3, the SiN film 12 having the gate opening 16
To expose. Subsequently, as shown in FIG. 5E, an electrode metal layer 17 is formed on the SiN film 12 including the walls of the gate openings 16 by an electron gun evaporation method or a sputtering method.

[0006] Next, a photoresist film is applied and formed on the electrode metal layer 17, and an etching mask 18 having a pattern portion covering a gate electrode formation region is formed by photolithography as shown in FIG. Form. Next, using an etching mask 18, an Ar gas 19 is used.
The electrode metal layer 17 is etched by an ion beam etching method according to the method described above to form a gate electrode 20 as shown in FIG. Finally, the etching mask 18 is peeled off to expose the gate electrode 20 as shown in FIG.

[0005]

However, when the gate electrode is formed by the above-mentioned conventional method for forming a gate electrode, a depression is formed in the electrode metal layer 17 in the gate opening 16 as shown in FIG. As a result, the coverage is deteriorated at the bottom of the gate opening 16 due to the influence of the SiN film 12, and the electrode metal 17 becomes thinner as shown in the part A of FIG. Condition) may occur. This increases the resistance of the gate electrode, making it difficult to improve the electrical characteristics of the field effect transistor.

When the electrode metal 17 is etched by ion beam etching, as shown in FIG.
There is a problem that the SiN film 12 outside the etching mask 18 is shaved by etching. And SiN
When the film 12 is shaved and thinned, when the gate electrode 17 is used as a wiring, the thickness of the SiN film 12 interposed between the GaAs substrate 11 and the wiring 17 is small, so that a breakdown voltage failure of the field effect transistor occurs. Further, the GaAs substrate 11
If the SiN film 12 between the gate electrode and the wiring 17 becomes thinner, the parasitic capacitance increases, which adversely affects the high frequency characteristics of the field effect transistor. Conversely, if the over-etching amount of the ion beam etching is reduced in order to reduce the abrasion of the SiN film 12, the electrode metal layer 17 will be left unetched, resulting in a wiring failure such as a short circuit. Therefore, the amount of over-etching is reduced and the SiN film 12
It is also difficult to prevent the film thickness from decreasing.

It is an object of the present invention to provide a field effect transistor having a high withstand voltage, a small parasitic capacitance and good high frequency characteristics, and a method of forming a gate electrode thereof.

[0008]

The present inventor has studied the problems that occur when a gate electrode is formed by a conventional method for forming a gate electrode. As a result, the metal layer forming the T-shaped gate electrode is formed in one step. It was performed by an electron gun vapor deposition method or a sputtering method, and it was found that the cause was that the electrode portion extending on the insulating film was formed directly on the insulating film. The invention has been completed.

In order to achieve the above object, a field effect transistor according to the present invention has a gate electrode which penetrates an insulating film formed on a semiconductor substrate and is electrically connected to a channel region of the semiconductor substrate. In the transistor, a gate electrode is formed by burying a through-hole penetrating an insulating film and exposing a channel region, and extends in an umbrella shape over the insulating film from above the conductive plug portion. A T-shaped gate electrode having a conductive extension portion, wherein the extension portion of the T-shaped gate electrode is in contact with the insulating film in a region near the conductive plug portion and is separated from the insulating film in a peripheral portion; It is characterized by having a gap between the insulating film and the insulating film.

In the present invention and the method of the present invention described below, although there is no restriction on the type and composition of the metal constituting the semiconductor substrate, the insulating film and the T-shaped gate electrode, the electric field formed on the compound semiconductor substrate such as GaAs is not limited. It is most suitable as a gate electrode of an effect transistor. In the present invention, since the through-hole penetrating the insulating film and exposing the channel region is completely buried with the conductive plug portion, a gate electrode defect such as a disconnection in the gate electrode as in the related art occurs. do not do.

A method of forming a gate electrode according to the present invention is directed to a method of forming a gate electrode, comprising the steps of: forming a conductive plug portion formed by burying a through hole exposing a channel region of a semiconductor substrate through an insulating film formed on the semiconductor substrate; Forming a T-shaped gate electrode of a field-effect transistor, comprising: a conductive extension portion extending in an umbrella shape from an upper portion of the portion onto the insulating film, wherein the insulating film is formed on a semiconductor substrate. Forming a first through-hole that exposes the channel region of the semiconductor substrate by penetrating the semiconductor substrate; applying and forming a photoresist film on the insulating film;
Performing a photolithography process to form a first mask on the insulating film, the first mask including an opening pattern exposing the first through hole and the insulating film around the first through hole; Forming a first metal film on the insulating film and the first through-hole wall; applying and forming a photoresist film on the first metal film; performing photolithography; Forming a second mask having an opening pattern of a second through hole exposing the first metal film in the extension portion forming region, and filling the second through hole with an electrolytic plating method. Depositing a plating metal on the exposed first metal film in the second through hole to form a plating metal layer, removing the second mask, and removing the second mask from the outer region of the plating metal layer. Etching the first metal film on the first mask A step of to, is characterized by comprising a step of removing the first mask.

In a preferred embodiment of the method of the present invention, after the step of forming the first mask on the insulating film, and before moving to the step of forming the first metal film, the first mask is subjected to a heat treatment. To form an opening edge portion of the opening pattern into a curved surface inclined toward the first through hole. Thereby, the region in the vicinity of the plug portion in the extending portion of the T-shaped gate electrode smoothly contacts the insulating film to have a preferable T-shaped shape.

In the step of removing the first metal film by etching, the first metal film on the first mask in the outer region of the plating metal is removed by an ion beam etching method.

The method of forming the first metal film is not limited, but preferably, in the step of forming the first metal film, a metal is deposited by an electron gun evaporation method or a sputtering method. A metal film is formed. Further, a Ti layer is formed as an adhesion layer before forming the first metal film. Thereby, the first
The adhesion between the metal film and the insulating film is improved.

[0015]

Embodiments of the present invention will be described below in detail with reference to the accompanying drawings. Embodiment of Field Effect Transistor This embodiment is an example of an embodiment of a field effect transistor according to the present invention, and FIG. 1 shows a main part of the field effect transistor of this embodiment, that is, a configuration of a gate electrode. FIG. The field-effect transistor of this embodiment is
As shown in FIG. 1, a compound semiconductor field-effect transistor formed on a GaAs substrate 41,
SiN film 42 formed on GaAs substrate 41 as 0
, And a gate electrode 52 electrically connected to a channel region (not shown) of the GaAs substrate 41.

The gate electrode 52 of the field effect transistor according to the present embodiment is formed of a Si electrode formed on a GaAs substrate 41.
A conductive plug portion 52a formed by burying a gate opening 46 which penetrates the N film 42 and exposes a channel region (not shown) of the GaAs substrate 41;
It is formed as a T-shaped gate electrode including a conductive extension portion 52b extending in an umbrella shape over the SiN film 42 from the upper portion of 2a. The gate electrode 52 is a laminated film of a gate electrode base film 48 formed by an electron gun evaporation method or a sputtering method, and a gate electrode metal layer 51 deposited on the gate electrode base film 48 by an electrolytic plating method. It is configured. In the present embodiment, the gate electrode base film 48 and the gate electrode metal layer 51 are both formed of Au. The extending portion 52b of the T-shaped gate electrode 52 has a conductive plug portion 52a.
The SiN film 42 is in contact with the SiN film 42 in the vicinity area, and the SiN film 4
2 and a gap G between itself and the SiN film 42. Further, a Ti layer or the like may be formed below the gate electrode base film 48 as an adhesion layer with the SiN film 42.

With the above structure, the gate opening 46 is completely buried with the conductive plug 52a.
Unlike the conventional case, the gate electrode metal layer does not become thin or the step is not broken. Further, when forming the gate electrode, the SiN film 42 is protected by the mask to the end, so that the thickness of the SiN film 42 does not decrease. Therefore, the parasitic capacitance is small and the breakdown voltage is high.

Embodiment of the Method for Forming a Gate Electrode This embodiment is an example of an embodiment of the method for forming a gate electrode according to the present invention, and is shown in FIGS.
(F) to (i) and FIGS. 4 (j) to (l) are cross-sectional views of the substrate in each step when forming a gate electrode according to the method of the present embodiment. First, FIG.
As shown in FIG.
An N film 42 is formed. Next, a photolithography film is applied and formed on the SiN film 42, and a photolithography process is performed to form an etching mask 43 having an opening pattern of the opening 44 as shown in FIG. . Subsequently, using an etching mask 43, the SiN film 42 is anisotropically etched with a CF ₄ gas 45.
Is etched to form a gate opening 46 for exposing a channel region (not shown) of the GaAs substrate 41, as shown in FIG. Next, an ashing process is performed, and as shown in FIG.
Is removed, and the SiN film 42 is exposed. Then, FIG.
As shown in (e), a photoresist film 4 is formed on the entire surface of the substrate.
7 'is applied and formed into a film.

Subsequently, a first mask 47 having an opening pattern for exposing the SiN film 42 around the gate opening 46, that is, a so-called air bridge pattern is formed by photolithography as shown in FIG. SiN
Formed on the film 42. Next, a baking process is performed on the first mask 47, and the opening edge of the air bridge pattern of the etching mask 47 is formed into a curved surface inclined toward the gate opening 46 as shown in FIG. Next, as shown in FIG. 3H, a metal is formed on the first mask 47, on the exposed SiN film 42, and on the wall surface of the gate opening 46 by an electron gun evaporation method or a sputtering method as a gate electrode base film. A film 48 is formed. As the metal film 48, for example, an Au film is formed. Next, a photoresist film is applied and formed on the metal film 48, and a photolithography process is performed, and as shown in FIG.
A second mask 49 having an opening pattern of 0 is formed.

Next, as shown in FIG. 4J, a metal, for example, Au is deposited on the metal film 48 by electrolytic plating so as to fill the electrode plating opening 50, and the gate electrode metal 51 is formed. To form Subsequently, the second mask 49 is peeled off using a peeling liquid to form an etching mask (not shown), and as shown in FIG.
The gate electrode base film 48 on the first mask 47 in the region outside the gate electrode metal 51 is etched and removed by an ion beam etching method using a gas 53.
Finally, when the first mask 47 is peeled off by performing an ashing process, a gate electrode 52 made of a laminated metal of the gate electrode base film 48 and the gate electrode metal 51 is formed as shown in FIG. be able to.

In the method of this embodiment, the SiN film 42
However, since the SiN film 42 is protected by the first mask 47 to the end, the SiN film 42 is not etched and reduced in thickness as in the related art.

As a modification of this embodiment, after opening the gate opening 46 by anisotropic etching, the etching mask 4 is removed without removing the etching mask 43.
3 is used as the first mask 47 and the first mask 47 is used.
Can be omitted.

[0023]

According to the present invention, the gate electrode is formed by burying a through hole penetrating the insulating film and exposing the channel region, and the gate electrode is formed on the insulating film from above the plug portion. A T-shaped gate electrode having a conductive extension portion extending in the shape of a circle, a peripheral portion of the extension portion of the T-shaped gate electrode is separated from the insulating film, and a gap is formed between the T-shaped gate electrode and the insulating film. Since the through-hole is completely buried in the conductive plug portion, the thickness of the gate electrode metal layer does not become thinner and the step is not broken as in the related art. Further, when the gate electrode is formed, the insulating film is protected by the mask to the end, so that the thickness of the insulating film does not decrease. Therefore, the field effect transistor according to the present invention has a small parasitic capacitance,
Also, the pressure resistance is high. According to the method of the present invention, since the plating metal (gate electrode metal layer) is deposited on the first metal film (base film) by the electrolytic plating method, the through-hole is completely formed of the first metal and the first metal film. Embedded in plated metal,
There is no formation failure such as disconnection of the gate electrode. Furthermore,
Since the insulating film is protected by the first mask to the end,
There is no decrease in the thickness of the insulating film.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a main part of a field-effect transistor according to an embodiment, that is, a configuration of a gate electrode.

FIGS. 2A to 2E are cross-sectional views of a substrate in each step when forming a gate electrode according to the method of the embodiment.

FIGS. 3 (f) to 3 (i) correspond to FIGS.
FIG. 5E is a cross-sectional view of the substrate at each step when a gate electrode is formed according to the method of the present embodiment, following (e).

FIGS. 4 (j) to 4 (l) correspond to FIGS.
FIG. 5 is a cross-sectional view of the substrate at each step when a gate electrode is formed according to the method of the embodiment, following (i).

5 (a) to 5 (e) are cross-sectional views of a substrate in each step when a gate electrode is formed according to a conventional forming method.

6 (f) to 6 (h) correspond to FIG. 5 respectively.
FIG. 4E is a cross-sectional view of the substrate in each step when a gate electrode is formed according to a conventional forming method, following (e).

FIG. 7 is a cross-sectional view of a gate electrode for explaining a problem due to a conventional forming method.

FIG. 8 is a cross-sectional view of a gate electrode for explaining another problem caused by a conventional forming method.

[Explanation of symbols]

11: GaAs compound semiconductor substrate, 12: SiN
Film, 13 etching mask, 14 opening, 15
... CF ₄ gas, 16 ... gate opening, 17 ... electrode metal layer, 18 ... etching mask, 19 ... ion beam etching with Ar gas, 20 ... gate electrode,
40... Essential parts of the field effect transistor of the embodiment example, 4
1 GaAs semiconductor substrate, 42 SiN film, 43
... Etching mask, 44 ... Opening, 45 ... CF ₄
Gas, 46 ... gate opening, 47 ... first mask,
48... Metal film (gate electrode base film 9, 49... Second mask, 50... Electrode plating opening, 51... Gate electrode metal, 52... Gate electrode.

Claims (6)

[Claims] 1. A field effect transistor having a gate electrode penetrating an insulating film formed on a semiconductor substrate and electrically connecting to a channel region of the semiconductor substrate, wherein the gate electrode penetrates the insulating film and forms a channel region. Formed as a T-shaped gate electrode including a conductive plug portion formed by embedding a through hole exposing the conductive plug portion, and a conductive extension portion extending in an umbrella shape from above the conductive plug portion onto the insulating film. The extended portion of the T-shaped gate electrode is in contact with the insulating film in a region near the conductive plug portion, is separated from the insulating film in a peripheral portion, and has a gap with the insulating film. Effect transistor. 2. A conductive plug formed by penetrating an insulating film formed on a semiconductor substrate and filling a through hole exposing a channel region of the semiconductor substrate, and an umbrella formed on the insulating film from above the plug. A T-shaped gate electrode of a field-effect transistor, comprising: a conductive extension portion extending in the shape of a channel; Opening a first through hole exposing the region; applying and depositing a photoresist film on the insulating film; and performing photolithography to insulate the first through hole and the periphery of the first through hole. First having an opening pattern for exposing the film
Forming a mask on the insulating film, forming a first metal film on the first mask, on the exposed insulating film, and on the wall of the first through-hole; and forming a mask on the first metal film. A second mask having an opening pattern of a second through hole exposing a first metal film in a region where a gate electrode is to be formed is formed by applying and forming a photoresist film and performing a photolithography process. Forming a plating metal layer on the exposed first metal film in the second through hole by electrolytic plating so as to fill the second through hole. Removing the second mask; etching the first metal film on the first mask in an outer region of the plating metal layer to remove the first metal film; and removing the first mask. A method of forming a gate electrode. 3. After the step of forming the first mask on the insulating film and before proceeding to the step of forming the first metal film, the first mask is subjected to a heat treatment so as to form an opening of the opening pattern. 3. The method according to claim 2, wherein the edge portion is formed in a curved shape inclined toward the first through hole. 4. The step of etching and removing the first metal film comprises removing the first metal film on the first mask in an outer region of the plating metal by an ion beam etching method. A method for forming a gate electrode according to claim 2. 5. The method according to claim 1, wherein a Ti layer is formed as an adhesion layer on the first mask, on the exposed insulating film, and on the wall of the first through hole before forming the first metal film. A method for forming a gate electrode according to claim 2. 6. The method according to claim 2, wherein in the step of forming the first metal film, a metal is deposited by an electron gun evaporation method or a sputtering method to form the first metal film. Of forming a gate electrode.