JP2001251559A - Image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the appearance of a defective pixel as a scar on a picture by a signal processing, when the defective pixel exists in an image pickup element. SOLUTION: An image pickup device is provided with an image pickup element 11 outputting a video signal obtained by image-picking up an object, a delay means 14 for outputting respective signals S1 to S5 obtained by sequentially delaying a signal outputted from the image pickup element 11 from a first horizontal scanning period to a fifth horizontal scanning period, a mixing means 15 for generating signals S1A' to S5A' obtained by mixing two signals delayed by one horizontal scanning period at each pixel on a signal S0 outputted from the image pickup element 11 and the respective signals S1 to S5 delayed by the delay means 14, a filter means 16 for removing a noise component from the respective signals S1A' to S5A' outputted from the mixing means 15 and a scar correction means 171 for correcting the defective pixel of the image pickup element 11, based on the respective signals S1A to S5A obtained through the filter means 16.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image pickup apparatus having a function of correcting a pixel defect of an image pickup device.

[0002]

2. Description of the Related Art In recent years, when an image pickup device has a pixel defect (hereinafter, referred to as a flaw) in an image pickup device (hereinafter, referred to as a CCD) with an increase in image quality, an image signal obtained based on the defect is displayed on an LCD. For example, when the image is displayed, the flaw is noticeably impaired in the image quality, so that a flaw correcting means is provided to output a flaw-corrected video signal. Such flaws include a defect in which the luminance of a video signal at a certain pixel is lower than that in the normal display (hereinafter, referred to as a black defect) and a defect in which the luminance of one pixel is higher than that in the normal display. Defects (hereinafter referred to as white scratches). Hereinafter, when simply referring to a scratch, both a black scratch and a white scratch are collectively referred to.

Next, a conventional image pickup apparatus provided with a flaw correction means will be described.

FIG. 10 shows, for example, Japanese Patent Application Laid-Open No. 9-24754.
FIG. 1 shows a flaw correction means of a conventional imaging device described in Japanese Patent Application Publication No. 8 (JP-A-8).

In FIG. 10, reference numerals 111 to 115 denote flip-flops as delay elements for sequentially delaying an input signal by one clock, and 116 denotes a flip-flop 111
By adding the signal S _C that is output from the signal S _A and the flip-flop 115 to be output from the addition signal (S _A +
S _C ). 125 is an adder 1
This is an arithmetic unit that outputs a signal (S _A + S _C ) / 2 obtained by averaging 16 outputs.

Reference numeral 117 denotes a signal output from the arithmetic unit 125
_{(S A + S C) /} 2 and by the signal S _B outputted from the flip-flop _{113 | (S A + S C} ) / 2-S B | first arithmetic circuit for performing absolute difference operations, 118 signal S _A second arithmetic circuit for performing an absolute difference calculation of | S _B −S _C | from _B and the signal S _C ;
Reference numeral 119 denotes a third arithmetic circuit which performs an arithmetic operation of a difference | S _A −S _B | from the signal S _A and the signal S _B.

Reference numerals 120 to 122 denote first to third comparison circuits, respectively, which are first to third arithmetic circuits 117 and 117, respectively.
The calculation results of 118 and 119 are compared with the reference value Nsh, and if any of the results of the calculation circuits 117, 118 and 119 is larger than the reference value Nsh, a high-level signal is output.
Reference numeral 123 denotes an AND circuit, and each of the comparison circuits 120, 12
The logical product of the output results of 1,122 is taken.

Reference numeral 124 denotes a flaw determining circuit. When the output of the AND circuit 123 is at a high level, it is determined that there is a flaw. When the output is at a low level, it is determined that there is no flaw. I do.

Reference numeral 126 denotes an output signal of the flip-flop 113.
No. S_BAnd the output signal (S _A+ S_C) / 2
A selector for selecting one of them, the defect determination circuit 1
If it is judged that there is no scratch by 24, flip flow
Output signal S of step 113_BIs selected, and
If the circuit 124 determines that there is a flaw, an arithmetic unit
125 output signal (S_A+ S_C) / 2 is output as an interpolation signal
Is done.

Therefore, in this configuration, each signal S
_A, S_B, S_C, (S_A+ S_C) / 2 and CCD pixel correspondence
Looking at the relationship, as shown in FIG._A,
S_B, S _CCorresponds to every other pixel on one line
Signal S_BThe pixel at the center corresponding to
The output of the first arithmetic circuit 117 is the signal of the left and right pixels
S_A, S_CAnd the signal S of the pixel to be corrected at the center_BWith
The level difference (absolute value) is the output of the second arithmetic circuit 118
Is the signal S of the pixel to be corrected_BAnd one of the pixels on the right
Signal S_CAnd the third arithmetic circuit 1
19 is the signal S of the pixel to be corrected._BAnd one on the left
The signal S of the pixel_ALevel difference (absolute value).

[0011] Then, flaws caused in the CCD (black defect or white defect) is just the case that corresponds to the signal S _B of the correction target pixel in the center, each arithmetic circuits 117,11
Since the calculation results of 8, 119 are both larger than the reference value Nsh, the flaw determination circuit 124 can determine that there is a flaw. Then, the signal S _{B of the} pixel to be corrected is
Is determined to be caused by a scratch on the CCD, the average value of the signals S _A and S _C of the left and right pixels is replaced.

[0012]

However, in the above configuration, the presence / absence of a flaw is determined only by the pixel to be corrected and its left and right pixels, so that the range of determination of the flaw is extremely limited. When a signal whose luminance changes in a short cycle is input, it is erroneously determined to be a flaw signal and flaw correction is performed. For this reason, there is a problem that the fidelity of the image is impaired.

The present invention has been made in view of the above problems, and provides an image pickup apparatus having a high-accuracy flaw correcting means without malfunction.

[0014]

Means for Solving the Problems The present invention is as follows in order to solve such problems.

[0015] That is, the image pickup apparatus of the present invention sequentially and an imaging device for outputting an image signal obtained by imaging an object, a signal S ₀ output from the image pickup device from one horizontal scanning period to 5 horizontal scanning period Delay means for outputting the delayed signals S _{1 to} S _5, and a signal S output from the image sensor
_With respect to ₀ and each of the signals S _{1 to} S ₅ delayed by the delay means, signals S _1A ′ to S _5A ′ are generated by mixing the two signals delayed by one horizontal scanning period for each pixel. mixes means, filter means for outputting except noise components for each signal S _1A '~S _5A' output from the mixing means, each signal S _1A to S _5A obtained through the filter means Flaw correcting means for correcting a defective pixel of the image sensor based on the defect.

Thus, the presence / absence of a flaw is determined not only by the pixel to be corrected and the signal on one line corresponding to the left and right pixels as in the prior art, but over a plurality of lines before, after, right and left around the pixel to be corrected. Since the presence or absence of a flaw is determined based on a signal corresponding to a pixel, highly accurate flaw correction without malfunction can be performed.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an imaging apparatus according to an embodiment of the present invention will be described with reference to the drawings.

<Embodiment 1> FIG. 1 shows Embodiment 1 of the present invention.
1 is a block diagram of the imaging apparatus in FIG.

[0019] In FIG. 1, 10 is a lens for forming an object image, 11 CCD, 12 for outputting a subject image through the lens 10 and photoelectrically converted signals S ₀ output from the CCD11 per pixel This is a correlated two-phase sampling circuit (hereinafter, referred to as CDS) that performs sample and hold.

Reference numeral 13 denotes an A / D converter for converting an input signal into a digital signal. Reference numeral 14 denotes a signal S _{1 obtained} by delaying the input signal S ₀ by a maximum of five horizontal scanning periods every one horizontal scanning period.
A delay means for outputting to S _5.

Reference numeral 15 denotes an output signal S from the A / D converter 13.
₀ and the respective signals S _{1 to} S ₅ obtained by delaying by the delay means 14, respectively, two signals S ₀ and S ₁ , S ₁ and S ₂ , S ₂ and S delayed from each other by one horizontal scanning period. ₃ , S ₃
And S ₄ , and a signal S obtained by mixing between S ₄ and S ₅ for each pixel.
A mixing circuit for generating a _1A '~S _5A'.

Reference numeral 16 denotes a low-pass filter (hereinafter, referred to as LPF) as filter means for removing noise components from the signals S _1A ′ to S _5A ′ output from the mix circuit 15.

[0023] 17 ₁ is a flaw correction means detects the presence or absence of white spots white blemish is adapted to correct, if any for each pixel of In Embodiment 1 CCD 11.

FIG. 2 is a block diagram showing details of the delay means 14 shown in FIG.

The delay means 14 of the first embodiment, the RAM 20 ₁ to 20 ₅ for delaying respective signals S ₀ to be input by one horizontal scanning period are sequentially cascaded, each RA
M20 ₁ to 20 ₅ signals S ₁ to S _5, which is one horizontal scanning period delay each time through a is taken out, respectively.

FIG. 3 is a block diagram showing details of the LPF 16 shown in FIG.

The LPF 16 has a Z conversion characteristic of (1
+ Z^-1) Are used to filter each input signal.
No. S_1A'~ S_5A′ Are individually arranged and configured
Each of the filters 31 to 35 is a flip-flop.
Top 37₁~ 37_FiveAnd adder 38 ₁~ 38_FiveHaving the above
Flip-flop 37₁~ 37_FiveInput and output signals
To adder 38₁~ 38_Five, Each signal S
_1A~ S_5AIs the flaw correction means 17₁Output to
Is configured.

Next, in the above configuration, the flaw correcting means 1
The operation until the signals S _{1A to} S _5A are input to 71 will be described with reference to FIG.

The image of the subject through the lens 10 is
The CCD 11 forms an image on the light receiving surface 1 and photoelectrically converts the formed image of the subject, and outputs the pixel information of the subject without pixel mixing. The CDS 12 samples and holds the output signal from the CCD 11 for each pixel and outputs it as a signal S ₀ , and the A / D converter 13 converts the signal S ₀ into a digital signal.

The delay means 14 outputs signals S _{1 to} S ₅ obtained by delaying the signal S ₀ output from the A / D converter 13 by a maximum of five horizontal scanning periods every one horizontal scanning period. That is, the signal S ₁ delayed by one horizontal scanning period, the signal S ₂ delayed by two horizontal scanning periods, and the signal S ₃ delayed by three horizontal scanning periods
When, 4 a horizontal scanning period delayed signal S _4, 5 and outputs horizontal scanning period delayed signal S ₅ and at the same time. The signal S ₀ output from the A / D converter 13 and the respective signals S _{1 to} S ₅ obtained by delaying by the delay unit 14 are input to the mix circuit 15.

Therefore, each of the signals S ₀ , S ₁ .
If you look at the corresponding relationship between each pixel of the S ₅ and CCD11,
As shown in FIG. FIG. 4A shows only a range of 6 lines × 6 pixels. In the figure,
The “〇” mark is a signal corresponding to each pixel when the CCD 11 has no flaw, and the “x” mark is a signal obtained when one pixel has a flaw.

The mix circuit 15 generates two signals S ₀ and S ₁ , S ₁ and S ₂ , S ₂ delayed by one horizontal scanning period from each other.
₂ and S ₃ , S ₃ and S ₄ , and S ₄ and S ₅ are mixed for each pixel to generate signals S _1A ′ to S _5A ′.

Therefore, the correspondence between each signal S _1A ′ to S _5A ′ output from the mix circuit 15 and each pixel is as shown in FIG. 4B. That is, the number of signals in the range of FIG. 4A is reduced by one line due to the mixing, and becomes 5 lines × 6 pixels. In that case, S ₂ and S ₃ ,
To be added in between the signals S ₃ and S _4, the influence of the flaw 2
Line.

[0034] Subsequently, LPF 16, each signal S _1A '~S _5A' outputs a signal S _1A to S _5A, except for the noise components for each of these signals is the next stage of the defect correcting means input 17 is output to the _1. In that case, each filter 3
For each 1 to 35, the signals respectively input to and output from the flip-flop 37 _{1-37 5} are added by the adder 38 ₁ to 38 _5.

Therefore, the correspondence between the signals S _{1A to} S _5A output from the LPF 16 and the pixels is as shown in FIG. 4C. That is, the signals in the range of FIG. 4B are reduced by one pixel by mixing the signals of the adjacent left and right pixels for each line, and become 5 lines × 5 pixels. In this case, since the addition processing is performed between the signals corresponding to the left and right pixels adjacent to each other, the influence of the flaw extends to 2 lines × 2 pixels.

Therefore, the flaw correcting means 1 of the first embodiment
7 _1, as the target signals corresponding to the pixels included in the range R surrounded by the broken line in FIG. 4 (c), the performs defect correction processing on the white spots.

FIG. 5 shows the flaw correcting means 17 ₁ shown in FIG.
FIG. 4 is a block diagram showing the details of.

In FIG. 5, 40 to 44 are LPFs 16 or
Each signal S output from_1A~ S_5AAre individually delayed by one clock
Delayed signal S_1B~ S_5BOutput delay element
The lip flops 45 to 47 are the delay elements 40 to
Each signal S obtained at 44_1B~ S _5BWithin S_1B, S_3B, S
_5BSignal S which is obtained by individually delaying each signal of FIG._1C,
S_3C, S_5CFlip-flop as a delay element that outputs
It is.

48 denotes two signals S_2B, S_4BAnd compare
Signal Smin having the smaller value of₁First minimum value to output
Output means 49 is provided for the two signals S_3A, S_3CCompare
The smaller signal Smin_TwoOutput the second minimum
Value output means, each signal S _1A, S_1B, S_1C, S_5A, S
_5B, S_5C, Smin₁, Smin_TwoSignal Sma having the maximum value of
x₀Is a maximum value output unit that outputs

Reference numeral 51 denotes an output signal S of the flip-flop 42.
_3B subtractor for outputting a signal delta ₁ obtained by subtracting the signal Smax ₀ obtained by the maximum value output unit 50 from the 53 reference value set by the output signal delta ₁ and preset 52 of the subtracter 51 .DELTA.Sh ₁ And a comparator for comparing

Reference numeral 54 denotes a comparator 53 which outputs the signal S _3B from the flip-flop 42 when the result of comparing the two Δ ₁ and Δsh ₁ is Δ ₁ ≦ Δsh ₁ , and Δ ₁ > Δsh ₁ In some cases, the selector outputs the output signal Smax ₀ of the maximum value output means 50.

Next, the defect correcting means 17 ₁ of this configuration, with reference to FIG. 6 illustrating the operation thereof. FIG.
Fig. 4C shows a range R extracted by a broken line in Fig. 4C.

[0043] The defect correcting means 17 _1, as shown in FIG. 6, the signal corresponding to the pixels included in the predetermined range R, to a certain pixel (corresponding to signal S _3B) of white defects center position of its A defect correction process is performed on the pixel to be corrected.

Hereinafter, the operation will be specifically described.

The signals S _{1A to} S _5A output from the LPF 16 are input to the flaw correcting means 17 and input to the flip-flops 40 to 44, respectively.

The flip-flops 40 to 44 output signals S _{1B to} S _5B obtained by individually delaying the input signals S _{1A to} S _5A by one clock.

Subsequently, flip-flops 45 to 47
, Among at each signal S _1B to S _5B obtained by each of the delay elements 40 to 44, S _1B, S _3B, the signal S _1C each signal individually delayed one clock of S _5B, S _3C, S thus outputs _5C, each signal S _{1A above, S 3A, S 5A, S} 1B ~S 5B,
Looking at the correspondence between S _1C , S _3C , S _5C and each pixel of the CCD 11, as shown in FIG. 6, the signals included in the range R of 5 lines × 5 pixels (see FIG. 4 (c)) become.

The first minimum value output means 48 outputs two signals S
_2B and S _4B are compared, and the signal Smin ₁ of the smaller value is compared.
Is output. That is, the signal of the smaller luminance level among the signals S _2B and S _4B of the pixels located above and below the signal S _3B of the correction target pixel in FIG. 6 is selected as Smin ₁ .

The second minimum value output means 49 compares the two signals S _3A and S _3C and outputs the smaller signal Smin ₂ . That is, the signal having the smaller luminance level among the signals S _3a and S _3C of the pixels located on the left and right of the signal S _3B of the correction target pixel in FIG. 6 is selected as Smin ₂ .

As described above, the signals Smin ₁ , Smi at which the luminance level is minimized by the first and second minimum value output means 48, 49.
By selecting the n _2, 4 pixels of the signal S _2B of the surrounding except the signal S _2B of the correction target pixel, S _5B, S _3A, among the S _3C, those affected by white flaws (i.e., luminance Even if there is an extremely large level), the effect will be eliminated.

The maximum value output means 50 outputs each signal S_1A,
S_1B, S_1C, Smin₁, Smin_Two, S_5A, S _5B, S_5CBrightness
The signal whose level is compared and the brightness level is the highest
Smax₀Is output. That is, the signal S of the pixel to be corrected_2BTo
Within the fixed range R excluding that it is not affected by white scratches
Eight signals S defined_1A, S_1B, S_1C, Smin₁, Smi
n_Two, S_4B, S_5A, S_5B, S_5CWithin the maximum brightness level
Choose one.

The subtractor 51 outputs a signal Sma obtained from the output signal S _3B of the flip-flop 42 by the maximum value output means 50.
and outputs a signal delta ₁ obtained by subtracting the x _0. And the comparator 53
Compares the output signal Δ ₁ of the subtractor 51 with a reference value Δsh ₁ set in advance by the setting unit 52.

Here, the signal S corresponding to the pixel to be corrected is_3B
If there are white scratches on the ₁> Δsh₁And white
If there is no effect of scratch, Δ₁≤Δsh₁Becomes

Therefore, the selector 54 is connected to the comparator 53
Both delta _1, a result of comparison .DELTA.Sh ₁ is in, there is no influence of the white defects in the case of Δ ₁ ≦ _{Δsh 1} flip-flop 42
And directly outputs the signal S _3B from, also, delta _1> for when Δsh some ₁ are affected by the white flaw, the output signal Smax ₀ of the maximum value output means 50 a signal S _3B corresponding to the correction target pixel
And output.

As described above, according to the first embodiment, the presence / absence of a flaw is determined not by using only the correction target pixel on one line and the pixels on the left and right as in the related art.
In order to perform the flaw correction process by considering whether or not the signal S _3B of the correction target pixel is affected by white flaws, taking into account signals included in a fixed range R over five lines above and below the correction target pixel. Thus, it is possible to realize high-accuracy flaw correction, and obtain a high-quality image faithfully reflecting the subject image.

<Embodiment 2> FIG. 7 is a block diagram showing the configuration of a flaw correcting means 172 used in the image pickup apparatus of the _second embodiment. The flaw correcting means 17 _{1 of the first} embodiment shown in FIG. The same reference numerals are given to the portions corresponding to the configuration of.

[0057] defect correcting means 17 ₂ in the second embodiment,
In that for correcting the white defect, which is basically the same as the defect correction unit 17 ₁ of the first embodiment shown in FIG.

However, the flaw correcting means 1 of the second embodiment
In 7 _2, in addition to the defect correcting means 17 ₁ of the embodiment 1, compares the brightness levels of the two output signals Smin _1, Smin ₂ of the first minimum value output unit 48 and the second minimum value output unit 49 of the above Further, a comparison maximum value output means 60 for outputting the larger signal Smax ₃ is provided.

Further, the selector 54 selects the signal S _3B from the flip-flop 42 when the result of comparison by the comparator 53 is Δ ₁ ≦ Δsh ₁ , and selects the signal S _3B from the flip-flop 42 when Δ ₁ > Δsh ₁ Is the output signal Smax ₃ of the comparison maximum value output means 60.
Is configured to be selected.

The other configuration is the same as that of the first embodiment shown in FIGS. 1 and 5, and a detailed description is omitted here.

Next, the flaw correcting means 17 of the second embodiment
Operation ₂ will be described. Note that the operation of the same portion as that of the first embodiment is the same, and the description is omitted.

The comparison maximum value output means 60 outputs the output signals Smin ₁ , Smin _{2 of the first} and _second minimum value output means 48, 49.
Are compared, and the larger signal Sma is compared.
and outputs the x _3.

On the other hand, the subtractor 51 is connected to the flip-flop 4
A signal Smax ₀ obtained from the second output signal S _3B at the maximum value output means 50 outputs a signal delta ₁ obtained by subtracting. The comparator 53 compares the reference value .DELTA.Sh ₁ which is set by the output signal delta ₁ and preset 52 of the subtracter 51.

Here, the signal S corresponding to the pixel to be corrected_3B
If there are white scratches on the ₁> Δsh₁And white
If there is no effect of scratch, Δ₁≤Δsh₁Becomes

When the result of comparison by the comparator 53 is Δ ₁ ≦ Δsh ₁ , the selector 54 outputs the signal S _3B from the flip-flop 42 as it is because there is no influence of white spots. _1> .DELTA.Sh ₁ in some cases, because of the influence of white blemish, and outputs the replacement signal S _3B corresponding to the correction target pixel in the output signal Smax ₃ Compare the maximum value output unit 60.

As described above, according to the second embodiment, when the signal S _3B of the pixel to be corrected is affected by white flaws in the flaw correction means 17 ₂ , four pixels around the signal S _3B adjacent to the signal S _3B are affected. Since the signals S _2B , S _4B , S _3A , and S _3C are replaced with signals that are assumed to have no white flaws, image continuity is maintained more than in the first embodiment. .

In the second embodiment, as in the first embodiment, the signal S _3B of the pixel to be corrected is taken into account by taking into account the signals included in the fixed range R over the upper and lower five lines of the pixel to be corrected. Since the flaw correction processing is performed by determining whether or not the flaw is affected by white flaws, high-precision flaw correction can be realized, and a high-quality image faithfully reflecting the subject image can be obtained.

<Embodiment 3> FIG. 8 is a block diagram showing the configuration of a flaw correcting means 173 used in the image pickup apparatus of the _third embodiment. The flaw correcting means 17 _{1 of the first} embodiment shown in FIG. The same reference numerals are given to the portions corresponding to the configuration of.

[0069] defect correcting means 17 ₃ of the third embodiment,
The correction of black flaws is basically different from the flaw correction means 17 ₁ and 17 _{2 of the first} and _second embodiments shown in FIGS.

[0070] Therefore, the defect correcting means 17 ₃ of the third embodiment, first, second minimum value output means 4 shown in FIG. 5
8, 49, instead of first and second maximum value output means 80, 8
1 and a minimum value output means 82 is provided in place of the maximum value output means 50 shown in FIG.

The first maximum value output means 80 compares the luminance levels of the two input signals S _2B and S _4B and outputs the larger signal Smax ₁ , and the second maximum value output means 81
Is configured to compare the luminance levels of the two input signals S _3A and S _3C and output the smaller signal Smin ₂ . The minimum value output means 82 outputs the signals S _1A , S _1B ,
It is configured to output a signal Smin ₀ which has a minimum value among S _1C , Smin ₁ , Smin ₂ , S _5A , S _5B , and S _5C .

Further, the subtractor 51 is connected to the flip-flop 4
The comparator 53 outputs a signal Δ2 which is obtained by subtracting the signal Smin ₀ obtained by the minimum value output means 82 from the output signal S _{3B of the second} comparator 2.
₂ is compared with a reference value Δsh ₂ previously set by the setting device 52. Further, the selector 54 outputs the signal S _3B from the flip-flop 42 when the result of comparison between the two Δ ₁ and Δsh ₁ by the comparator 53 satisfies Δ ₁ ≦ Δsh ₁ , and Δ ₁ > Δsh _{1 1} if there is configured to output an output signal Smin ₀ of the minimum value output unit 82.

The other structure is the same as that of the first embodiment shown in FIGS. 1 to 4, and the detailed description is omitted here.

[0074] Next, the operation of defect correcting means 17 ₃ of this configuration. Note that the operation of the same portion as that of the first embodiment is the same, and the description is omitted.

The first maximum value output means 80 outputs two signals S
_2B, by comparing the S _4B outputs a signal Smax ₁ larger values. That is, the signal having the larger luminance level among the signals S _2B and S _4B of the pixels located above and below the signal S _3B of the correction target pixel in FIG. 6 is selected as Smax ₁ .

The second maximum value output means 81 compares the two signals S _3A and S _3C and outputs a signal Smax ₂ having a larger value. That is, the signal S of the correction target pixel in FIG.
The signal having the larger luminance level among the signals S _3a and S _3C of the pixels located on the left and right of _3B is selected as Smax ₂ .

As described above, the first and second maximum value output means 80 and 81 output the signal Sma having the maximum luminance level.
x _1, by selecting the Smax _2, signal S _2B of the correction target pixel
Signals S _2B , S _5B , S _3A , S _3C of the four surrounding pixels excluding
Among them, even if there is one affected by black flaws (that is, one having an extremely small luminance level), the effect is eliminated.

The minimum value output means 82 outputs each signal S_1A,
S_1B, S_1C, Smax₁, Smax_Two, S_5A, S _5B, S_5CWithin
Minimum signal Smin₀Is output. In other words, the correction target
Pixel signal S_2BWithin a certain range R excluding
Eight signals S presumed not to be received_1A, S_1B,
S_1C, Smax₁, Smax_Two, S_4B, S_5A, S_5B, S_5CWithin
Select the one with the minimum luminance level.

The subtractor 51 outputs a signal Smi obtained by the minimum value output means 82 from the output signal S _3B of the flip-flop 42.
The n ₀ and outputs a signal delta ₂ subtraction. And the comparator 53
Compares the reference value .DELTA.Sh ₂ which is set by the output signal delta ₂ with a predetermined 52 of the subtracter 51.

Here, the signal S corresponding to the pixel to be corrected_3B
Is affected by black scratches, Δ _Two> Δsh_TwoAnd black
If there is no effect of scratch, Δ_Two≤Δsh_TwoBecomes

Therefore, the selector 54 is connected to the comparator 53
Both delta _2, a result of comparison .DELTA.Sh ₂ is in, there is no influence of the black defect when a Δ ₂ ≦ _{Δsh 2} flip-flop 42
And directly outputs the signal S _3B from, also, delta _2> for when .DELTA.Sh ₂ there is the influence of black defect, the output signal Smin ₀ of the minimum value output means 82 a signal S _3B corresponding to the correction target pixel
And output.

As described above, according to the third embodiment, the presence / absence of a flaw is determined not only by the correction target pixel on one line and the right and left pixels but on the same line as in the related art.
In order to perform the flaw correction process by determining whether or not the signal S _3B of the correction target pixel is affected by black flaws, taking into account signals included in a fixed range R over five lines above and below the correction target pixel. Thus, it is possible to realize high-accuracy flaw correction, and obtain a high-quality image faithfully reflecting the subject image.

<Embodiment 4> FIG. 9 is a block diagram showing the structure of a flaw correcting means 174 used in the image pickup apparatus of the _fourth embodiment. The flaw correcting means 17 _{3 of the third} embodiment shown in FIG. The same reference numerals are given to the portions corresponding to the configuration of.

[0084] defect correcting means 17 ₄ of the fourth embodiment,
In that for correcting the black defect is the same as the defect correcting means 17 ₃ of the third embodiment shown in FIG.

However, the flaw correcting means 1 of the fourth embodiment
In 7 _4, in addition to the defect correcting means 17 ₃ of the third embodiment, compared the luminance level of both output signals Smax _1, Smax ₂ of the first maximum value output unit 80 and the second maximum value output unit 81 of the above A comparison minimum value output means 61 for outputting the smaller signal Smin ₃ is provided.

Further, the selector 54 selects the signal S _3B from the flip-flop 42 when the result of the comparison by the comparator 53 is Δ ₂ ≦ Δsh ₂ , and when the result of the comparison is Δ ₂ > Δsh ₂ Is the output signal Smin ₃ of the comparison minimum value output means 61.
Is configured to be selected.

The other structure is the same as that of the third embodiment shown in FIG.
In this case, the detailed description is omitted here.

Next, the flaw correcting means 17 of the fourth embodiment will be described.
Operation ₄ will be described. Note that the operation of the same portion as that of the third embodiment is the same, and the description is omitted.

The comparison minimum value output means 61 outputs the output signals Smax ₁ , Smax _{2 of the first} and _second maximum value output means 80, 81.
Are compared, and the smaller signal Smi is compared.
Outputs n ₃ .

On the other hand, the subtractor 51 is connected to the flip-flop 4
The signal Δ2 is obtained by subtracting the signal Smin ₀ obtained by the minimum value output means 82 from the output signal S _{3B of the second} . The comparator 53 compares the reference value .DELTA.Sh ₂ which is set by the output signal delta ₂ with a predetermined 52 of the subtracter 51.

Here, the signal S corresponding to the pixel to be corrected is_3B
Is affected by black scratches, Δ _Two> Δsh_TwoAnd black
If there is no effect of scratch, Δ_Two≤Δsh_TwoBecomes

When the result of comparison by the comparator 53 is Δ ₂ ≦ Δsh ₂ , the selector 54 outputs the signal S _3B from the flip-flop 42 as it is because there is no influence of black flaws. _{If 2} > Δsh ₂ , the signal S _3B corresponding to the pixel to be corrected is replaced with the output signal Smin ₃ of the minimum comparison value output means 61 and output because the influence of black spots is present.

[0093] Thus, according to this embodiment 4, the defect correcting means 17 _4, when the signal S _3B of the correction target pixel is affected by the black scratches, four pixels around adjacent to the signal S _3B Since the signals S _2B , S _4B , S _3A , and S _3C are replaced with signals that are assumed to have no black flaws, the continuity of the image is maintained more than in the third embodiment. .

Also in the fourth embodiment, as in the third embodiment, the signal S _3B of the pixel to be corrected is taken into account by taking into account the signals included in the fixed range R over five lines above and below the pixel to be corrected. Since the flaw correction process is performed by determining whether or not it is affected by black flaws, highly accurate flaw correction can be realized, and a high-quality image faithfully reflecting the subject image can be obtained.

[0095]

According to the present invention, the presence / absence of a flaw is determined not only by the pixel to be corrected on one line and the left and right pixels as in the prior art, but over the five lines above and below the pixel to be corrected. Taking into account a certain range of signals,
Since the defect correction process is performed after judging whether the signal of the pixel to be corrected is affected by the flaw, high-precision flaw correction can be realized, and a high-quality image that faithfully reflects the subject image Can be obtained.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an overall configuration of an imaging device according to a first embodiment of the present invention.

FIG. 2 is a block diagram of a delay unit included in the imaging apparatus of FIG. 1;

FIG. 3 is a block diagram of a low-pass filter included in the imaging device of FIG. 1;

FIG. 4 is a diagram illustrating signals and CCs handled by the imaging apparatus illustrated in FIG. 1;
Explanatory diagram showing the correspondence relationship between D pixels

FIG. 5 is a block diagram of a flaw correction unit included in the imaging apparatus of FIG. 1;

FIG. 6 is an explanatory diagram showing a correspondence relationship between each signal handled by the flaw correction means shown in FIG. 4 and a pixel of a CCD;

FIG. 7 is a block diagram of a flaw correction unit of the imaging apparatus according to the second embodiment of the present invention.

FIG. 8 is a block diagram of a flaw correction unit of the imaging apparatus according to the third embodiment of the present invention.

FIG. 9 is a block diagram of a flaw correction unit of the imaging apparatus according to the fourth embodiment of the present invention.

FIG. 10 is a block diagram of a flaw correction unit in a conventional imaging apparatus.

FIG. 11 is an explanatory diagram showing the correspondence between each signal handled by the flaw correction means and the pixels of the CCD.

[Explanation of symbols]

10 ... lens, 11 ... image pickup device (CCD), 14 ... delay means, 15 ... mixing circuit, 16 ... LPF (filter means), 17 _{1-17 4} ... defect correcting means, 40 to 47 ... flip-flop (delay elements) , 48... First minimum value output means,
49: second minimum value output means, 50: maximum value output means, 5
DESCRIPTION OF SYMBOLS 1 ... Subtractor, 53 ... Comparator, 54 ... Selector, 60 ... Comparison maximum value output means, 61 ... Comparison minimum value output means, 80 ...
First maximum value output means, 81... Second maximum value output means.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5C021 PA34 PA52 PA56 PA58 PA66 PA85 SA22 XA03 YA06 YC01 5C024 CX21 GY01 HX03 HX05 HX23 HX28 HX50 HX58 5C061 BB05 CC01

Claims (6)

[Claims] 1. An image sensor that outputs a video signal obtained by imaging a subject, and signals S _{1 obtained} by sequentially delaying a signal S ₀ output from the image sensor from one horizontal scanning period to five horizontal scanning periods ~ S ₅
And a signal S ₀ output from the image sensor and each of the signals S _{1 to} S ₅ delayed by the delay means are set to a signal between two signals delayed by one horizontal scanning period. mixes means for generating a signal S _1A '~S _5A' a mix for each pixel, each signal S _1A is output from the mixing means 'to S _5A'
And a flaw correcting means for correcting a defective pixel of the image sensor based on each of the signals S _{1A to} S _5A obtained through the filtering means. Characteristic imaging device. 2. The image pickup apparatus according to claim 1, wherein said filter means includes five filters which can be expressed as (1 + Z ^-1 ) as Z conversion characteristics for each of the input signals S _1A ′ to S _5A ′. Wherein each filter has an adder and a flip-flop, and is configured to add and output the input signal and the output signal of the flip-flop by the adder. apparatus. 3. The image pickup apparatus according to claim 1, wherein said flaw correction means is a signal S _1B obtained by individually delaying each of the signals S _{1A to} S _5A output from said filter means by one clock. a delay element for outputting to S _5B, this among at each signal S _1B to S _5B output from the respective delay elements, S _1B, S _3B, signals individually delayed one clock each signal S _5B A delay element that outputs S _1C , S _3C , and S _5C , a first minimum value output unit that compares the two signals S _2B and S _4B and outputs a smaller signal Smin ₁ , A second minimum value output means for comparing the signals S _3A and S _3C and outputting a signal S min ₂ having a smaller value; and the respective signals S _1A , S _1B , S _1C , S _5A , S _5B , S _5C , Smi
a maximum value output means for outputting a signal Smax ₀ having a maximum value among n ₁ and Smin ₂ , and a signal Δ ₁ obtained by subtracting the signal Smax ₀ output from the maximum value output means from the signal S _3B. A subtractor; an output signal Δ _{1 of the} subtracter; and a preset reference value Δsh ₁
And the comparator S compares the signal S _3B when the result of comparison by this comparator is Δ ₁ ≦ Δsh ₁ , and outputs the signal S _3B when Δ ₁ > Δsh ₁ An image pickup apparatus comprising: a selector for outputting an output signal Smax ₀ of an output means; 4. The image pickup apparatus according to claim 3, wherein said flaw correcting means further compares the output signals Smin ₁ and Smin ₂ of said first minimum value output means and said second minimum value output means. The maximum value output means for outputting the signal Smax ₃ of the larger value is provided, and when the result of comparison by the comparator is Δ ₁ ≦ Δsh ₁ ,
Outputs the signal S _3B, also, delta _1> if Δsh some ₁ includes an imaging apparatus characterized by being configured to output an output signal Smax ₃ of said comparison the maximum value output means. 5. The imaging apparatus according to claim 1 or claim 2, wherein the defect correcting means, each signal S _1A to S _5A individually signal S _1B which is delayed one clock output from said filter means a delay element for outputting to S _5B, this among at each signal S _1B to S _5B output from the respective delay elements, S _1B, S _3B, signals individually delayed one clock each signal S _5B A delay element that outputs S _1C , S _3C , and S _5C , a first maximum value output unit that compares the two signals S _2B and S _4B and outputs a larger signal Smax ₁ , Second maximum value output means for comparing the signals S _3A and S _3C and outputting a signal S max ₂ having a larger value; and the respective signals S _1A , S _1B , S _1C , S _5A , S _5B , S _5C , Sma
a minimum value output means for outputting a signal Smin ₀ having a minimum value among x ₁ and Smax ₂ , and a signal Δ ₂ obtained by subtracting the signal Smin ₀ output from the minimum value output means from the signal S _3B. A subtractor; an output signal Δ _{2 of the} subtracter; and a preset reference value Δsh ₂
The signal S _3B is output when the result of comparison by this comparator is Δ ₂ ≦ Δsh ₂ , and when Δ ₂ > Δsh ₂ , the minimum value is output. An image pickup apparatus comprising: a selector for outputting an output signal Smin ₀ of an output unit; 6. The imaging apparatus according to claim 5, wherein the flaw correcting means further compares the output signals Smax ₁ and Smax ₂ of the first maximum value output means and the second maximum value output means to obtain a value. A comparison minimum value output means for outputting a signal Smin ₃ having a smaller value, and the selector, when a result of comparison by the comparator is Δ ₂ ≦ Δsh ₂ ,
Outputs the signal S _3B, also, delta _2> when .DELTA.Sh ₂ there is an imaging apparatus characterized by being configured to output an output signal Smin ₃ of the comparison minimum value output means.