JP2001239698A - Self scanning type light-emitting apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a self scanning type light-emitting apparatus which can correct a distribution of a quantity of light in light-emitting chips and between the chips by correcting the quantity of light of light-emitting elements. SOLUTION: A driver circuit 100 has CMOS inverter type buffers 102 (each comprised of an NMOS transistor and a PMOS transistor) for signals ϕs, ϕ1, ϕ2 and ≃I I. Particularly the buffer for the write signal ϕI is provided with a voltage output digital/analog converter(DAC) 101 to its power source part. An 8-bit DAC is used for the DAC. The output is made 0V when an input digital value is 00H and 5 V when the input digital value is FFH. The quantity of light can be corrected for all light-emitting elements by changing the digital input to the DAC thereby changing the voltage of the write signal to the light- emitting element.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a self-scanning light emitting device, and more particularly to a self-scanning light emitting device capable of correcting the amount of light.

[0002]

2. Description of the Related Art A light emitting element array in which a large number of light emitting elements are integrated on the same substrate is used as a writing light source for an optical printer or the like in combination with a driving IC. The present inventors have paid attention to a light-emitting thyristor having a pnpn structure as a component of a light-emitting element array, and have already filed a patent application (Japanese Unexamined Patent Publication No. 1-28968) to realize self-scanning of light-emitting points.
No. 2, JP-A-2-14584, JP-A-2-9
2650, Japanese Patent Application Laid-Open No. 2-92651), and demonstrated that the light source for an optical printer can be easily mounted, the pitch of the light emitting elements can be reduced, and a compact self-scanning light emitting device can be manufactured.

Further, the present inventors have proposed a self-scanning light-emitting device having a structure in which a switch element (light-emitting thyristor) array is used as a shift register and is separated from a light-emitting element (light-emitting thyristor) array (JP-A-2-263668). No.).

FIG. 1 shows an equivalent circuit diagram of the self-scanning light emitting device. This light emitting device has switch elements T (1) to
T (4), which includes light-emitting elements for writing L (1) to L (4). The configuration of the switch element portion uses diode connection. V _GK is a power supply (normally 5 V), and a load resistance R
Through _L are connected to the gate electrode G ₁ ~G ₃ of each switch element. Also, the gate electrodes G _{1 to} G of the switch elements
₃ is also connected to the gate electrode of the light emitting element for writing. A start pulse φ _S is applied to the gate electrode of the switch element T (1), transfer clock pulses φ 1 and φ 2 are alternately applied to the anode electrode of the switch element, and an anode electrode of the write light emitting element is write signal phi _I is added.

FIG. 2 shows the pulse waveforms of the start pulse φ _S , transfer clock pulses φ 1 and φ 2, and write signal φ _I. In both φ1 and φ2, the ratio (duty ratio) between the H level time and the L level time is approximately 1: 1.

The operation will be briefly described. First, the transfer clock
Pulse φ₁ Is high level and the switching element T
It is assumed that (2) is on. At this time, the gate electrode
G_Two Is V_GK5V to almost zero V.
The effect of this potential drop is_Two By gate electricity
Pole G_Three To a potential of about 1 V (diode D
_Two Set to the forward rise voltage (equal to the diffusion potential)
You. However, the diode D₁ Is in reverse bias
Gate electrode G₁ No potential connection to
Pole G₁ Remains at 5V. Light emitting thyristor
Is the gate electrode potential + the diffusion potential of the pn junction (about 1
V), the next transfer clock pulse φ_Two 
H level voltage is about 2V (switch element T (3) is turned on)
Or more than about 4 V (switch
Voltage required to turn on the switching element T (5))
If only the switch element T (3) is turned on,
Other switch elements can be left off.
You. Therefore, the on state is switched by two transfer clock pulses.
Will be sent.

The start pulse φ _S is a pulse for disclosing such a transfer operation.
_S and the L level (about 0V) to simultaneously transfer clock pulses phi ₂ H level (about 2 to about 4V), turns on the switching element T (1). Immediately thereafter, the start pulse φ _S is returned to the H level.

[0008] Now, when the switch element T (2) is in the on state, the potential of the gate electrode G ₂ is, lower than V _GK (here assumed to 5V), becomes substantially 0V. Accordingly, the voltage of the write signal phi _I is, if the diffusion potential (about 1V) or more pn junction, the light-emitting element L (2) may be a light emitting state.

On the other hand, the gate electrode G ₁ has a voltage of about 5 V, and the gate electrode G ₃ has a voltage of about 1 V. Therefore, the write voltage of the light emitting element L (1) is about 6V,
The write voltage of (3) is about 2V. Now, the voltage of the write signal phi _I can write only in the light emitting element L (2) is a range of 1 to 2 V. The light emitting element L (2) is on,
That is, when the light emission state is entered, the light emission intensity becomes equal to the write signal φ.
It is determined by the amount of current flowing to _I , and it is possible to write an image at an arbitrary intensity. Further, in order to transfer the light-emitting state to the next light emitting element, the voltage of the write signal phi _I lines at a time 0
It is necessary to temporarily turn off the light emitting element which emits light to V.

[0010] Such a self-scanning type light emitting device is, for example, a chip having a light emitting point of 600 dpi / 128 (length of about 5.4 m).
m). Such a light emitting chip is manufactured on a wafer and obtained by dicing. The distribution of the light amount at the light emitting points in the obtained chip is small, but the distribution of the light amount between the chips is large.

FIG. 3 shows an example of the light quantity distribution in the wafer.
FIG. 3A shows a 3-inch wafer 10 as shown in FIG.
Shows a distribution of light output (light amount) at a position in the XY coordinate system of FIG. However, this light output is standardized by the average value in the wafer. In FIG. 3B,
4 shows a light amount distribution on four horizontal axes with different Y coordinates. Light emitting points are arranged in the X direction, and the length of one chip is
It is assumed to be about 5.4 mm.

From FIG. 3 (B), the light quantity distribution in the chip is at most about ± 0.5% except for the extreme peripheral portion of the wafer, but the concentric mortar-shaped light quantity distribution in the wafer gives It can be seen that the average light amount has a spread of about 6%. It is also known that other wafers have substantially the same light amount distribution shape, but the average light amount varies from wafer to wafer. Thus, 5.4
Considering the chip width of about mm, the light amount values are well aligned. However, considering the variation in the wafer and between the wafers, the average light amount value of the chip shows a wide distribution.

Accordingly, a self-scanning light emitting element array having a uniform light amount distribution is manufactured by arranging light emitting chips having the same average light amount. For example, if you want to suppress the average light amount of the chip to ± 1%, set the light emitting chip to 2%
It is necessary to sort chips having the same rank into a plurality of light quantity ranks having a width of
Reference).

However, in practice, there is an error in the output impedance of the resistor and the driver circuit, so that it is necessary to further narrow the rank width. In order to reduce the variation in the output impedance of the driver circuit, the output impedance itself must be reduced after all, resulting in an increase in element area and an increase in cost. Also, highly accurate resistors are expensive. In addition, when the self-scanning light emitting device is used for an optical device such as an optical printer, the accuracy requirement of the lens system becomes high.

Further, when the number of ranks of the light-emitting chips increases, not only the task of sorting becomes complicated, but also there is a problem that many kinds of stocks must be kept at the time of assembling, and the efficiency is low.

An object of the present invention is to provide a self-scanning light emitting device capable of correcting the light amount of a light emitting element and correcting the light amount distribution in a light emitting chip and between chips.

[0017]

According to the present invention, light quantity correction of a light emitting element is performed by voltage modulation. On the other hand, as another method, there is a method of adjusting the light emission time by time division. In the optical printer head, the writing light emission time becomes shorter as the printing speed increases. Normally, the pulse timing is an integral multiple of the basic clock cycle. Therefore, in the method of adjusting the light emission time, the cycle of the basic clock becomes the resolution. For example, if the basic clock cycle is 20 ns and the lighting time is 400 ns at the maximum, the lighting time can be adjusted only in 5% units.

On the other hand, when the light quantity correction is performed by the voltage modulation according to the present invention, since the adjustment can be performed with the digital / analog conversion accuracy of the voltage source, the precise light quantity correction can be performed.

Therefore, in the embodiment of the self-scanning light-emitting device of the present invention, each of the three-terminal switch element arrays in which a large number of three-terminal switch elements having control electrodes whose threshold voltage or threshold current can be controlled from the outside is arranged. The control electrodes of the switch elements are connected to each other by first electrical means, the power supply lines are connected to the control electrodes of the switch elements by second electrical means, and the remaining two electrodes of each switch element are connected. A self-scanning switch element array formed by connecting a clock line to one of the terminals, and a light emitting element array in which a large number of three-terminal light emitting elements having control electrodes whose threshold voltage or threshold current can be externally controlled are arranged. Consisting of
A self-scanning light-emitting element in which each control electrode of the light-emitting element array is connected to a control electrode of the switch element, and a write signal line for applying a current for light emission to one of the remaining two terminals of each light-emitting element is provided; In a self-scanning light-emitting device in which a plurality of array chips are arranged, the amount of light emitted from each light-emitting element is corrected by modulating the voltage to the write signal line for every light-emitting element, or By modulating the voltage on a chip basis, the amount of light emitted from the light emitting element is corrected on a chip basis.

[0020]

Embodiments of the present invention will be described below with reference to the drawings.

[0021]

Embodiment 1 FIG.
Driver for Driving “Evaluation Type Light Emitting Element Array” Chip 200
1 shows a circuit 100. The figure shows three light emitting chips
is there. Driver circuit 100 for driving light emitting chip 200
Is the start pulse φ for each chip._S , Two-phase clock
Pulse φ1, φ2, write signal φ_I , Power supply voltage V _GK
Supply. Note that φ shown in the chip 200 in FIG.
_S , Φ1, φ2, φ_I, V_GKAre supplied with these signals
Shows the pad.

The driver circuit 100 controls the signals φ _S , φ
1, .phi.2, CMOS inverter-type buffer 10 for phi _I
2 includes a (consisting of NMOS and PMOS transistors), particularly a buffer for the write signal phi _I, digital / analog voltage output to the power supply section
A converter (DAC) 101 is provided.

This DAC uses an 8-bit DAC. When the digital value of the input is 00H, the output is 0V.
When the digital value of the input was FFH, the output was 5V. Voltage of phi _I pin when the light-emitting element turned on, because it is about 1.5V, does not use the following voltage value 1.5V in this DAC 101. Assuming that light output is proportional to voltage,

[0024]

(Equation 1)

By changing the digital input of the DAC, an intermediate value of 178 optical outputs can be expressed.

In FIG. 4, reference numeral 12 denotes a V _S terminal, 1
4 v1 terminal, 16 v2 terminals, 21, 22 and 23 v _I terminals for each chip, 31, 32, 33 D for each chip
The input data (8 bits) of the AC 101 is shown.

FIG. 5 shows an example of a pulse for driving the driver circuit 100 shown in FIG. v is each of the terminals 12, 14,.
Voltages 16, 16, 22, 23, and d indicate data sets (8 bits) 31, 32, 33, which are correction data. The data set may be serial or parallel. Such correction data is obtained at the timing when the buffer 102 is turned on, that is, when the voltages v (21) and v (2
2), v (23) is sequentially written to all light emitting points at the timing of L. Then, by selecting the correction data and changing the voltage of the write signal to the light emitting elements, the light amount correction can be performed for all the light emitting elements.

As described above, the light amount correction may be performed for all the light emitting elements. However, since the self-scanning light emitting element array chip has a small light amount distribution in the chip as described above, the light amount correction may be performed for each chip. . In this case, the correction data may be written and held in the DAC 101 at the power-on timing.

In the above configuration, the number of wirings can be reduced by providing each DAC with a latch and an enable terminal.

In a circuit for lighting a plurality of chips in a time-division manner, such as a self-scanning light-emitting device, the number of drive ICs is reduced, so that the number of DACs is similarly reduced and the circuit can be easily realized.

[0031] In this embodiment, phi is provided with the DAC to the power of the buffer for _I, the voltage of the substrate of the self-scanning light-emitting array chip may be adjusted individually DAC.

[0032]

Second Embodiment FIG. 6, in the embodiment of FIG. 4, as a buffer for the phi _I, the CMOS inverter and the diode 64 for voltage shifts to the positive power supply side provided (NMOS transistor 61, PMOS transistor 63), the diode 6
4 and an NMOS transistor 62 connected in parallel to a series circuit of an NMOS transistor 61. In the figure, this buffer is indicated by 104.
In the figure, reference numerals 41, 42 and 43 denote v _I terminals of each chip,
51, 52 and 53 is a signal terminal for increasing the phi _I voltage of each chip.

When the signal terminal 51 is in the H state, the v _I terminal 41
There becomes L, the only NMOS transistor 61 is the voltage to turn on and phi _I terminal via the diode 64 is supplied.
The forward rise voltage of the silicon diode is about 0.6
Therefore, when the power supply is + 5V, the output voltage of the buffer 104 is 4.4V. On the other hand, when the v _I terminal 41 is L
In this state, when the signal terminal 51 becomes L, not only the transistor 61 but also the NMOS transistor 62 are turned on, so that the potential difference between both ends of the diode 64 becomes 0 and the diode is turned off. Therefore, only the current path on the transistor 62 side is valid, and the output voltage of the buffer 104 becomes +5 V as it is the power supply voltage.

Now, the voltage of the light emitting element φ _I at the time of ON is 1.5
When the signal terminal 51 is H, the φ _I current is (4.4−1.5) / R when the value of the current limiting resistor is R _I because the V _I terminal 41 is L. _{When I} and the signal terminal 51 are at L, (5−1.5) / R _{I is obtained} . When the signal terminal 51 is at H, the current at the signal terminal 51 is 17% smaller than at L.

The light quantity adjustment is performed at a rate of the time when the signal terminal 51 is at L while the v _I terminal 41 is at L.
With this method, the adjustable range is only 17%,
v The time when the _I terminal 41 is L is 4 per light emitting point.
00 ns and the basic clock is 20 ns, 17% /
The light amount can be adjusted with a resolution of 20 ≒ 1%.

If the voltage adjustment width is further required, the number of diodes may be increased to two or three.

FIG. 7 shows an example of a pulse for driving the driver circuit 100 shown in FIG. v is each of the terminals 12, 14,.
16, 41, 42, 43, 51, 52, and 53 are shown. While the voltages v (41), v (42) and v (43) are L, the voltages v (51), v (52) and v (5)
The time when 3) becomes L is adjusted.

FIG. 8 shows how the light output of each light-emitting point becomes in the example of the driving waveform of FIG. In FIG. 8, v (4
1) shows the light output of the light-emitting point with respect to the waveforms of v (51), and L (# 1) represents the light output of the N-th light-emitting point of the first chip (the left chip in FIG. 6). . Signal terminal 51
It can be seen that the amount of light can be adjusted by changing the time during which L is low.

Although a diode is used for voltage shifting in the embodiment of FIG. 6, a resistor may be used.

Also in the present embodiment, the light quantity can be corrected in a chip unit as in the first embodiment.

[0041]

Embodiment 3 In the embodiment of FIG. 6, the power supply of the NMOS transistor 62 is the same as the power supply (+) of the CMOS (61, 63).
5V). In the present embodiment, as shown in FIG.
_It was taken out to the _I modulation voltage terminal 80. Other structures are
It is the same as FIG. 6, and the same components are denoted by the same reference numerals. Here, 71, 72 and 73 are driver φ _I output terminals.

In the above configuration, the voltage terminal 80
FIG. 10A shows a seven-step voltage v as shown in FIG.
(80) is added. In this example, the voltage at the Nth stage is 4.
It is determined to be 4 + 0.1 × (N−1) ² .

[0043] by a pulse of the signal terminal 51, a voltage of phi _I output terminal 71 v (71), can be varied as shown in FIG. 10 (B). That is, when v (41) is L, the NMOS transistor 61 is turned on.
If (51) is H, diode 64 and NMOS
A current flows through the transistor 61, and v (71) is 4.4 V
Becomes When v (51) becomes L, the NMOS transistor 62 is turned on, and the voltage of v (71) is determined by the voltage v (80) of the modulation voltage terminal 80. FIG. 10B shows this state.

According to such a change of v (71), the average voltage during the lighting time was 4.71V. In this method, this voltage average value is set between 4.4 V and 5.3 V,
It can be adjusted with a resolution of 0.014V. Thereby, the cumulative exposure amount can be adjusted.

This embodiment is for adjusting the light amount.
Although the minimum value is 4.4 V, the minimum voltage can be further reduced by increasing the number of stages of the diode 64.

In this embodiment, the uniformization by adjusting the light quantity is described as an example. However, the same technique can be used to express the gradation.

In each of the embodiments described above, a self-scanning light emitting element array having a common cathode is described.

[0048]

According to the present invention, in the self-scanning light-emitting device, the light amount of the light-emitting elements can be corrected in units of all the light-emitting elements or in units of the self-scanning light-emitting element array chip. Can be performed by modulating. Therefore, print quality can be improved in an optical printer head using such a self-scanning light emitting device.

[Brief description of the drawings]

FIG. 1 is a diagram showing an equivalent circuit diagram of a self-scanning light emitting device.

FIG. 2 is an operation waveform diagram of the circuit of FIG.

FIG. 3 is a diagram showing an example of a light quantity distribution in a wafer.

FIG. 4 is a diagram showing a driver circuit for driving an “anode common two-phase driven self-scanning light emitting element array” chip.

FIG. 5 is a diagram illustrating an example of a pulse for driving the driver circuit of FIG. 4;

FIG. 6 is a diagram illustrating another example of the driver circuit.

FIG. 7 is a diagram illustrating an example of a pulse for driving the driver circuit of FIG. 6;

FIG. 8 is a diagram showing a state of light output at each light emitting point by the driving pulse of FIG. 7;

FIG. 9 is a diagram illustrating another example of the driver circuit.

FIG. 10 is a diagram showing a correspondence between a voltage v (80) and a driver output v (71).

[Explanation of symbols]

 61, 62, 63 MOS transistor 64 diode 80 modulation voltage terminal 100 driver circuit 101 DAC 102, 104 buffer 200 self-scanning light emitting element array chip

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Harunobu Yoshida 3-5-11, Doshumachi, Chuo-ku, Osaka-shi, Japan Inside Nippon Sheet Glass Co., Ltd. (72) Inventor: Takeshi Yamashita 3 Doshomachi, Chuo-ku, Osaka-shi, Osaka 5-11, Nippon Sheet Glass Co., Ltd. F-term (reference) 2C162 AE28 AF04 AF22 AF60 AF70 FA04 FA17 5F041 AA09 AA10 BB03 BB04 BB33 CB22 FF13

Claims (8)

[Claims] A control electrode of each switch element of a three-terminal switch element array in which a plurality of three-terminal switch elements having control electrodes whose threshold voltage or threshold current can be controlled from the outside is connected to each other by a first electrical connection. Means, a power supply line is connected to the control electrode of each switch element using the second electrical means, and a clock line is connected to one of the remaining two terminals of each switch element. A self-scanning switch element array, and a light-emitting element array in which a large number of three-terminal light-emitting elements having control electrodes whose threshold voltage or threshold current can be controlled from the outside are arranged. A self-scanning type connecting a control electrode of the switch element and providing a write signal line for applying a current for light emission to one of the remaining two terminals of each light emitting element; In a self-scanning light-emitting device in which a plurality of optical element array chips are arranged, the amount of light emitted from each light-emitting element is corrected by modulating the voltage to the write signal line for every light-emitting element. Self-scanning light emitting device. 2. The control electrode of each switch element of a three-terminal switch element array in which a large number of three-terminal switch elements having control electrodes whose threshold voltage or threshold current can be controlled from the outside is connected to each other by a first electrical connection. Means, a power supply line is connected to the control electrode of each switch element using the second electrical means, and a clock line is connected to one of the remaining two terminals of each switch element. A self-scanning switch element array, and a light-emitting element array in which a large number of three-terminal light-emitting elements having control electrodes whose threshold voltage or threshold current can be controlled from the outside are arranged. A self-scanning type connecting a control electrode of the switch element and providing a write signal line for applying a current for light emission to one of the remaining two terminals of each light emitting element; In a self-scanning light emitting device in which a plurality of optical element array chips are arranged, the amount of light emitted from the light emitting element is corrected in units of chips by modulating the voltage to the write signal line in units of chips. Scanning light emitting device. 3. A driver circuit for driving the self-scanning light emitting element array chip, wherein the driver circuit has a buffer for supplying a voltage to the write signal line,
3. A self-scanning light emitting device according to claim 1, wherein a digital / analog converter is provided on a power supply side of the buffer, and an output voltage of the buffer is modulated by selecting a digital input value of the converter. apparatus. 4. The self-scanning light emitting device according to claim 3, wherein said buffer is a CMOS inverter type buffer. 5. A driver circuit for driving the self-scanning light emitting element array chip, wherein the driver circuit has a buffer for supplying a voltage to the write signal line, and wherein the buffer has first and second buffers. A CMOS circuit composed of MOS transistors, a voltage shift element provided between the first MOS transistor and a power supply, and a voltage shift element connected in parallel to a series connection circuit of the voltage shift element and the first MOS transistor. 3. The self-scanning light-emitting device according to claim 1, further comprising a third MOS transistor having the same conductivity type as said first MOS transistor. 6. The self-scanning light emitting device according to claim 5, wherein said voltage shift element is a diode or a resistor. 7. A driver circuit for driving the self-scanning light-emitting element array chip, the driver circuit having a buffer for supplying a voltage to the write signal line, wherein the buffer comprises first and second buffers. A CMOS circuit comprising a MOS transistor, a voltage shift element provided between the first MOS transistor and a power supply, a connection point between the first MOS transistor and the second MOS transistor, and a power supply for modulation. And a third MOS transistor of the same conductivity type as the first MOS transistor provided between the first and second MOS transistors.
The self-scanning light-emitting device according to any of the preceding claims. 8. The self-scanning light emitting device according to claim 7, wherein said voltage shift element is a diode or a resistor.