JP2001230406A - Solid-state image sensing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a solid-state image sensing device with a high-gain source- follower-type amplifier where a power supply voltage VDD with a higher potential than a substrate voltage Vs is supplied. SOLUTION: A first conductivity type semiconductor substrate 10 is connected to an approximately 5 V substrate voltage Vs. A second conductivity type region 11 is formed on the first conductivity type semiconductor substrate 10, a first conductivity type well 12 is formed in it, and a second conductivity well 13 is formed in it. In the second conductivity type well 13, a driver transistor Q13 is formed, and the well 13 is connected to a source diffusion layer 18a of the driver transistor Q13. In the second conductivity type region 11, a load transistor Q23 is formed and is connected to the ground. The first conductivity type well 12 is connected to an approximately 15 V power supply voltage VDD via a first conductivity type diffusion layer 16. The second conductivity type well 13 is electrically separated from the first conductivity type well 12.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device, and more particularly to an output amplifier having a buffer function for amplifying a weak electric signal detected by a photoelectric conversion unit.

[0002]

2. Description of the Related Art A MOS solid-state imaging device includes an imaging region for converting light into electric charges by photoelectric conversion, a charge transfer unit for transferring electric charges, and an output amplifier for converting electric charges to a predetermined voltage signal. The imaging region generates charges corresponding to incident light by, for example, a large number of photodiodes arranged in an array. The output amplifier section is configured as a source follower type amplifier having a low output impedance, and is mounted on the same substrate together with the imaging area section and the charge transfer section.

FIGS. 5 (a) and 5 (b) show Japanese Unexamined Patent Publication No.
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram and a structural diagram of a solid-state imaging device described in Japanese Patent No. 23161. FIG. 1A is a circuit diagram of an output unit constituting a source follower type amplifier. The source follower type amplifier includes a driver transistor Q14 connected in series with each other and inputting an electric signal Si to a gate, and a load transistor Q24 inputting a bias voltage Vb to a gate.
Having. Driver transistor Q14 operates as a source follower amplifier, and load transistor Q24
Works as a constant current source (source-side resistor) of the source follower amplifier.

FIG. 1B is a cross-sectional view showing a structure of an output amplifier section of the solid-state imaging device. The solid-state imaging device is formed on a first conductivity type (N-type) semiconductor substrate 10. The driver transistor Q14 is connected to the second
The load transistor Q24 is formed in the conductivity type (P-type) region 11 and has a first second conductivity type (P-type) shown on the left side in FIG.
(Mold) region 11. Driver transistor Q
14 and the load transistor Q24 constitute the source follower amplifier of FIG.

[0005]

The technique disclosed in the above publication increases the gain of the source follower type amplifier by connecting the source and the substrate of the driver transistor Q14.

In the solid-state imaging device, the substrate voltage Vs is supplied to the semiconductor substrate 10 so that the photodiode in the imaging region exhibits good characteristics, and the operation of the source follower type amplifier can secure a linear range. The power supply voltage VDD is supplied to the drain side of the source follower amplifier. Conventionally, the voltages of the substrate voltage Vs and the power supply voltage VDD are
The substrate voltage was about 15 V, but the substrate voltage Vs is currently suppressed to about 5 V with the reduction in power consumption.

In the source follower amplifier, the potential of the source diffusion layer 18a of the driver transistor Q14 is maintained at about 7.5 V, which is an intermediate voltage of the power supply voltage VDD, so that a linear operation range can be secured. Is the same as the potential of the source diffusion layer 18a of the driver transistor Q14. Here, by lowering the substrate voltage Vs to about 5 V for lowering the voltage, the potential of the second second conductivity type region 11 becomes higher by about 2.5 V than that of the first conductivity type semiconductor substrate 10. Therefore, the PN junction surface with the semiconductor substrate 10 is biased in the forward direction. In this case, the function of driver transistor Q14 is impaired because second second conductivity type region 11 and first conductivity type semiconductor substrate 10 are not electrically separated.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems of the prior art, and is effective in supplying a power supply voltage VDD having a higher potential than the substrate voltage Vs. It is an object of the present invention to provide a solid-state imaging device including a high-gain source follower amplifier capable of supplying a reverse bias voltage to a PN junction surface.

[0009]

In order to achieve the above object, a solid-state image pickup device according to the present invention is a solid-state image pickup device having a source follower type amplifier, comprising: a first conductive type substrate; A second conductivity type region formed, a first conductivity type well and a load transistor formed in the second conductivity type region; a second conductivity type well formed in the first conductivity type well; A driver transistor formed in a second conductivity type well, wherein the load transistor and the driver transistor form a source follower amplifier.

In the solid-state imaging device according to the present invention, even if the substrate voltage supplied to the first conductivity type semiconductor substrate is lower than the power supply voltage supplied to the drain of the driver transistor, the second conductivity type well which is the source of the driver transistor is formed. Since it is electrically separated from the first conductivity type semiconductor substrate, it operates as a high gain source follower amplifier.

In the solid-state imaging device according to the present invention, the source of the driver transistor is connected to the second conductivity type well, or the drain of the driver transistor is connected to the first conductivity type well. Is preferred. In this case, the first conductivity type well and the second conductivity type well are reliably electrically separated.

In the solid-state image pickup device of the present invention, the solid-state image pickup device has a three-stage source follower amplifier connected in cascade, and a driver transistor of the first-stage source follower amplifier is formed in the second conductivity type region. The driver transistors of the source follower amplifiers of the second and third stages may be formed in the second conductivity type well.

In the solid-state imaging device according to the present invention, the driver transistor and the load transistor may be of a surface type or a buried type.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a solid-state imaging device according to the present invention will be described based on an embodiment of the present invention with reference to the drawings. FIG. 1 is a cross-sectional view illustrating a structure of a solid-state imaging device according to an embodiment of the present invention. The solid-state imaging device according to the present embodiment includes an imaging region unit 10 that performs photoelectric conversion and generates an electric signal.
2, and an output amplifier unit 101 for converting an electric signal into a detection signal, and is configured on a first conductivity type (N-type) semiconductor substrate 10. The first conductivity type semiconductor substrate 10 is connected to a substrate voltage Vs of about 5V. First conductivity type semiconductor substrate 10
A second conductivity type (P-type) region 11 is formed thereon, a first conductivity type well 12 is formed in the second conductivity type region 11,
A second conductivity type well 13 is formed in the first conductivity type well 12.

FIG. 2 is a circuit diagram of the output amplifier section 101 of FIG. The source follower amplifiers 3 to 5 at each stage are n-channel driver transistors Q11 to Q1 respectively.
3 and n-channel type load transistors Q21 to Q23
Are configured as a set. Driver transistor Q1
All the drains of 1 to Q13 have a power supply voltage V of about 15V.
Connected to DD. Load transistors Q21 to Q23
Gate, source, and substrate are all connected to ground. Driver transistors Q11-Q1
3 are the corresponding load transistors Q21
To Q23.

The driver transistor Q11 has a gate connected to the input terminal 1, a substrate connected to the ground, and a source connected to the gate of the driver transistor Q12. The driver transistor Q12 has a source of the substrate and a driver transistor Q12.
13 gates. Driver transistor Q1
Reference numeral 3 denotes a source connected to the substrate and the output terminal 2. In the solid-state imaging device, an input terminal 1 is connected to an electric signal output terminal of an imaging region (not shown), and an output terminal 2
Are connected to a signal input terminal of an external circuit (not shown).

The driver transistors Q11 to Q13 are
Signals input to the respective gates are converted to low impedance, and output from the sources as in-phase signals. The load transistors Q21 to Q23 operate as a constant current source through which a set constant drain current flows, and the apparent impedance becomes high between the drain and the source. The source follower amplifiers 3 to 5 have low amplification when the resistance between the source of the driver transistor and the ground is small. When a fixed resistor is connected between the source of the driver transistor and the ground, the amplitude of a signal output from the source is attenuated when a fixed resistor is connected.

FIG. 3 shows the source follower type amplifier 5 shown in FIG.
FIG. 3 is a cross-sectional view showing the structure of FIG. The first conductivity type diffusion layer 16
Configure the contact area to connect with the aluminum wiring,
It is formed on a surface portion on the first conductivity type well 12. First
The conductivity type well 12 is connected to the power supply voltage VDD via the first conductivity type diffusion layer 16. Driver transistor Q1
Reference numeral 3 denotes a surface type formed on the second conductivity type well 13 and having no channel in advance. Load transistor Q2
Reference numeral 3 denotes a buried type which is formed on the second conductivity type region 11 and has a channel as the first conductivity type channel region 14 in advance, and all transistors except the driver transistors Q11 and Q13 are buried type.

As for the design values of the gate length and the gate width, optimum values are adopted for all the transistors so that the transistor characteristics such as the band satisfy the design criteria. Here, if either the surface type or the buried type is designated, the transistor structure becomes the same.

The gate insulating film has a structure of only a silicon oxide film or a structure in which a silicon nitride film is sandwiched between silicon oxide films (ONO film). Gate electrodes 19a and 19b
Is made of polysilicon and has a low resistance like a metal by diffusing an N-type impurity such as phosphorus. The first conductivity type diffusion layer 16, the source diffusion layers 18a and 18b, and the drain diffusion layers 17a and 17b are doped with an N-type impurity such as phosphorus.
Formed by pressing. The ion implantation is performed on the P-type region and the N-type region at an implantation concentration of 1E12 using acceleration energy of several hundred keV.

FIG. 4 shows the source follower type amplifier 5 of FIG.
It is a top view which shows the structure of. The wirings 21 to 24 use aluminum as a wiring material. The contact 34 is directly connected to the second conductivity type well 13 because it is connected to the P-type region. Contacts 31-33 and 35-38
Are connections to the N-type regions, respectively, and are connected via diffusion layers into which N-type impurities have been implanted so that good ohmic contact can be obtained.

Here, the gain G of the source follower type amplifier will be described. The source follower amplifier has a transconductance of g for the driver transistor.
m, the conductance of the substrate is gmb, the output conductance is gds1, and the output conductance of the load transistor is gds2.
Is represented by gm / (gm + gmb + gds1 + gds2). If the substrate and the source of the driver transistor are connected, gmb in the above equation becomes 0, and the gain G increases.

Driver transistor Q13 has a channel coupled to gate electrode 19a via a gate oxide film, and a channel coupled to second conductivity type well 13 via a depletion layer immediately below. Driver transistor Q13 modulates the channel potential when a signal is input to gate electrode 19a. The modulation of the channel potential is promoted when the mutual conductance gm indicating the degree of coupling between the gate electrode 19a and the channel is large, and the conductance gmb of the substrate indicating the degree of coupling between the second conductive type well 13 and the channel, which is a constant potential, is increased. Promoted when small.

In the solid-state imaging device, the signal charge obtained by the photoelectric conversion is converted into the floating charge capacity of the output section, the wiring capacity from the floating charge capacity to the first-stage driver transistor Q11, and the input capacity of the first-stage driver transistor Q11. Since the voltage is converted by the charge detection capacitance composed of the sum and output via the source follower amplifier, the output voltage decreases if the charge detection capacitance is large. When the present invention is applied to the first-stage source follower 3, the gain G of the first-stage source follower 3 increases, but the wiring length from the floating charge capacitance to the first-stage driver transistor Q11 increases, and the charge detection capacitance increases. However, it is often the case that the present invention is not applied to the first stage source follower 3. Therefore, in the present embodiment, the present invention is not applied to the first-stage source follower 3. Driver transistor Q11
Has a transistor structure in which the substrate is connected to the ground. When importance is attached to the improvement of the gain G,
Alternatively, when the wiring capacitance is small, a transistor structure in which the substrate and the source of the driver transistor are connected to all the source follower amplifiers 3 to 5 is employed.

The potential of the well 12 of the first conductivity type becomes 15 V, the potential of the well 13 of the second conductivity type becomes 7.5 V, the potential of the semiconductor substrate 10 of the first conductivity type becomes 5 V, and the region of the second conductivity type becomes The potential of 11 becomes 0V. First conductivity type well 1
2, second conductivity type well 13, first conductivity type semiconductor substrate 1
In the 0 and second conductivity type regions 11, the PN junction surfaces formed are all reverse-biased.

According to the above embodiment, even if the substrate voltage supplied to the semiconductor substrate of the first conductivity type is lower than the power supply voltage supplied to the drain of the driver transistor, the well of the second conductivity type, which is the source of the driver transistor, remains Since it is electrically separated from the first conductivity type semiconductor substrate, it operates as a high gain source follower amplifier.

Although the N-channel transistor has been described in the above embodiment, a similar effect can be obtained for a P-channel transistor by changing the conductivity type of the impurity. In the above embodiment, the configuration in which only the driver transistors Q13 and Q23 are of the surface type has been described. However, the present invention can be applied to a configuration in which each transistor is either of the surface type or the buried type.

Although the present invention has been described based on the preferred embodiment, the solid-state image pickup device of the present invention is not limited to the configuration of the above-described embodiment, but the configuration of the above-described embodiment. The solid-state imaging device in which various modifications and changes have been made are also included in the scope of the present invention.

[0029]

As described above, in the solid-state imaging device of the present invention, even if the substrate voltage supplied to the first conductivity type semiconductor substrate is lower than the power supply voltage supplied to the drain of the driver transistor, the source of the driver transistor is not affected. Is electrically isolated from the semiconductor substrate of the first conductivity type, so that it operates as a source follower amplifier with high gain. Further, since the substrate voltage to be supplied can be set low, it is possible to contribute to low power consumption measures.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a structure of a solid-state imaging device according to an embodiment of the present invention.

FIG. 2 is a circuit diagram of an output amplifier of the solid-state imaging device of FIG. 1;

FIG. 3 is a cross-sectional view showing a structure of a third-stage source follower amplifier 5 of FIG. 2;

FIG. 4 is a plan view showing a structure of a third-stage source follower amplifier 5 of FIG. 2;

FIGS. 5 (a) and 5 (b) show Japanese Patent Application Laid-Open No. 60-223.
161 is a circuit diagram and a structural diagram of a solid-state imaging device described in JP-A-161-161.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Input terminal 2 Output terminal 3 First stage source follower amplifier 4 Second stage source follower amplifier 5 Third stage source follower amplifier 10 First conductivity type semiconductor substrate (N type) 11 Second conductivity type region (P type) 12 First conductivity type well (N type) 13 Second conductivity type well (P type) 14 First conductivity type channel region (N type) 16 First conductivity type diffusion layer (N type) 17a, 17b Drain diffusion layer (N type) 18a, 18b Source diffusion layer (N type) 19a, 19b Gate electrode 21-24 Wiring 31-38 Contact Q11-Q14 Driver transistor (n-channel type) Q21-Q24 Load transistor (n-channel type) VDD Power supply voltage Vs Substrate voltage Vb bias voltage Si electric signal So detection signal

Claims (5)

[Claims] 1. A solid-state imaging device having a source-follower type amplifier, wherein a first conductivity type substrate, a second conductivity type region formed in the first conductivity type substrate, and a second conductivity type region are formed in the second conductivity type region. The first conductivity type well and the load transistor, the second conductivity type well formed in the first conductivity type well, and the second conductivity type well and the load transistor.
A solid-state imaging device comprising: a driver transistor formed in a conductive well; wherein the load transistor and the driver transistor form a source follower amplifier. 2. The solid-state imaging device according to claim 1, wherein a source of said driver transistor is connected to said second conductivity type well. 3. The solid-state imaging device according to claim 1, wherein a drain of said driver transistor is connected to said first conductivity type well. 4. A solid-state imaging device comprising a cascade-connected three-stage source-follower amplifier, and a driver transistor of the first-stage source-follower amplifier is formed in the second conductivity type region. The solid-state imaging device according to claim 1, wherein a driver transistor of a third-stage source-follower amplifier is formed in the second conductivity type well. 5. The solid-state imaging device according to claim 1, wherein said driver transistor and said load transistor are of a surface type or a buried type.