JP2001222325A - Position controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a position controller constituting a loop filter having frequency response characteristic for reducing a frequency band showing phase delay and increasing a gain in a low frequency band while using a filter whose order is low a muck as possible. SOLUTION: A loop filter 1 is composed of a low pass filter 1L and a high pass filter 1H connected in parallel. The low pass filter 1L includes a low band compensating means 5 being a primary digital filter in the pre-stage of an integrator 1La being a primary digital filter. In the low band compensating means 5, the gain is made relatively larder in a low band frequency band than a prescribed frequency band, and phase delay is made relatively layer only in the frequency band.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a position control device, and more particularly, to a position control device such as a hard disk drive or a compact disk (CD) player.

[0002]

2. Description of the Related Art Some conventional position control devices have a relatively simple structure because a loop filter is composed of only a primary filter. For example, a focus servo circuit for a CD player disclosed in Japanese Patent Application Laid-Open No. 63-293614 is known. It is a position control device for the actuator 4 as shown in the block diagram of FIG. 4, and comprises a loop filter 11, an error detecting means 2 and a driving means 3.

The error detecting means 2 comprises an error detector 2a and an analog / digital (A / D) converter 2b, and operates as follows. First, the actual position of the actuator 4 (actuator position) and the target position (disk position) are input to the error detector 2a. The error detector 2a detects an error between the input actuator position and the disk position, and uses the detected error as an analog signal as an A / D converter.
Output to 2b. The A / D converter 2b converts the error signal, which is an analog signal, into a digital signal and outputs the digital signal to the loop filter 11.

The loop filter 11 has a low-pass filter 11
L, a high-pass filter 11H and an adder 11a. The error signal input to the loop filter 11 is input to each of the low-pass filter 11L and the high-pass filter 11H.
And after each is processed as described below,
It is output to the adder 11a. The adder 11a adds the error signals from both filters and outputs the result to the driving means 3.

[0005] The low-pass filter 11L includes an adder 11La, a register 11Lb, and a multiplier 11Lc. The external input signal is input to the adder 11La, where it is added to the signal fed back from the register 11Lb. Adder 11La
Is input to the register 11Lb and the multiplier 11Lc. The register 11Lb feeds back the signal from the adder 11La to the adder 11La after holding the signal for a predetermined time. Multiplier
11Lc outputs to the outside over a predetermined constant K _L of a signal from the adder 11La. Thus, the low-pass filter 11L
Is an ordinary digital integrator, that is, a first-order filter, and its transfer function is H _L (z) = K _L / (1−z ⁻¹ ).

[0006] The high-pass filter 11H includes a multiplier 11Ha, a register 11Hb, a multiplier 11Hc, and an adder 11Hd.
An external input signal is input to the multiplier 11Ha and the register 11Hb. The multiplier 11Ha multiplies the input signal by a predetermined constant K _H1 and outputs the result to the adder 11Hd. Register 11Hb
After holding the input signal for a predetermined time, outputs the signal to the multiplier 11Hc. The multiplier 11Hc multiplies the output of the register 11Hb by a predetermined constant K _H2 and outputs the result to the adder 11Hd. The adder 11Hd
The output of the multiplier 11Hc is subtracted from the output of the multiplier 11Ha and output to the outside. With this configuration, the high-pass filter 11H
Is a first-order filter having a transfer function H _H (z) = K _H1 −K _H2 z ⁻¹ .

The transfer function of the loop filter 11 is the sum H _L (z) + H _H (z) of the transfer functions of the low-pass filter 11L and the high-pass filter 11H. Therefore, the multiplier 11L
c, 11Ha and 11Hc are constants applied to input signal
By adjusting K _L , K _H1 and K _H2 , when the sampling frequency of the A / D converter 2b is sufficiently high, the frequency response characteristic of the loop filter 11 is approximated as shown in FIG. Note that the horizontal axis in FIG. 5 represents the logarithm of the frequency. This frequency response characteristic has a frequency ωL
In a lower frequency band, it is approximated by the frequency response characteristic of the low-pass filter 11L. That is, the loop filter 11 performs the integral control operation in the low frequency band. Thereby, the steady-state deviation in the position control is compensated. The frequency response characteristic of the loop filter 11 is approximated by the frequency response characteristic of the high-pass filter 11H in a frequency band higher than the frequency ωH. That is, the loop filter 11 operates as a phase lead compensation circuit in a high frequency band. Thereby, the instability of the position control due to the phase delay in the high frequency band is compensated.

The error signal processed as described above by the loop filter 11 is output to the driving means 3. Drive means 3
Comprises a digital / analog (D / A) converter 3a and a drive circuit 3b. The error signal input from the loop filter 11 is converted from a digital signal to an analog signal by the D / A converter 3a and output to the drive circuit 3b. The drive circuit 3b obtains a control amount for the actuator 4 from the input error signal, and drives the actuator 4 by the control amount. In this manner, the actuator position is adjusted so that the actuator position matches the disk position.
The position of 4 is controlled.

[0009]

In the above-described conventional position control device, when the gain of the loop filter 11 in a low frequency band is increased in order to better compensate for the steady-state deviation, the output of the loop filter 11 is increased. Shows phase lag over a wide frequency band. Then, there is a problem that the response of the position control becomes slow and the position control becomes unstable because phase lead compensation cannot be sufficiently performed. To solve this problem, the frequency response characteristic of the loop filter 11 that is desirable, that is, the frequency response characteristic that the frequency band indicating the phase lag is narrow and the gain in the low frequency band is high, is the low-pass filter 11L and the high-pass filter 11H. This can be achieved by increasing the order. However, there is a problem that the structure of the filter having a higher order than that of the loop filter 11 must be complicated.

Accordingly, the present invention provides a position control device which comprises a loop filter having a frequency response characteristic exhibiting a high gain in a low frequency band while suppressing a frequency band exhibiting a phase lag narrowly using a filter of the lowest possible order. The purpose is to provide.

[0011]

In order to solve the above problems, a position control device according to the present invention comprises: (A) an error detector for detecting an error between an actual position of a position control target and a control target position. And (B) (a) the error output by the error detection means, comprising: an analog-to-digital converter that converts the error detected by the error detector from an analog signal to a digital signal and outputs the signal. (I) the gain in the lower frequency band than the first frequency is larger than the gain in the other frequency bands, and (ii) the first frequency A low-frequency compensator that is a primary digital filter in which a phase delay in a higher frequency band is smaller than a phase delay in another frequency band, and an integrator that integrates the error signal output from the low-frequency compensator. (B) for the error signal output by the error detection means, (i) gain in a higher frequency band than the second frequency higher than the first frequency in another frequency band. A high-pass filter that is a primary digital filter that is larger than the gain, and (ii) the phase lead in a higher frequency band than the second frequency is larger than the phase lead in other frequency bands, and (c) A loop filter having an adder for adding outputs of the low-pass filter and the high-pass filter to each other; and (C)
A digital-to-analog converter that converts the error signal output from the loop filter to an analog signal, and a drive circuit that drives the position control target based on the error signal output from the digital-to-analog converter, Driving means having:

As a result, the frequency response characteristic of the loop filter according to the present invention is such that a gain greater than the conventional one is obtained in a frequency band lower than the first frequency, while a gain similar to the conventional one is obtained in a frequency band higher than the first frequency. Indicates the phase. Therefore, the position control device of the present invention compensates for the steady-state deviation better than before by the loop filter composed of the primary digital filter, while maintaining the same stability in the position control as in the past.

In the position control device according to another aspect, preferably, the high-pass filter multiplies the error signal output from the error detection means by a predetermined first constant and outputs the multiplied signal. Delay means for outputting the error signal output from the error detection means after holding it for a predetermined time, and a second multiplier for multiplying the error signal output from the delay means by a predetermined second constant and outputting the result ,as well as,
A second adder that subtracts the output of the second multiplier from the output of the first multiplier and outputs the result. Thus, the high-pass filter having the above-described frequency response characteristic can be configured to have the desired second frequency from only the primary digital filter. In particular, the number of bits of the input signal to the first and second multipliers does not need to be equal to or greater than the number of bits of the error signal output from the error detection means.

In a position control device according to still another aspect,
Preferably, the low frequency compensating means multiplies the error signal output from the error detecting means by a predetermined third constant and outputs the multiplied signal, the error signal output from the error detecting means A fourth multiplier that multiplies the error signal output from the third multiplier by a predetermined fourth constant, and an output of the fourth multiplier. And a third adder for adding and outputting the output of the second integrator.

Thus, it is possible to configure the low-pass filter having the above-mentioned frequency response characteristic to have a desired first frequency from only the primary digital filter.
In particular, the number of bits of the input signal to the third and fourth multipliers does not need to be equal to or greater than the number of bits of the error signal output by the error detection means.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to preferred embodiments. FIG. 1 is a block diagram showing an embodiment of the position control device of the present invention. This embodiment comprises a loop filter 1, an error detecting means 2, and a driving means 3. The error detecting means 2 has the same configuration as the conventional example shown in FIG. 4, and operates in the same manner as the conventional example. That is, the error detector 2a detects an error from the difference between the input actuator position and the disk position. The A / D converter 2b outputs the detected error signal to the loop filter 1 as a digital signal.

The loop filter 1 includes an adder 1a, a low-pass filter 1L, and a high-pass filter 1H. The error signal input from the error detection means 2 is a low-pass filter 1L
And the high-pass filter 1H, and are processed as described later. After that, the error signals output from the low-pass filter 1L and the high-pass filter 1H are added by the adder 1a and output to the driving means 3. The driving means 3 is shown in FIG.
Has the same configuration as the conventional example shown in FIG. That is, the D / A converter 3a converts the input digital signal, which is an error signal, into an analog signal. The drive circuit 3b is driven by the actuator based on the converted error signal.
Drive 4

The high-pass filter 1H includes a multiplier 1Ha, a register 1Hb, a multiplier 1Hc, and an adder 1Hd. An external input signal is input to the multiplier 1Ha and the register 1Hb. The multiplier 1Ha multiplies the input signal by a predetermined constant K _H1 and outputs the result to the adder 1Hd. After holding the input signal for a predetermined time, the register 1Hb outputs the input signal to the multiplier 1Hc.
The multiplier 1Hc multiplies the output of the register 1Hb by a predetermined constant K _H2 and outputs the result to the adder 1Hd. The adder 1Hd subtracts the output of the multiplier 1Hc from the output of the multiplier 1Ha and outputs the result to the outside.
As described above, the high-pass filter 1H has the same configuration as the conventional high-pass filter 11H shown in FIG. That is, the transfer function H
_This is a first-order filter having _H (z) = K _H1 −K _H2 z ⁻¹ . The frequency response characteristic of the A / D converter 2b
If the sampling frequency is sufficiently high, it can be approximated by the polygonal line in FIG. The phase is as shown in FIG. Note that each horizontal axis in FIGS. 2 and 3 represents the logarithm of the frequency.
As indicated by the polygonal line in FIG. 2D, the high-pass filter 1H
The gain is kept almost constant up to the frequency ωh of the breakpoint Pd determined by the constants K _H1 and K _H2 and the sampling frequency, and when the frequency becomes higher, the gain is increased at a rate of +6 dB / oct. As shown in FIG. 3D, the high-pass filter 1H advances the phase by more than + 45 ° in a high frequency band exceeding the frequency ωh.

The low-pass filter 1L comprises an integrator 1La, a shifter 1Lb, and low-frequency compensation means 5. The external input signal is first input to the low-frequency compensation means 5, where it is processed as described later, and then output to the integrator 1La. The signal input to the integrator 1La is integrated with the signal input before the input, and output to the shifter 1Lb. Signal inputted to the shifter 1Lb is being only bit shifted a predetermined number of bits, i.e., is amplified by _one time predetermined constant S, is output to the adder 1a. Here, the integrator 1La may be a commonly used primary digital filter, and the shifter 1Lb may be a usual one. That is, the integrator 1La and the shifter 1Lb correspond to the conventional low-pass filter 11L (FIG. 4), and the transfer function is H _L (z) = S
₁ / (1−z ⁻¹ ). 2 (b) and 3 (b) show a combination of the frequency response characteristics of the integrator 1La and the shifter 1Lb.
As shown in FIG. 2B, the integrator 1La and the shifter 1Lb decrease the gain at a rate of -6 dB / oct with an increase in frequency. Further, as shown in FIG.3 (b), the integrator 1La and the shifter 1Lb are:
The phase is kept at -90 ° in a frequency band sufficiently lower than the sampling frequency.

The low-frequency compensation means 5 comprises multipliers 5a and 5b, an integrator 5c, a shifter 5d, and an adder 5e. External input signals are input to multipliers 5a and 5b, respectively. The multiplier 5a multiplies the input signal by a predetermined constant K _La and outputs the result to the integrator 5c. The multiplier 5b multiplies the input signal by a predetermined constant K _Lb and outputs the result to the adder 5e. The integrator 5c is an ordinary digital integrator, and integrates the output of the multiplier 5a with a signal input before the input and outputs the integrated signal to the shifter 5d. Shifter 5d is the integrator 5c the output of bit-shifts by a predetermined number of bits amplified by _twice a predetermined constant S, and outputs it to the adder 5e. Adder 5e
Adds the outputs of the shifter 5d and the multiplier 5b to each other and outputs the result to the integrator 1La.

With this configuration, the transfer function of the low-frequency compensation means 5 is H _Lc (z) = K _Lb + K _La · S ₂ / (1−z ^{− 1} ). The frequency response characteristic of the low-frequency compensator 5 is approximated by a broken line shown in FIG. 2A for gain, and is as shown in FIG. 3A for phase. As shown by the polygonal line in FIG.
5 decreases the gain by -6 dB / oct up to the frequency ωc of the break point Pa determined by the constants K _La , K _Lb and S ₂ , and keeps the gain constant above the frequency ωc. Further, as shown in FIG. 3 (a), the low-frequency compensating means 5 shows a large phase lag exceeding -45 ° in a low frequency band up to the frequency ωc, but almost a phase lag in a high frequency band exceeding the frequency ωc. Will not be shown. Therefore,
The signal input to the low-frequency compensation means 5 is greatly amplified in a frequency band lower than the frequency ωc, while a large phase delay exceeding −45 ° is limited to the frequency band.

The transfer function of the low-pass filter 1L is obtained by multiplying the transfer functions of the low-frequency compensation means 5, the integrator 1La and the shifter 1Lb, that is, H _Lc (z) · H _L (z). Therefore, the frequency response characteristic of the low-pass filter 1L is
2 (a) and 3 (a) show the frequency response characteristics of the low-frequency compensator 5 and the integrator 1La and the shifter 1Lb shown in FIGS. 2 (b) and 3 (b).
2 (c) and FIG. 3 (c). As shown by the polygonal line in FIG.
The low-pass filter 1L reduces the gain by -12 dB / oct in a frequency band lower than the frequency ωc of the break point Pc, and by -6 dB / oct in a frequency band higher than the frequency ωc. Figure 3
As shown in (c), the low-pass filter 1L exhibits a phase delay exceeding -135 ° in a frequency band lower than the frequency ωc, and exhibits a constant phase lag of approximately -90 ° in a high frequency band exceeding the frequency ωc.

The transfer function of the loop filter 1 is the sum of the transfer function H _H (z) of the high-pass filter 1H and the transfer function H _Lc (z) · _HL (z) of the low-pass filter 1L. Therefore, the frequency ωc
In FIG. 2, the gain Kd of the high-pass filter 1H (FIG. 2 (d)) is made sufficiently smaller than the gain Kb of the low-pass filter 1L (FIG. 2 (b)), and the frequency at the break point Pd in FIG. When ωh is sufficiently higher than the frequency ωc at the break point Pa in FIG. 2A, the frequency response characteristic of the loop filter 1 is approximated by a broken line in FIG. As shown by the broken line, the loop filter 1 has the same gain (FIG. 5) as that of the conventional loop filter 11 (FIG. 4) in a frequency band higher than the frequency ωc, and has a − in a low frequency band lower than the frequency ωc. Change the gain at a rate of 12dB / oct. Therefore, in the low frequency band, a larger gain than before can be obtained, and the steady-state deviation can be better compensated than before. On the other hand, the frequency response characteristic of the loop filter 1 is as shown in FIG. Therefore, the increase of the delay of the conventional loop filter 11 (FIG. 4) with respect to the phase (FIG. 5) is limited to a lower frequency band than the frequency ωc. Therefore, in the high frequency band, the position control can be stably maintained by the phase lead compensation operation as in the related art.

The loop filter 1 of this embodiment comprises only a primary filter as described above. Therefore, the configuration is simpler than when a similar frequency response characteristic is configured by a Bi-Quad type digital filter as usual. In particular, while a Bi-Quad type digital filter requires at least five multipliers, the loop filter 1 of the present embodiment only needs four multipliers. Therefore, not only the circuit scale can be reduced, but also the calculation processing time can be reduced.

In the conventional low-pass filter 11L (FIG. 4), the multiplier 11Lc is provided after the integrator including the adder 11La and the register 11Lb. In this case, in order to suppress a rounding error when a signal is integrated, the conventional multiplier 11Lc is provided with an A / D converter.
The configuration must handle an input signal having a larger number of bits than the error signal from 2b. On the other hand, in the embodiment of the present invention, the multipliers 5a and 5b of the low-pass filter 1L are located before the integrators 5c and 1La, and directly input the output from the A / D converter 2b. Therefore, the number of bits of the input signal is A
The number of bits may be the same as that of the error signal output from the / D converter 2b. Therefore, the circuit scale can be reduced as compared with the conventional multiplier 11Lc. These are the multipliers 1Ha and 1Hc of the high-pass filter 1H.
The same applies to.

[0026]

According to the position control device of the present invention, the loop filter has the same frequency response characteristic in the high frequency band as before, but has a larger gain in the low frequency band than the conventional one.
Vary at a rate of 12dB / oct. As a result, control can be stabilized in the high frequency band as in the conventional case, but in the low frequency band, a sufficient gain can be obtained even for a relatively light position control target, and the steady-state deviation can be better compensated than in the past. Further, the loop filter has a relatively simple configuration including only a primary filter, and the number of multipliers included in the loop filter is smaller than in the related art. Therefore, the circuit scale of the loop filter can be reduced, and the calculation processing time can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an embodiment of a position control device according to the present invention.

FIG. 2 is a diagram illustrating a frequency response characteristic with respect to a gain in a loop filter 1 included in an embodiment of the present invention and each component thereof.

FIG. 3 is a diagram illustrating a frequency response characteristic with respect to a phase in the loop filter 1 included in the embodiment of the present invention and each component thereof.

FIG. 4 is a block diagram illustrating a conventional position control device.

FIG. 5 is a diagram illustrating a frequency response characteristic of a conventional loop filter 11.

[Explanation of symbols]

 1Ha, 1Hc, 5a, 5b, 11Lc, 11Ha, 11Hc Multiplier 1La, 5c Integrator 1a, 1Hd, 5e, 11a, 11La, 11Hd Adder

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G11B 21/10 G11B 21/10 R (72) Inventor Shuji Morita 1006 Kazuma, Kazuma, Kazuma, Osaka Matsushita Electric Industrial F term in the company (reference)

Claims (3)

[Claims] (A) An error detector for detecting an error between an actual position of a position control target and a control target position, and an error detected by the error detector is converted from an analog signal to a digital signal and output. (B) (a) a digital signal representing the error (hereinafter, referred to as an error signal) output from the error detecting means;
The gain in the lower frequency band than the first frequency is larger than the gain in the other frequency band, and (ii) the phase delay in the higher frequency band than the first frequency is smaller than the phase delay in the other frequency band. A low-pass filter including: a low-pass compensating unit that is a small, first-order digital filter; and an integrator that integrates the error signal output by the low-pass compensating unit. (B) The error signal output by the error detecting unit In contrast, (i) the gain in a higher frequency band than the second frequency higher than the first frequency is greater than the gain in other frequency bands, and (ii) higher frequency than the second frequency A high-pass filter which is a first-order digital filter, wherein a phase lead in a band is larger than a phase lead in another frequency band; and (c) the low-pass filter and the c (C) a digital-to-analog converter for converting the error signal output from the loop filter into an analog signal, and the digital-to-analog converter And a drive circuit for driving the position control target based on the error signal output from the control unit. 2. A first multiplier, wherein the high-pass filter multiplies the error signal output from the error detecting means by a predetermined first constant, and outputs the multiplied error signal; and the error signal output from the error detecting means. And a second multiplier for outputting the error signal output from the delay unit after multiplying the error signal by a predetermined second constant, and The position control device according to claim 1, further comprising a second adder that subtracts an output of the second multiplier from an output and outputs the result. 3. A third multiplier, wherein the low-frequency compensation means multiplies the error signal output from the error detection means by a predetermined third constant, and outputs the multiplied signal. A fourth multiplier that multiplies the error signal by a predetermined fourth constant and outputs the multiplied error signal; a second integrator that integrates the error signal output from the third multiplier; and the fourth multiplier 3. The position control device according to claim 1, further comprising a third adder that adds and outputs the output of the second integrator and the output of the second integrator. 4.