JP2001217649A - Piezoelectric oscillation circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a piezoelectric oscillation circuit, which is large in frequency variation band and has its noise reduced. SOLUTION: This piezoelectric oscillation circuit is constituted having an oscillation closed loop, formed by connecting a piezoelectric vibrator and an oscillation circuit, and a series circuit of a phase inverter and a capacitor is connected between the terminals of the piezoelectric vibrator, so that the capacitance of the capacitor cancels the parallel capacitance of the piezoelectric vibrator.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a piezoelectric oscillating circuit formed by connecting a piezoelectric vibrator and an oscillating circuit to form an oscillating closed loop. The present invention relates to a piezoelectric oscillation circuit.

[0002]

2. Description of the Related Art Piezoelectric oscillating circuits have excellent frequency stability due to the resonance characteristics of piezoelectric vibrators, particularly quartz vibrators, and are used as a frequency and time reference source in various electronic devices. I have. In recent years, a piezoelectric vibrator with a large frequency variable width suitable for a voltage-controlled oscillator and a narrower and higher frequency band in communication equipment have been developed to increase productivity by expanding the oscillation frequency range and improve productivity. A circuit is desired.

FIG. 5 is a diagram of a piezoelectric oscillation circuit for explaining a conventional example. The piezoelectric oscillation circuit is formed by providing an oscillation circuit 2 on a crystal unit 1 to form an oscillation closed loop. The crystal unit 1 is made of, for example, an AT-cut crystal blank 5 having excitation electrodes 3 (ab) and extraction electrodes 4 (ab) on both main surfaces (FIG. 6). Vo is an oscillation output. The electrical equivalent circuit is a circuit in which the excitation electrode 3 (ab) and a parallel capacitance (capacity between electrodes) C0 of a package (not shown) are connected to a series arm composed of the series capacitance C1, the series inductor L1 and the series resistance R1. (FIG. 7).

The reactance characteristic with respect to the frequency based on such an equivalent circuit has a series resonance point fs by the series capacitance C1 and the series inductor of the series arm and a parallel resonance point fa by the series arm and the parallel capacitance C0 (FIG. 8). . The region between the series resonance point fs and the parallel resonance point fa is defined as inductive (inductor component), and the other region is defined as the capacitance component.

As shown in FIG. 9, the oscillation circuit 2 includes, for example, a divided capacitor 6 (ab) for oscillation forming a resonance circuit with the crystal unit 1, and a CMOS type for positively amplifying the output of the resonance circuit. An inverter amplifier (inverting amplifier, hereinafter referred to as a feedback amplifier) 7 is provided. It is of the same type as the so-called Colpitts type and is usually called an inverter oscillator. Reference numeral 8 is a feedback resistor. Note that the inverter amplifier 7 is commercially available as one element.

In such a device, oscillation occurs only in a frequency region that becomes an inductor component of the crystal unit 1, and the oscillation frequency is determined. Then, the frequency at which the series capacitance component (so-called load capacitance CL) in the oscillation closed loop (oscillation circuit 2) and the inductor component of the crystal resonator 1 as viewed from both terminals of the crystal resonator 1 have the same reactance (absolute value) is oscillated. Frequency f0
Becomes

Normally, as shown in the following equation, the oscillation frequency f0 is represented by a frequency deviation Δf / fs from the series resonance frequency fs of the crystal unit 1. Where Δf = f0−f
s and γ are the capacitance ratio C0 / C1. In general, the frequency deviation is widened by reducing the capacitance ratio γ of the crystal unit 1, thereby increasing the oscillation frequency range of the crystal unit 1. In other words, the inductive region serving as an inductor component between the series resonance frequency fs and the anti-resonance frequency fa is expanded to increase the frequency variable. Δf / fs = C1 / 2 (C0 + CL) = C0 / 2γ (C0 + CL) (1)

[0008]

[Problems to be Solved by the Invention]
However, in the crystal oscillator having the above configuration, there is a problem that the frequency variable amount is reduced as the size is reduced. That is, the frequency variable amount is, as described above, the frequency deviation Δf / f
As is apparent from the above equation, the frequency deviation Δf / fs is substantially proportional to the series capacitance C1, and decreases in inverse proportion to the capacitance ratio γ. The series capacitance C1 decreases in proportion to the electrode area of the excitation electrode 3 (ab) formed on the crystal blank 5. Therefore, there has been a problem that as the miniaturization progresses and the crystal blank 5 becomes smaller, the frequency variable amount also becomes smaller.

When the frequency variable becomes small, that is, when the oscillation region becomes narrow, when the oscillation circuit 2 is formed, a situation occurs in which the crystal unit 1 becomes incompatible, and the productivity is deteriorated. Further, when applied to a voltage controlled oscillator, there is a problem that the frequency variable width is narrow and cannot be applied.

When the crystal blank 5 becomes smaller, the excitation electrode 3
Although the electrode area of (ab) also decreases, the parallel capacitance C0 also decreases, and the frequency deviation Δf / fs tends to increase from the previous equation.
In order to keep I) small, a minimum size is required, and the crystal blank 5 occupies a large area of the plate surface. Therefore,
The reduction rate of the series capacitance C1 due to the reduction of the plate surface area is larger than the reduction rate of the parallel capacitance C0 due to the reduction of the electrode area, and the frequency variable amount becomes smaller.

As shown in the above-mentioned equivalent circuit (FIG. 7), the crystal unit 1 is connected to the excitation electrode 3 (a
There is a parallel capacitance C0 according to b). Therefore, there is a problem that a frequency component near the oscillation frequency is feedback-amplified through the parallel capacitance C0, and noise with respect to the oscillation frequency increases. In particular, this problem becomes more pronounced as the oscillation frequency becomes higher.

(Object of the Invention) It is an object of the present invention to provide a piezoelectric oscillation circuit having a large frequency variable width and reduced noise.

[0013]

Means for Solving the Problems (Points of Interest) In the present invention,
We thought that everything could be solved if the piezoelectric vibrator had no parallel capacitance C0, and focused on canceling out the parallel capacitance C0 of the piezoelectric vibrator.

(Solution) According to the present invention, a series circuit of a capacitor 9 and a phase inverter 10 is connected between terminals of a piezoelectric vibrator 1 forming an oscillation closed loop as shown in a principle diagram in FIG. The basic solution is to cancel the parallel capacitance C0 of the vibrator 1.

[0015]

According to the present invention, a series circuit of a capacitor 9 and a phase inverter 10 is connected between terminals of a piezoelectric vibrator 1 forming an oscillation loop. Therefore, the parallel capacitance C0 of the piezoelectric vibrator 1
And the inter-terminal output by the series circuit of the capacitor 9 and the phase inverter 10 have opposite phases. Therefore, if the parallel capacitance C0 and the capacitance of the capacitor 9 have the same value, the outputs between the terminals cancel each other. Then, only the output between the terminals of the series arm of the crystal unit can be extracted. Hereinafter, an embodiment of the present invention will be described.

FIG. 1 is a diagram of a piezoelectric oscillation circuit for explaining an embodiment of the present invention, in which the present invention is applied to an inverter oscillation circuit. The same parts as those in the prior art are denoted by the same reference numerals, and description thereof will be simplified or omitted. Piezoelectric oscillation circuit 2
As described above, the oscillation circuit 2 is connected to the crystal unit 1 to form an oscillation closed loop. Then, a series circuit of the capacitor 9 and the phase inverter 10 is connected between the terminals of the crystal unit 1. The capacitor 9 has the same value as the parallel capacitance C0. The phase inverter 10 here is connected to the feedback amplifier 7.
The amplification factor is assumed to be -1 for the same inverter amplifier 10a as that described above.

With such a configuration, the output from the feedback amplifier 7 is applied to a series circuit of the crystal unit 1, the capacitor 9, and the phase inverter 10. Then, the output between the terminals of the series circuit is inverted and amplified by the phase inverter 10. Accordingly, the output between the terminals of the parallel capacitance C0 in the crystal unit 1 and the output between the terminals of the series circuit have phases opposite to each other.

Further, in this example, since the gain of the phase inverter 10 (inverter amplifier 10a) is set to -1 and the capacitance of the capacitor 9 is made to match the value of the parallel capacitance C0, the terminal between the parallel capacitance C0 and the series circuit is connected. The output during this period is the same and in opposite phase. Therefore, both outputs are completely canceled out, and only the output by the series arm of the crystal unit 1 is obtained. That is, the parallel capacitance C0 of the crystal unit 1 is canceled by the series circuit.

From the above, when the parallel capacitance C0 is canceled out and becomes 0 or smaller, the frequency deviation Δ
f / fs is increased, and the "formula (1)" can be used to increase the frequency variable amount. In other words, the inductive region between the series resonance frequency fs and the anti-resonance frequency fa of the reactance characteristic described above increases, and the oscillation region can be expanded.
In particular, the miniaturization of the crystal unit 1 has progressed, and the equivalent series capacitance C1
It becomes more advantageous as is smaller.

Since the output between the terminals of the parallel capacitance C0 is canceled by the series circuit, the noise component existing in the oscillation closed loop via the parallel capacitance C0 is also canceled. That is, the parallel capacitance C0 is canceled out by the series circuit and does not exist, and no noise is generated through the parallel capacitance C0. Therefore, the output of only the series arm in the resonance state becomes the oscillation output, so that noise is minimized. For example, the phase noise characteristics are improved, and these have a remarkable effect because the reactance of the parallel capacitance C0 decreases as the oscillation frequency increases.

[0021]

[Other Matters] In the above embodiment, the amplification factor of the inverter amplifier is set to -1, but even if there is a slight error, an offset effect can be obtained. The phase inverter 10 has been described by connecting an inverter amplifier 10a, which is commercially available as one element, to a crystal oscillator in parallel. For example, an FET (field effect transistor) is used in FIG. 3 and FIG. The configuration may be as shown.

That is, in FIG. 3, the source of the N-type FET 11 is grounded, the drain is on the power supply VDD side, and one end of the crystal unit 1 is connected to the drain and the other end is connected to the terminal a. Then, one end of the capacitor 9 is connected to the source of the FET 11 and the other end is connected to the other end of the crystal unit 1. The capacitor 9 has the same value as the parallel capacitance of the crystal unit 1 as described above. Then, a phase adjusting capacitor 12 is connected between the terminal a and the ground. In addition, a DC blocking capacitor 13 is connected to the gate of the FET 11 to lead out a terminal b. The non-inverting type positive feedback amplifier 14 is connected between the terminals ab.
To form an oscillation circuit. Note that the symbol R (1, 2,
3) is a bias resistor.

In such a device, the quartz oscillator 1
And a capacitor 12 for phase adjustment and FET via ground
11, a resonance loop is formed, and a resonance output (resonance frequency) due to this is amplified by a positive feedback amplifier to obtain an oscillation output. The oscillation frequency generally depends on the resonance frequency of the resonance loop, in particular, the crystal oscillator (inductor component) and the capacitor 12. Strictly speaking, the circuit viewed from between the terminals of the crystal oscillator 1 and the crystal oscillator 1 as described above. Is determined by the series equivalent capacitance on the side.

The signal input to the gate of the FET 11 becomes an inverted signal on the drain side and becomes a non-inverted signal on the source side. Therefore, at the terminal a, the output by the parallel capacitance C0 of the crystal unit 1 and the capacitor 9 are canceled out as described above, and the output is made only by the series arm of the crystal unit 1.

In FIG. 4, the first N-type is used.
And the second FET 15 (ab) forms a differential amplifier, that is, the source of each FET 15 (ab) is commonly connected and grounded, and the drain is on the power supply VDD side. And the first F
A crystal oscillator 1 is provided between the drain of the ET 15a and the terminal a.
Is connected between the drain of the second FET 15 b and the other end of the crystal unit 1. Reference numeral 12 denotes a phase adjusting capacitor, 13 denotes a DC blocking capacitor,
14 is a non-inverting type positive feedback amplifier, R (4, 5, 6) is a bias resistor, and E is a reference voltage.

In such a device, generally, the quartz oscillator 1
Then, a resonance loop is formed by the differential amplifier via the phase adjustment capacitor 12 and the ground, and the resonance output (resonance frequency) due to this is amplified by the positive feedback amplifier 14 to form an oscillation circuit. The signal input to the terminal b of the differential amplifier becomes an inverted signal on the drain side of the first FET 15a, and becomes a non-inverted signal on the drain side of the second FET 15b. Therefore, as described above, at the terminal a, the output by the parallel capacitance C0 of the crystal unit 1 and the capacitor 9 are cancelled, and the output is made only by the series arm of the crystal unit.

Thus, in any case, as in the above-described embodiment, the parallel capacitance C0 is canceled out to be 0 or smaller, so that the frequency variable amount can be increased and the parallel capacitance C0 can be increased. Noise components present in the oscillation closed loop are also canceled. Even in these cases, the series circuit of the capacitor 9 and the phase inverter 10 is connected between the terminals of the crystal unit 1, and equivalently the oscillation circuit shown in FIG. These circuits except for the crystal oscillator can be integrated into one element.

The present invention is not limited to these examples, and a bipolar transistor may be used to invert the phase. In short, a capacitor is connected in parallel with the crystal oscillator, and a feedback output that is opposite to each other is provided. May be applied. The oscillation circuit 2 may use any amplifier including an inverter (inverting) amplifier and a non-inverting amplifier. In short, what is integrated in the oscillation circuit of FIG. 1 belongs to the technical scope of the present invention. .

[0029]

According to the present invention, the series circuit of the capacitor and the phase inverter is connected between the terminals of the piezoelectric vibrator forming the oscillation closed loop, and the parallel capacitance C0 of the piezoelectric vibrator is canceled, so that the frequency variable width is large. A piezoelectric oscillation circuit with reduced noise can be provided.

[Brief description of the drawings]

FIG. 1 is a diagram of a piezoelectric oscillation circuit illustrating the principle of the present invention.

FIG. 2 is a diagram of a piezoelectric oscillation circuit illustrating one embodiment of the present invention.

FIG. 3 is a diagram of a piezoelectric oscillation circuit illustrating another embodiment of the present invention.

FIG. 4 is a diagram of a piezoelectric oscillation circuit illustrating still another embodiment of the present invention.

FIG. 5 is a diagram of a piezoelectric oscillation circuit illustrating a conventional example.

FIG. 6 is a view of a crystal unit (crystal piece) for explaining a conventional example.

FIG. 7 is an equivalent circuit diagram of a crystal unit explaining a conventional example.

FIG. 8 is a diagram illustrating a reactance characteristic of a quartz oscillator for explaining a conventional example.

FIG. 9 is a diagram of a piezoelectric oscillation circuit illustrating a conventional example.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 crystal oscillator, 2 oscillation circuit, 3 excitation electrode, 4 extraction electrode, 5 crystal chip, 6, 9, 12, 13 capacitor, 7 inverter, 8 resistor, 10 phase inverter, 1
1, 15 FETs, 14 amplifiers.

Claims (1)

[Claims] 1. A piezoelectric oscillation circuit comprising a piezoelectric vibrator and an oscillation circuit connected to form an oscillation closed loop, wherein a series circuit of a phase inverter and a capacitor is connected between terminals of the piezoelectric vibrator. And a parallel capacitance of the piezoelectric vibrator has been canceled.