JP2001197732A - Control device for semiconductor power converter - Google Patents

Control device for semiconductor power converter

Info

Publication number
JP2001197732A
JP2001197732A JP2000000740A JP2000000740A JP2001197732A JP 2001197732 A JP2001197732 A JP 2001197732A JP 2000000740 A JP2000000740 A JP 2000000740A JP 2000000740 A JP2000000740 A JP 2000000740A JP 2001197732 A JP2001197732 A JP 2001197732A
Authority
JP
Japan
Prior art keywords
semiconductor power
power converter
value
main
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000000740A
Other languages
Japanese (ja)
Other versions
JP3611097B2 (en
Inventor
Itsuo Kawamura
逸生 川村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP2000000740A priority Critical patent/JP3611097B2/en
Publication of JP2001197732A publication Critical patent/JP2001197732A/en
Application granted granted Critical
Publication of JP3611097B2 publication Critical patent/JP3611097B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a control device suited in the case a plurality of sets of semiconductor power converter circuits of the same circuit constitution for a DC current output are operated in parallel. SOLUTION: An adjusted arithmetic value of a current with a detection value of an output current in a main semiconductor power converter circuit 10 serving as the preset value in controlled circuits 70, 80 for performing master slave control by through a control device is multiplied by as many times as the gain in gain adjusters 71, 81, a value adding this gain times value and the adjusted arithmetic value in a main control circuit 40 serves as a signal wave, to apply PWM calculation.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は、電気分解,金属
表面処理,加熱,アーク溶解などの設備に所望の直流電
流を供給する半導体電力変換装置の制御装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a control device for a semiconductor power conversion device for supplying a desired direct current to equipment such as electrolysis, metal surface treatment, heating and arc melting.

【0002】[0002]

【従来の技術】電気分解,金属表面処理,加熱,アーク
溶解などの設備に供される半導体電力変換装置では5k
A〜30kAの直流電流を出力できる機能を有してい
る。従って、この半導体電力変換装置では、主として半
導体素子の定格出力電流値の関係から、複数台の半導体
電力変換回路を並列接続した回路構成になっている。
2. Description of the Related Art A semiconductor power converter used for equipment such as electrolysis, metal surface treatment, heating, and arc melting has a capacity of 5k.
It has a function of outputting a direct current of A to 30 kA. Therefore, this semiconductor power conversion device has a circuit configuration in which a plurality of semiconductor power conversion circuits are connected in parallel mainly from the relation of the rated output current value of the semiconductor element.

【0003】図3は、この種の半導体電力変換装置とし
て、半導体電力変換回路としてのチョッパ回路を3台並
列接続した半導体電力変換装置とその制御装置の従来例
を示す回路構成図である。
FIG. 3 is a circuit configuration diagram showing a conventional example of a semiconductor power converter in which three chopper circuits as a semiconductor power converter are connected in parallel as a semiconductor power converter of this type and a control device therefor.

【0004】図3において、1は直流電源、2は半導体
電力変換装置、3は半導体電力変換装置2を制御する制
御装置、4は制御装置3に半導体電力変換装置2が出力
する直流電流値を設定する出力設定器、5は負荷を示
し、この半導体電力変換装置2にはチョッパ回路10,
20,30を備え、また、制御装置3にはチョッパ回路
10を制御する制御回路40と、チョッパ回路20を制
御する制御回路50と、チョッパ回路30を制御する制
御回路60とを備えている。
In FIG. 3, 1 is a DC power supply, 2 is a semiconductor power conversion device, 3 is a control device for controlling the semiconductor power conversion device 2, and 4 is a DC current value output from the semiconductor power conversion device 2 to the control device 3. The output setter 5 to be set indicates a load, and the semiconductor power converter 2 includes a chopper circuit 10,
The control device 3 includes a control circuit 40 for controlling the chopper circuit 10, a control circuit 50 for controlling the chopper circuit 20, and a control circuit 60 for controlling the chopper circuit 30.

【0005】図3に示す如く、チョッパ回路10,2
0,30は同一回路構成であり、IGBT11,21,
31と、還流ダイオード12,22,32と、リアクト
ル13,23,33と、コンデンサ14,24,34
と、それぞれの出力電流を検出するDCCT15,2
5,35とを備えている。
As shown in FIG. 3, the chopper circuits 10, 2
0, 30 have the same circuit configuration, and IGBTs 11, 21, 21
31, the reflux diodes 12, 22, 32, the reactors 13, 23, 33, and the capacitors 14, 24, 34
And DCCTs 15 and 2 for detecting respective output currents
5, 35.

【0006】同様に、制御回路40,50,60も同一
回路構成であり(図3では制御回路60の内部回路構成
の記載を省略している)、出力設定器4の設定値とDC
CT15,25,35それぞれで得られる検出値との偏
差を零にする電流調節器41,51,(61)と、後述
のPWM演算の際の搬送波としての鋸歯状波を発生する
鋸歯状波発生器42,52,(62)と、電流調節器4
1,51,(61)それぞれの出力を信号波とし、この
信号波と上述のそれぞれの搬送波とによるPWM演算を
行ない、この演算結果に基づきIGBT11,21,3
1それぞれをオン,オフさせるPWM演算器43,5
3,(63)とを備えている。
Similarly, the control circuits 40, 50, and 60 have the same circuit configuration (in FIG. 3, the internal circuit configuration of the control circuit 60 is omitted).
Current regulators 41, 51, (61) for making the deviations from the detection values obtained by the CTs 15, 25, 35 zero, and a saw-tooth wave for generating a saw-tooth wave as a carrier wave in a PWM operation to be described later. Devices 42, 52, (62) and current controller 4
1, 51, and (61) are used as signal waves, and a PWM operation is performed using the signal waves and the respective carrier waves described above, and IGBTs 11, 21, 3, and 3 are performed based on the operation results.
1 PWM operation units 43 and 5 for turning on and off, respectively
3, (63).

【0007】図3に示した半導体電力変換装置2と制御
装置3の動作を、図4に示すPWM演算器43とPWM
演算器53の動作波形図を参照しつつ(PWM演算器6
3については省略)、以下に説明する。
The operation of the semiconductor power conversion device 2 and the control device 3 shown in FIG. 3 is described by using a PWM arithmetic unit 43 shown in FIG.
With reference to the operation waveform diagram of the arithmetic unit 53 (PWM arithmetic unit 6
3 is omitted), which will be described below.

【0008】図4において、PWM演算器43では、
(イ)に示す如く鋸歯状波発生器42からの搬送波とし
ての鋸歯状波と電流調節器41からの信号波との比較演
算を行ない、その演算結果により、(ロ)に示す如くI
GBT11へのオン,オフ信号を生成し、同様に、PW
M演算器53では、(ハ)に示す如く鋸歯状波発生器5
2からの搬送波としての鋸歯状波と電流調節器51から
の信号波との比較演算を行ない、その演算結果により、
(ニ)に示す如くIGBT21へのオン,オフ信号を生
成する。
[0008] In FIG. 4, in the PWM calculator 43,
As shown in (a), a comparison operation is performed between the sawtooth wave as a carrier wave from the sawtooth wave generator 42 and the signal wave from the current regulator 41, and the result of the operation is used to obtain I as shown in (b).
An on / off signal to the GBT 11 is generated, and the PW
The M calculator 53 includes a sawtooth wave generator 5 as shown in FIG.
A comparison operation is performed between the saw-tooth wave as the carrier wave from the second and the signal wave from the current controller 51, and the calculation result indicates that
As shown in (d), an on / off signal to the IGBT 21 is generated.

【0009】[0009]

【発明が解決しようとする課題】図4に示した動作波形
図において、IGBT11とIGBT21の双方ともに
オンのときには、図3に示した直流電源1→IGBT1
1→リアクトル13→負荷5→直流電源1の経路と、直
流電源1→IGBT21→リアクトル23→負荷5→直
流電源1の経路とに電流が流れる。また、IGBT11
とIGBT21の双方ともにオフのときには、図3に示
した還流ダイオード12→リアクトル13→負荷5→還
流ダイオード12の経路と、還流ダイオード22→リア
クトル23→負荷5→還流ダイオード22の経路とに電
流が流れる。
In the operation waveform diagram shown in FIG. 4, when both IGBT11 and IGBT21 are on, DC power supply 1 → IGBT1 shown in FIG.
Current flows through the path of 1 → reactor 13 → load 5 → DC power supply 1 and the path of DC power supply 1 → IGBT 21 → reactor 23 → load 5 → DC power supply 1. In addition, IGBT11
When both the IGBT 21 and the IGBT 21 are off, current flows through the route of the freewheel diode 12 → reactor 13 → load 5 → freewheel diode 12 and the freewheel diode 22 → reactor 23 → load 5 → freewheel diode 22 shown in FIG. Flows.

【0010】しかしながら、図4に示した動作波形図に
おいて、図3に示した半導体電力変換回路10,20,
30間の回路定数のばらつき、制御回路40,50、6
0間の制御定数の微妙な差などにより、例えば、IGB
T11がオフ,IGBT21がオンの期間には、図5に
示す如く、直流電源1→IGBT21→リアクトル23
→リアクトル13→還流ダイオード12→直流電源1の
経路にも、所謂、循環電流が流れ、この循環電流により
制御動作を不安定にし、場合によっては過電流状態に陥
り、この半導体電力変換装置が運転不能になることがあ
った。
However, in the operation waveform diagram shown in FIG. 4, the semiconductor power conversion circuits 10, 20, and 20 shown in FIG.
Variations in circuit constants among the control circuits 40, 50, 6
Due to subtle differences in control constants between 0, for example, IGB
During a period in which T11 is off and IGBT21 is on, as shown in FIG. 5, DC power supply 1 → IGBT21 → reactor 23
A so-called circulating current also flows through the path from the reactor 13 to the reflux diode 12 to the DC power supply 1, making the control operation unstable due to the circulating current, and in some cases, causing an overcurrent state, and the semiconductor power converter operates. Sometimes it became impossible.

【0011】従来は上述の循環電流の抑制策として、リ
アクトル13,23,33それぞれのインダクタンス値
を大きくすることが行われていたが、その結果、この半
導体電力変換装置を大型にするという新たな問題が発生
する。
Conventionally, as a measure for suppressing the circulating current, the inductance value of each of the reactors 13, 23, and 33 has been increased, but as a result, a new semiconductor power converter is required to be enlarged. Problems arise.

【0012】この発明の目的は前記リアクトルのインダ
クタンス値を大きくすることなく、循環電流が抑制でき
る半導体電力変換装置の制御装置を提供することにあ
る。
An object of the present invention is to provide a control device for a semiconductor power conversion device capable of suppressing a circulating current without increasing the inductance value of the reactor.

【0013】[0013]

【課題を解決するための手段】この発明は、同一回路構
成の複数台の半導体電力変換器それぞれの入力側及び出
力側を互いに並列接続し、前記複数台の半導体電力変換
器の内、いずれか1台を主半導体電力変換器とし、他は
従半導体電力変換器とした半導体電力変換装置であっ
て、前記入力側に接続された直流電源に前記それぞれの
半導体電力変換器を介することにより所望の直流電流に
変換して前記出力側から負荷に供給する半導体電力変換
装置の制御装置において、この制御装置には主半導体電
力変換器を制御する主制御回路と、それぞれの従半導体
電力変換器をそれぞれ制御する従制御回路とを備え、前
記主制御回路では指令される電流設定値と主半導体電力
変換器の出力電流との偏差を零にする調節演算を行な
い、この調節演算値に基づくPWM演算結果により該主
半導体電力変換器を構成する自己消弧型半導体素子をオ
ン,オフさせ、前記それぞれの従制御回路では前記主半
導体電力変換器の出力電流と対応するそれぞれの従半導
体電力変換器の出力電流との偏差を零にする調節演算を
行ない、この調節演算値をゲイン倍した値と前記主制御
回路の調節演算値とを加算した値に基づき前記主制御回
路のPWM演算と同一搬送波でのPWM演算結果により
該従半導体電力変換器を構成する自己消弧型素子をオ
ン,オフさせることを特徴とする。この発明によれば、
前記主制御回路では前記電流設定値に基づく制御(マス
ター制御)を行ない、前記それぞれの従制御回路では前
記主半導体電力変換器が出力する電流値に基づく制御
(スレーブ制御)を行わせることにより、後述の如く、
対応するそれぞれの自己消弧型素子のオン動作時の時間
差および位相差を最小にできるので、半導体電力変換器
間の循環電流を最小にでき、従って、前記それぞれのリ
アクトルのインダクタンス値を最小適正値で製作すれば
良く、前記半導体電力変換装置を小型化できる。
According to the present invention, an input side and an output side of a plurality of semiconductor power converters having the same circuit configuration are connected in parallel to each other, and any one of the plurality of semiconductor power converters is connected. One is a main semiconductor power converter, and the other is a semiconductor power converter that is a slave semiconductor power converter. A DC power supply connected to the input side is connected to the DC power supply via each of the semiconductor power converters. In a control device for a semiconductor power converter that converts a direct current to supply the load from the output side, the control device includes a main control circuit that controls a main semiconductor power converter, and a respective sub-semiconductor power converter. A sub-control circuit for controlling the main control circuit. The main control circuit performs an adjustment operation to make the deviation between the commanded current set value and the output current of the main semiconductor power converter zero. The self-extinguishing type semiconductor element constituting the main semiconductor power converter is turned on and off according to the result of the PWM operation, and the respective sub-control circuits respectively control the sub-semiconductor power corresponding to the output current of the main semiconductor power converter. An adjustment operation for reducing a deviation from the output current of the converter to zero is performed, and a PWM operation of the main control circuit is performed based on a value obtained by adding a value obtained by multiplying the adjustment operation value by a gain and an adjustment operation value of the main control circuit. The self-extinguishing element constituting the slave semiconductor power converter is turned on and off according to the result of the PWM operation on the same carrier. According to the invention,
The main control circuit performs control (master control) based on the current set value, and the respective sub-control circuits perform control (slave control) based on the current value output from the main semiconductor power converter, As described below,
Since the time difference and the phase difference at the time of the ON operation of the corresponding self-arc-extinguishing elements can be minimized, the circulating current between the semiconductor power converters can be minimized. And the semiconductor power converter can be miniaturized.

【0014】[0014]

【発明の実施の形態】図1は、この発明の実施例を示す
半導体電力変換装置とその制御装置の回路構成図であ
り、図3に示した従来例回路と同一機能を有するものに
は同一符号を付して、その説明を省略する。
FIG. 1 is a circuit diagram of a semiconductor power conversion device and a control device therefor according to an embodiment of the present invention. The same components as those of the conventional circuit shown in FIG. The reference numerals are attached and the description is omitted.

【0015】すなわち図1に示したこの発明の回路構成
が図3に示した従来の回路構成と異なる点は、チョッパ
回路10を主半導体電力変換回路とし、チョッパ回路2
0,30をそれぞれ従半導体電力変換回路とし、チョッ
パ回路10を制御する制御回路40を主制御回路とし、
チョッバ回路20,30を制御する従制御回路70,8
0を、従来の制御回路50,60に代えて新たに備えて
いることである。
That is, the point that the circuit configuration of the present invention shown in FIG. 1 is different from the conventional circuit configuration shown in FIG. 3 is that the chopper circuit 10 is a main semiconductor power conversion circuit and the chopper circuit 2
0, 30 are each a sub-semiconductor power conversion circuit, a control circuit 40 for controlling the chopper circuit 10 is a main control circuit,
Slave control circuits 70 and 8 for controlling chobber circuits 20 and 30
0 is newly provided in place of the conventional control circuits 50 and 60.

【0016】図1に示す制御装置6を構成する従制御回
路70と従制御回路80とは同一回路構成であり(図1
では従制御回路80の内部回路構成の記載を省略してい
る)、DCCT15の検出値を設定値とし、この設定値
とDCCT25,35それぞれで得られる検出値との偏
差を零にする電流調節器51,(61)と、電流調節器
51,(61)それぞれの出力値をゲイン倍するゲイン
調整器71,(81)と、ゲイン調整器71(81)の
出力と前記主制御回路を構成する電流調節器41の出力
とを加算する加算器72,(82)と、前記主制御回路
40を構成する鋸歯状波発生器42からの搬送波として
の鋸歯状波と、加算器72,(82)それぞれの出力を
信号波とするPWM演算を行ない、この演算結果に基づ
きIGBT21,31それぞれをオン,オフさせるPW
M演算器53,(63)とを備えている。
The slave control circuit 70 and the slave control circuit 80 constituting the control device 6 shown in FIG. 1 have the same circuit configuration (FIG. 1).
The description of the internal circuit configuration of the slave control circuit 80 is omitted.) A current controller that sets a detected value of the DCCT 15 as a set value and sets a deviation between the set value and the detected value obtained by each of the DCCTs 25 and 35 to zero. 51, (61), gain adjusters 71, (81) for multiplying the output value of each of the current adjusters 51, (61) by a gain, and the outputs of the gain adjusters 71 (81) and the main control circuit. Adders 72 and (82) for adding the output of the current controller 41; a sawtooth wave as a carrier wave from the sawtooth wave generator 42 constituting the main control circuit 40; and adders 72 and (82). A PWM operation using each output as a signal wave is performed, and a PW for turning on / off each of the IGBTs 21 and 31 based on the result of the operation.
M arithmetic units 53 and (63) are provided.

【0017】図1に示した半導体電力変換装置2と制御
装置6の動作を、図2に示すPWM演算器43とPWM
演算器53の動作波形図を参照しつつ(PWM演算器6
3については省略)、以下に説明する。
The operations of the semiconductor power conversion device 2 and the control device 6 shown in FIG.
With reference to the operation waveform diagram of the arithmetic unit 53 (PWM arithmetic unit 6
3 is omitted), which will be described below.

【0018】図2において、PWM演算器43では、
(イ)に示す如く鋸歯状波発生器42からの搬送波とし
ての鋸歯状波と電流調節器41からの信号波との比較演
算を行ない、その演算結果により、(ロ)に示す如くI
GBT11へのオン,オフ信号を生成し、また、PWM
演算器53では、(ハ)に示す如く鋸歯状波発生器42
からの搬送波としての鋸歯状波と加算器72からの信号
波との比較演算を行ない、その演算結果により、(ニ)
に示す如くIGBT21へのオン,オフ信号を生成す
る。
In FIG. 2, in the PWM calculator 43,
As shown in (a), a comparison operation is performed between the sawtooth wave as a carrier wave from the sawtooth wave generator 42 and the signal wave from the current regulator 41, and the result of the operation is used to obtain I as shown in (b).
On / off signals to the GBT 11 are generated, and PWM
The arithmetic unit 53 includes a sawtooth wave generator 42 as shown in FIG.
A comparison operation is performed between the saw-tooth wave as the carrier wave from the adder 72 and the signal wave from the adder 72, and (d)
The on / off signal to the IGBT 21 is generated as shown in FIG.

【0019】このとき、(ハ)に示した加算器72,
(82)の出力である信号波の調整幅は、下記式(1)
に基づいて、ゲイン調整器71,(81)のゲインが調
整される。
At this time, the adder 72 shown in FIG.
The adjustment width of the signal wave output from (82) is expressed by the following equation (1).
, The gains of the gain adjusters 71 and (81) are adjusted.

【数1】 調整幅(%)=±(Ceff ×ΔVc/直流電源1の電圧)×100 …(1) ここで、ΔVcはチョッパ回路10,20,30間の出
力電圧差の最大値(IGBTの特性差,接続導体の抵抗
差などによって生ずる)、また、Ceff は制御応答から
決定し、通常は2〜5程度である。
## EQU1 ## Adjustment range (%) = ± (C eff × ΔVc / voltage of DC power supply 1) × 100 (1) where ΔVc is the maximum value of the output voltage difference between chopper circuits 10, 20, and 30 ( C eff is determined from the control response and is usually about 2-5.

【0020】例えば、直流電源1の電圧が500ボルト
のときには前記最大値は通常5ボルト以下であり、C
eff を5とすると、上記式(1)の調整幅は±5%にな
る。
For example, when the voltage of the DC power supply 1 is 500 volts, the maximum value is usually 5 volts or less.
Assuming that eff is 5, the adjustment range of the above equation (1) is ± 5%.

【0021】[0021]

【発明の効果】この発明によれば、主制御回路では電流
設定値に基づく制御(マスター制御)を行ない、それぞ
れの従制御回路では主半導体電力変換器が出力する電流
値に基づく制御(スレーブ制御)を行わせることによ
り、各半導体電力変換器間の循環電流を最小にでき、従
って、それぞれのリアクトルのインダクタンス値は従来
の5%程度になり、また、マスタ−スレーブ制御では、
周知の如く、それぞれの制御回路の制御定数の調整作業
も簡単になる。
According to the present invention, the main control circuit performs control based on the current set value (master control), and the respective sub-control circuits control based on the current value output from the main semiconductor power converter (slave control). ) Can minimize the circulating current between the semiconductor power converters, so that the inductance value of each reactor is about 5% of the conventional value, and in the master-slave control,
As is well known, the operation of adjusting the control constant of each control circuit is also simplified.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この発明の実施例を示す半導体電力変換装置の
制御装置の回路構成図
FIG. 1 is a circuit configuration diagram of a control device of a semiconductor power conversion device showing an embodiment of the present invention.

【図2】図1の動作を説明する波形図FIG. 2 is a waveform chart illustrating the operation of FIG.

【図3】従来例を示す半導体電力変換装置の制御装置の
回路構成図
FIG. 3 is a circuit configuration diagram of a control device of a semiconductor power conversion device showing a conventional example.

【図4】図3の動作を説明する波形図FIG. 4 is a waveform chart for explaining the operation of FIG. 3;

【図5】図3の動作を説明する回路構成図FIG. 5 is a circuit diagram illustrating the operation of FIG. 3;

【符号の説明】[Explanation of symbols]

1…直流電源、2…半導体電力変換装置、3,6…制御
装置、4…出力設定器、5…負荷、10,20,30…
チョッパ回路、11,21,31…IGBT、12,2
2,32…還流ダイオード、13,23,33…リアク
トル、14,24,34…コンデンサ、15,25,3
5…DCCT、40,50,60…制御回路、41,5
1,61…電流調節器、42,52,62…鋸歯状波発
生器、43,53,63…PWM演算器、70,80…
従制御回路、71,81…ゲイン調整器、72,82…
加算器。
DESCRIPTION OF SYMBOLS 1 ... DC power supply, 2 ... Semiconductor power converter, 3,6 ... Control device, 4 ... Output setting device, 5 ... Load, 10,20,30 ...
Chopper circuit, 11, 21, 31 ... IGBT, 12, 2
2, 32 reflux diode, 13, 23, 33 reactor, 14, 24, 34 condenser, 15, 25, 3
5 DCCT, 40, 50, 60 control circuit, 41, 5
1, 61 ... current regulator, 42, 52, 62 ... sawtooth wave generator, 43, 53, 63 ... PWM calculator, 70, 80 ...
Slave control circuit, 71, 81 ... gain adjuster, 72, 82 ...
Adder.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 同一回路構成の複数台の半導体電力変換
器それぞれの入力側及び出力側を互いに並列接続し、 前記複数台の半導体電力変換器の内、いずれか1台を主
半導体電力変換器とし、他は従半導体電力変換器とした
半導体電力変換装置であって、 前記入力側に接続された直流電源に前記それぞれの半導
体電力変換器を介することにより所望の直流電流に変換
して前記出力側から負荷に供給する半導体電力変換装置
の制御装置において、 この制御装置には主半導体電力変換器を制御する主制御
回路と、それぞれの従半導体電力変換器をそれぞれ制御
する従制御回路とを備え、 前記主制御回路では指令される電流設定値と主半導体電
力変換器の出力電流との偏差を零にする調節演算を行な
い、この調節演算値に基づくPWM演算結果により該主
半導体電力変換器を構成する自己消弧型半導体素子をオ
ン,オフさせ、 前記それぞれの従制御回路では前記主半導体電力変換器
の出力電流と対応するそれぞれの従半導体電力変換器の
出力電流との偏差を零にする調節演算を行ない、この調
節演算値をゲイン倍した値と前記主制御回路の調節演算
値とを加算した値に基づき前記主制御回路のPWM演算
と同一搬送波でのPWM演算結果により該従半導体電力
変換器を構成する自己消弧型素子をオン,オフさせるこ
とを特徴とする半導体電力変換装置の制御装置。
An input side and an output side of each of a plurality of semiconductor power converters having the same circuit configuration are connected in parallel with each other, and one of the plurality of semiconductor power converters is a main semiconductor power converter. The other is a semiconductor power conversion device as a slave semiconductor power converter, the DC power supply connected to the input side through the respective semiconductor power converter to convert to a desired DC current and output the A control device for a semiconductor power converter that supplies a load from a side, the control device includes a main control circuit that controls a main semiconductor power converter, and a slave control circuit that controls each of the slave semiconductor power converters. The main control circuit performs an adjustment operation to reduce the deviation between the commanded current set value and the output current of the main semiconductor power converter to zero, and obtains a PWM operation result based on the adjustment operation value. Turning on and off a self-extinguishing type semiconductor element constituting the main semiconductor power converter, wherein each of the slave control circuits outputs an output current of the corresponding slave semiconductor power converter corresponding to an output current of the master semiconductor power converter. And an adjustment operation for reducing the deviation of the adjustment control value to zero, and based on a value obtained by adding a value obtained by multiplying the adjustment operation value by a gain to the adjustment operation value of the main control circuit, the PWM operation on the same carrier as the PWM operation of the main control circuit is performed. A control device for a semiconductor power conversion device, characterized in that a self-extinguishing element constituting said sub-semiconductor power converter is turned on and off according to a calculation result.
JP2000000740A 2000-01-06 2000-01-06 Control device for semiconductor power converter Expired - Lifetime JP3611097B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000000740A JP3611097B2 (en) 2000-01-06 2000-01-06 Control device for semiconductor power converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000000740A JP3611097B2 (en) 2000-01-06 2000-01-06 Control device for semiconductor power converter

Publications (2)

Publication Number Publication Date
JP2001197732A true JP2001197732A (en) 2001-07-19
JP3611097B2 JP3611097B2 (en) 2005-01-19

Family

ID=18530048

Family Applications (1)

Application Number Title Priority Date Filing Date
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Country Status (1)

Country Link
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6819048B2 (en) 2002-05-16 2004-11-16 Patent-Treuhand-Gesellschaft Fuer Elektrische Gluehlampen Mbh High pressure discharge lamp having a ceramic discharge vessel
JP2006302147A (en) * 2005-04-22 2006-11-02 Nippon Telegr & Teleph Corp <Ntt> Booster
WO2007125840A1 (en) * 2006-04-24 2007-11-08 Toyota Jidosha Kabushiki Kaisha Power supply system and vehicle
KR101141038B1 (en) 2010-03-16 2012-05-03 한국전기연구원 Parallel DC/DC converter control system using CAN communication
JP2017508434A (en) * 2014-03-12 2017-03-23 クゥアルコム・インコーポレイテッドQualcomm Incorporated Average current mode control of multiphase switching power converters.

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6819048B2 (en) 2002-05-16 2004-11-16 Patent-Treuhand-Gesellschaft Fuer Elektrische Gluehlampen Mbh High pressure discharge lamp having a ceramic discharge vessel
JP2006302147A (en) * 2005-04-22 2006-11-02 Nippon Telegr & Teleph Corp <Ntt> Booster
WO2007125840A1 (en) * 2006-04-24 2007-11-08 Toyota Jidosha Kabushiki Kaisha Power supply system and vehicle
US7847432B2 (en) 2006-04-24 2010-12-07 Toyota Jidosha Kabushiki Kaisha Power supply system and vehicle
KR101141038B1 (en) 2010-03-16 2012-05-03 한국전기연구원 Parallel DC/DC converter control system using CAN communication
JP2017508434A (en) * 2014-03-12 2017-03-23 クゥアルコム・インコーポレイテッドQualcomm Incorporated Average current mode control of multiphase switching power converters.

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